Noise correlation #706
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I had a bit of a conceptual question about the IBM AI HW Kit. Is noise between memristors within a crossbar tile correlated? If so, in what way? If not, why was this decision made? Especially when testing noise mitigation techniques/algorithms/designs, this might be a point of interest for people. Many thanks! |
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Replies: 1 comment 3 replies
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Typically they are not correlated between memristors. Most of the noise is unstructured (mean zero and symmetric) with the exception of IR drop. In IR drop, the current you observe at an ADC is lower than what it should be. |
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Out of curiosity, why was this chosen? Would your team ever consider adding features for correlated noise (or be open to such a contribution)? Please correct me if I am wrong, but it seems intuitively plausible that thermal noise, sneak-path currents and such things would affect memristors in groupings (either spatially close, or an entire tile) -- which would mean that the noise mitigation techniques one might want to implement need this noise to be simulated to be properly evaluated. |
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I am not an expert in device physics, but I think many of these interactions are hard to model efficiently and might not account for much of the stochasticity, so it might not be worth modelling it. |
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Thank you, that clarifies it quite well. |
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I am not an expert in device physics, but I think many of these interactions are hard to model efficiently and might not account for much of the stochasticity, so it might not be worth modelling it.
If you have a noise model that needs to model these interactions, you are always welcome to open a PR! We recently had a PR that also added a new noise model quite successfully.