"28c3f1b36a66af4fbbe78d367e9be5cbbdc88147": "BACKPORT: iommu/vt-d: Fix race condition during PASID entry replacement\n\nThe Intel VT-d PASID table entry is 512 bits (64 bytes). When replacing\nan active PASID entry (e.g., during domain replacement), the current\nimplementation calculates a new entry on the stack and copies it to the\ntable using a single structure assignment.\n\n struct pasid_entry *pte, new_pte;\n\n pte = intel_pasid_get_entry(dev, pasid);\n pasid_pte_config_first_level(iommu, &new_pte, ...);\n *pte = new_pte;\n\nBecause the hardware may fetch the 512-bit PASID entry in multiple\n128-bit chunks, updating the entire entry while it is active (Present\nbit set) risks a \"torn\" read. In this scenario, the IOMMU hardware\ncould observe an inconsistent state \u2014 partially new data and partially\nold data \u2014 leading to unpredictable behavior or spurious faults.\n\nFix this by removing the unsafe \"replace\" helpers and following the\n\"clear-then-update\" flow, which ensures the Present bit is cleared and\nthe required invalidation handshake is completed before the new\nconfiguration is applied.\n\nFixes: 7543ee63e811 (\"iommu/vt-d: Add pasid replace helpers\")\nSigned-off-by: Lu Baolu <baolu.lu@linux.intel.com>\nReviewed-by: Samiullah Khawaja <skhawaja@google.com>\nReviewed-by: Kevin Tian <kevin.tian@intel.com>\nLink: https://lore.kernel.org/r/20260120061816.2132558-4-baolu.lu@linux.intel.com\nSigned-off-by: Joerg Roedel <joerg.roedel@amd.com>\nBug: 517578243,517579977\nBug: 541039453\nCVE: CVE-2026-45945\nChange-Id: If6a66bcf2ad67f59d79d6267608cd5907a32a584\n(cherry picked from commit c3b1edea3791fa91ab7032faa90355913ad9451b)\n[vineethrp: Adapted for pKVM-IA: remove the dual-mode (host + hypervisor)\n variants of the replace helpers along with their pKVM hypercall\n forwarding branches. With pKVM enabled, the generic host setup paths\n tear down an active entry through the pKVM teardown hypercall before\n issuing the setup hypercall. The hypervisor derives the old entry's DID\n and PGD from the live entry; its deferred entry clear is handled by\n intel_pasid_clear_entry_safe().]\nSigned-off-by: Vineeth Pillai <vineethrp@google.com>\n(cherry picked from commit 3be13f85015cfe863eae0838464dbf0e2c742e90)\nSigned-off-by: Hubert Mazur <hmazur@google.com>",
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