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Copy pathFlashROM_100_PLCC.kicad_pro
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FlashROM_100_PLCC.kicad_pro
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{
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"too_many_vias": "error",
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"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
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"min_through_hole_diameter": 0.3,
"min_track_width": 0.16,
"min_via_annular_width": 0.049999999999999996,
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"layer_presets": []
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"boards": [],
"cvpcb": {
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"rule_severities": {
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"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
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"unresolved_variable": "error",
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},
"libraries": {
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"meta": {
"filename": "FlashROM_100_PLCC.kicad_pro",
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"net_settings": {
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"diff_pair_gap": 0.3,
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"diff_pair_width": 0.3,
"line_style": 0,
"microvia_diameter": 0.5,
"microvia_drill": 0.3,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.18,
"via_diameter": 0.5,
"via_drill": 0.3,
"wire_width": 6.0
}
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"pcbnew": {
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"page_layout_descr_file": ""
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"schematic": {
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"drawing": {
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"junction_size_choice": 3,
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"legacy_lib_dir": "",
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"ngspice": {
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"meta": {
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"model_mode": 0,
"workbook_filename": ""
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"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
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"sheets": [
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],
"text_variables": {}
}