From 3a258eb3ac0cc23efddd48bb1580ae3c5bdcc09f Mon Sep 17 00:00:00 2001 From: Roy Yang Date: Sun, 1 Dec 2024 04:33:02 +0000 Subject: [PATCH] Add Understand PCIe page --- content/posts/understand-pcie.md | 40 ++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 content/posts/understand-pcie.md diff --git a/content/posts/understand-pcie.md b/content/posts/understand-pcie.md new file mode 100644 index 0000000..78ec48a --- /dev/null +++ b/content/posts/understand-pcie.md @@ -0,0 +1,40 @@ +--- +title: "Understand PCIe" +date: 2024-12-01T03:13:59Z +draft: true +--- + +## Objective +To understand PCI Express(PCIe) from the perspective of software engigneering. + +## Concepts + +### PCIe + +PCIe, or peripheral component interconnect express, is an interface standard for +connecting high-speed I/O components such as GPUs, RAID/HBA cards, Ethernet +cards, SSD add-on cards or WiFi cards. + +PCIe is point to point serial connection. + +### Slots, Links and Lanes. + +PCIes slots come in different physical configurations: x1, x4, x8 and x16. The +number after x tells how many lanes that the PCIe slot has. + +PCIe link is point to point communication channel between two PCIe devices. + +PCIe is a packet based protocol. + +### PCIe versions and transfer rates + + +## Reference +* [Introduction to +PCIe and CXL](https://indico.cern.ch/event/1337180/contributions/5629298/attachments/2883776/5053368/Introduction%20to%20PCI%20Express.pdf) +* [What is PCIe? Understanding PCIe Slots, Cards and Lanes](https://www.crystalrugged.com/knowledge/what-is-pcie-slots-cards-lanes/) +* [PCI Express Wiki](https://en.wikipedia.org/wiki/PCI_Express) +* [Pratical introduction to PCI Express with FPGAs](https://indico.cern.ch/event/121654/attachments/68430/98164/Practical_introduction_to_PCI_Express_with_FPGAs_-_Extended.pdf) +* [PCI Express Tutorial](http://www.verien.com/pcie-primer.html) +* [What is PCIE Express](https://www.synopsys.com/glossary/what-is-pci-express.html) +* [Understanding PCIe Configuration for Maximum Performance](https://enterprise-support.nvidia.com/s/article/understanding-pcie-configuration-for-maximum-performance)