From 62c7ec570451b5cc0cdf8761ebb0fb95b60f8a64 Mon Sep 17 00:00:00 2001 From: Travis Finkenauer Date: Sat, 24 Aug 2024 21:26:39 -0700 Subject: [PATCH] Fix clippy warnings In particular, add explicit type annotations in call to transmute --- capstone-rs/Cargo.toml | 2 +- capstone-rs/examples/demo.rs | 2 +- capstone-rs/src/arch/arm64.rs | 70 ++++++++++++++++++++++++----------- capstone-rs/src/test.rs | 18 ++++----- 4 files changed, 58 insertions(+), 34 deletions(-) diff --git a/capstone-rs/Cargo.toml b/capstone-rs/Cargo.toml index 6adab341..789f3203 100644 --- a/capstone-rs/Cargo.toml +++ b/capstone-rs/Cargo.toml @@ -16,7 +16,7 @@ rust-version.workspace = true travis-ci = { repository = "capstone-rust/capstone-rs" } [dependencies] -capstone-sys = { path = "../capstone-sys", version = "0.16.0", default_features = false } +capstone-sys = { path = "../capstone-sys", version = "0.16.0", default-features = false } libc = { version = "0.2", default-features = false } [dev-dependencies] diff --git a/capstone-rs/examples/demo.rs b/capstone-rs/examples/demo.rs index 387e7068..c786f43c 100644 --- a/capstone-rs/examples/demo.rs +++ b/capstone-rs/examples/demo.rs @@ -48,7 +48,7 @@ fn arch_example(cs: &mut Capstone, code: &[u8]) -> CsResult<()> { ("bytes:", format!("{:?}", i.bytes())), ]; - for &(ref name, ref message) in output.iter() { + for (name, message) in output.iter() { println!("{:4}{:12} {}", "", name, message); } diff --git a/capstone-rs/src/arch/arm64.rs b/capstone-rs/src/arch/arm64.rs index a7ef7bce..aa35ac4a 100644 --- a/capstone-rs/src/arch/arm64.rs +++ b/capstone-rs/src/arch/arm64.rs @@ -4,28 +4,27 @@ use libc::c_uint; pub use crate::arch::arch_builder::arm64::*; use crate::arch::DetailsArchInsn; -use capstone_sys::{arm64_op_mem, arm64_op_type, cs_arm64, cs_arm64_op}; use crate::instruction::{RegId, RegIdInt}; +use capstone_sys::{arm64_op_mem, arm64_op_type, cs_arm64, cs_arm64_op}; use core::convert::From; use core::{cmp, fmt, mem, slice}; // Re-exports -pub use capstone_sys::arm64_insn_group as Arm64InsnGroup; -pub use capstone_sys::arm64_insn as Arm64Insn; -pub use capstone_sys::arm64_reg as Arm64Reg; +pub use capstone_sys::arm64_barrier_op as ArmBarrierOp; +pub use capstone_sys::arm64_barrier_op as Arm64BarrierOp; pub use capstone_sys::arm64_cc as Arm64CC; pub use capstone_sys::arm64_extender as Arm64Extender; -pub use capstone_sys::arm64_vas as Arm64Vas; -pub use capstone_sys::arm64_pstate as Arm64Pstate; +pub use capstone_sys::arm64_insn as Arm64Insn; +pub use capstone_sys::arm64_insn_group as Arm64InsnGroup; pub use capstone_sys::arm64_prefetch_op as ArmPrefetchOp; -pub use capstone_sys::arm64_barrier_op as ArmBarrierOp; -pub use capstone_sys::arm64_sysreg as Arm64Sysreg; +pub use capstone_sys::arm64_pstate as Arm64Pstate; +pub use capstone_sys::arm64_reg as Arm64Reg; pub use capstone_sys::arm64_sys_op as Arm64SysOp; -pub use capstone_sys::arm64_barrier_op as Arm64BarrierOp; +pub use capstone_sys::arm64_sysreg as Arm64Sysreg; +pub use capstone_sys::arm64_vas as Arm64Vas; -use capstone_sys::cs_arm64_op__bindgen_ty_2; use capstone_sys::arm64_shifter; - +use capstone_sys::cs_arm64_op__bindgen_ty_2; /// Contains ARM64-specific details for an instruction pub struct Arm64InsnDetail<'a>(pub(crate) &'a cs_arm64); @@ -63,8 +62,12 @@ impl Arm64OperandType { ARM64_OP_MEM => Mem(Arm64OpMem(unsafe { value.mem })), ARM64_OP_FP => Fp(unsafe { value.fp }), ARM64_OP_CIMM => Cimm(unsafe { value.imm }), - ARM64_OP_REG_MRS => RegMrs(unsafe { mem::transmute(value.reg) }), - ARM64_OP_REG_MSR => RegMsr(unsafe { mem::transmute(value.reg) }), + ARM64_OP_REG_MRS => RegMrs(unsafe { + mem::transmute::(value.reg as Arm64Reg::Type) + }), + ARM64_OP_REG_MSR => RegMsr(unsafe { + mem::transmute::(value.reg as Arm64Reg::Type) + }), ARM64_OP_PSTATE => Pstate(unsafe { value.pstate }), ARM64_OP_SYS => Sys(unsafe { value.sys }), ARM64_OP_PREFETCH => Prefetch(unsafe { value.prefetch }), @@ -187,7 +190,7 @@ impl Default for Arm64Operand { vas: Arm64Vas::ARM64_VAS_INVALID, shift: Arm64Shift::Invalid, ext: Arm64Extender::ARM64_EXT_INVALID, - op_type: Arm64OperandType::Invalid + op_type: Arm64OperandType::Invalid, } } } @@ -274,9 +277,9 @@ mod test { use super::arm64_op_type::*; use super::Arm64OperandType::*; use super::Arm64Sysreg::*; - use capstone_sys::*; use capstone_sys::arm64_prefetch_op::*; use capstone_sys::arm64_pstate::*; + use capstone_sys::*; fn t( op_type_value: (arm64_op_type, cs_arm64_op__bindgen_ty_2), @@ -300,11 +303,21 @@ mod test { Imm(42), ); t( - (ARM64_OP_REG_MRS, cs_arm64_op__bindgen_ty_2 { reg: ARM64_SYSREG_MDRAR_EL1 as arm64_reg::Type }), + ( + ARM64_OP_REG_MRS, + cs_arm64_op__bindgen_ty_2 { + reg: ARM64_SYSREG_MDRAR_EL1 as arm64_reg::Type, + }, + ), RegMrs(ARM64_SYSREG_MDRAR_EL1), ); t( - (ARM64_OP_PSTATE, cs_arm64_op__bindgen_ty_2 { pstate: ARM64_PSTATE_SPSEL }), + ( + ARM64_OP_PSTATE, + cs_arm64_op__bindgen_ty_2 { + pstate: ARM64_PSTATE_SPSEL, + }, + ), Pstate(Arm64Pstate::ARM64_PSTATE_SPSEL), ); t( @@ -316,17 +329,30 @@ mod test { Cimm(42), ); t( - (ARM64_OP_REG_MSR, cs_arm64_op__bindgen_ty_2 { - reg: arm64_sysreg::ARM64_SYSREG_ICC_EOIR1_EL1 as arm64_reg::Type }), + ( + ARM64_OP_REG_MSR, + cs_arm64_op__bindgen_ty_2 { + reg: arm64_sysreg::ARM64_SYSREG_ICC_EOIR1_EL1 as arm64_reg::Type, + }, + ), RegMsr(arm64_sysreg::ARM64_SYSREG_ICC_EOIR1_EL1), ); t( - (ARM64_OP_SYS, cs_arm64_op__bindgen_ty_2 { sys: arm64_sys_op::ARM64_AT_S1E0R }), + ( + ARM64_OP_SYS, + cs_arm64_op__bindgen_ty_2 { + sys: arm64_sys_op::ARM64_AT_S1E0R, + }, + ), Sys(arm64_sys_op::ARM64_AT_S1E0R), ); t( - (ARM64_OP_PREFETCH, cs_arm64_op__bindgen_ty_2 { - prefetch: ARM64_PRFM_PLDL2KEEP }), + ( + ARM64_OP_PREFETCH, + cs_arm64_op__bindgen_ty_2 { + prefetch: ARM64_PRFM_PLDL2KEEP, + }, + ), Prefetch(ARM64_PRFM_PLDL2KEEP), ); } diff --git a/capstone-rs/src/test.rs b/capstone-rs/src/test.rs index 6463c051..61854cdb 100644 --- a/capstone-rs/src/test.rs +++ b/capstone-rs/src/test.rs @@ -120,15 +120,13 @@ fn test_x86_names() { assert_eq!(cs.group_name(InsnGroupId(1)), Some(String::from("jump"))); let reg_id = RegId(250); - match cs.reg_name(reg_id) { - Some(_) => panic!("invalid register worked"), - None => {} + if let Some(_) = cs.reg_name(reg_id) { + panic!("invalid register worked") } let insn_id = InsnId(6000); - match cs.insn_name(insn_id) { - Some(_) => panic!("invalid instruction worked"), - None => {} + if let Some(_) = cs.insn_name(insn_id) { + panic!("invalid instruction worked") } assert_eq!(cs.group_name(InsnGroupId(250)), None); @@ -3361,7 +3359,7 @@ fn test_cbpf() { println!(); eprintln!("{}", i); - let detail: InsnDetail = cs.insn_detail(&i).expect("Failed to get insn detail"); + let detail: InsnDetail = cs.insn_detail(i).expect("Failed to get insn detail"); let arch_detail: ArchDetail = detail.arch_detail(); let ops = arch_detail.operands(); @@ -3373,7 +3371,7 @@ fn test_cbpf() { ("insn groups:", group_names(&cs, detail.groups())), ]; - for &(ref name, ref message) in output.iter() { + for (name, message) in output.iter() { eprintln!("{:4}{:12} {}", "", name, message); } @@ -3406,7 +3404,7 @@ fn test_ebpf() { println!(); eprintln!("{}", i); - let detail: InsnDetail = cs.insn_detail(&i).expect("Failed to get insn detail"); + let detail: InsnDetail = cs.insn_detail(i).expect("Failed to get insn detail"); let arch_detail: ArchDetail = detail.arch_detail(); let ops = arch_detail.operands(); @@ -3418,7 +3416,7 @@ fn test_ebpf() { ("insn groups:", group_names(&cs, detail.groups())), ]; - for &(ref name, ref message) in output.iter() { + for (name, message) in output.iter() { eprintln!("{:4}{:12} {}", "", name, message); }