From 7a3a864b353e51944a8281d3ee3e830772d48d72 Mon Sep 17 00:00:00 2001 From: Aumetra Weisman Date: Mon, 3 Jun 2024 15:19:54 +0200 Subject: [PATCH] Replace explicit bitmask requirement with abstraction --- src/util/simd/v256.rs | 13 ++++++++----- src/util/simd/v512.rs | 13 ++++++++----- 2 files changed, 16 insertions(+), 10 deletions(-) diff --git a/src/util/simd/v256.rs b/src/util/simd/v256.rs index fd681d4..4e0f5a6 100644 --- a/src/util/simd/v256.rs +++ b/src/util/simd/v256.rs @@ -1,6 +1,6 @@ use std::ops::{BitAnd, BitOr, BitOrAssign}; -use super::{bits::combine_u16, Mask, Simd}; +use super::{bits::combine_u16, BitMask, Mask, Simd}; use crate::impl_lanes; impl_lanes!([impl Simd256u] 32); @@ -19,7 +19,10 @@ pub struct Simd256i((B, B)); #[repr(transparent)] pub struct Mask256(pub(crate) (M, M)); -impl> Mask for Mask256 { +impl Mask for Mask256 +where + ::BitMask: BitMask, +{ type BitMask = u32; type Element = u8; @@ -31,7 +34,7 @@ impl> Mask for Mask256 { let(v0, v1) = self.0; unsafe { super::neon::to_bitmask32(v0.0, v1.0) } } else { - combine_u16(self.0 .0.bitmask(), self.0 .1.bitmask()) + combine_u16(self.0.0.bitmask().as_primitive(), self.0.1.bitmask().as_primitive()) } } } @@ -75,7 +78,7 @@ impl BitAnd> for Mask256 { impl Simd for Simd256u where B: Simd, - B::Mask: Mask, + ::BitMask: BitMask, { const LANES: usize = 32; @@ -125,7 +128,7 @@ where impl Simd for Simd256i where B: Simd, - B::Mask: Mask, + ::BitMask: BitMask, { const LANES: usize = 32; diff --git a/src/util/simd/v512.rs b/src/util/simd/v512.rs index f5b44be..cb7da1b 100644 --- a/src/util/simd/v512.rs +++ b/src/util/simd/v512.rs @@ -1,6 +1,6 @@ use std::ops::{BitAnd, BitOr, BitOrAssign}; -use super::{bits::combine_u32, Mask, Simd}; +use super::{bits::combine_u32, BitMask, Mask, Simd}; use crate::impl_lanes; impl_lanes!([impl Simd512u] 64); @@ -19,7 +19,10 @@ pub struct Simd512i((B, B)); #[repr(transparent)] pub struct Mask512((M, M)); -impl> Mask for Mask512 { +impl Mask for Mask512 +where + ::BitMask: BitMask, +{ type BitMask = u64; type Element = u8; @@ -33,7 +36,7 @@ impl> Mask for Mask512 { let (m2, m3) = v1.0; unsafe { super::neon::to_bitmask64(m0.0, m1.0, m2.0, m3.0) } } else { - combine_u32(self.0 .0.bitmask(), self.0 .1.bitmask()) + combine_u32(self.0.0.bitmask().as_primitive(), self.0.1.bitmask().as_primitive()) } } } @@ -77,7 +80,7 @@ impl BitAnd> for Mask512 { impl Simd for Simd512u where B: Simd, - B::Mask: Mask, + ::BitMask: BitMask, { const LANES: usize = 64; type Element = u8; @@ -126,7 +129,7 @@ where impl Simd for Simd512i where B: Simd, - B::Mask: Mask, + ::BitMask: BitMask, { const LANES: usize = 64; type Element = i8;