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lp313x.patch
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diff -crBN u-boot-1.3.4-virgin/board/lpc3131ea/config.mk u-boot-1.3.4/board/lpc3131ea/config.mk
*** u-boot-1.3.4-virgin/board/lpc3131ea/config.mk 1970-01-01 01:00:00.000000000 +0100
--- u-boot-1.3.4/board/lpc3131ea/config.mk 2009-03-29 06:12:06.000000000 +0200
***************
*** 0 ****
--- 1 ----
+ TEXT_BASE = 0x11029000
diff -crBN u-boot-1.3.4-virgin/board/lpc3131ea/lpc3131.c u-boot-1.3.4/board/lpc3131ea/lpc3131.c
*** u-boot-1.3.4-virgin/board/lpc3131ea/lpc3131.c 1970-01-01 01:00:00.000000000 +0100
--- u-boot-1.3.4/board/lpc3131ea/lpc3131.c 2009-03-29 06:12:06.000000000 +0200
***************
*** 0 ****
--- 1,159 ----
+ /*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <[email protected]>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+ #include <common.h>
+ #include <asm/arch/hardware.h>
+
+
+ DECLARE_GLOBAL_DATA_PTR;
+
+ extern ulong _start;
+ extern ulong _fiq;
+
+ /* ------------------------------------------------------------------------- */
+ /*
+ * Miscelaneous platform dependent initialisations
+ */
+
+ ulong Int_Table[30];
+ #define ARM922T_MMU_CONTROL_V 0x00002000
+
+
+
+
+ void cp15_force_cache_coherence(ulong *start_adr,
+ ulong *end_adr)
+ {
+ register ulong * addr;
+
+ /*******************************************************************
+ * Cache lines are 32-bytes (8 words); clean and invalidate each
+ * line of D-cache and invalidate each line of I-cache within the
+ * address range. Make sure addresses are 32-bit aligned.
+ ******************************************************************/
+ for (addr = (ulong *)((ulong)start_adr & 0xFFFFFFE0);
+ addr < end_adr;
+ addr += 8)
+ {
+ /* p15 is MMU coprocessor, Cache OPS is c7, TLB OPS is c8 */
+ asm("MOV r0, %0" : : "r"(addr));
+ /* Clean and Invalidate D-Cache single entry using MVA format */
+ asm("MCR p15, 0, r0, c7, c14, 1");
+ /* Invalidate I-Cache single entry using MVA format */
+ asm("MCR p15, 0, r0, c7, c5, 1");
+ }
+ /*******************************************************************
+ * Invalidate the I-TLB within the the address range. The I-TLB has
+ * 256 word granularity. Make sure addresses are '256 word' aligned.
+ ******************************************************************/
+ for (addr = (ulong *)((ulong)start_adr & 0xFFFFFC00);
+ addr < end_adr;
+ addr += 256)
+ {
+ asm("MOV r0, %0" : : "r"(addr));
+ /* Invalidate I-TLB using MVA format */
+ asm("MCR p15, 0, r0, c8, c5, 1");
+ asm("NOP");
+ asm("NOP");
+ }
+ }
+
+
+ ulong cp15_get_mmu_control_reg(void)
+ {
+ register ulong mmu_reg;
+
+ asm("MRC p15, 0, %0, c1, c0, 0" : "=r"(mmu_reg));
+
+ return (mmu_reg);
+ }
+
+ void int_initialize(void)
+ {
+
+ ulong * pDest, * pDestCopy, * pSrc;
+ long VecSize, Idx;
+
+ /* Set the vector base (we don't use direct vectoring, so this is 0) */
+ PUT32(INT_VECTOR_0,0); /* IRQ Target */
+ PUT32(INT_VECTOR_1,0); /* FIQ Target */
+
+ PUT32(INT_PRIORITYMASK_0,0); /* priority (unmasked) */
+ PUT32(INT_PRIORITYMASK_0,0); /* priority (unmasked) */
+
+ pDest = (ulong *)0x60000400;
+
+ Int_Table[0] = 0;
+ for (Idx = 1; Idx < 30; Idx++)
+ {
+ pDest[Idx] = (1<<28)|(1<<27)|(1<<26)|(1<<25);
+ Int_Table[Idx] = 0;
+ }
+
+ pDest = (ulong *) 0x00000000;
+
+ /* If high bit is set, use high vector addresses instead */
+ if ((cp15_get_mmu_control_reg() & ARM922T_MMU_CONTROL_V) != 0)
+ {
+ pDest = (ulong *) 0xFFFF0000;
+ }
+ pDestCopy = pDest;
+
+ for (pSrc = (ulong *) & _start;
+ pSrc <= (ulong *) &_fiq;
+ pSrc++)
+ {
+ *pDest = *pSrc;
+ pDest++;
+ }
+ /* Write out cached vector table to memory */
+ VecSize = ((long) & _fiq -
+ (long) & _start) / 4;
+ cp15_force_cache_coherence(pDestCopy, (pDestCopy + VecSize));
+
+ }
+
+
+ int board_init(void)
+ {
+
+ /* Setup interrupt controller here */
+ int_initialize();
+
+ /* arch number of AT91SAM9260EK-Board */
+ gd->bd->bi_arch_number = MACH_TYPE_LPC313X;
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+ return 0;
+ }
+
+ /***********************************************************************/
+ int dram_init(void)
+ {
+ gd->bd->bi_dram[0].start = PHYS_SDRAM;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+ return 0;
+ }
+
diff -crBN u-boot-1.3.4-virgin/board/lpc3131ea/Makefile u-boot-1.3.4/board/lpc3131ea/Makefile
*** u-boot-1.3.4-virgin/board/lpc3131ea/Makefile 1970-01-01 01:00:00.000000000 +0100
--- u-boot-1.3.4/board/lpc3131ea/Makefile 2009-03-29 06:12:06.000000000 +0200
***************
*** 0 ****
--- 1,54 ----
+ #
+ # (C) Copyright 2003-2008
+ # Wolfgang Denk, DENX Software Engineering, [email protected].
+ #
+ # (C) Copyright 2008
+ # Stelian Pop <[email protected]>
+ # Lead Tech Design <www.leadtechdesign.com>
+ #
+ # See file CREDITS for list of people who contributed to this
+ # project.
+ #
+ # This program is free software; you can redistribute it and/or
+ # modify it under the terms of the GNU General Public License as
+ # published by the Free Software Foundation; either version 2 of
+ # the License, or (at your option) any later version.
+ #
+ # This program is distributed in the hope that it will be useful,
+ # but WITHOUT ANY WARRANTY; without even the implied warranty of
+ # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ # GNU General Public License for more details.
+ #
+ # You should have received a copy of the GNU General Public License
+ # along with this program; if not, write to the Free Software
+ # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ # MA 02111-1307 USA
+ #
+
+ include $(TOPDIR)/config.mk
+
+ LIB = $(obj)lib$(BOARD).a
+
+ COBJS-y += lpc3131.o
+
+ SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+ OBJS := $(addprefix $(obj),$(COBJS-y))
+ SOBJS := $(addprefix $(obj),$(SOBJS))
+
+ $(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+ clean:
+ rm -f $(SOBJS) $(OBJS)
+
+ distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+ #########################################################################
+
+ # defines $(obj).depend target
+ include $(SRCTREE)/rules.mk
+
+ sinclude $(obj).depend
+
+ #########################################################################
diff -crBN u-boot-1.3.4-virgin/common/cmd_mmc.c u-boot-1.3.4/common/cmd_mmc.c
*** u-boot-1.3.4-virgin/common/cmd_mmc.c 2008-08-12 16:08:38.000000000 +0200
--- u-boot-1.3.4/common/cmd_mmc.c 2009-03-29 06:12:06.000000000 +0200
***************
*** 23,29 ****
#include <common.h>
#include <command.h>
! #include <mmc.h>
int do_mmc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
--- 23,30 ----
#include <common.h>
#include <command.h>
! #include "../cpu/arm926ejs/lpc313x/lpc313x_mci_driver.h"
!
int do_mmc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
diff -crBN u-boot-1.3.4-virgin/common/cmd_nvedit.c u-boot-1.3.4/common/cmd_nvedit.c
*** u-boot-1.3.4-virgin/common/cmd_nvedit.c 2008-08-12 16:08:38.000000000 +0200
--- u-boot-1.3.4/common/cmd_nvedit.c 2009-03-29 06:12:06.000000000 +0200
***************
*** 59,66 ****
!defined(CFG_ENV_IS_IN_NAND) && \
!defined(CFG_ENV_IS_IN_ONENAND) && \
!defined(CFG_ENV_IS_IN_SPI_FLASH) && \
! !defined(CFG_ENV_IS_NOWHERE)
! # error Define one of CFG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|ONENAND|SPI_FLASH|NOWHERE}
#endif
#define XMK_STR(x) #x
--- 59,67 ----
!defined(CFG_ENV_IS_IN_NAND) && \
!defined(CFG_ENV_IS_IN_ONENAND) && \
!defined(CFG_ENV_IS_IN_SPI_FLASH) && \
! !defined(CFG_ENV_IS_NOWHERE) && \
! !defined(CFG_ENV_IS_IN_SPINORFLASH)
! # error Define one of CFG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|ONENAND|SPI_FLASH|NOWHERE|SPINORFLASH}
#endif
#define XMK_STR(x) #x
***************
*** 543,549 ****
#if ((defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) \
|| (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \
|| (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) \
! || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_ONENAND))) \
&& !defined(CFG_ENV_IS_NOWHERE))
int do_saveenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
--- 544,551 ----
#if ((defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) \
|| (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \
|| (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) \
! || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_ONENAND)) \
! || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_SPINOR))) \
&& !defined(CFG_ENV_IS_NOWHERE))
int do_saveenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
***************
*** 599,605 ****
#if ((defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) \
|| (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \
|| (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) \
! || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_ONENAND))) \
&& !defined(CFG_ENV_IS_NOWHERE))
U_BOOT_CMD(
saveenv, 1, 0, do_saveenv,
--- 601,608 ----
#if ((defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) \
|| (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \
|| (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) \
! || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_ONENAND)) \
! || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_SPINOR))) \
&& !defined(CFG_ENV_IS_NOWHERE))
U_BOOT_CMD(
saveenv, 1, 0, do_saveenv,
diff -crBN u-boot-1.3.4-virgin/common/cmd_spinor.c u-boot-1.3.4/common/cmd_spinor.c
*** u-boot-1.3.4-virgin/common/cmd_spinor.c 1970-01-01 01:00:00.000000000 +0100
--- u-boot-1.3.4/common/cmd_spinor.c 2009-03-29 06:12:06.000000000 +0200
***************
*** 0 ****
--- 1,69 ----
+ #include <common.h>
+
+ #ifdef CONFIG_CMD_SPINOR
+
+ #include <command.h>
+ #include "../cpu/arm926ejs/lpc313x/lpc313x_spi_driver.h"
+
+
+ int do_spinorwrite (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+ {
+ ulong i,start,length,wr,offset;
+ unsigned char * pSource;
+ char *ep;
+
+ if (argc < 3) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return(1);
+ }
+ offset = simple_strtoul (argv[1], &ep, 16);
+ start = simple_strtoul (argv[2], &ep, 16);
+ length = simple_strtoul (argv[3], &ep, 16);
+
+ printf("Write %X Bytes From %X to %X\n",length,start,offset);
+
+ if(spinor_write((unsigned char *)start, offset, length) == _ERROR)
+ {
+ printf("Failed\n");
+ return 1;
+ }
+ printf("Done\n");
+ return 0;
+ }
+
+ int do_spinorread (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+ {
+ ulong i,start,length,offset;
+ unsigned char * pDest;
+ char *ep;
+
+ if (argc < 3) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return(1);
+ }
+ offset = simple_strtoul (argv[1], &ep, 16);
+ start = simple_strtoul (argv[2], &ep, 16);
+ length = simple_strtoul (argv[3], &ep, 16);
+
+ printf("Read %X Bytes From %X to %X\n",length,offset,start);
+
+ pDest = (unsigned char *)start;
+
+ spinor_read(pDest, offset, length);
+
+ return 0;
+ }
+
+ U_BOOT_CMD(
+ spinorwrite, 4, 0, do_spinorwrite,
+ "spinorwrite - Copy RAM to SPI NOR\n",
+ "spinorwrite x y z Where x is the SPINOR address, y is the source address, z is the number of bytes"
+ );
+
+ U_BOOT_CMD(
+ spinorread, 4, 0, do_spinorread,
+ "spinorread - Copy RAM to SPI NOR\n",
+ "spinorread x y z Where x is the SPINOR address, y is the dest address, z is the number of bytes"
+ );
+
+ #endif
diff -crBN u-boot-1.3.4-virgin/common/cmd_ttest.c u-boot-1.3.4/common/cmd_ttest.c
*** u-boot-1.3.4-virgin/common/cmd_ttest.c 1970-01-01 01:00:00.000000000 +0100
--- u-boot-1.3.4/common/cmd_ttest.c 2009-03-29 06:12:06.000000000 +0200
***************
*** 0 ****
--- 1,42 ----
+ #include <common.h>
+ #include <part.h>
+ #include <config.h>
+ #include <command.h>
+ #include <image.h>
+ #include <linux/ctype.h>
+ #include <asm/byteorder.h>
+ #include "../cpu/arm926ejs/lpc313x/lpc313x_ioconf_driver.h"
+
+ #if CONFIG_CMD_TTEST
+
+ int do_ttest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+ {
+ ulong period;
+ char *ep;
+ if (argc < 1) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return(1);
+ }
+ period = simple_strtoul (argv[1], &ep, 10);
+
+ printf("Timer Test: period %d uS\n",period);
+
+ while(1)
+ {
+ gpio_set_outpin_high(IOCONF_GPIO, 2);
+ udelay(period/2);
+ gpio_set_outpin_low(IOCONF_GPIO, 2);
+ udelay(period/2);
+ }
+
+
+ return(0);
+ }
+
+ U_BOOT_CMD(
+ ttest, 2, 0, do_ttest,
+ "ttest - timer test, blinks LED at specified rate\n",
+ "ttest yyy where yyy is the period in uS"
+ );
+ #endif
+
diff -crBN u-boot-1.3.4-virgin/common/env_common.c u-boot-1.3.4/common/env_common.c
*** u-boot-1.3.4-virgin/common/env_common.c 2008-08-12 16:08:38.000000000 +0200
--- u-boot-1.3.4/common/env_common.c 2009-03-29 06:12:06.000000000 +0200
***************
*** 134,140 ****
};
#if defined(CFG_ENV_IS_IN_NAND) /* Environment is in Nand Flash */ \
! || defined(CFG_ENV_IS_IN_SPI_FLASH)
int default_environment_size = sizeof(default_environment);
#endif
--- 134,141 ----
};
#if defined(CFG_ENV_IS_IN_NAND) /* Environment is in Nand Flash */ \
! || defined(CFG_ENV_IS_IN_SPI_FLASH)\
! || defined(CFG_ENV_IS_IN_SPINORFLASH)
int default_environment_size = sizeof(default_environment);
#endif
diff -crBN u-boot-1.3.4-virgin/common/env_spinorflash.c u-boot-1.3.4/common/env_spinorflash.c
*** u-boot-1.3.4-virgin/common/env_spinorflash.c 1970-01-01 01:00:00.000000000 +0100
--- u-boot-1.3.4/common/env_spinorflash.c 2009-03-29 06:12:06.000000000 +0200
***************
*** 0 ****
--- 1,115 ----
+ /* LowLevel function for spinorflash environment support
+ * Author : Gilles Gastaldi (Atmel)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+ #include <common.h>
+
+ #if defined(CFG_ENV_IS_IN_SPINORFLASH) /* Environment is in SPI NOR Flash */
+
+ #include <command.h>
+ #include <environment.h>
+ #include <linux/stddef.h>
+ #include "../cpu/arm926ejs/lpc313x/lpc313x_spi_driver.h"
+
+
+ STATUS spinor_write(unsigned char *src, ulong offset, ulong bytecount);
+ STATUS spinor_read(unsigned char *dst, ulong offset, ulong bytecount);
+
+ DECLARE_GLOBAL_DATA_PTR;
+
+ env_t *env_ptr = NULL;
+
+ char * env_name_spec = "spinorflash";
+
+ extern uchar default_environment[];
+ extern int default_environment_size;
+
+ extern int read_spinorflash (unsigned long addr, unsigned long size, char *result);
+ extern int write_spinorflash (unsigned long addr_dest, unsigned long addr_src, unsigned long size);
+
+ /************************************************************************
+ */
+ uchar env_get_char_spec (int index)
+ {
+ return *((uchar *)(gd->env_addr + index));
+ }
+
+ /************************************************************************
+ */
+ void env_relocate_spec (void)
+ {
+ ulong new;
+ long spi_id = spi_open((void *)SPI_BASE, 0);
+ if(spi_id != 0)
+ {
+ if (spinor_init(spi_id) == _ERROR)
+ {
+ printf("Converted SPI NOR flash from 528byte page size mode\n");
+ printf("to 512 byte page mode.\n");
+ printf("So please power cycle the board and try again.\n");
+ return;
+ }
+ }
+ else
+ {
+ memset(env_ptr, 0, sizeof(env_t));
+ memcpy(env_ptr->data, default_environment, default_environment_size);
+ env_ptr->crc = crc32(0, env_ptr->data, ENV_SIZE);
+ gd->env_valid = 1;
+ puts ("*** Warning - bad SPI NOR, using default environment\n\n");
+ return;
+ }
+
+ /* prepare for spinorflash read/write */
+
+ spinor_read((uchar *)env_ptr, CFG_ENV_ADDR, CFG_ENV_SIZE);
+ new = crc32 (0, (const unsigned char *)env_ptr->data, ENV_SIZE);
+
+ if (env_ptr->crc != new) {
+ memset(env_ptr, 0, sizeof(env_t));
+ memcpy(env_ptr->data, default_environment, default_environment_size);
+ env_ptr->crc = crc32(0, env_ptr->data, ENV_SIZE);
+ puts ("*** Warning - bad CRC, using default environment\n\n");
+ }
+ }
+
+ /************************************************************************
+ */
+ int saveenv(void)
+ {
+ ulong new;
+ new = crc32 (0, (const unsigned char *)env_ptr->data, ENV_SIZE);
+ if (env_ptr->crc != new) {
+ puts ("*** Warning - bad CRC, fixing...\n");
+ env_ptr->crc = new;
+ }
+
+ return spinor_write((unsigned char *)env_ptr, CFG_ENV_ADDR, CFG_ENV_SIZE);
+ }
+
+ /************************************************************************
+ */
+ int env_init(void)
+ {
+ gd->env_addr = (ulong)&default_environment[0];
+ gd->env_valid = 1;
+
+ return (0);
+ }
+
+ #endif /* CFG_ENV_IS_IN_DATAFLASH */
diff -crBN u-boot-1.3.4-virgin/common/Makefile u-boot-1.3.4/common/Makefile
*** u-boot-1.3.4-virgin/common/Makefile 2008-08-12 16:08:38.000000000 +0200
--- u-boot-1.3.4/common/Makefile 2009-03-29 06:12:06.000000000 +0200
***************
*** 116,121 ****
--- 116,122 ----
COBJS-y += env_sf.o
COBJS-y += env_nvram.o
COBJS-y += env_nowhere.o
+ COBJS-y += env_spinorflash.o
COBJS-y += exports.o
COBJS-y += flash.o
COBJS-y += fpga.o
***************
*** 141,146 ****
--- 142,149 ----
COBJS-y += crc16.o
COBJS-y += xyzModem.o
COBJS-y += cmd_mac.o
+ COBJS-$(CONFIG_CMD_TTEST) += cmd_ttest.o
+ COBJS-$(CONFIG_CMD_SPINOR) += cmd_spinor.o
COBJS-$(CONFIG_CMD_MFSL) += cmd_mfsl.o
COBJS-$(CONFIG_MP) += cmd_mp.o
COBJS-$(CONFIG_CMD_SF) += cmd_sf.o
diff -crBN u-boot-1.3.4-virgin/cpu/arm926ejs/lpc313x/config.mk u-boot-1.3.4/cpu/arm926ejs/lpc313x/config.mk
*** u-boot-1.3.4-virgin/cpu/arm926ejs/lpc313x/config.mk 1970-01-01 01:00:00.000000000 +0100
--- u-boot-1.3.4/cpu/arm926ejs/lpc313x/config.mk 2009-03-29 06:12:06.000000000 +0200
***************
*** 0 ****
--- 1,3 ----
+ PLATFORM_CPPFLAGS += -march=armv5te
+ PLATFORM_CPPFLAGS += $(call cc-option,-mtune=arm926ejs,)
+ LDSCRIPT := $(SRCTREE)/cpu/arm926ejs/lpc313x/u-boot.lds
diff -crBN u-boot-1.3.4-virgin/cpu/arm926ejs/lpc313x/ea3131_spinor.c u-boot-1.3.4/cpu/arm926ejs/lpc313x/ea3131_spinor.c
*** u-boot-1.3.4-virgin/cpu/arm926ejs/lpc313x/ea3131_spinor.c 1970-01-01 01:00:00.000000000 +0100
--- u-boot-1.3.4/cpu/arm926ejs/lpc313x/ea3131_spinor.c 2009-03-29 06:12:06.000000000 +0200
***************
*** 0 ****
--- 1,520 ----
+ /***********************************************************************
+ * $Id:: ea3131_spinor.c 1633 2009-02-06 02:21:00Z pdurgesh $
+ *
+ * Project: VAL3150 board functions
+ *
+ * Description:
+ * This file contains driver support for various VAL3150 board
+ * functions.
+ *
+ ***********************************************************************
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * products. This software is supplied "AS IS" without any warranties.
+ * NXP Semiconductors assumes no responsibility or liability for the
+ * use of the software, conveys no license or title under any patent,
+ * copyright, or mask work right to the product. NXP Semiconductors
+ * reserves the right to make changes in the software without
+ * notification. NXP Semiconductors also make no representation or
+ * warranty that such application will be suitable for the specified
+ * use without further testing or modification.
+ **********************************************************************/
+
+ #include "lpc313x_spi_driver.h"
+ #include "lpc313x_timer_driver.h"
+ #include "lpc313x_ioconf_driver.h"
+
+ #define MANFID_ATMEL 0x1F
+
+
+ #define CMD_RDID 0x9F /* read device ID */
+ #define CMD_RDSR 0xD7 /* read status register */
+ #define CMD_FAST_READ 0x0B /* read data (extra command setup time allows higher SPI clock) */
+
+ #define CMD_SE 0x7C /* sector erase */
+ #define CMD_BE 0x50 /* block erase */
+ #define CMD_PE 0x81 /* page erase */
+
+ #define CMD_DP 0xB9 /* deep power down */
+ #define CMD_RES 0xAB /* release from deep power down */
+
+ #define DUMMY_BYTE 0xFF
+
+ /* status register defines */
+ #define STATUS_RDY (1 << 7)
+ #define STATUS_COMP (1 << 6)
+ #define STATUS_PROTECT (1 << 1)
+ #define STATUS_P512 (1 << 0)
+
+
+ #define PAGE_528 (528)
+ #define PAGE_512 (512)
+ #define BLOCK_SIZE(pg_sz) (16 * (pg_sz))
+ #define SECTOR_SIZE(pg_sz) (32 * (pg_sz))
+
+ #define SPI_NOR_SLAVE_ID 0
+
+
+ /****************************************************************************
+ ****************************************************************************/
+
+ typedef struct
+ {
+ long spi_id;
+ ulong spi_slave_id;
+ ulong page_size;
+ unsigned char manufacturer_id;
+ unsigned char device_type;
+ unsigned char device_capacity;
+ unsigned char _pad;
+
+ } SPINOR_INFO_T;
+
+ static SPINOR_INFO_T g_spinor;
+
+
+ /***********************************************************************
+ * Private functions
+ **********************************************************************/
+ void spinor_cs_low(void)
+ {
+ gpio_set_outpin_low(IOCONF_SPI, 4);
+ }
+
+ void spinor_cs_high(void)
+ {
+ gpio_set_outpin_high(IOCONF_SPI, 4);
+ }
+
+ /***********************************************************************
+ *
+ * Function: spinor_xfer
+ *
+ * Purpose: Transfer data to/from the serial EEPROM
+ *
+ * Processing:
+ * See function.
+ *
+ * Parameters:
+ * out : Output data
+ * in : Input data
+ * bytes : Number of bytes to send/receive
+ *
+ * Outputs: None
+ *
+ * Returns: TRUE if the byte was transferred
+ *
+ * Notes: Do not use this function to transfer more than 8 bytes!
+ *
+ **********************************************************************/
+ static void spinor_xfer(unsigned char *out,
+ unsigned char *in,
+ int bytes)
+ {
+ long rbytes = 0;
+ volatile ulong status;
+
+ /* flush the FFOS */
+ spi_ioctl(g_spinor.spi_id, SPI_FLUSH_RX_FIFO, 0);
+ /* write the commands */
+ spi_write(g_spinor.spi_id, out, bytes);
+ /* wait till SPI is not busy */
+ do
+ {
+ status = spi_ioctl(g_spinor.spi_id, SPI_GET_STATUS, SPI_FIFO_ST);
+ }
+ while ((status & SPI_ST_TX_EMPTY) != SPI_ST_TX_EMPTY);
+
+ while (rbytes < bytes)
+ {
+ rbytes += spi_read(g_spinor.spi_id, &in [rbytes], 1);
+ }
+ }
+
+
+ static void spinor_read_device_id(unsigned char *device_id)
+ {
+ unsigned char datao [4];
+
+ datao[0] = CMD_RDID;
+ datao[1] = DUMMY_BYTE;
+ datao[2] = DUMMY_BYTE;
+ datao[3] = DUMMY_BYTE;
+
+ /* 3 bytes: manufacturer id, device type, device capacity */
+ spinor_cs_low();
+ spinor_xfer(datao, device_id, 4);
+ spinor_cs_high();
+ }
+
+ static void spinor_write_cfg_reg(void)
+ {
+ unsigned char datai [4], datao [4];
+
+ /* 4 bytes magic sequence to program the device to 512 page device */
+ datao[0] = 0x3D;
+ datao[1] = 0x2A;
+ datao[2] = 0x80;
+ datao[3] = 0xA6;
+
+ spinor_cs_low();
+ spinor_xfer(datao, datai, 4);
+ spinor_cs_high();
+ }
+ static void spinor_simple_command(unsigned char command_byte)
+ {
+ unsigned char dummy;
+ /* should we wait for command to txfer */
+ spinor_cs_low();
+ spinor_xfer(&command_byte, &dummy, 1);
+ spinor_cs_high();
+ }
+
+ static void spinor_enter_deep_power_down(void)
+ {
+ spinor_simple_command(CMD_DP);
+ }
+
+ static void spinor_exit_deep_power_down(void)
+ {
+ spinor_simple_command(CMD_RES);
+ /* max tEDPD in Atmel AT45DB161D-SU datasheet is given as 35 usec */
+ timer_wait_us(NULL, 50);
+ }
+
+ static void spinor_read_status_register(ulong *status)
+ {
+ unsigned char datai [2], datao [2];
+
+ datao[0] = CMD_RDSR;
+ datao[1] = DUMMY_BYTE;
+ spinor_cs_low();
+ spinor_xfer(datao, datai, 2);
+ spinor_cs_high();
+ *status = datai[1];
+ }
+
+ static void spinor_poll_is_busy(void)
+ {
+ ulong status;
+
+ do
+ {
+ timer_wait_us(NULL, 10);
+ spinor_read_status_register(&status);
+ }
+ while ((status & STATUS_RDY) == 0);
+ }
+
+ static void spinor_sector_erase(ulong offset)
+ {
+ unsigned char datai [4], datao [4];
+
+ /* Hopefully sectors are not protected */
+
+ datao[0] = CMD_SE;
+ datao[1] = (offset >> 16) & 0xFF; /* 24bit address upper byte */
+ datao[2] = (offset >> 8) & 0xFF; /* 24bit address middle byte */
+ datao[3] = (offset >> 0) & 0xFF; /* 24bit address least significant byte */
+
+ spinor_cs_low();
+ spinor_xfer(datao, datai, 4);
+ spinor_cs_high();
+
+ spinor_poll_is_busy();
+ }
+
+ static void spinor_page_program(ulong offset, unsigned char *src, ulong bytecount)
+ {
+ unsigned char datai [64], datao [4];
+ ulong count, status;
+
+ /* assuming sectors are not protected. */
+
+ datao[0] = 0x82;
+ datao[1] = (offset >> 16) & 0xFF; /* 24bit address upper byte */
+ datao[2] = (offset >> 8) & 0xFF; /* 24bit address middle byte */
+ datao[3] = (offset >> 0) & 0xFF; /* 24bit address least significant byte */
+ spinor_cs_low();
+
+ spinor_xfer(datao, datai, 4);
+
+ while (bytecount > 0)
+ {
+ count = spi_write(g_spinor.spi_id, src, bytecount);
+ bytecount -= count;
+ src += count;
+ }
+ /* wait for Tx FIFO to empty */
+ do
+ {
+ status = spi_ioctl(g_spinor.spi_id, SPI_GET_STATUS, SPI_FIFO_ST);
+ }
+ while ((status & SPI_ST_TX_EMPTY) != SPI_ST_TX_EMPTY);
+
+
+ /* flush RX FIFO */
+ spi_ioctl(g_spinor.spi_id, SPI_FLUSH_RX_FIFO, 0);
+ spinor_cs_high();
+
+ spinor_poll_is_busy();
+ }
+
+
+
+ /***********************************************************************
+ * Public functions
+ **********************************************************************/
+
+ ulong spinor_get_id(void)
+ {
+ return (g_spinor.manufacturer_id << 8|g_spinor.device_capacity) ;
+ }
+
+ /***********************************************************************
+ *
+ * Function: val3150_board_init
+ *
+ * Purpose: Initializes basic board functions
+ *
+ * Processing:
+ * Does nothing
+ *
+ * Parameters: None
+ *
+ * Outputs: None
+ *
+ * Returns: Nothing
+ *
+ * Notes: None
+ *
+ **********************************************************************/
+ STATUS spinor_init(long spi_id)
+ {
+ unsigned char device_id[4];
+ SPI_SLAVE_CONFIG_T cfg;
+ ulong temp;
+
+ /* de-select the device by pulling the CS high. */
+ gpio_set_outpin_high(IOCONF_SPI, 4);
+
+ g_spinor.spi_id = spi_id;
+ /* on VAL3150 SPI NOR is connected to chip select 0 */
+ g_spinor.spi_slave_id = SPI_NOR_SLAVE_ID;
+
+ /* configure the slave setting with NOR flash timings */
+ cfg.sid = (SPI_SLAVE_ID_T)SPI_NOR_SLAVE_ID;
+ cfg.databits = 8;
+ cfg.words = SPI_FIFO_DEPTH;
+ cfg.mode = SPI_MODE0;
+ cfg.cs_high = 0;
+ cfg.pp_delay = 0;
+ cfg.inter_delay = 0;
+ cfg.clk = 1000000;
+ spi_ioctl(g_spinor.spi_id, SPI_SLAVE_CONFIG, (long)&cfg);
+
+ spi_ioctl(g_spinor.spi_id, SPI_SET_ACTIVE_SLAVE, SPI_NOR_SLAVE_ID);
+ /* make sure SPI module is enabled */
+ spi_ioctl(g_spinor.spi_id, SPI_ENABLE, 1);
+
+ spinor_exit_deep_power_down();
+ spinor_read_device_id(device_id);
+
+ g_spinor.manufacturer_id = device_id[1];
+ g_spinor.device_capacity = device_id[2];
+ g_spinor.device_type = device_id[3];
+
+ /* return if it is not ATMEL device */
+ if (g_spinor.manufacturer_id != MANFID_ATMEL)
+ return _ERROR;
+
+
+ do
+ {
+ spinor_read_status_register(&temp);
+ }
+ while ((temp & STATUS_RDY) == 0);
+
+
+ /* Check if the device is configured as 512 page device.
+ If not program it to be 512 page device.
+ */
+ if ((temp & STATUS_P512) == 0)
+ {
+ g_spinor.page_size = PAGE_528;
+ /* program device to 512 mode. needs a power cycle after this.*/
+ spinor_write_cfg_reg();
+ return _ERROR;
+ }
+ else
+ {
+ g_spinor.page_size = PAGE_512;
+ }
+
+ spinor_enter_deep_power_down();
+
+ return g_spinor.page_size;
+ }
+
+
+ STATUS spinor_read(unsigned char *dst, ulong offset, ulong bytecount)
+ {
+ unsigned char datai [5], datao [5];
+ long count, rbytes;
+ volatile ulong status = 0;
+
+ if (g_spinor.spi_id == 0)
+ return _ERROR;
+
+ spi_ioctl(g_spinor.spi_id, SPI_SET_ACTIVE_SLAVE, SPI_NOR_SLAVE_ID);
+ spinor_exit_deep_power_down();
+
+ datao[0] = (CMD_FAST_READ); /* FAST_READ is safe at all supported SPI speeds... */
+ datao[1] = ((offset >> 16) & 0xFF); /* 24bit address upper byte */
+ datao[2] = ((offset >> 8) & 0xFF); /* 24bit address middle byte */
+ datao[3] = ((offset >> 0) & 0xFF); /* 24bit address least significant byte */
+ datao[4] = (0); /* dummy byte */
+
+ spinor_cs_low();
+ gpio_set_outpin_low(IOCONF_SPI, 4);
+ spinor_xfer(datao, datai, 5);
+
+ /* wait until both FIFOs are empty */
+ status = 0;
+ while ((status & (SPI_ST_RX_EMPTY | SPI_ST_TX_EMPTY)) !=