From 1b66c148cce2699c3f5e470fa82f0efb192eb00a Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 19 Nov 2023 15:55:24 +0100
Subject: [PATCH 001/204] UAC2: Implement feedback by fifo counting.

---
 src/class/audio/audio_device.c | 169 ++++++++++++++++++++++-----------
 src/class/audio/audio_device.h |  11 +--
 2 files changed, 114 insertions(+), 66 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 9ba38a20c2..4ca95d4e70 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -2,6 +2,7 @@
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Reinhard Panhuber, Jerzy Kasenberg
+ * Copyright (c) 2023 HiFiPhile
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -319,7 +320,8 @@ typedef struct
 
 #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
   struct {
-    CFG_TUSB_MEM_ALIGN uint32_t value;  // Feedback value for asynchronous mode (in 16.16 format).
+    CFG_TUSB_MEM_ALIGN uint32_t send_buf;
+    uint32_t value;       // Feedback value for asynchronous mode (in 16.16 format).
     uint32_t min_value;   // min value according to UAC2 FMT-2.0 section 2.3.1.1.
     uint32_t max_value;   // max value according to UAC2 FMT-2.0 section 2.3.1.1.
 
@@ -335,12 +337,12 @@ typedef struct
         uint32_t mclk_freq;
       }fixed;
 
-#if 0 // implement later
       struct {
-        uint32_t nominal_value;
-        uint32_t threshold_bytes;
+        uint32_t nom_value;     // In 16.16 format
+        uint32_t fifo_lvl_avg;  // In 16.16 format
+        uint16_t fifo_lvl_thr;  // fifo level threshold
+        uint16_t rate_const[2]; // pre-computed feedback/fifo_depth rate
       }fifo_count;
-#endif
     }compute;
 
   } feedback;
@@ -473,7 +475,8 @@ static uint16_t audiod_tx_packet_size(const uint16_t* norminal_size, uint16_t da
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
-static bool set_fb_params_freq(audiod_function_t* audio, uint32_t sample_freq, uint32_t mclk_freq);
+static bool audiod_set_fb_params_freq(audiod_function_t* audio, uint32_t sample_freq, uint32_t mclk_freq);
+static void audiod_fb_fifo_count_update(audiod_function_t* audio, uint16_t lvl_new);
 #endif
 
 bool tud_audio_n_mounted(uint8_t func_id)
@@ -566,7 +569,7 @@ static bool audiod_rx_done_cb(uint8_t rhport, audiod_function_t* audio, uint16_t
     TU_VERIFY(tud_audio_rx_done_pre_read_cb(rhport, n_bytes_received, idx_audio_fct, audio->ep_out, audio->alt_setting[idxItf]));
   }
 
-#if CFG_TUD_AUDIO_ENABLE_DECODING && CFG_TUD_AUDIO_ENABLE_EP_OUT
+#if CFG_TUD_AUDIO_ENABLE_DECODING
 
   switch (audio->format_type_rx)
   {
@@ -615,6 +618,13 @@ static bool audiod_rx_done_cb(uint8_t rhport, audiod_function_t* audio, uint16_t
   TU_VERIFY(usbd_edpt_xfer_fifo(rhport, audio->ep_out, &audio->ep_out_ff, audio->ep_out_sz), false);
 #endif
 
+#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+  if(audio->feedback.compute_method == AUDIO_FEEDBACK_METHOD_FIFO_COUNT)
+  {
+    audiod_fb_fifo_count_update(audio, tu_fifo_count(&audio->ep_out_ff));
+  }
+#endif
+
 #endif
 
   // Call a weak callback here - a possibility for user to get informed decoding was completed
@@ -725,6 +735,13 @@ static bool audiod_decode_type_I_pcm(uint8_t rhport, audiod_function_t* audio, u
   // Number of bytes should be a multiple of CFG_TUD_AUDIO_N_BYTES_PER_SAMPLE_RX * CFG_TUD_AUDIO_N_CHANNELS_RX but checking makes no sense - no way to correct it
   // TU_VERIFY(cnt != n_bytes);
 
+#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+  if(audio->feedback.compute_method == AUDIO_FEEDBACK_METHOD_FIFO_COUNT)
+  {
+    audiod_fb_fifo_count_update(audio, tu_fifo_count(&audio->rx_supp_ff[0]));
+  }
+#endif
+
   return true;
 }
 #endif //CFG_TUD_AUDIO_ENABLE_DECODING
@@ -1067,9 +1084,29 @@ static uint16_t audiod_encode_type_I_pcm(uint8_t rhport, audiod_function_t* audi
 // This function is called once a transmit of a feedback packet was successfully completed. Here, we get the next feedback value to be sent
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
-static inline bool audiod_fb_send(uint8_t rhport, audiod_function_t *audio)
+static inline bool audiod_fb_send(audiod_function_t *audio)
 {
-  return usbd_edpt_xfer(rhport, audio->ep_fb, (uint8_t *) &audio->feedback.value, 4);
+  // Format the feedback value
+#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION
+  if ( TUSB_SPEED_FULL == tud_speed_get() )
+  {
+    uint8_t * fb = (uint8_t *) &audio->feedback.send_buf;
+
+    // For FS format is 10.14
+    *(fb++) = (audio->feedback.value >> 2) & 0xFF;
+    *(fb++) = (audio->feedback.value >> 10) & 0xFF;
+    *(fb++) = (audio->feedback.value >> 18) & 0xFF;
+    // 4th byte is needed to work correctly with MS Windows
+    *fb = 0;
+  } else
+  {
+    value = audio->feedback.value;
+  }
+#else
+  audio->feedback.send_buf = audio->feedback.value;
+#endif
+
+  return usbd_edpt_xfer(audio->rhport, audio->ep_fb, (uint8_t *) &audio->feedback.send_buf, 4);
 }
 #endif
 
@@ -1861,7 +1898,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
 
         // Minimal/Maximum value in 16.16 format for full speed (1ms per frame) or high speed (125 us per frame)
         uint32_t const frame_div  = (TUSB_SPEED_FULL == tud_speed_get()) ? 1000 : 8000;
-        audio->feedback.min_value = (fb_param.sample_freq/frame_div - 1) << 16;
+        audio->feedback.min_value = ((fb_param.sample_freq - 1)/frame_div) << 16;
         audio->feedback.max_value = (fb_param.sample_freq/frame_div + 1) << 16;
 
         switch(fb_param.method)
@@ -1869,20 +1906,27 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
           case AUDIO_FEEDBACK_METHOD_FREQUENCY_FIXED:
           case AUDIO_FEEDBACK_METHOD_FREQUENCY_FLOAT:
           case AUDIO_FEEDBACK_METHOD_FREQUENCY_POWER_OF_2:
-            set_fb_params_freq(audio, fb_param.sample_freq, fb_param.frequency.mclk_freq);
+            audiod_set_fb_params_freq(audio, fb_param.sample_freq, fb_param.frequency.mclk_freq);
           break;
 
-          #if 0 // implement later
           case AUDIO_FEEDBACK_METHOD_FIFO_COUNT:
           {
-            uint64_t fb64 = ((uint64_t) fb_param.sample_freq) << 16;
-            audio->feedback.compute.fifo_count.nominal_value = (uint32_t) (fb64 / frame_div);
-            audio->feedback.compute.fifo_count.threshold_bytes = fb_param.fifo_count.threshold_bytes;
-
-            tud_audio_fb_set(audio->feedback.compute.fifo_count.nominal_value);
+            /* Initialize the threshold level to half filled */
+            uint16_t fifo_lvl_thr;
+#if CFG_TUD_AUDIO_ENABLE_DECODING
+            fifo_lvl_thr = tu_fifo_depth(&audio->rx_supp_ff[0]) / 2;
+#else
+            fifo_lvl_thr = tu_fifo_depth(&audio->ep_out_ff) / 2;
+#endif
+            audio->feedback.compute.fifo_count.fifo_lvl_thr = fifo_lvl_thr;
+            audio->feedback.compute.fifo_count.fifo_lvl_avg = ((uint32_t)fifo_lvl_thr) << 16;
+            /* Avoid 64bit division */
+            uint32_t nominal = ((fb_param.sample_freq / 100) << 16) / (frame_div / 100);
+            audio->feedback.compute.fifo_count.nom_value = nominal;
+            audio->feedback.compute.fifo_count.rate_const[0] = (audio->feedback.max_value - nominal) / fifo_lvl_thr;
+            audio->feedback.compute.fifo_count.rate_const[1] = (nominal - audio->feedback.min_value) / fifo_lvl_thr;
           }
           break;
-          #endif
 
           // nothing to do
           default: break;
@@ -2198,7 +2242,7 @@ bool audiod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3
       if (!usbd_edpt_busy(rhport, audio->ep_fb))
       {
         // Schedule next transmission - value is changed bytud_audio_n_fb_set() in the meantime or the old value gets sent
-        return audiod_fb_send(rhport, audio);
+        return audiod_fb_send(audio);
       }
     }
 #endif
@@ -2210,7 +2254,7 @@ bool audiod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
 
-static bool set_fb_params_freq(audiod_function_t* audio, uint32_t sample_freq, uint32_t mclk_freq)
+static bool audiod_set_fb_params_freq(audiod_function_t* audio, uint32_t sample_freq, uint32_t mclk_freq)
 {
   // Check if frame interval is within sane limits
   // The interval value n_frames was taken from the descriptors within audiod_set_interface()
@@ -2244,6 +2288,38 @@ static bool set_fb_params_freq(audiod_function_t* audio, uint32_t sample_freq, u
   return true;
 }
 
+static void audiod_fb_fifo_count_update(audiod_function_t* audio, uint16_t lvl_new)
+{
+  /* Low-pass (averaging) filter */
+  uint32_t lvl = audio->feedback.compute.fifo_count.fifo_lvl_avg;
+  lvl = (uint32_t)(((uint64_t)lvl * 63  + ((uint32_t)lvl_new << 16)) >> 6);
+  audio->feedback.compute.fifo_count.fifo_lvl_avg = lvl;
+
+  uint32_t const ff_lvl = lvl >> 16;
+  uint16_t const ff_thr = audio->feedback.compute.fifo_count.fifo_lvl_thr;
+  uint16_t const *rate   = audio->feedback.compute.fifo_count.rate_const;
+
+  uint32_t feedback;
+
+  if(ff_lvl < ff_thr)
+  {
+    feedback = audio->feedback.compute.fifo_count.nom_value + (ff_thr - ff_lvl) * rate[0];
+  } else
+  {
+    feedback = audio->feedback.compute.fifo_count.nom_value - (ff_lvl - ff_thr) * rate[1];
+  }
+
+  if ( feedback > audio->feedback.max_value ) feedback = audio->feedback.max_value;
+  if ( feedback < audio->feedback.min_value ) feedback = audio->feedback.min_value;
+  audio->feedback.value = feedback;
+
+  // Schedule a transmit with the new value if EP is not busy - this triggers repetitive scheduling of the feedback value
+  if (!usbd_edpt_busy(audio->rhport, audio->ep_fb))
+  {
+    audiod_fb_send(audio);
+  }
+}
+
 uint32_t tud_audio_feedback_update(uint8_t func_id, uint32_t cycles)
 {
   audiod_function_t* audio = &_audiod_fct[func_id];
@@ -2280,6 +2356,21 @@ uint32_t tud_audio_feedback_update(uint8_t func_id, uint32_t cycles)
 
   return feedback;
 }
+
+bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback)
+{
+  TU_VERIFY(func_id < CFG_TUD_AUDIO && _audiod_fct[func_id].p_desc != NULL);
+
+  _audiod_fct[func_id].feedback.value = feedback;
+
+  // Schedule a transmit with the new value if EP is not busy - this triggers repetitive scheduling of the feedback value
+  if (!usbd_edpt_busy(_audiod_fct[func_id].rhport, _audiod_fct[func_id].ep_fb))
+  {
+    return audiod_fb_send(&_audiod_fct[func_id]);
+  }
+
+  return true;
+}
 #endif
 
 TU_ATTR_FAST_FUNC void audiod_sof_isr (uint8_t rhport, uint32_t frame_count)
@@ -2691,44 +2782,8 @@ static uint16_t audiod_tx_packet_size(const uint16_t* norminal_size, uint16_t da
 
 #endif
 
-#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
-
-bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback)
-{
-  TU_VERIFY(func_id < CFG_TUD_AUDIO && _audiod_fct[func_id].p_desc != NULL);
-
-  // Format the feedback value
-#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION
-  if ( TUSB_SPEED_FULL == tud_speed_get() )
-  {
-    uint8_t * fb = (uint8_t *) &_audiod_fct[func_id].feedback.value;
-
-    // For FS format is 10.14
-    *(fb++) = (feedback >> 2) & 0xFF;
-    *(fb++) = (feedback >> 10) & 0xFF;
-    *(fb++) = (feedback >> 18) & 0xFF;
-    // 4th byte is needed to work correctly with MS Windows
-    *fb = 0;
-  }else
-#else
-  {
-    // Send value as-is, caller will choose the appropriate format
-    _audiod_fct[func_id].feedback.value = feedback;
-  }
-#endif
-
-  // Schedule a transmit with the new value if EP is not busy - this triggers repetitive scheduling of the feedback value
-  if (!usbd_edpt_busy(_audiod_fct[func_id].rhport, _audiod_fct[func_id].ep_fb))
-  {
-    return audiod_fb_send(_audiod_fct[func_id].rhport, &_audiod_fct[func_id]);
-  }
-
-  return true;
-}
-#endif
-
 // No security checks here - internal function only which should always succeed
-uint8_t audiod_get_audio_fct_idx(audiod_function_t * audio)
+static uint8_t audiod_get_audio_fct_idx(audiod_function_t * audio)
 {
   for (uint8_t cnt=0; cnt < CFG_TUD_AUDIO; cnt++)
   {
diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h
index b16514fd41..9c95ce1a97 100644
--- a/src/class/audio/audio_device.h
+++ b/src/class/audio/audio_device.h
@@ -3,6 +3,7 @@
  *
  * Copyright (c) 2020 Ha Thach (tinyusb.org)
  * Copyright (c) 2020 Reinhard Panhuber
+ * Copyright (c) 2023 HiFiPhile
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -487,7 +488,6 @@ TU_ATTR_WEAK void tud_audio_fb_done_cb(uint8_t func_id);
 // feedback = n_cycles / n_frames * f_s / f_m in 16.16 format, where n_cycles are the number of main clock cycles within fb_n_frames
 
 bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback);
-static inline bool tud_audio_fb_set(uint32_t feedback);
 
 // Update feedback value with passed cycles since last time this update function is called.
 // Typically called within tud_audio_sof_isr(). Required tud_audio_feedback_params_cb() is implemented
@@ -500,9 +500,7 @@ enum {
   AUDIO_FEEDBACK_METHOD_FREQUENCY_FIXED,
   AUDIO_FEEDBACK_METHOD_FREQUENCY_FLOAT,
   AUDIO_FEEDBACK_METHOD_FREQUENCY_POWER_OF_2,
-
-  // impelemnt later
-  // AUDIO_FEEDBACK_METHOD_FIFO_COUNT
+  AUDIO_FEEDBACK_METHOD_FIFO_COUNT
 };
 
 typedef struct {
@@ -514,11 +512,6 @@ typedef struct {
       uint32_t mclk_freq; // Main clock frequency in Hz i.e. master clock to which sample clock is based on
     }frequency;
 
-#if 0 // implement later
-    struct {
-      uint32_t threshold_bytes; // minimum number of bytes received to be considered as filled/ready
-    }fifo_count;
-#endif
   };
 }audio_feedback_params_t;
 

From 187c3793315c422b99368d51204fa2b5acee93da Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 24 Mar 2024 13:53:34 +0100
Subject: [PATCH 002/204] Add tu_static to global variables.

---
 src/class/audio/audio_device.c | 86 +++++++++++++++++-----------------
 1 file changed, 43 insertions(+), 43 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 4ca95d4e70..16ba7fe65f 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -119,23 +119,23 @@
 // EP IN software buffers and mutexes
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
   #if CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0
-    IN_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ];
+    tu_static IN_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
-    osal_mutex_def_t ep_in_ff_mutex_wr_1; // No need for read mutex as only USB driver reads from FIFO
+    tu_static osal_mutex_def_t ep_in_ff_mutex_wr_1; // No need for read mutex as only USB driver reads from FIFO
     #endif
   #endif // CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0
-    IN_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ];
+    tu_static IN_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
-    osal_mutex_def_t ep_in_ff_mutex_wr_2; // No need for read mutex as only USB driver reads from FIFO
+    tu_static osal_mutex_def_t ep_in_ff_mutex_wr_2; // No need for read mutex as only USB driver reads from FIFO
     #endif
   #endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ > 0
-    IN_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ];
+    tu_static IN_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
-    osal_mutex_def_t ep_in_ff_mutex_wr_3; // No need for read mutex as only USB driver reads from FIFO
+    tu_static osal_mutex_def_t ep_in_ff_mutex_wr_3; // No need for read mutex as only USB driver reads from FIFO
     #endif
   #endif // CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ > 0
 #endif // CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
@@ -145,38 +145,38 @@
 // - the software encoding is used - in this case the linear buffers serve as a target memory where logical channels are encoded into
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_ENCODING)
   #if CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX];
+    tu_static CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX];
   #endif
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX];
+    tu_static CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX];
   #endif
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX];
+    tu_static CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX];
   #endif
 #endif // CFG_TUD_AUDIO_ENABLE_EP_IN && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING)
 
 // EP OUT software buffers and mutexes
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
   #if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
-    OUT_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ];
+    tu_static OUT_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
-    osal_mutex_def_t ep_out_ff_mutex_rd_1; // No need for write mutex as only USB driver writes into FIFO
+    tu_static osal_mutex_def_t ep_out_ff_mutex_rd_1; // No need for write mutex as only USB driver writes into FIFO
     #endif
   #endif // CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
-    OUT_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ];
+    tu_static OUT_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
-    osal_mutex_def_t ep_out_ff_mutex_rd_2; // No need for write mutex as only USB driver writes into FIFO
+    tu_static osal_mutex_def_t ep_out_ff_mutex_rd_2; // No need for write mutex as only USB driver writes into FIFO
     #endif
   #endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0
-    OUT_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ];
+    tu_static OUT_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
-    osal_mutex_def_t ep_out_ff_mutex_rd_3; // No need for write mutex as only USB driver writes into FIFO
+    tu_static osal_mutex_def_t ep_out_ff_mutex_rd_3; // No need for write mutex as only USB driver writes into FIFO
     #endif
   #endif // CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0
 #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
@@ -186,89 +186,89 @@
 // - the software encoding is used - in this case the linear buffers serve as a target memory where logical channels are encoded into
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING)
   #if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX];
+    tu_static CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX];
   #endif
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX];
+    tu_static CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX];
   #endif
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX];
+    tu_static CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX];
   #endif
 #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING)
 
 // Control buffers
-CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_1[CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ];
+tu_static CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_1[CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ];
 
 #if CFG_TUD_AUDIO > 1
-CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_2[CFG_TUD_AUDIO_FUNC_2_CTRL_BUF_SZ];
+tu_static CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_2[CFG_TUD_AUDIO_FUNC_2_CTRL_BUF_SZ];
 #endif
 
 #if CFG_TUD_AUDIO > 2
-CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_3[CFG_TUD_AUDIO_FUNC_3_CTRL_BUF_SZ];
+tu_static CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_3[CFG_TUD_AUDIO_FUNC_3_CTRL_BUF_SZ];
 #endif
 
 // Active alternate setting of interfaces
-uint8_t alt_setting_1[CFG_TUD_AUDIO_FUNC_1_N_AS_INT];
+tu_static uint8_t alt_setting_1[CFG_TUD_AUDIO_FUNC_1_N_AS_INT];
 
 #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_N_AS_INT > 0
-uint8_t alt_setting_2[CFG_TUD_AUDIO_FUNC_2_N_AS_INT];
+tu_static uint8_t alt_setting_2[CFG_TUD_AUDIO_FUNC_2_N_AS_INT];
 #endif
 
 #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_N_AS_INT > 0
-uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
+tu_static uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
 #endif
 
 // Software encoding/decoding support FIFOs
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
   #if CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ];
-    tu_fifo_t tx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO];
+    tu_static CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ];
+    tu_static tu_fifo_t tx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
-    osal_mutex_def_t tx_supp_ff_mutex_wr_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
+    tu_static osal_mutex_def_t tx_supp_ff_mutex_wr_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
     #endif
   #endif
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ];
-    tu_fifo_t tx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO];
+    tu_static CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ];
+    tu_static tu_fifo_t tx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
-    osal_mutex_def_t tx_supp_ff_mutex_wr_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
+    tu_static osal_mutex_def_t tx_supp_ff_mutex_wr_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
     #endif
   #endif
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ];
-    tu_fifo_t tx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO];
+    tu_static CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ];
+    tu_static tu_fifo_t tx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
-    osal_mutex_def_t tx_supp_ff_mutex_wr_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
+    tu_static osal_mutex_def_t tx_supp_ff_mutex_wr_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
     #endif
   #endif
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
   #if CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ];
-    tu_fifo_t rx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO];
+    tu_static CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ];
+    tu_static tu_fifo_t rx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
-    osal_mutex_def_t rx_supp_ff_mutex_rd_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
+    tu_static osal_mutex_def_t rx_supp_ff_mutex_rd_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
     #endif
   #endif
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ];
-    tu_fifo_t rx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO];
+    tu_static CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ];
+    tu_static tu_fifo_t rx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
-    osal_mutex_def_t rx_supp_ff_mutex_rd_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
+    tu_static osal_mutex_def_t rx_supp_ff_mutex_rd_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
     #endif
   #endif
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ];
-    tu_fifo_t rx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO];
+    tu_static CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ];
+    tu_static tu_fifo_t rx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
-    osal_mutex_def_t rx_supp_ff_mutex_rd_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
+    tu_static osal_mutex_def_t rx_supp_ff_mutex_rd_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
     #endif
   #endif
 #endif
@@ -432,7 +432,7 @@ typedef struct
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-CFG_TUD_MEM_SECTION audiod_function_t _audiod_fct[CFG_TUD_AUDIO];
+tu_static CFG_TUD_MEM_SECTION audiod_function_t _audiod_fct[CFG_TUD_AUDIO];
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT
 static bool audiod_rx_done_cb(uint8_t rhport, audiod_function_t* audio, uint16_t n_bytes_received);

From 02e129a38e14f0be1944290b6e68fafc571b0562 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sat, 23 Mar 2024 18:04:56 +0100
Subject: [PATCH 003/204] Guard ep_fb with usbd_edpt_claim().

---
 src/class/audio/audio_device.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 16ba7fe65f..dd82d54acd 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -2239,7 +2239,7 @@ bool audiod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3
       if (tud_audio_fb_done_cb) tud_audio_fb_done_cb(func_id);
 
       // Schedule a transmit with the new value if EP is not busy
-      if (!usbd_edpt_busy(rhport, audio->ep_fb))
+      if (usbd_edpt_claim(rhport, audio->ep_fb))
       {
         // Schedule next transmission - value is changed bytud_audio_n_fb_set() in the meantime or the old value gets sent
         return audiod_fb_send(audio);
@@ -2314,7 +2314,7 @@ static void audiod_fb_fifo_count_update(audiod_function_t* audio, uint16_t lvl_n
   audio->feedback.value = feedback;
 
   // Schedule a transmit with the new value if EP is not busy - this triggers repetitive scheduling of the feedback value
-  if (!usbd_edpt_busy(audio->rhport, audio->ep_fb))
+  if (usbd_edpt_claim(audio->rhport, audio->ep_fb))
   {
     audiod_fb_send(audio);
   }
@@ -2364,7 +2364,7 @@ bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback)
   _audiod_fct[func_id].feedback.value = feedback;
 
   // Schedule a transmit with the new value if EP is not busy - this triggers repetitive scheduling of the feedback value
-  if (!usbd_edpt_busy(_audiod_fct[func_id].rhport, _audiod_fct[func_id].ep_fb))
+  if (usbd_edpt_claim(_audiod_fct[func_id].rhport, _audiod_fct[func_id].ep_fb))
   {
     return audiod_fb_send(&_audiod_fct[func_id]);
   }

From f2d455226ac7b83dfd1e7ef56124e6fecfc4a40e Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 19 Nov 2023 23:46:00 +0100
Subject: [PATCH 004/204] Add UAC2 speaker with feedback example.

---
 .../device/uac2_speaker_fb/CMakeLists.txt     |  33 ++
 examples/device/uac2_speaker_fb/Makefile      |  11 +
 examples/device/uac2_speaker_fb/skip.txt      |   8 +
 .../device/uac2_speaker_fb/src/audio_debug.py |  63 +++
 .../device/uac2_speaker_fb/src/common_types.h |  52 ++
 examples/device/uac2_speaker_fb/src/main.c    | 478 ++++++++++++++++++
 .../device/uac2_speaker_fb/src/tusb_config.h  | 157 ++++++
 .../uac2_speaker_fb/src/usb_descriptors.c     | 234 +++++++++
 .../uac2_speaker_fb/src/usb_descriptors.h     |  82 +++
 9 files changed, 1118 insertions(+)
 create mode 100644 examples/device/uac2_speaker_fb/CMakeLists.txt
 create mode 100644 examples/device/uac2_speaker_fb/Makefile
 create mode 100644 examples/device/uac2_speaker_fb/skip.txt
 create mode 100644 examples/device/uac2_speaker_fb/src/audio_debug.py
 create mode 100644 examples/device/uac2_speaker_fb/src/common_types.h
 create mode 100644 examples/device/uac2_speaker_fb/src/main.c
 create mode 100644 examples/device/uac2_speaker_fb/src/tusb_config.h
 create mode 100644 examples/device/uac2_speaker_fb/src/usb_descriptors.c
 create mode 100644 examples/device/uac2_speaker_fb/src/usb_descriptors.h

diff --git a/examples/device/uac2_speaker_fb/CMakeLists.txt b/examples/device/uac2_speaker_fb/CMakeLists.txt
new file mode 100644
index 0000000000..e92a571488
--- /dev/null
+++ b/examples/device/uac2_speaker_fb/CMakeLists.txt
@@ -0,0 +1,33 @@
+cmake_minimum_required(VERSION 3.17)
+
+include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
+
+# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
+family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
+
+project(${PROJECT} C CXX ASM)
+
+# Checks this example is valid for the family and initializes the project
+family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
+add_executable(${PROJECT})
+
+# Example source
+target_sources(${PROJECT} PUBLIC
+        ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+        ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
+        )
+
+# Example include
+target_include_directories(${PROJECT} PUBLIC
+        ${CMAKE_CURRENT_SOURCE_DIR}/src
+        )
+
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/uac2_speaker_fb/Makefile b/examples/device/uac2_speaker_fb/Makefile
new file mode 100644
index 0000000000..7fa475da55
--- /dev/null
+++ b/examples/device/uac2_speaker_fb/Makefile
@@ -0,0 +1,11 @@
+include ../../build_system/make/make.mk
+
+INC += \
+  src \
+  $(TOP)/hw \
+
+# Example source
+EXAMPLE_SOURCE += $(wildcard src/*.c)
+SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+
+include ../../build_system/make/rules.mk
diff --git a/examples/device/uac2_speaker_fb/skip.txt b/examples/device/uac2_speaker_fb/skip.txt
new file mode 100644
index 0000000000..234f1ebedf
--- /dev/null
+++ b/examples/device/uac2_speaker_fb/skip.txt
@@ -0,0 +1,8 @@
+mcu:LPC11UXX
+mcu:LPC13XX
+mcu:NUC121
+mcu:SAMD11
+mcu:SAME5X
+mcu:SAMG
+board:stm32l052dap52
+family:broadcom_64bit
diff --git a/examples/device/uac2_speaker_fb/src/audio_debug.py b/examples/device/uac2_speaker_fb/src/audio_debug.py
new file mode 100644
index 0000000000..182d6ca897
--- /dev/null
+++ b/examples/device/uac2_speaker_fb/src/audio_debug.py
@@ -0,0 +1,63 @@
+# Install python3 HID package https://pypi.org/project/hid/
+import hid
+from ctypes import *
+import matplotlib.pyplot as plt
+import matplotlib.animation as animation
+
+# Example must be compiled with CFG_AUDIO_DEBUG=1
+VID = 0xcafe
+PID = 0x4014
+
+CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX = 2
+
+class audio_debug_info_t (Structure):
+    _fields_ = [("sample_rate", c_uint32),
+                ("alt_settings", c_uint8),
+                ("mute", (CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX + 1) * c_int8),
+                ("volume", (CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX + 1) * c_int16),
+                ("fifo_size", c_uint16),
+                ("fifo_count", c_uint16),
+                ("fifo_count_avg", c_uint16)
+                ]
+
+dev = hid.Device(VID, PID)
+
+if dev:
+    # Create figure for plotting
+    fig = plt.figure()
+    ax = fig.add_subplot(1, 1, 1)
+    fifo_avg = []
+    fifo_cnt = []
+    # This function is called periodically from FuncAnimation
+    def animate(i):
+        info = None
+        for i in range(30):
+            str_in = dev.read(64, 10)
+            if str_in:
+                info = audio_debug_info_t.from_buffer_copy(str_in)
+
+                global fifo_avg
+                global fifo_cnt
+                fifo_avg.append(info.fifo_count_avg)
+                fifo_cnt.append(info.fifo_count)
+
+        # Limit to 1000 items
+        fifo_avg = fifo_avg[-1000:]
+        fifo_cnt = fifo_cnt[-1000:]
+
+        if info is not None:
+            # Draw x and y lists
+            ax.clear()
+            ax.plot(fifo_cnt, label='FIFO count')
+            ax.plot(fifo_avg, label='FIFO average')
+            ax.legend()
+            ax.set_ylim(bottom=0, top=info.fifo_size)
+
+            # Format plot
+            plt.title('FIFO information')
+            plt.grid()
+
+            print(f'Sample rate:{info.sample_rate} | Alt settings:{info.alt_settings} | Volume:{info.volume[:]}')
+
+    ani = animation.FuncAnimation(fig, animate, interval=10)
+    plt.show()
diff --git a/examples/device/uac2_speaker_fb/src/common_types.h b/examples/device/uac2_speaker_fb/src/common_types.h
new file mode 100644
index 0000000000..174e266714
--- /dev/null
+++ b/examples/device/uac2_speaker_fb/src/common_types.h
@@ -0,0 +1,52 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 HiFiPhile
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#ifndef _COMMON_TYPES_H_
+#define _COMMON_TYPES_H_
+
+enum
+{
+  ITF_NUM_AUDIO_CONTROL = 0,
+  ITF_NUM_AUDIO_STREAMING,
+#if CFG_AUDIO_DEBUG
+  ITF_NUM_DEBUG,
+#endif
+  ITF_NUM_TOTAL
+};
+
+#if CFG_AUDIO_DEBUG
+typedef struct
+  {
+    uint32_t sample_rate;
+    uint8_t alt_settings;
+    int8_t mute[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX + 1];
+    int16_t volume[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX + 1];
+    uint16_t fifo_size;
+    uint16_t fifo_count;
+    uint16_t fifo_count_avg;
+  } audio_debug_info_t;
+#endif
+
+#endif
diff --git a/examples/device/uac2_speaker_fb/src/main.c b/examples/device/uac2_speaker_fb/src/main.c
new file mode 100644
index 0000000000..6d0e7acff0
--- /dev/null
+++ b/examples/device/uac2_speaker_fb/src/main.c
@@ -0,0 +1,478 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jerzy Kasenberg
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#include <stdio.h>
+#include <string.h>
+
+#include "bsp/board_api.h"
+#include "tusb.h"
+#include "usb_descriptors.h"
+#include "common_types.h"
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF PROTOTYPES
+//--------------------------------------------------------------------+
+
+// List of supported sample rates
+#if defined(__RX__)
+  const uint32_t sample_rates[] = {44100, 48000};
+#else
+  const uint32_t sample_rates[] = {44100, 48000, 88200, 96000};
+#endif
+
+uint32_t current_sample_rate  = 44100;
+
+#define N_SAMPLE_RATES  TU_ARRAY_SIZE(sample_rates)
+
+/* Blink pattern
+ * - 25 ms   : streaming data
+ * - 250 ms  : device not mounted
+ * - 1000 ms : device mounted
+ * - 2500 ms : device is suspended
+ */
+enum
+{
+  BLINK_STREAMING = 25,
+  BLINK_NOT_MOUNTED = 250,
+  BLINK_MOUNTED = 1000,
+  BLINK_SUSPENDED = 2500,
+};
+
+enum
+{
+  VOLUME_CTRL_0_DB = 0,
+  VOLUME_CTRL_10_DB = 2560,
+  VOLUME_CTRL_20_DB = 5120,
+  VOLUME_CTRL_30_DB = 7680,
+  VOLUME_CTRL_40_DB = 10240,
+  VOLUME_CTRL_50_DB = 12800,
+  VOLUME_CTRL_60_DB = 15360,
+  VOLUME_CTRL_70_DB = 17920,
+  VOLUME_CTRL_80_DB = 20480,
+  VOLUME_CTRL_90_DB = 23040,
+  VOLUME_CTRL_100_DB = 25600,
+  VOLUME_CTRL_SILENCE = 0x8000,
+};
+
+static uint32_t blink_interval_ms = BLINK_NOT_MOUNTED;
+
+// Audio controls
+// Current states
+int8_t mute[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX + 1];       // +1 for master channel 0
+int16_t volume[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX + 1];    // +1 for master channel 0
+
+// Buffer for speaker data
+uint16_t i2s_dummy_buffer[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ/2];
+
+void led_blinking_task(void);
+void audio_task(void);
+
+#if CFG_AUDIO_DEBUG
+void audio_debug_task(void);
+uint8_t current_alt_settings;
+#endif
+
+/*------------- MAIN -------------*/
+int main(void)
+{
+  board_init();
+
+  // init device stack on configured roothub port
+  tud_init(BOARD_TUD_RHPORT);
+
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
+  TU_LOG1("Speaker running\r\n");
+
+  while (1)
+  {
+    tud_task(); // TinyUSB device task
+    led_blinking_task();
+#if CFG_AUDIO_DEBUG
+    audio_debug_task();
+#endif
+    audio_task();
+  }
+}
+
+//--------------------------------------------------------------------+
+// Device callbacks
+//--------------------------------------------------------------------+
+
+// Invoked when device is mounted
+void tud_mount_cb(void)
+{
+  blink_interval_ms = BLINK_MOUNTED;
+}
+
+// Invoked when device is unmounted
+void tud_umount_cb(void)
+{
+  blink_interval_ms = BLINK_NOT_MOUNTED;
+}
+
+// Invoked when usb bus is suspended
+// remote_wakeup_en : if host allow us  to perform remote wakeup
+// Within 7ms, device must draw an average of current less than 2.5 mA from bus
+void tud_suspend_cb(bool remote_wakeup_en)
+{
+  (void)remote_wakeup_en;
+  blink_interval_ms = BLINK_SUSPENDED;
+}
+
+// Invoked when usb bus is resumed
+void tud_resume_cb(void)
+{
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
+}
+
+//--------------------------------------------------------------------+
+// Application Callback API Implementations
+//--------------------------------------------------------------------+
+
+// Helper for clock get requests
+static bool tud_audio_clock_get_request(uint8_t rhport, audio_control_request_t const *request)
+{
+  TU_ASSERT(request->bEntityID == UAC2_ENTITY_CLOCK);
+
+  if (request->bControlSelector == AUDIO_CS_CTRL_SAM_FREQ)
+  {
+    if (request->bRequest == AUDIO_CS_REQ_CUR)
+    {
+      TU_LOG1("Clock get current freq %lu\r\n", current_sample_rate);
+
+      audio_control_cur_4_t curf = { (int32_t) tu_htole32(current_sample_rate) };
+      return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &curf, sizeof(curf));
+    }
+    else if (request->bRequest == AUDIO_CS_REQ_RANGE)
+    {
+      audio_control_range_4_n_t(N_SAMPLE_RATES) rangef =
+      {
+        .wNumSubRanges = tu_htole16(N_SAMPLE_RATES)
+      };
+      TU_LOG1("Clock get %d freq ranges\r\n", N_SAMPLE_RATES);
+      for(uint8_t i = 0; i < N_SAMPLE_RATES; i++)
+      {
+        rangef.subrange[i].bMin = (int32_t) sample_rates[i];
+        rangef.subrange[i].bMax = (int32_t) sample_rates[i];
+        rangef.subrange[i].bRes = 0;
+        TU_LOG1("Range %d (%d, %d, %d)\r\n", i, (int)rangef.subrange[i].bMin, (int)rangef.subrange[i].bMax, (int)rangef.subrange[i].bRes);
+      }
+
+      return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &rangef, sizeof(rangef));
+    }
+  }
+  else if (request->bControlSelector == AUDIO_CS_CTRL_CLK_VALID &&
+           request->bRequest == AUDIO_CS_REQ_CUR)
+  {
+    audio_control_cur_1_t cur_valid = { .bCur = 1 };
+    TU_LOG1("Clock get is valid %u\r\n", cur_valid.bCur);
+    return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &cur_valid, sizeof(cur_valid));
+  }
+  TU_LOG1("Clock get request not supported, entity = %u, selector = %u, request = %u\r\n",
+          request->bEntityID, request->bControlSelector, request->bRequest);
+  return false;
+}
+
+// Helper for clock set requests
+static bool tud_audio_clock_set_request(uint8_t rhport, audio_control_request_t const *request, uint8_t const *buf)
+{
+  (void)rhport;
+
+  TU_ASSERT(request->bEntityID == UAC2_ENTITY_CLOCK);
+  TU_VERIFY(request->bRequest == AUDIO_CS_REQ_CUR);
+
+  if (request->bControlSelector == AUDIO_CS_CTRL_SAM_FREQ)
+  {
+    TU_VERIFY(request->wLength == sizeof(audio_control_cur_4_t));
+
+    current_sample_rate = (uint32_t) ((audio_control_cur_4_t const *)buf)->bCur;
+
+    TU_LOG1("Clock set current freq: %ld\r\n", current_sample_rate);
+
+    return true;
+  }
+  else
+  {
+    TU_LOG1("Clock set request not supported, entity = %u, selector = %u, request = %u\r\n",
+            request->bEntityID, request->bControlSelector, request->bRequest);
+    return false;
+  }
+}
+
+// Helper for feature unit get requests
+static bool tud_audio_feature_unit_get_request(uint8_t rhport, audio_control_request_t const *request)
+{
+  TU_ASSERT(request->bEntityID == UAC2_ENTITY_FEATURE_UNIT);
+
+  if (request->bControlSelector == AUDIO_FU_CTRL_MUTE && request->bRequest == AUDIO_CS_REQ_CUR)
+  {
+    audio_control_cur_1_t mute1 = { .bCur = mute[request->bChannelNumber] };
+    TU_LOG1("Get channel %u mute %d\r\n", request->bChannelNumber, mute1.bCur);
+    return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &mute1, sizeof(mute1));
+  }
+  else if (UAC2_ENTITY_FEATURE_UNIT && request->bControlSelector == AUDIO_FU_CTRL_VOLUME)
+  {
+    if (request->bRequest == AUDIO_CS_REQ_RANGE)
+    {
+      audio_control_range_2_n_t(1) range_vol = {
+        .wNumSubRanges = tu_htole16(1),
+        .subrange[0] = { .bMin = tu_htole16(-VOLUME_CTRL_50_DB), tu_htole16(VOLUME_CTRL_0_DB), tu_htole16(256) }
+      };
+      TU_LOG1("Get channel %u volume range (%d, %d, %u) dB\r\n", request->bChannelNumber,
+              range_vol.subrange[0].bMin / 256, range_vol.subrange[0].bMax / 256, range_vol.subrange[0].bRes / 256);
+      return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &range_vol, sizeof(range_vol));
+    }
+    else if (request->bRequest == AUDIO_CS_REQ_CUR)
+    {
+      audio_control_cur_2_t cur_vol = { .bCur = tu_htole16(volume[request->bChannelNumber]) };
+      TU_LOG1("Get channel %u volume %d dB\r\n", request->bChannelNumber, cur_vol.bCur / 256);
+      return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &cur_vol, sizeof(cur_vol));
+    }
+  }
+  TU_LOG1("Feature unit get request not supported, entity = %u, selector = %u, request = %u\r\n",
+          request->bEntityID, request->bControlSelector, request->bRequest);
+
+  return false;
+}
+
+// Helper for feature unit set requests
+static bool tud_audio_feature_unit_set_request(uint8_t rhport, audio_control_request_t const *request, uint8_t const *buf)
+{
+  (void)rhport;
+
+  TU_ASSERT(request->bEntityID == UAC2_ENTITY_FEATURE_UNIT);
+  TU_VERIFY(request->bRequest == AUDIO_CS_REQ_CUR);
+
+  if (request->bControlSelector == AUDIO_FU_CTRL_MUTE)
+  {
+    TU_VERIFY(request->wLength == sizeof(audio_control_cur_1_t));
+
+    mute[request->bChannelNumber] = ((audio_control_cur_1_t const *)buf)->bCur;
+
+    TU_LOG1("Set channel %d Mute: %d\r\n", request->bChannelNumber, mute[request->bChannelNumber]);
+
+    return true;
+  }
+  else if (request->bControlSelector == AUDIO_FU_CTRL_VOLUME)
+  {
+    TU_VERIFY(request->wLength == sizeof(audio_control_cur_2_t));
+
+    volume[request->bChannelNumber] = ((audio_control_cur_2_t const *)buf)->bCur;
+
+    TU_LOG1("Set channel %d volume: %d dB\r\n", request->bChannelNumber, volume[request->bChannelNumber] / 256);
+
+    return true;
+  }
+  else
+  {
+    TU_LOG1("Feature unit set request not supported, entity = %u, selector = %u, request = %u\r\n",
+            request->bEntityID, request->bControlSelector, request->bRequest);
+    return false;
+  }
+}
+
+// Invoked when audio class specific get request received for an entity
+bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const *p_request)
+{
+  audio_control_request_t const *request = (audio_control_request_t const *)p_request;
+
+  if (request->bEntityID == UAC2_ENTITY_CLOCK)
+    return tud_audio_clock_get_request(rhport, request);
+  if (request->bEntityID == UAC2_ENTITY_FEATURE_UNIT)
+    return tud_audio_feature_unit_get_request(rhport, request);
+  else
+  {
+    TU_LOG1("Get request not handled, entity = %d, selector = %d, request = %d\r\n",
+            request->bEntityID, request->bControlSelector, request->bRequest);
+  }
+  return false;
+}
+
+// Invoked when audio class specific set request received for an entity
+bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const *p_request, uint8_t *buf)
+{
+  audio_control_request_t const *request = (audio_control_request_t const *)p_request;
+
+  if (request->bEntityID == UAC2_ENTITY_FEATURE_UNIT)
+    return tud_audio_feature_unit_set_request(rhport, request, buf);
+  if (request->bEntityID == UAC2_ENTITY_CLOCK)
+    return tud_audio_clock_set_request(rhport, request, buf);
+  TU_LOG1("Set request not handled, entity = %d, selector = %d, request = %d\r\n",
+          request->bEntityID, request->bControlSelector, request->bRequest);
+
+  return false;
+}
+
+bool tud_audio_set_itf_close_EP_cb(uint8_t rhport, tusb_control_request_t const * p_request)
+{
+  (void)rhport;
+
+  uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex));
+  uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue));
+
+  if (ITF_NUM_AUDIO_STREAMING == itf && alt == 0)
+      blink_interval_ms = BLINK_MOUNTED;
+
+  return true;
+}
+
+bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request)
+{
+  (void)rhport;
+  uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex));
+  uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue));
+
+  TU_LOG2("Set interface %d alt %d\r\n", itf, alt);
+  if (ITF_NUM_AUDIO_STREAMING == itf && alt != 0)
+      blink_interval_ms = BLINK_STREAMING;
+
+#if CFG_AUDIO_DEBUG
+  current_alt_settings = alt;
+#endif
+
+  return true;
+}
+
+void tud_audio_feedback_params_cb(uint8_t func_id, uint8_t alt_itf, audio_feedback_params_t* feedback_param)
+{
+  (void)func_id;
+  (void)alt_itf;
+  // Set feedback method to fifo counting
+  feedback_param->method = AUDIO_FEEDBACK_METHOD_FIFO_COUNT;
+  feedback_param->sample_freq = current_sample_rate;
+}
+
+//--------------------------------------------------------------------+
+// AUDIO Task
+//--------------------------------------------------------------------+
+
+void audio_task(void)
+{
+  // Replace audio_task() with your I2S transmit callback.
+  // Here we simulate a callback called every 1ms.
+  static uint32_t start_ms = 0;
+  uint32_t curr_ms = board_millis();
+  if ( start_ms == curr_ms ) return; // not enough time
+  start_ms = curr_ms;
+
+  uint16_t length = current_sample_rate/1000 * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_RX * CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX;
+
+  if (current_sample_rate == 44100 && (curr_ms % 10 == 0))
+  {
+    // Take one more sample every 10 cycles, to have a average reading speed of 44.1
+    // This correction is not needed in real world cases
+    length += CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_RX * CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX;
+  } else
+  if (current_sample_rate == 88200 && (curr_ms % 5 == 0))
+  {
+    // Take one more sample every 5 cycles, to have a average reading speed of 88.2
+    // This correction is not needed in real world cases
+    length += CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_RX * CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX;
+  }
+
+  tud_audio_read(i2s_dummy_buffer, length);
+}
+
+//--------------------------------------------------------------------+
+// BLINKING TASK
+//--------------------------------------------------------------------+
+void led_blinking_task(void)
+{
+  static uint32_t start_ms = 0;
+  static bool led_state = false;
+
+  // Blink every interval ms
+  if (board_millis() - start_ms < blink_interval_ms) return;
+  start_ms += blink_interval_ms;
+
+  board_led_write(led_state);
+  led_state = 1 - led_state;
+}
+
+#if CFG_AUDIO_DEBUG
+//--------------------------------------------------------------------+
+// HID interface for audio debug
+//--------------------------------------------------------------------+
+
+// Every 1ms, we will sent 1 debug information report
+void audio_debug_task(void)
+{
+  static uint32_t start_ms = 0;
+  uint32_t curr_ms = board_millis();
+  if ( start_ms == curr_ms ) return; // not enough time
+  start_ms = curr_ms;
+
+  uint16_t fifo_count = tud_audio_available();
+  static uint32_t fifo_count_avg;
+
+  // Same averaging method used in UAC2 class
+  fifo_count_avg = (uint32_t)(((uint64_t)fifo_count_avg * 63  + ((uint32_t)fifo_count << 16)) >> 6);
+
+  audio_debug_info_t debug_info;
+  debug_info.sample_rate    = current_sample_rate;
+  debug_info.alt_settings   = current_alt_settings;
+  debug_info.fifo_size      = CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ;
+  debug_info.fifo_count     = fifo_count;
+  debug_info.fifo_count_avg = fifo_count_avg >> 16;
+  for (int i = 0; i < CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX + 1; i++)
+  {
+    debug_info.mute[i] = mute[i];
+    debug_info.volume[i] = volume[i];
+  }
+
+  if(tud_hid_ready())
+    tud_hid_report(0, &debug_info, sizeof(debug_info));
+}
+
+// Invoked when received GET_REPORT control request
+// Unused here
+uint16_t tud_hid_get_report_cb(uint8_t itf, uint8_t report_id, hid_report_type_t report_type, uint8_t* buffer, uint16_t reqlen)
+{
+  // TODO not Implemented
+  (void) itf;
+  (void) report_id;
+  (void) report_type;
+  (void) buffer;
+  (void) reqlen;
+
+  return 0;
+}
+
+// Invoked when received SET_REPORT control request or
+// Unused here
+void tud_hid_set_report_cb(uint8_t itf, uint8_t report_id, hid_report_type_t report_type, uint8_t const* buffer, uint16_t bufsize)
+{
+  // This example doesn't use multiple report and report ID
+  (void) itf;
+  (void) report_id;
+  (void) report_type;
+  (void) buffer;
+  (void) bufsize;
+}
+
+#endif
diff --git a/examples/device/uac2_speaker_fb/src/tusb_config.h b/examples/device/uac2_speaker_fb/src/tusb_config.h
new file mode 100644
index 0000000000..497104541f
--- /dev/null
+++ b/examples/device/uac2_speaker_fb/src/tusb_config.h
@@ -0,0 +1,157 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Ha Thach (tinyusb.org)
+ * Copyright (c) 2020 Jerzy Kasenberg
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#ifndef _TUSB_CONFIG_H_
+#define _TUSB_CONFIG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "usb_descriptors.h"
+
+//--------------------------------------------------------------------+
+// Board Specific Configuration
+//--------------------------------------------------------------------+
+
+// RHPort number used for device can be defined by board.mk, default to port 0
+#ifndef BOARD_TUD_RHPORT
+#define BOARD_TUD_RHPORT      0
+#endif
+
+// RHPort max operational speed can defined by board.mk
+#ifndef BOARD_TUD_MAX_SPEED
+#define BOARD_TUD_MAX_SPEED   OPT_MODE_DEFAULT_SPEED
+#endif
+
+//--------------------------------------------------------------------
+// Common Configuration
+//--------------------------------------------------------------------
+
+// defined by compiler flags for flexibility
+#ifndef CFG_TUSB_MCU
+#error CFG_TUSB_MCU must be defined
+#endif
+
+#ifndef CFG_TUSB_OS
+#define CFG_TUSB_OS           OPT_OS_NONE
+#endif
+
+// It's recommended to disable debug unless for control requests debugging,
+// as the extra time needed will impact data stream !
+#ifndef CFG_TUSB_DEBUG
+#define CFG_TUSB_DEBUG        0
+#endif
+
+// Enable Device stack
+#define CFG_TUD_ENABLED       1
+
+// Default is max speed that hardware controller could support with on-chip PHY
+#define CFG_TUD_MAX_SPEED     BOARD_TUD_MAX_SPEED
+
+/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
+ * Tinyusb use follows macros to declare transferring memory so that they can be put
+ * into those specific section.
+ * e.g
+ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
+ * - CFG_TUSB_MEM_ALIGN   : __attribute__ ((aligned(4)))
+ */
+#ifndef CFG_TUSB_MEM_SECTION
+#define CFG_TUSB_MEM_SECTION
+#endif
+
+#ifndef CFG_TUSB_MEM_ALIGN
+#define CFG_TUSB_MEM_ALIGN        __attribute__ ((aligned(4)))
+#endif
+
+//--------------------------------------------------------------------
+// DEVICE CONFIGURATION
+//--------------------------------------------------------------------
+
+// Expose audio class debug information via HID interface
+#ifndef CFG_AUDIO_DEBUG
+#define CFG_AUDIO_DEBUG           1
+#endif
+
+#ifndef CFG_TUD_ENDPOINT0_SIZE
+#define CFG_TUD_ENDPOINT0_SIZE    64
+#endif
+
+#define CFG_TUD_HID_EP_BUFSIZE    64
+
+//------------- CLASS -------------//
+#define CFG_TUD_AUDIO             1
+
+#if CFG_AUDIO_DEBUG
+#define CFG_TUD_HID               1
+#else
+#define CFG_TUD_HID               0
+#endif
+
+#define CFG_TUD_CDC               0
+#define CFG_TUD_MSC               0
+#define CFG_TUD_MIDI              0
+#define CFG_TUD_VENDOR            0
+
+//--------------------------------------------------------------------
+// AUDIO CLASS DRIVER CONFIGURATION
+//--------------------------------------------------------------------
+
+#define CFG_TUD_AUDIO_FUNC_1_DESC_LEN                                TUD_AUDIO_SPEAKER_STEREO_FB_DESC_LEN
+
+// Audio format type I specifications
+#if defined(__RX__)
+#define CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE                         48000
+#else
+#define CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE                         96000
+#endif
+
+#define CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX                           2
+
+// 16bit in 16bit slots
+#define CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_RX                   2
+#define CFG_TUD_AUDIO_FUNC_1_RESOLUTION_RX                           16
+
+// EP and buffer size - for isochronous EP´s, the buffer and EP size are equal (different sizes would not make sense)
+#define CFG_TUD_AUDIO_ENABLE_EP_OUT                                  1
+
+#define CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX        TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX)
+#define CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ     (TUD_OPT_HIGH_SPEED ? 32 : 4) * CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX // Example read FIFO every 1ms, so it should be 8 times larger for HS device
+
+// Enable feedback EP
+#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP                             1
+
+// Number of Standard AS Interface Descriptors (4.9.1) defined per audio function - this is required to be able to remember the current alternate settings of these interfaces - We restrict us here to have a constant number for all audio functions (which means this has to be the maximum number of AS interfaces an audio function has and a second audio function with less AS interfaces just wastes a few bytes)
+#define CFG_TUD_AUDIO_FUNC_1_N_AS_INT 	                             1
+
+// Size of control request buffer
+#define CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ	                         64
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TUSB_CONFIG_H_ */
diff --git a/examples/device/uac2_speaker_fb/src/usb_descriptors.c b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
new file mode 100644
index 0000000000..864b689ff0
--- /dev/null
+++ b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
@@ -0,0 +1,234 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 HiFiPhile
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#include "bsp/board_api.h"
+#include "tusb.h"
+#include "usb_descriptors.h"
+#include "common_types.h"
+
+/* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
+ * Same VID/PID with different interface e.g MSC (first), then CDC (later) will possibly cause system error on PC.
+ *
+ * Auto ProductID layout's Bitmap:
+ *   [MSB]     AUDIO | MIDI | HID | MSC | CDC          [LSB]
+ */
+#define _PID_MAP(itf, n)  ( (CFG_TUD_##itf) << (n) )
+#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
+    _PID_MAP(MIDI, 3) | _PID_MAP(AUDIO, 4) | _PID_MAP(VENDOR, 5) )
+
+//--------------------------------------------------------------------+
+// Device Descriptors
+//--------------------------------------------------------------------+
+tusb_desc_device_t const desc_device =
+{
+    .bLength            = sizeof(tusb_desc_device_t),
+    .bDescriptorType    = TUSB_DESC_DEVICE,
+    .bcdUSB             = 0x0200,
+
+    // Use Interface Association Descriptor (IAD) for Audio
+    // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1)
+    .bDeviceClass       = TUSB_CLASS_MISC,
+    .bDeviceSubClass    = MISC_SUBCLASS_COMMON,
+    .bDeviceProtocol    = MISC_PROTOCOL_IAD,
+    .bMaxPacketSize0    = CFG_TUD_ENDPOINT0_SIZE,
+
+    .idVendor           = 0xCafe,
+    .idProduct          = USB_PID,
+    .bcdDevice          = 0x0100,
+
+    .iManufacturer      = 0x01,
+    .iProduct           = 0x02,
+    .iSerialNumber      = 0x03,
+
+    .bNumConfigurations = 0x01
+};
+
+// Invoked when received GET DEVICE DESCRIPTOR
+// Application return pointer to descriptor
+uint8_t const * tud_descriptor_device_cb(void)
+{
+  return (uint8_t const *)&desc_device;
+}
+
+#if CFG_AUDIO_DEBUG
+//--------------------------------------------------------------------+
+// HID Report Descriptor
+//--------------------------------------------------------------------+
+
+uint8_t const desc_hid_report[] =
+{
+  HID_USAGE_PAGE_N ( HID_USAGE_PAGE_VENDOR, 2   ),\
+  HID_USAGE        ( 0x01                       ),\
+  HID_COLLECTION   ( HID_COLLECTION_APPLICATION ),\
+  HID_USAGE       ( 0x02                                   ),\
+  HID_LOGICAL_MIN ( 0x00                                   ),\
+  HID_LOGICAL_MAX_N ( 0xff, 2                              ),\
+  HID_REPORT_SIZE ( 8                                      ),\
+  HID_REPORT_COUNT( sizeof(audio_debug_info_t)             ),\
+  HID_INPUT       ( HID_DATA | HID_VARIABLE | HID_ABSOLUTE ),\
+  HID_COLLECTION_END
+};
+
+// Invoked when received GET HID REPORT DESCRIPTOR
+// Application return pointer to descriptor
+// Descriptor contents must exist long enough for transfer to complete
+uint8_t const * tud_hid_descriptor_report_cb(uint8_t itf)
+{
+  (void) itf;
+  return desc_hid_report;
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Configuration Descriptor
+//--------------------------------------------------------------------+
+
+#if CFG_AUDIO_DEBUG
+  #define CONFIG_TOTAL_LEN    	(TUD_CONFIG_DESC_LEN + TUD_AUDIO_SPEAKER_STEREO_FB_DESC_LEN + TUD_HID_DESC_LEN)
+#else
+  #define CONFIG_TOTAL_LEN    	(TUD_CONFIG_DESC_LEN + TUD_AUDIO_SPEAKER_STEREO_FB_DESC_LEN)
+#endif
+
+#if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX
+  // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
+  // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
+  #define EPNUM_AUDIO_FB    0x03
+  #define EPNUM_AUDIO_OUT   0x03
+  #define EPNUM_DEBUG       0x04
+
+#elif CFG_TUSB_MCU == OPT_MCU_NRF5X
+  // ISO endpoints for NRF5x are fixed to 0x08 (0x88)
+  #define EPNUM_AUDIO_FB    0x08
+  #define EPNUM_AUDIO_OUT   0x08
+  #define EPNUM_DEBUG       0x01
+
+#elif CFG_TUSB_MCU == OPT_MCU_SAMG  || CFG_TUSB_MCU ==  OPT_MCU_SAMX7X
+  // SAMG & SAME70 don't support a same endpoint number with different direction IN and OUT
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_AUDIO_FB    0x01
+  #define EPNUM_AUDIO_OUT   0x02
+  #define EPNUM_DEBUG       0x03
+
+#elif CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X
+  // FT9XX doesn't support a same endpoint number with different direction IN and OUT
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_AUDIO_FB    0x01
+  #define EPNUM_AUDIO_OUT   0x02
+  #define EPNUM_DEBUG       0x03
+
+#else
+  #define EPNUM_AUDIO_FB    0x01
+  #define EPNUM_AUDIO_OUT   0x01
+  #define EPNUM_DEBUG       0x02
+#endif
+
+uint8_t const desc_configuration[] =
+{
+    // Config number, interface count, string index, total length, attribute, power in mA
+    TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
+
+    // Interface number, string index, byte per sample, bit per sample, EP Out, EP size, EP feedback
+    TUD_AUDIO_SPEAKER_STEREO_FB_DESCRIPTOR(0, 4, CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_RESOLUTION_RX, EPNUM_AUDIO_OUT, CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX, EPNUM_AUDIO_FB | 0x80),
+
+#if CFG_AUDIO_DEBUG
+    // Interface number, string index, protocol, report descriptor len, EP In address, size & polling interval
+    TUD_HID_DESCRIPTOR(ITF_NUM_DEBUG, 0, HID_ITF_PROTOCOL_NONE, sizeof(desc_hid_report), EPNUM_DEBUG | 0x80, CFG_TUD_HID_EP_BUFSIZE, 7)
+#endif
+};
+
+// Invoked when received GET CONFIGURATION DESCRIPTOR
+// Application return pointer to descriptor
+// Descriptor contents must exist long enough for transfer to complete
+uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
+{
+  (void)index; // for multiple configurations
+  return desc_configuration;
+}
+
+//--------------------------------------------------------------------+
+// String Descriptors
+//--------------------------------------------------------------------+
+
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
+// array of pointer to string descriptors
+char const *string_desc_arr[] =
+{
+  (const char[]) { 0x09, 0x04 },  // 0: is supported language is English (0x0409)
+  "TinyUSB",                      // 1: Manufacturer
+  "TinyUSB Speaker",              // 2: Product
+  NULL,                           // 3: Serials will use unique ID if possible
+  "UAC2 Speaker",                 // 4: Audio Interface
+};
+
+static uint16_t _desc_str[32 + 1];
+
+// Invoked when received GET STRING DESCRIPTOR request
+// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
+  (void) langid;
+  size_t chr_count;
+
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
+
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
+
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
+
+      const char *str = string_desc_arr[index];
+
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
+  }
+
+  // first byte is length (including header), second byte is string type
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
+
+  return _desc_str;
+}
diff --git a/examples/device/uac2_speaker_fb/src/usb_descriptors.h b/examples/device/uac2_speaker_fb/src/usb_descriptors.h
new file mode 100644
index 0000000000..8157f02a04
--- /dev/null
+++ b/examples/device/uac2_speaker_fb/src/usb_descriptors.h
@@ -0,0 +1,82 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 HiFiPhile
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#ifndef _USB_DESCRIPTORS_H_
+#define _USB_DESCRIPTORS_H_
+
+// Defined in TUD_AUDIO_SPEAKER_STEREO_FB_DESCRIPTOR
+#define UAC2_ENTITY_CLOCK               0x04
+#define UAC2_ENTITY_INPUT_TERMINAL      0x01
+#define UAC2_ENTITY_FEATURE_UNIT        0x02
+#define UAC2_ENTITY_OUTPUT_TERMINAL     0x03
+
+#define TUD_AUDIO_SPEAKER_STEREO_FB_DESC_LEN (TUD_AUDIO_DESC_IAD_LEN\
+  + TUD_AUDIO_DESC_STD_AC_LEN\
+  + TUD_AUDIO_DESC_CS_AC_LEN\
+  + TUD_AUDIO_DESC_CLK_SRC_LEN\
+  + TUD_AUDIO_DESC_INPUT_TERM_LEN\
+  + TUD_AUDIO_DESC_OUTPUT_TERM_LEN\
+  + TUD_AUDIO_DESC_FEATURE_UNIT_TWO_CHANNEL_LEN\
+  + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+  + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+  + TUD_AUDIO_DESC_CS_AS_INT_LEN\
+  + TUD_AUDIO_DESC_TYPE_I_FORMAT_LEN\
+  + TUD_AUDIO_DESC_STD_AS_ISO_EP_LEN\
+  + TUD_AUDIO_DESC_CS_AS_ISO_EP_LEN\
+  + TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN)
+
+#define TUD_AUDIO_SPEAKER_STEREO_FB_DESCRIPTOR(_itfnum, _stridx, _nBytesPerSample, _nBitsUsedPerSample, _epout, _epsize, _epfb) \
+  /* Standard Interface Association Descriptor (IAD) */\
+  TUD_AUDIO_DESC_IAD(/*_firstitf*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
+  /* Standard AC Interface Descriptor(4.7.1) */\
+  TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ _itfnum, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\
+  /* Class-Specific AC Interface Header Descriptor(4.7.2) */\
+  TUD_AUDIO_DESC_CS_AC(/*_bcdADC*/ 0x0200, /*_category*/ AUDIO_FUNC_DESKTOP_SPEAKER, /*_totallen*/ TUD_AUDIO_DESC_CLK_SRC_LEN+TUD_AUDIO_DESC_INPUT_TERM_LEN+TUD_AUDIO_DESC_OUTPUT_TERM_LEN+TUD_AUDIO_DESC_FEATURE_UNIT_TWO_CHANNEL_LEN, /*_ctrl*/ AUDIO_CS_AS_INTERFACE_CTRL_LATENCY_POS),\
+  /* Clock Source Descriptor(4.7.2.1) */\
+  TUD_AUDIO_DESC_CLK_SRC(/*_clkid*/ 0x04, /*_attr*/ AUDIO_CLOCK_SOURCE_ATT_INT_PRO_CLK, /*_ctrl*/ (AUDIO_CTRL_RW << AUDIO_CLOCK_SOURCE_CTRL_CLK_FRQ_POS), /*_assocTerm*/ 0x01,  /*_stridx*/ 0x00),\
+  /* Input Terminal Descriptor(4.7.2.4) */\
+  TUD_AUDIO_DESC_INPUT_TERM(/*_termid*/ 0x01, /*_termtype*/ AUDIO_TERM_TYPE_USB_STREAMING, /*_assocTerm*/ 0x00, /*_clkid*/ 0x04, /*_nchannelslogical*/ 0x02, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_idxchannelnames*/ 0x00, /*_ctrl*/ 0 * (AUDIO_CTRL_R << AUDIO_IN_TERM_CTRL_CONNECTOR_POS), /*_stridx*/ 0x00),\
+  /* Output Terminal Descriptor(4.7.2.5) */\
+  TUD_AUDIO_DESC_OUTPUT_TERM(/*_termid*/ 0x03, /*_termtype*/ AUDIO_TERM_TYPE_OUT_DESKTOP_SPEAKER, /*_assocTerm*/ 0x01, /*_srcid*/ 0x02, /*_clkid*/ 0x04, /*_ctrl*/ 0x0000, /*_stridx*/ 0x00),\
+  /* Feature Unit Descriptor(4.7.2.8) */\
+  TUD_AUDIO_DESC_FEATURE_UNIT_TWO_CHANNEL(/*_unitid*/ 0x02, /*_srcid*/ 0x01, /*_ctrlch0master*/ AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS, /*_ctrlch1*/ AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS, /*_ctrlch2*/ AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS,/*_stridx*/ 0x00),\
+  /* Standard AS Interface Descriptor(4.9.1) */\
+  /* Interface 1, Alternate 0 - default alternate setting with 0 bandwidth */\
+  TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)((_itfnum) + 1), /*_altset*/ 0x00, /*_nEPs*/ 0x00, /*_stridx*/ 0x00),\
+  /* Standard AS Interface Descriptor(4.9.1) */\
+  /* Interface 1, Alternate 1 - alternate interface for data streaming */\
+  TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)((_itfnum) + 1), /*_altset*/ 0x01, /*_nEPs*/ 0x02, /*_stridx*/ 0x00),\
+  /* Class-Specific AS Interface Descriptor(4.9.2) */\
+  TUD_AUDIO_DESC_CS_AS_INT(/*_termid*/ 0x01, /*_ctrl*/ AUDIO_CTRL_NONE, /*_formattype*/ AUDIO_FORMAT_TYPE_I, /*_formats*/ AUDIO_DATA_FORMAT_TYPE_I_PCM, /*_nchannelsphysical*/ 0x02, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_stridx*/ 0x00),\
+  /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
+  TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
+  /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) ((uint8_t)TUSB_XFER_ISOCHRONOUS | (uint8_t)TUSB_ISO_EP_ATT_ASYNCHRONOUS | (uint8_t)TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ 0x01),\
+  /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
+  TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC, /*_lockdelay*/ 0x0001),\
+  /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */\
+  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(/*_ep*/ _epfb, /*_interval*/ TUD_OPT_HIGH_SPEED ? 4 : 1)\
+
+#endif

From f69255e7355a7cd7c4cd08f50c6f1ba4fc3b5a45 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 19 Nov 2023 23:59:20 +0100
Subject: [PATCH 005/204] Fix CI.

---
 src/portable/wch/dcd_ch32_usbhs.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/portable/wch/dcd_ch32_usbhs.c b/src/portable/wch/dcd_ch32_usbhs.c
index 1f1c0b8764..43cda25664 100644
--- a/src/portable/wch/dcd_ch32_usbhs.c
+++ b/src/portable/wch/dcd_ch32_usbhs.c
@@ -135,6 +135,14 @@ void dcd_remote_wakeup(uint8_t rhport)
   (void) rhport;
 }
 
+void dcd_sof_enable(uint8_t rhport, bool en)
+{
+  (void) rhport;
+  (void) en;
+
+  // TODO implement later
+}
+
 void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const *request) {
     (void)rhport;
 

From ba27179f173123f50dec5370a6ecd87f059af0e1 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 1 Dec 2023 14:03:43 +0100
Subject: [PATCH 006/204] Fix typo.

---
 examples/device/cdc_uac2/src/uac2_app.c    | 2 +-
 examples/device/uac2_headset/src/main.c    | 2 +-
 examples/device/uac2_speaker_fb/src/main.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/examples/device/cdc_uac2/src/uac2_app.c b/examples/device/cdc_uac2/src/uac2_app.c
index c57d98a1a7..70b0949a9e 100644
--- a/examples/device/cdc_uac2/src/uac2_app.c
+++ b/examples/device/cdc_uac2/src/uac2_app.c
@@ -141,7 +141,7 @@ static bool tud_audio_feature_unit_get_request(uint8_t rhport, audio_control_req
     TU_LOG1("Get channel %u mute %d\r\n", request->bChannelNumber, mute1.bCur);
     return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &mute1, sizeof(mute1));
   }
-  else if (UAC2_ENTITY_SPK_FEATURE_UNIT && request->bControlSelector == AUDIO_FU_CTRL_VOLUME)
+  else if (request->bControlSelector == AUDIO_FU_CTRL_VOLUME)
   {
     if (request->bRequest == AUDIO_CS_REQ_RANGE)
     {
diff --git a/examples/device/uac2_headset/src/main.c b/examples/device/uac2_headset/src/main.c
index 0ea6e70258..c285211b83 100644
--- a/examples/device/uac2_headset/src/main.c
+++ b/examples/device/uac2_headset/src/main.c
@@ -229,7 +229,7 @@ static bool tud_audio_feature_unit_get_request(uint8_t rhport, audio_control_req
     TU_LOG1("Get channel %u mute %d\r\n", request->bChannelNumber, mute1.bCur);
     return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &mute1, sizeof(mute1));
   }
-  else if (UAC2_ENTITY_SPK_FEATURE_UNIT && request->bControlSelector == AUDIO_FU_CTRL_VOLUME)
+  else if (request->bControlSelector == AUDIO_FU_CTRL_VOLUME)
   {
     if (request->bRequest == AUDIO_CS_REQ_RANGE)
     {
diff --git a/examples/device/uac2_speaker_fb/src/main.c b/examples/device/uac2_speaker_fb/src/main.c
index 6d0e7acff0..187ff2afe8 100644
--- a/examples/device/uac2_speaker_fb/src/main.c
+++ b/examples/device/uac2_speaker_fb/src/main.c
@@ -235,7 +235,7 @@ static bool tud_audio_feature_unit_get_request(uint8_t rhport, audio_control_req
     TU_LOG1("Get channel %u mute %d\r\n", request->bChannelNumber, mute1.bCur);
     return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &mute1, sizeof(mute1));
   }
-  else if (UAC2_ENTITY_FEATURE_UNIT && request->bControlSelector == AUDIO_FU_CTRL_VOLUME)
+  else if (request->bControlSelector == AUDIO_FU_CTRL_VOLUME)
   {
     if (request->bRequest == AUDIO_CS_REQ_RANGE)
     {

From 0a70a66b07cebcdf1716ea0c1b301a6945c13839 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 19 Nov 2023 23:43:36 +0100
Subject: [PATCH 007/204] Fix up TUD_AUDIO_SPEAKER_MONO_FB_DESCRIPTOR.

---
 src/device/usbd.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/device/usbd.h b/src/device/usbd.h
index 0197628e2c..17616f7b1d 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -561,7 +561,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   /* Output Terminal Descriptor(4.7.2.5) */\
   TUD_AUDIO_DESC_OUTPUT_TERM(/*_termid*/ 0x03, /*_termtype*/ AUDIO_TERM_TYPE_OUT_DESKTOP_SPEAKER, /*_assocTerm*/ 0x01, /*_srcid*/ 0x02, /*_clkid*/ 0x04, /*_ctrl*/ 0x0000, /*_stridx*/ 0x00),\
   /* Feature Unit Descriptor(4.7.2.8) */\
-  TUD_AUDIO_DESC_FEATURE_UNIT_ONE_CHANNEL(/*_unitid*/ 0x02, /*_srcid*/ 0x01, /*_ctrlch0master*/ 0 * (AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS), /*_ctrlch1*/ 0 * (AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS), /*_stridx*/ 0x00),\
+  TUD_AUDIO_DESC_FEATURE_UNIT_ONE_CHANNEL(/*_unitid*/ 0x02, /*_srcid*/ 0x01, /*_ctrlch0master*/ AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS, /*_ctrlch1*/ AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS, /*_stridx*/ 0x00),\
   /* Standard AS Interface Descriptor(4.9.1) */\
   /* Interface 1, Alternate 0 - default alternate setting with 0 bandwidth */\
   TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)((_itfnum) + 1), /*_altset*/ 0x00, /*_nEPs*/ 0x00, /*_stridx*/ 0x00),\
@@ -577,7 +577,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
   TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\
   /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */\
-  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(/*_ep*/ _epfb, /*_interval*/ 1)\
+  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(/*_ep*/ _epfb, /*_interval*/ 1)
 
 //   Calculate wMaxPacketSize of Endpoints
 #define TUD_AUDIO_EP_SIZE(_maxFrequency, _nBytesPerSample, _nChannels) \

From a7762ff82e534de0ee07d2701aedeba0e949a94f Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 19 Nov 2023 23:45:02 +0100
Subject: [PATCH 008/204] LPC55 : Use PLL clock for better precision, allows
 easier UAC testing.

---
 hw/bsp/lpc55/family.c | 85 +++++++++++++++++++++++++++++--------------
 1 file changed, 57 insertions(+), 28 deletions(-)

diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index cfd5b70320..9cbce7edab 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -81,44 +81,73 @@ void USB1_IRQHandler(void) {
 }
 
 /****************************************************************
-name: BOARD_BootClockFROHF96M
+name: BOARD_BootClockPLL100M
 outputs:
-- {id: SYSTICK_clock.outFreq, value: 96 MHz}
-- {id: System_clock.outFreq, value: 96 MHz}
+- {id: System_clock.outFreq, value: 100 MHz}
 settings:
-- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
+- {id: PLL0_Mode, value: Normal}
+- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
+- {id: ENABLE_CLKIN_ENA, value: Enabled}
+- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
+- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
+- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
+- {id: SYSCON.PLL0M_MULT.scale, value: '100', locked: true}
+- {id: SYSCON.PLL0N_DIV.scale, value: '4', locked: true}
+- {id: SYSCON.PLL0_PDEC.scale, value: '4', locked: true}
 sources:
-- {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
+- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
+- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
 ******************************************************************/
-void BootClockFROHF96M(void) {
-  /*!< Set up the clock sources */
-  /*!< Set up FRO */
-  POWER_DisablePD(kPDRUNCFG_PD_FRO192M); /*!< Ensure FRO is on  */
-  CLOCK_SetupFROClocking(12000000U);     /*!< Set up FRO to the 12 MHz, just for sure */
-  CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without
-                                             accidentally being below the voltage for current speed */
-
-  CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */
-
-  POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-  CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */
-
-  /*!< Set up dividers */
-  CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);     /*!< Set AHBCLKDIV divider to value 1 */
-
-  /*!< Set up clock selectors - Attach clocks to the peripheries */
-  CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
-
-  /*!< Set SystemCoreClock variable. */
-  SystemCoreClock = 96000000U;
+void BOARD_BootClockPLL100M(void)
+{
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
+
+    /*!< Configure XTAL32M */
+    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
+    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
+    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
+    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
+    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
+
+    POWER_SetVoltageForFreq(100000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(100000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up PLL */
+    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
+    const pll_setup_t pll0Setup = {
+        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(26U),
+        .pllndec = SYSCON_PLL0NDEC_NDIV(4U),
+        .pllpdec = SYSCON_PLL0PDEC_PDIV(2U),
+        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(100U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
+        .pllRate = 100000000U,
+        .flags =  PLL_SETUPFLAG_WAITLOCK
+    };
+    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kPLL0_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL0 */
+
+    /*< Set SystemCoreClock variable. */
+    SystemCoreClock = 100000000U;
 }
 
 void board_init(void) {
   // Enable IOCON clock
   CLOCK_EnableClock(kCLOCK_Iocon);
 
-  // Init 96 MHz clock
-  BootClockFROHF96M();
+  // Init 100 MHz clock
+  BOARD_BootClockPLL100M();
 
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);

From 73d61fa2b8af7ce01d1771a315775e01fc9b5825 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Wed, 8 May 2024 21:03:49 +0200
Subject: [PATCH 009/204] Migrate to weak default implementation.

---
 src/class/audio/audio_device.c | 252 +++++++++++++++++++++------------
 src/class/audio/audio_device.h |  32 ++---
 2 files changed, 179 insertions(+), 105 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index dd82d54acd..555ecd4eaa 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -429,6 +429,138 @@ typedef struct
 
 #define ITF_MEM_RESET_SIZE   offsetof(audiod_function_t, ctrl_buf)
 
+//--------------------------------------------------------------------+
+// WEAK FUNCTION STUBS
+//--------------------------------------------------------------------+
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN
+TU_ATTR_WEAK bool tud_audio_tx_done_pre_load_cb(uint8_t rhport, uint8_t func_id, uint8_t ep_in, uint8_t cur_alt_setting) {
+  (void) rhport;
+  (void) func_id;
+  (void) ep_in;
+  (void) cur_alt_setting;
+  return true;
+}
+
+TU_ATTR_WEAK bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uint8_t func_id, uint8_t ep_in, uint8_t cur_alt_setting) {
+  (void) rhport;
+  (void) n_bytes_copied;
+  (void) func_id;
+  (void) ep_in;
+  (void) cur_alt_setting;
+  return true;
+}
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+TU_ATTR_WEAK bool tud_audio_rx_done_pre_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting) {
+  (void) rhport;
+  (void) n_bytes_received;
+  (void) func_id;
+  (void) ep_out;
+  (void) cur_alt_setting;
+  return true;
+}
+
+TU_ATTR_WEAK bool tud_audio_rx_done_post_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting) {
+  (void) rhport;
+  (void) n_bytes_received;
+  (void) func_id;
+  (void) ep_out;
+  (void) cur_alt_setting;
+  return true;
+}
+#endif
+
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+TU_ATTR_WEAK void tud_audio_fb_done_cb(uint8_t func_id) {
+  (void) func_id;
+}
+
+TU_ATTR_WEAK void tud_audio_feedback_params_cb(uint8_t func_id, uint8_t alt_itf, audio_feedback_params_t* feedback_param) {
+  (void) func_id;
+  (void) alt_itf;
+  feedback_param->method = AUDIO_FEEDBACK_METHOD_DISABLED;
+}
+#endif
+
+TU_ATTR_WEAK TU_ATTR_FAST_FUNC void tud_audio_feedback_interval_isr(uint8_t func_id, uint32_t frame_number, uint8_t interval_shift) {
+  (void) func_id;
+  (void) frame_number;
+  (void) interval_shift;
+}
+
+#if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
+TU_ATTR_WEAK void tud_audio_int_done_cb(uint8_t rhport) {
+  (void) rhport;
+}
+#endif
+
+// Invoked when audio set interface request received
+TU_ATTR_WEAK bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request) {
+  (void) rhport;
+  (void) p_request;
+  return true;
+}
+
+// Invoked when audio set interface request received which closes an EP
+TU_ATTR_WEAK bool tud_audio_set_itf_close_EP_cb(uint8_t rhport, tusb_control_request_t const * p_request) {
+  (void) rhport;
+  (void) p_request;
+  return true;
+}
+
+// Invoked when audio class specific set request received for an EP
+TU_ATTR_WEAK bool tud_audio_set_req_ep_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff) {
+  (void) rhport;
+  (void) p_request;
+  (void) pBuff;
+  TU_LOG2("  No EP set request callback available!\r\n");
+  return false;   // In case no callback function is present or request can not be conducted we stall it
+}
+
+// Invoked when audio class specific set request received for an interface
+TU_ATTR_WEAK bool tud_audio_set_req_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff) {
+  (void) rhport;
+  (void) p_request;
+  (void) pBuff;
+  TU_LOG2("  No interface set request callback available!\r\n");
+  return false;   // In case no callback function is present or request can not be conducted we stall it
+}
+
+// Invoked when audio class specific set request received for an entity
+TU_ATTR_WEAK bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff) {
+  (void) rhport;
+  (void) p_request;
+  (void) pBuff;
+  TU_LOG2("  No entity set request callback available!\r\n");
+  return false;   // In case no callback function is present or request can not be conducted we stall it
+}
+
+// Invoked when audio class specific get request received for an EP
+TU_ATTR_WEAK bool tud_audio_get_req_ep_cb(uint8_t rhport, tusb_control_request_t const * p_request) {
+  (void) rhport;
+  (void) p_request;
+  TU_LOG2("  No EP get request callback available!\r\n");
+  return false;   // Stall
+}
+
+// Invoked when audio class specific get request received for an interface
+TU_ATTR_WEAK bool tud_audio_get_req_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request) {
+  (void) rhport;
+  (void) p_request;
+  TU_LOG2("  No interface get request callback available!\r\n");
+  return false;   // Stall
+}
+
+// Invoked when audio class specific get request received for an entity
+TU_ATTR_WEAK bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const * p_request) {
+  (void) rhport;
+  (void) p_request;
+  TU_LOG2("  No entity get request callback available!\r\n");
+  return false;   // Stall
+}
+
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
@@ -557,17 +689,11 @@ static bool audiod_rx_done_cb(uint8_t rhport, audiod_function_t* audio, uint16_t
   uint8_t const *dummy2;
   uint8_t idx_audio_fct = 0;
 
-  if (tud_audio_rx_done_pre_read_cb || tud_audio_rx_done_post_read_cb)
-  {
-    idx_audio_fct = audiod_get_audio_fct_idx(audio);
-    TU_VERIFY(audiod_get_AS_interface_index(audio->ep_out_as_intf_num, audio, &idxItf, &dummy2));
-  }
+  idx_audio_fct = audiod_get_audio_fct_idx(audio);
+  TU_VERIFY(audiod_get_AS_interface_index(audio->ep_out_as_intf_num, audio, &idxItf, &dummy2));
 
   // Call a weak callback here - a possibility for user to get informed an audio packet was received and data gets now loaded into EP FIFO (or decoded into support RX software FIFO)
-  if (tud_audio_rx_done_pre_read_cb)
-  {
-    TU_VERIFY(tud_audio_rx_done_pre_read_cb(rhport, n_bytes_received, idx_audio_fct, audio->ep_out, audio->alt_setting[idxItf]));
-  }
+  TU_VERIFY(tud_audio_rx_done_pre_read_cb(rhport, n_bytes_received, idx_audio_fct, audio->ep_out, audio->alt_setting[idxItf]));
 
 #if CFG_TUD_AUDIO_ENABLE_DECODING
 
@@ -628,10 +754,7 @@ static bool audiod_rx_done_cb(uint8_t rhport, audiod_function_t* audio, uint16_t
 #endif
 
   // Call a weak callback here - a possibility for user to get informed decoding was completed
-  if (tud_audio_rx_done_post_read_cb)
-  {
-    TU_VERIFY(tud_audio_rx_done_post_read_cb(rhport, n_bytes_received, idx_audio_fct, audio->ep_out, audio->alt_setting[idxItf]));
-  }
+  TU_VERIFY(tud_audio_rx_done_post_read_cb(rhport, n_bytes_received, idx_audio_fct, audio->ep_out, audio->alt_setting[idxItf]));
 
   return true;
 }
@@ -865,7 +988,7 @@ static bool audiod_tx_done_cb(uint8_t rhport, audiod_function_t * audio)
 
   // Call a weak callback here - a possibility for user to get informed former TX was completed and data gets now loaded into EP in buffer (in case FIFOs are used) or
   // if no FIFOs are used the user may use this call back to load its data into the EP IN buffer by use of tud_audio_n_write_ep_in_buffer().
-  if (tud_audio_tx_done_pre_load_cb) TU_VERIFY(tud_audio_tx_done_pre_load_cb(rhport, idx_audio_fct, audio->ep_in, audio->alt_setting[idxItf]));
+  TU_VERIFY(tud_audio_tx_done_pre_load_cb(rhport, idx_audio_fct, audio->ep_in, audio->alt_setting[idxItf]));
 
   // Send everything in ISO EP FIFO
   uint16_t n_bytes_tx;
@@ -928,7 +1051,7 @@ static bool audiod_tx_done_cb(uint8_t rhport, audiod_function_t * audio)
 #endif
 
   // Call a weak callback here - a possibility for user to get informed former TX was completed and how many bytes were loaded for the next frame
-  if (tud_audio_tx_done_post_load_cb) TU_VERIFY(tud_audio_tx_done_post_load_cb(rhport, n_bytes_tx, idx_audio_fct, audio->ep_in, audio->alt_setting[idxItf]));
+  TU_VERIFY(tud_audio_tx_done_post_load_cb(rhport, n_bytes_tx, idx_audio_fct, audio->ep_in, audio->alt_setting[idxItf]));
 
   return true;
 }
@@ -1723,7 +1846,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
   #endif
 
     // Invoke callback - can be used to stop data sampling
-    if (tud_audio_set_itf_close_EP_cb) TU_VERIFY(tud_audio_set_itf_close_EP_cb(rhport, p_request));
+    TU_VERIFY(tud_audio_set_itf_close_EP_cb(rhport, p_request));
 
     audio->ep_in = 0;                           // Necessary?
 
@@ -1754,7 +1877,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
   #endif
 
     // Invoke callback - can be used to stop data sampling
-    if (tud_audio_set_itf_close_EP_cb) TU_VERIFY(tud_audio_set_itf_close_EP_cb(rhport, p_request));
+    TU_VERIFY(tud_audio_set_itf_close_EP_cb(rhport, p_request));
 
     audio->ep_out = 0;                          // Necessary?
 
@@ -1870,9 +1993,6 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
           {
             audio->ep_fb = ep_addr;
             audio->feedback.frame_shift = desc_ep->bInterval -1;
-
-            // Enable SOF interrupt if callback is implemented
-            if (tud_audio_feedback_interval_isr) usbd_sof_enable(rhport, true);
           }
   #endif
 #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT
@@ -1885,11 +2005,11 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
       TU_VERIFY(foundEPs == nEps);
 
       // Invoke one callback for a final set interface
-      if (tud_audio_set_itf_cb) TU_VERIFY(tud_audio_set_itf_cb(rhport, p_request));
+      TU_VERIFY(tud_audio_set_itf_cb(rhport, p_request));
 
 #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
-      // Prepare feedback computation if callback is available
-      if (tud_audio_feedback_params_cb)
+      // Prepare feedback computation if endpoint is available
+      if(audio->ep_fb != 0)
       {
         audio_feedback_params_t fb_param;
 
@@ -1907,6 +2027,8 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
           case AUDIO_FEEDBACK_METHOD_FREQUENCY_FLOAT:
           case AUDIO_FEEDBACK_METHOD_FREQUENCY_POWER_OF_2:
             audiod_set_fb_params_freq(audio, fb_param.sample_freq, fb_param.frequency.mclk_freq);
+            // Enable SOF interrupt
+            usbd_sof_enable(rhport, true);
           break;
 
           case AUDIO_FEEDBACK_METHOD_FIFO_COUNT:
@@ -1983,35 +2105,19 @@ static bool audiod_control_complete(uint8_t rhport, tusb_control_request_t const
 
         if (entityID != 0)
         {
-          if (tud_audio_set_req_entity_cb)
-          {
-            // Check if entity is present and get corresponding driver index
-            TU_VERIFY(audiod_verify_entity_exists(itf, entityID, &func_id));
+          // Check if entity is present and get corresponding driver index
+          TU_VERIFY(audiod_verify_entity_exists(itf, entityID, &func_id));
 
-            // Invoke callback
-            return tud_audio_set_req_entity_cb(rhport, p_request, _audiod_fct[func_id].ctrl_buf);
-          }
-          else
-          {
-            TU_LOG2("  No entity set request callback available!\r\n");
-            return false;     // In case no callback function is present or request can not be conducted we stall it
-          }
+          // Invoke callback
+          return tud_audio_set_req_entity_cb(rhport, p_request, _audiod_fct[func_id].ctrl_buf);
         }
         else
         {
-          if (tud_audio_set_req_itf_cb)
-          {
-            // Find index of audio driver structure and verify interface really exists
-            TU_VERIFY(audiod_verify_itf_exists(itf, &func_id));
+          // Find index of audio driver structure and verify interface really exists
+          TU_VERIFY(audiod_verify_itf_exists(itf, &func_id));
 
-            // Invoke callback
-            return tud_audio_set_req_itf_cb(rhport, p_request, _audiod_fct[func_id].ctrl_buf);
-          }
-          else
-          {
-            TU_LOG2("  No interface set request callback available!\r\n");
-            return false;     // In case no callback function is present or request can not be conducted we stall it
-          }
+          // Invoke callback
+          return tud_audio_set_req_itf_cb(rhport, p_request, _audiod_fct[func_id].ctrl_buf);
         }
       }
       break;
@@ -2020,19 +2126,11 @@ static bool audiod_control_complete(uint8_t rhport, tusb_control_request_t const
       {
         uint8_t ep = TU_U16_LOW(p_request->wIndex);
 
-        if (tud_audio_set_req_ep_cb)
-        {
-          // Check if entity is present and get corresponding driver index
-          TU_VERIFY(audiod_verify_ep_exists(ep, &func_id));
+        // Check if entity is present and get corresponding driver index
+        TU_VERIFY(audiod_verify_ep_exists(ep, &func_id));
 
-          // Invoke callback
-          return tud_audio_set_req_ep_cb(rhport, p_request, _audiod_fct[func_id].ctrl_buf);
-        }
-        else
-        {
-          TU_LOG2("  No EP set request callback available!\r\n");
-          return false;   // In case no callback function is present or request can not be conducted we stall it
-        }
+        // Invoke callback
+        return tud_audio_set_req_ep_cb(rhport, p_request, _audiod_fct[func_id].ctrl_buf);
       }
       break;
       // Unknown/Unsupported recipient
@@ -2089,15 +2187,7 @@ static bool audiod_control_request(uint8_t rhport, tusb_control_request_t const
           // In case we got a get request invoke callback - callback needs to answer as defined in UAC2 specification page 89 - 5. Requests
           if (p_request->bmRequestType_bit.direction == TUSB_DIR_IN)
           {
-            if (tud_audio_get_req_entity_cb)
-            {
-              return tud_audio_get_req_entity_cb(rhport, p_request);
-            }
-            else
-            {
-              TU_LOG2("  No entity get request callback available!\r\n");
-              return false;   // Stall
-            }
+            return tud_audio_get_req_entity_cb(rhport, p_request);
           }
         }
         else
@@ -2108,15 +2198,7 @@ static bool audiod_control_request(uint8_t rhport, tusb_control_request_t const
           // In case we got a get request invoke callback - callback needs to answer as defined in UAC2 specification page 89 - 5. Requests
           if (p_request->bmRequestType_bit.direction == TUSB_DIR_IN)
           {
-            if (tud_audio_get_req_itf_cb)
-            {
-              return tud_audio_get_req_itf_cb(rhport, p_request);
-            }
-            else
-            {
-              TU_LOG2("  No interface get request callback available!\r\n");
-              return false;   // Stall
-            }
+            return tud_audio_get_req_itf_cb(rhport, p_request);
           }
         }
       }
@@ -2132,15 +2214,7 @@ static bool audiod_control_request(uint8_t rhport, tusb_control_request_t const
         // In case we got a get request invoke callback - callback needs to answer as defined in UAC2 specification page 89 - 5. Requests
         if (p_request->bmRequestType_bit.direction == TUSB_DIR_IN)
         {
-          if (tud_audio_get_req_ep_cb)
-          {
-            return tud_audio_get_req_ep_cb(rhport, p_request);
-          }
-          else
-          {
-            TU_LOG2("  No EP get request callback available!\r\n");
-            return false;     // Stall
-          }
+          return tud_audio_get_req_ep_cb(rhport, p_request);
         }
       }
       break;
@@ -2195,7 +2269,7 @@ bool audiod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3
       // I assume here, that things above are handled by PHY
       // All transmission is done - what remains to do is to inform job was completed
 
-      if (tud_audio_int_done_cb) tud_audio_int_done_cb(rhport);
+      tud_audio_int_done_cb(rhport);
       return true;
     }
 
@@ -2236,7 +2310,7 @@ bool audiod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3
     // Transmission of feedback EP finished
     if (audio->ep_fb == ep_addr)
     {
-      if (tud_audio_fb_done_cb) tud_audio_fb_done_cb(func_id);
+      tud_audio_fb_done_cb(func_id);
 
       // Schedule a transmit with the new value if EP is not busy
       if (usbd_edpt_claim(rhport, audio->ep_fb))
@@ -2397,7 +2471,7 @@ TU_ATTR_FAST_FUNC void audiod_sof_isr (uint8_t rhport, uint32_t frame_count)
       uint32_t const interval = 1UL << (audio->feedback.frame_shift - hs_adjust);
       if ( 0 == (frame_count & (interval-1)) )
       {
-        if(tud_audio_feedback_interval_isr) tud_audio_feedback_interval_isr(i, frame_count, audio->feedback.frame_shift);
+        tud_audio_feedback_interval_isr(i, frame_count, audio->feedback.frame_shift);
       }
     }
   }
diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h
index 9c95ce1a97..0d658de7cc 100644
--- a/src/class/audio/audio_device.h
+++ b/src/class/audio/audio_device.h
@@ -451,17 +451,17 @@ bool tud_audio_buffer_and_schedule_control_xfer(uint8_t rhport, tusb_control_req
 //--------------------------------------------------------------------+
 
 #if CFG_TUD_AUDIO_ENABLE_EP_IN
-TU_ATTR_WEAK bool tud_audio_tx_done_pre_load_cb(uint8_t rhport, uint8_t func_id, uint8_t ep_in, uint8_t cur_alt_setting);
-TU_ATTR_WEAK bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uint8_t func_id, uint8_t ep_in, uint8_t cur_alt_setting);
+bool tud_audio_tx_done_pre_load_cb(uint8_t rhport, uint8_t func_id, uint8_t ep_in, uint8_t cur_alt_setting);
+bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uint8_t func_id, uint8_t ep_in, uint8_t cur_alt_setting);
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT
-TU_ATTR_WEAK bool tud_audio_rx_done_pre_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting);
-TU_ATTR_WEAK bool tud_audio_rx_done_post_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting);
+bool tud_audio_rx_done_pre_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting);
+bool tud_audio_rx_done_post_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting);
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
-TU_ATTR_WEAK void tud_audio_fb_done_cb(uint8_t func_id);
+void tud_audio_fb_done_cb(uint8_t func_id);
 
 
 // determined by the user itself and set by use of tud_audio_n_fb_set(). The feedback value may be determined e.g. from some fill status of some FIFO buffer. Advantage: No ISR interrupt is enabled, hence the CPU need not to handle an ISR every 1ms or 125us and thus less CPU load, disadvantage: typically a larger FIFO is needed to compensate for jitter (e.g. 8 frames), i.e. a larger delay is introduced.
@@ -516,43 +516,43 @@ typedef struct {
 }audio_feedback_params_t;
 
 // Invoked when needed to set feedback parameters
-TU_ATTR_WEAK void tud_audio_feedback_params_cb(uint8_t func_id, uint8_t alt_itf, audio_feedback_params_t* feedback_param);
+void tud_audio_feedback_params_cb(uint8_t func_id, uint8_t alt_itf, audio_feedback_params_t* feedback_param);
 
 // Callback in ISR context, invoked periodically according to feedback endpoint bInterval.
 // Could be used to compute and update feedback value, should be placed in RAM if possible
 // frame_number  : current SOF count
 // interval_shift: number of bit shift i.e log2(interval) from Feedback endpoint descriptor
-TU_ATTR_WEAK TU_ATTR_FAST_FUNC void tud_audio_feedback_interval_isr(uint8_t func_id, uint32_t frame_number, uint8_t interval_shift);
+TU_ATTR_FAST_FUNC void tud_audio_feedback_interval_isr(uint8_t func_id, uint32_t frame_number, uint8_t interval_shift);
 
 #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
 
 #if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
-TU_ATTR_WEAK void tud_audio_int_done_cb(uint8_t rhport);
+void tud_audio_int_done_cb(uint8_t rhport);
 #endif
 
 // Invoked when audio set interface request received
-TU_ATTR_WEAK bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request);
 
 // Invoked when audio set interface request received which closes an EP
-TU_ATTR_WEAK bool tud_audio_set_itf_close_EP_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+bool tud_audio_set_itf_close_EP_cb(uint8_t rhport, tusb_control_request_t const * p_request);
 
 // Invoked when audio class specific set request received for an EP
-TU_ATTR_WEAK bool tud_audio_set_req_ep_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff);
+bool tud_audio_set_req_ep_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff);
 
 // Invoked when audio class specific set request received for an interface
-TU_ATTR_WEAK bool tud_audio_set_req_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff);
+bool tud_audio_set_req_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff);
 
 // Invoked when audio class specific set request received for an entity
-TU_ATTR_WEAK bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff);
+bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff);
 
 // Invoked when audio class specific get request received for an EP
-TU_ATTR_WEAK bool tud_audio_get_req_ep_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+bool tud_audio_get_req_ep_cb(uint8_t rhport, tusb_control_request_t const * p_request);
 
 // Invoked when audio class specific get request received for an interface
-TU_ATTR_WEAK bool tud_audio_get_req_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+bool tud_audio_get_req_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request);
 
 // Invoked when audio class specific get request received for an entity
-TU_ATTR_WEAK bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const * p_request);
+bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const * p_request);
 
 //--------------------------------------------------------------------+
 // Inline Functions

From 8dc767fa1dd768878ed8bd8541398b0722875066 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Wed, 8 May 2024 22:31:30 +0200
Subject: [PATCH 010/204] Fix cycle based feedback calculation.

---
 src/class/audio/audio_device.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 555ecd4eaa..c0a8d1d728 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -66,8 +66,10 @@
 //--------------------------------------------------------------------+
 
 // Use ring buffer if it's available, some MCUs need extra RAM requirements
+// For DWC2 enable ring buffer will disable DMA (if available)
 #ifndef TUD_AUDIO_PREFER_RING_BUFFER
-  #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
+  #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX || \
+      defined(TUP_USBIP_DWC2)
     #define TUD_AUDIO_PREFER_RING_BUFFER 0
   #else
     #define TUD_AUDIO_PREFER_RING_BUFFER 1
@@ -2347,11 +2349,11 @@ static bool audiod_set_fb_params_freq(audiod_function_t* audio, uint32_t sample_
   if ((mclk_freq % sample_freq) == 0 && tu_is_power_of_two(mclk_freq / sample_freq))
   {
     audio->feedback.compute_method     = AUDIO_FEEDBACK_METHOD_FREQUENCY_POWER_OF_2;
-    audio->feedback.compute.power_of_2 = 16 - audio->feedback.frame_shift - tu_log2(mclk_freq / sample_freq);
+    audio->feedback.compute.power_of_2 = 16 - (audio->feedback.frame_shift - 1) - tu_log2(mclk_freq / sample_freq);
   }
   else if ( audio->feedback.compute_method == AUDIO_FEEDBACK_METHOD_FREQUENCY_FLOAT)
   {
-    audio->feedback.compute.float_const = (float)sample_freq / mclk_freq * (1UL << (16 - audio->feedback.frame_shift));
+    audio->feedback.compute.float_const = (float)sample_freq / mclk_freq * (1UL << (16 - (audio->feedback.frame_shift - 1)));
   }
   else
   {
@@ -2411,7 +2413,7 @@ uint32_t tud_audio_feedback_update(uint8_t func_id, uint32_t cycles)
 
     case AUDIO_FEEDBACK_METHOD_FREQUENCY_FIXED:
     {
-      uint64_t fb64 = (((uint64_t) cycles) * audio->feedback.compute.fixed.sample_freq) << (16 - audio->feedback.frame_shift);
+      uint64_t fb64 = (((uint64_t) cycles) * audio->feedback.compute.fixed.sample_freq) << (16 - (audio->feedback.frame_shift - 1));
       feedback = (uint32_t) (fb64 / audio->feedback.compute.fixed.mclk_freq);
     }
     break;

From ab539895a5be8138ae60aecedac6d32a1748bffc Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Wed, 8 May 2024 23:08:47 +0200
Subject: [PATCH 011/204] Reorganize feedback documentation.

---
 src/class/audio/audio_device.h | 53 ++++++++++++++++++++++++----------
 1 file changed, 37 insertions(+), 16 deletions(-)

diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h
index 0d658de7cc..5a1c51eaf1 100644
--- a/src/class/audio/audio_device.h
+++ b/src/class/audio/audio_device.h
@@ -243,7 +243,8 @@
 // Enable encoding/decodings - for these to work, support FIFOs need to be setup in appropriate numbers and size
 // The actual coding parameters of active AS alternate interface is parsed from the descriptors
 
-// The item size of the FIFO is always fixed to one i.e. bytes! Furthermore, the actively used FIFO depth is reconfigured such that the depth is a multiple of the current sample size in order to avoid samples to get split up in case of a wrap in the FIFO ring buffer (depth = (max_depth / sampe_sz) * sampe_sz)!
+// The item size of the FIFO is always fixed to one i.e. bytes! Furthermore, the actively used FIFO depth is reconfigured such that the depth is a multiple
+// of the current sample size in order to avoid samples to get split up in case of a wrap in the FIFO ring buffer (depth = (max_depth / sample_sz) * sample_sz)!
 // This is important to remind in case you use DMAs! If the sample sizes changes, the DMA MUST BE RECONFIGURED just like the FIFOs for a different depth!!!
 
 // For PCM encoding/decoding
@@ -447,7 +448,7 @@ static inline bool tud_audio_int_write                      (const audio_interru
 bool tud_audio_buffer_and_schedule_control_xfer(uint8_t rhport, tusb_control_request_t const * p_request, void* data, uint16_t len);
 
 //--------------------------------------------------------------------+
-// Application Callback API (weak is optional)
+// Application Callback API
 //--------------------------------------------------------------------+
 
 #if CFG_TUD_AUDIO_ENABLE_EP_IN
@@ -464,42 +465,62 @@ bool tud_audio_rx_done_post_read_cb(uint8_t rhport, uint16_t n_bytes_received, u
 void tud_audio_fb_done_cb(uint8_t func_id);
 
 
-// determined by the user itself and set by use of tud_audio_n_fb_set(). The feedback value may be determined e.g. from some fill status of some FIFO buffer. Advantage: No ISR interrupt is enabled, hence the CPU need not to handle an ISR every 1ms or 125us and thus less CPU load, disadvantage: typically a larger FIFO is needed to compensate for jitter (e.g. 8 frames), i.e. a larger delay is introduced.
-
-// Feedback value is calculated within the audio driver by use of SOF interrupt. The driver needs information about the master clock f_m from which the audio sample frequency f_s is derived, f_s itself, and the cycle count of f_m at time of the SOF interrupt (e.g. by use of a hardware counter) - see tud_audio_set_fb_params(). Advantage: Reduced jitter in the feedback value computation, hence, the receive FIFO can be smaller (e.g. 2 frames) and thus a smaller delay is possible, disadvantage: higher CPU load due to SOF ISR handling every frame i.e. 1ms or 125us. This option is a great starting point to try the SOF ISR option but depending on your hardware setup (performance of the CPU) it might not work. If so, figure out why and use the next option. (The most critical point is the reading of the cycle counter value of f_m. It is read from within the SOF ISR - see: audiod_sof() -, hence, the ISR must has a high priority such that no software dependent "random" delay i.e. jitter is introduced).
+// Note about feedback calculation
+//
+// Option 1 - AUDIO_FEEDBACK_METHOD_FIFO_COUNT
+// Feedback value is calculated within the audio driver by regulating the FIFO level to half fill.
+// Advantage: No ISR interrupt is enabled, hence the CPU need not to handle an ISR every 1ms or 125us and thus less CPU load, well tested
+// (Windows, Linux, OSX) with a reliable result so far.
+// Disadvantage: A FIFO of minimal 4 frames is needed to compensate for jitter, an average delay of 2 frames is introduced.
+//
+// Option 2 - AUDIO_FEEDBACK_METHOD_FREQUENCY_FIXED / AUDIO_FEEDBACK_METHOD_FREQUENCY_FLOAT
+// Feedback value is calculated within the audio driver by use of SOF interrupt. The driver needs information about the master clock f_m from
+// which the audio sample frequency f_s is derived, f_s itself, and the cycle count of f_m at time of the SOF interrupt (e.g. by use of a hardware counter).
+// See tud_audio_set_fb_params() and tud_audio_feedback_update()
+// Advantage: Reduced jitter in the feedback value computation, hence, the receive FIFO can be smaller and thus a smaller delay is possible.
+// Disadvantage: higher CPU load due to SOF ISR handling every frame i.e. 1ms or 125us. (The most critical point is the reading of the cycle counter value of f_m.
+// It is read from within the SOF ISR - see: audiod_sof() -, hence, the ISR must has a high priority such that no software dependent "random" delay i.e. jitter is introduced).
+// Long-term drift could occur since error is accumulated.
+//
+// Option 3 - manual
+// Determined by the user itself and set by use of tud_audio_n_fb_set(). The feedback value may be determined e.g. from some fill status of some FIFO buffer.
+// Advantage: No ISR interrupt is enabled, hence the CPU need not to handle an ISR every 1ms or 125us and thus less CPU load.
+// Disadvantage: typically a larger FIFO is needed to compensate for jitter (e.g. 6 frames), i.e. a larger delay is introduced.
 
-// Feedback value is determined by the user by use of SOF interrupt. The user may use tud_audio_sof_isr() which is called every SOF (of course only invoked when an alternate interface other than zero was set). The number of frames used to determine the feedback value for the currently active alternate setting can be get by tud_audio_get_fb_n_frames(). The feedback value must be set by use of tud_audio_n_fb_set().
 
 // This function is used to provide data rate feedback from an asynchronous sink. Feedback value will be sent at FB endpoint interval till it's changed.
 //
 // The feedback format is specified to be 16.16 for HS and 10.14 for FS devices (see Universal Serial Bus Specification Revision 2.0 5.12.4.2). By default,
-// the choice of format is left to the caller and feedback argument is sent as-is. If CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION is set, then tinyusb
-// expects 16.16 format and handles the conversion to 10.14 on FS.
+// the choice of format is left to the caller and feedback argument is sent as-is. If CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION is set
+// then tinyusb expects 16.16 format and handles the conversion to 10.14 on FS.
+//
+// Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and it seems the
+// driver can work with either format.
 //
-// Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and macOS it seems the
-// driver can work with either format. So a good compromise is to keep format correction disabled and stick to 16.16 format.
-
 // Feedback value can be determined from within the SOF ISR of the audio driver. This should reduce jitter. If the feature is used, the user can not set the feedback value.
-
+//
 // Determine feedback value - The feedback method is described in 5.12.4.2 of the USB 2.0 spec
 // Boiled down, the feedback value Ff = n_samples / (micro)frame.
-// Since an accuracy of less than 1 Sample / second is desired, at least n_frames = ceil(2^K * f_s / f_m) frames need to be measured, where K = 10 for full speed and K = 13 for high speed, f_s is the sampling frequency e.g. 48 kHz and f_m is the cpu clock frequency e.g. 100 MHz (or any other master clock whose clock count is available and locked to f_s)
+// Since an accuracy of less than 1 Sample / second is desired, at least n_frames = ceil(2^K * f_s / f_m) frames need to be measured, where K = 10 for full speed and K = 13
+// for high speed, f_s is the sampling frequency e.g. 48 kHz and f_m is the cpu clock frequency e.g. 100 MHz (or any other master clock whose clock count is available and locked to f_s)
 // The update interval in the (4.10.2.1) Feedback Endpoint Descriptor must be less or equal to 2^(K - P), where P = min( ceil(log2(f_m / f_s)), K)
 // feedback = n_cycles / n_frames * f_s / f_m in 16.16 format, where n_cycles are the number of main clock cycles within fb_n_frames
-
 bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback);
 
-// Update feedback value with passed cycles since last time this update function is called.
+// Update feedback value with passed MCLK cycles since last time this update function is called.
 // Typically called within tud_audio_sof_isr(). Required tud_audio_feedback_params_cb() is implemented
 // This function will also call tud_audio_feedback_set()
 // return feedback value in 16.16 for reference (0 for error)
+// Example :
+//   binterval=3 (4ms); FS = 48kHz; MCLK = 12.288MHz
+//   In 4 SOF MCLK counted 49152 cycles
 uint32_t tud_audio_feedback_update(uint8_t func_id, uint32_t cycles);
 
 enum {
   AUDIO_FEEDBACK_METHOD_DISABLED,
   AUDIO_FEEDBACK_METHOD_FREQUENCY_FIXED,
   AUDIO_FEEDBACK_METHOD_FREQUENCY_FLOAT,
-  AUDIO_FEEDBACK_METHOD_FREQUENCY_POWER_OF_2,
+  AUDIO_FEEDBACK_METHOD_FREQUENCY_POWER_OF_2, // For driver internal use only
   AUDIO_FEEDBACK_METHOD_FIFO_COUNT
 };
 

From 0e907b49c90d53023731dd1e21bbdcb1fdb95e11 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Wed, 8 May 2024 23:17:56 +0200
Subject: [PATCH 012/204] Add callback to to set feedback format correction at
 runtime.

---
 src/class/audio/audio_device.c | 23 +++++++++++++----------
 src/class/audio/audio_device.h |  8 ++++++--
 2 files changed, 19 insertions(+), 12 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index c0a8d1d728..77645c4127 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -329,7 +329,7 @@ typedef struct
 
     uint8_t frame_shift;  // bInterval-1 in unit of frame (FS), micro-frame (HS)
     uint8_t compute_method;
-
+    bool format_correction;
     union {
       uint8_t power_of_2; // pre-computed power of 2 shift
       float float_const;  // pre-computed float constant
@@ -484,6 +484,11 @@ TU_ATTR_WEAK void tud_audio_feedback_params_cb(uint8_t func_id, uint8_t alt_itf,
   (void) alt_itf;
   feedback_param->method = AUDIO_FEEDBACK_METHOD_DISABLED;
 }
+
+TU_ATTR_WEAK bool tud_audio_feedback_format_correction_cb(uint8_t func_id) {
+  (void) func_id;
+  return CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION;
+}
 #endif
 
 TU_ATTR_WEAK TU_ATTR_FAST_FUNC void tud_audio_feedback_interval_isr(uint8_t func_id, uint32_t frame_number, uint8_t interval_shift) {
@@ -1211,9 +1216,9 @@ static uint16_t audiod_encode_type_I_pcm(uint8_t rhport, audiod_function_t* audi
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
 static inline bool audiod_fb_send(audiod_function_t *audio)
 {
+  bool apply_correction = TUSB_SPEED_FULL == tud_speed_get() && audio->feedback.format_correction;
   // Format the feedback value
-#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION
-  if ( TUSB_SPEED_FULL == tud_speed_get() )
+  if (apply_correction)
   {
     uint8_t * fb = (uint8_t *) &audio->feedback.send_buf;
 
@@ -1221,17 +1226,12 @@ static inline bool audiod_fb_send(audiod_function_t *audio)
     *(fb++) = (audio->feedback.value >> 2) & 0xFF;
     *(fb++) = (audio->feedback.value >> 10) & 0xFF;
     *(fb++) = (audio->feedback.value >> 18) & 0xFF;
-    // 4th byte is needed to work correctly with MS Windows
-    *fb = 0;
   } else
   {
-    value = audio->feedback.value;
+    audio->feedback.send_buf = audio->feedback.value;
   }
-#else
-  audio->feedback.send_buf = audio->feedback.value;
-#endif
 
-  return usbd_edpt_xfer(audio->rhport, audio->ep_fb, (uint8_t *) &audio->feedback.send_buf, 4);
+  return usbd_edpt_xfer(audio->rhport, audio->ep_fb, (uint8_t *) &audio->feedback.send_buf, apply_correction ? 3 : 4);
 }
 #endif
 
@@ -2018,6 +2018,9 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
         tud_audio_feedback_params_cb(func_id, alt, &fb_param);
         audio->feedback.compute_method = fb_param.method;
 
+        if(TUSB_SPEED_FULL == tud_speed_get())
+          audio->feedback.format_correction = tud_audio_feedback_format_correction_cb(func_id);
+
         // Minimal/Maximum value in 16.16 format for full speed (1ms per frame) or high speed (125 us per frame)
         uint32_t const frame_div  = (TUSB_SPEED_FULL == tud_speed_get()) ? 1000 : 8000;
         audio->feedback.min_value = ((fb_param.sample_freq - 1)/frame_div) << 16;
diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h
index 5a1c51eaf1..ae253f49d2 100644
--- a/src/class/audio/audio_device.h
+++ b/src/class/audio/audio_device.h
@@ -193,6 +193,7 @@
 #endif
 
 // Enable/disable conversion from 16.16 to 10.14 format on full-speed devices. See tud_audio_n_fb_set().
+// Can be override by tud_audio_feedback_format_correction_cb()
 #ifndef CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION
 #define CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION     0                             // 0 or 1
 #endif
@@ -491,8 +492,8 @@ void tud_audio_fb_done_cb(uint8_t func_id);
 // This function is used to provide data rate feedback from an asynchronous sink. Feedback value will be sent at FB endpoint interval till it's changed.
 //
 // The feedback format is specified to be 16.16 for HS and 10.14 for FS devices (see Universal Serial Bus Specification Revision 2.0 5.12.4.2). By default,
-// the choice of format is left to the caller and feedback argument is sent as-is. If CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION is set
-// then tinyusb expects 16.16 format and handles the conversion to 10.14 on FS.
+// the choice of format is left to the caller and feedback argument is sent as-is. If CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION is set or tud_audio_feedback_format_correction_cb()
+// return true, then tinyusb expects 16.16 format and handles the conversion to 10.14 on FS.
 //
 // Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and it seems the
 // driver can work with either format.
@@ -545,6 +546,9 @@ void tud_audio_feedback_params_cb(uint8_t func_id, uint8_t alt_itf, audio_feedba
 // interval_shift: number of bit shift i.e log2(interval) from Feedback endpoint descriptor
 TU_ATTR_FAST_FUNC void tud_audio_feedback_interval_isr(uint8_t func_id, uint32_t frame_number, uint8_t interval_shift);
 
+// (Full-Speed only) Callback to set feedback format correction is applied or not,
+// default to CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION if not implemented.
+bool tud_audio_feedback_format_correction_cb(uint8_t func_id);
 #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
 
 #if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP

From fc7647f9e4f06c8f56207f5ea7f34872887d099b Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 10 May 2024 00:11:04 +0200
Subject: [PATCH 013/204] Allow feedback EP size change.

---
 examples/device/uac2_speaker_fb/src/tusb_config.h     |  3 +++
 examples/device/uac2_speaker_fb/src/usb_descriptors.c |  4 ++--
 examples/device/uac2_speaker_fb/src/usb_descriptors.h |  6 +++---
 src/device/usbd.h                                     | 10 +++++-----
 4 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/examples/device/uac2_speaker_fb/src/tusb_config.h b/examples/device/uac2_speaker_fb/src/tusb_config.h
index 497104541f..1cc1031c1d 100644
--- a/examples/device/uac2_speaker_fb/src/tusb_config.h
+++ b/examples/device/uac2_speaker_fb/src/tusb_config.h
@@ -122,6 +122,9 @@ extern "C" {
 
 #define CFG_TUD_AUDIO_FUNC_1_DESC_LEN                                TUD_AUDIO_SPEAKER_STEREO_FB_DESC_LEN
 
+// Enable if Full-Speed on OSX, also set feedback EP size to 3
+#define CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION              0
+
 // Audio format type I specifications
 #if defined(__RX__)
 #define CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE                         48000
diff --git a/examples/device/uac2_speaker_fb/src/usb_descriptors.c b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
index 864b689ff0..fa307674d8 100644
--- a/examples/device/uac2_speaker_fb/src/usb_descriptors.c
+++ b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
@@ -149,8 +149,8 @@ uint8_t const desc_configuration[] =
     // Config number, interface count, string index, total length, attribute, power in mA
     TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
-    // Interface number, string index, byte per sample, bit per sample, EP Out, EP size, EP feedback
-    TUD_AUDIO_SPEAKER_STEREO_FB_DESCRIPTOR(0, 4, CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_RESOLUTION_RX, EPNUM_AUDIO_OUT, CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX, EPNUM_AUDIO_FB | 0x80),
+    // Interface number, string index, byte per sample, bit per sample, EP Out, EP size, EP feedback, feedback EP size,
+    TUD_AUDIO_SPEAKER_STEREO_FB_DESCRIPTOR(0, 4, CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_RESOLUTION_RX, EPNUM_AUDIO_OUT, CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX, EPNUM_AUDIO_FB | 0x80, 4),
 
 #if CFG_AUDIO_DEBUG
     // Interface number, string index, protocol, report descriptor len, EP In address, size & polling interval
diff --git a/examples/device/uac2_speaker_fb/src/usb_descriptors.h b/examples/device/uac2_speaker_fb/src/usb_descriptors.h
index 8157f02a04..9511bf797d 100644
--- a/examples/device/uac2_speaker_fb/src/usb_descriptors.h
+++ b/examples/device/uac2_speaker_fb/src/usb_descriptors.h
@@ -47,7 +47,7 @@
   + TUD_AUDIO_DESC_CS_AS_ISO_EP_LEN\
   + TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN)
 
-#define TUD_AUDIO_SPEAKER_STEREO_FB_DESCRIPTOR(_itfnum, _stridx, _nBytesPerSample, _nBitsUsedPerSample, _epout, _epsize, _epfb) \
+#define TUD_AUDIO_SPEAKER_STEREO_FB_DESCRIPTOR(_itfnum, _stridx, _nBytesPerSample, _nBitsUsedPerSample, _epout, _epoutsize, _epfb, _epfbsize) \
   /* Standard Interface Association Descriptor (IAD) */\
   TUD_AUDIO_DESC_IAD(/*_firstitf*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
   /* Standard AC Interface Descriptor(4.7.1) */\
@@ -73,10 +73,10 @@
   /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
   TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
   /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) ((uint8_t)TUSB_XFER_ISOCHRONOUS | (uint8_t)TUSB_ISO_EP_ATT_ASYNCHRONOUS | (uint8_t)TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ 0x01),\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) ((uint8_t)TUSB_XFER_ISOCHRONOUS | (uint8_t)TUSB_ISO_EP_ATT_ASYNCHRONOUS | (uint8_t)TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epoutsize, /*_interval*/ 0x01),\
   /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
   TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC, /*_lockdelay*/ 0x0001),\
   /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */\
-  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(/*_ep*/ _epfb, /*_interval*/ TUD_OPT_HIGH_SPEED ? 4 : 1)\
+  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(/*_ep*/ _epfb, /*_epsize*/ _epfbsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 4 : 1)\
 
 #endif
diff --git a/src/device/usbd.h b/src/device/usbd.h
index d6f6f923dc..3caaaca255 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -428,8 +428,8 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
 
 /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */
 #define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN 7
-#define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(_ep, _interval) \
-  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN, TUSB_DESC_ENDPOINT, _ep, (uint8_t) ((uint8_t)TUSB_XFER_ISOCHRONOUS | (uint8_t)TUSB_ISO_EP_ATT_NO_SYNC | (uint8_t)TUSB_ISO_EP_ATT_EXPLICIT_FB), U16_TO_U8S_LE(4), _interval
+#define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(_ep, _epsize, _interval) \
+  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN, TUSB_DESC_ENDPOINT, _ep, (uint8_t) ((uint8_t)TUSB_XFER_ISOCHRONOUS | (uint8_t)TUSB_ISO_EP_ATT_NO_SYNC | (uint8_t)TUSB_ISO_EP_ATT_EXPLICIT_FB), U16_TO_U8S_LE(_epsize), _interval
 
 // AUDIO simple descriptor (UAC2) for 1 microphone input
 // - 1 Input Terminal, 1 Feature Unit (Mute and Volume Control), 1 Output Terminal, 1 Clock Source
@@ -547,7 +547,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   + TUD_AUDIO_DESC_CS_AS_ISO_EP_LEN\
   + TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN)
 
-#define TUD_AUDIO_SPEAKER_MONO_FB_DESCRIPTOR(_itfnum, _stridx, _nBytesPerSample, _nBitsUsedPerSample, _epout, _epsize, _epfb) \
+#define TUD_AUDIO_SPEAKER_MONO_FB_DESCRIPTOR(_itfnum, _stridx, _nBytesPerSample, _nBitsUsedPerSample, _epout, _epoutsize, _epfb, _epfbsize) \
   /* Standard Interface Association Descriptor (IAD) */\
   TUD_AUDIO_DESC_IAD(/*_firstitf*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
   /* Standard AC Interface Descriptor(4.7.1) */\
@@ -573,11 +573,11 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
   TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
   /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) ((uint8_t)TUSB_XFER_ISOCHRONOUS | (uint8_t)TUSB_ISO_EP_ATT_ASYNCHRONOUS | (uint8_t)TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ 0x01),\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) ((uint8_t)TUSB_XFER_ISOCHRONOUS | (uint8_t)TUSB_ISO_EP_ATT_ASYNCHRONOUS | (uint8_t)TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epoutsize, /*_interval*/ 0x01),\
   /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
   TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\
   /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */\
-  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(/*_ep*/ _epfb, /*_interval*/ 1)
+  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(/*_ep*/ _epfb, /*_epsize*/ _epfbsize, /*_interval*/ 1)
 
 //   Calculate wMaxPacketSize of Endpoints
 #define TUD_AUDIO_EP_SIZE(_maxFrequency, _nBytesPerSample, _nChannels) \

From 9ce44db56f145d2efeec6b67d0786230c1a735c4 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sat, 11 May 2024 12:32:47 +0200
Subject: [PATCH 014/204] Always send 4 bytes feedback despite 10.14 format
 (Apple wtf ?!)

---
 src/class/audio/audio_device.c | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 77645c4127..5ee0a40073 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -1231,7 +1231,20 @@ static inline bool audiod_fb_send(audiod_function_t *audio)
     audio->feedback.send_buf = audio->feedback.value;
   }
 
-  return usbd_edpt_xfer(audio->rhport, audio->ep_fb, (uint8_t *) &audio->feedback.send_buf, apply_correction ? 3 : 4);
+  // About feedback format on FS
+  //
+  // 3 variables: Format | packetSize | sendSize | Working OS:
+  //              16.16    4            4          Linux, Windows
+  //              16.16    4            3          Linux
+  //              16.16    3            4          Linux
+  //              16.16    3            3          Linux
+  //              10.14    4            4          Linux
+  //              10.14    4            3          Linux
+  //              10.14    3            4          Linux, OSX
+  //              10.14    3            3          Linux
+  //
+  // OSX requires wMaxPacketSize=3 while sending 4 bytes (Wth ?!), so we still send 4 bytes even of correction is applied
+  return usbd_edpt_xfer(audio->rhport, audio->ep_fb, (uint8_t *) &audio->feedback.send_buf, 4);
 }
 #endif
 

From ad85c37c039f9ef9fe2bf7e1fbc011609bcd98a6 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sat, 11 May 2024 12:51:18 +0200
Subject: [PATCH 015/204] Optimize SOF.

---
 src/class/audio/audio_device.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 719e71e12a..a6139ee422 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -2045,8 +2045,6 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
           case AUDIO_FEEDBACK_METHOD_FREQUENCY_FLOAT:
           case AUDIO_FEEDBACK_METHOD_FREQUENCY_POWER_OF_2:
             audiod_set_fb_params_freq(audio, fb_param.sample_freq, fb_param.frequency.mclk_freq);
-            // Enable SOF interrupt
-            usbd_sof_enable(rhport, true);
           break;
 
           case AUDIO_FEEDBACK_METHOD_FIFO_COUNT:
@@ -2084,16 +2082,19 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
 
 #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
   // Disable SOF interrupt if no driver has any enabled feedback EP
-  bool disable = true;
+  bool enable_sof = false;
   for(uint8_t i=0; i < CFG_TUD_AUDIO; i++)
   {
-    if (_audiod_fct[i].ep_fb != 0)
+    if (_audiod_fct[i].ep_fb != 0 &&
+      (_audiod_fct[i].feedback.compute_method == AUDIO_FEEDBACK_METHOD_FREQUENCY_FIXED ||
+       _audiod_fct[i].feedback.compute_method == AUDIO_FEEDBACK_METHOD_FREQUENCY_FLOAT ||
+       _audiod_fct[i].feedback.compute_method == AUDIO_FEEDBACK_METHOD_FREQUENCY_POWER_OF_2 ))
     {
-      disable = false;
+      enable_sof = true;
       break;
     }
   }
-  if (disable) usbd_sof_enable(rhport, SOF_CONSUMER_AUDIO, false);
+  usbd_sof_enable(rhport, SOF_CONSUMER_AUDIO, enable_sof);
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL

From 256ccc47571b36dd8f5aaeaebe583cb7640a4b8d Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sat, 11 May 2024 12:57:38 +0200
Subject: [PATCH 016/204] Fix CI.

---
 src/class/audio/audio_device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index a6139ee422..0df24c1632 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -1243,7 +1243,7 @@ static inline bool audiod_fb_send(audiod_function_t *audio)
   //              10.14    3            4          Linux, OSX
   //              10.14    3            3          Linux
   //
-  // OSX requires wMaxPacketSize=3 while sending 4 bytes (Wth ?!), so we still send 4 bytes even of correction is applied
+  // OSX requires wMaxPacketSize=3 while sending 4 bytes (WTF ?!), so we still send 4 bytes even of correction is applied
   return usbd_edpt_xfer(audio->rhport, audio->ep_fb, (uint8_t *) &audio->feedback.send_buf, 4);
 }
 #endif

From 08f9e4e0c8f95b28207603309974e6f15cfee87e Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 12 May 2024 13:57:17 +0200
Subject: [PATCH 017/204] Hint missing import, exit on error.

---
 .../device/uac2_speaker_fb/src/audio_debug.py  | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/examples/device/uac2_speaker_fb/src/audio_debug.py b/examples/device/uac2_speaker_fb/src/audio_debug.py
index 182d6ca897..336c46c01c 100644
--- a/examples/device/uac2_speaker_fb/src/audio_debug.py
+++ b/examples/device/uac2_speaker_fb/src/audio_debug.py
@@ -1,8 +1,13 @@
 # Install python3 HID package https://pypi.org/project/hid/
-import hid
+# Install python3 matplotlib package https://pypi.org/project/matplotlib/
+
 from ctypes import *
-import matplotlib.pyplot as plt
-import matplotlib.animation as animation
+try:
+    import hid
+    import matplotlib.pyplot as plt
+    import matplotlib.animation as animation
+except:
+    print("Missing import, please try 'pip install hid matplotlib' or consult your OS's python package manager.")
 
 # Example must be compiled with CFG_AUDIO_DEBUG=1
 VID = 0xcafe
@@ -32,15 +37,16 @@ class audio_debug_info_t (Structure):
     def animate(i):
         info = None
         for i in range(30):
-            str_in = dev.read(64, 10)
-            if str_in:
+            try:
+                str_in = dev.read(64, 50)
                 info = audio_debug_info_t.from_buffer_copy(str_in)
 
                 global fifo_avg
                 global fifo_cnt
                 fifo_avg.append(info.fifo_count_avg)
                 fifo_cnt.append(info.fifo_count)
-
+            except:
+                exit(1)
         # Limit to 1000 items
         fifo_avg = fifo_avg[-1000:]
         fifo_cnt = fifo_cnt[-1000:]

From df6740353fc0a736df4253558618c188138a43a8 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 12 May 2024 14:02:07 +0200
Subject: [PATCH 018/204] Optimize fifo level display.

---
 examples/device/uac2_speaker_fb/src/main.c | 24 +++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/examples/device/uac2_speaker_fb/src/main.c b/examples/device/uac2_speaker_fb/src/main.c
index 187ff2afe8..6609fcedbe 100644
--- a/examples/device/uac2_speaker_fb/src/main.c
+++ b/examples/device/uac2_speaker_fb/src/main.c
@@ -92,6 +92,8 @@ void audio_task(void);
 #if CFG_AUDIO_DEBUG
 void audio_debug_task(void);
 uint8_t current_alt_settings;
+uint16_t fifo_count;
+uint32_t fifo_count_avg;
 #endif
 
 /*------------- MAIN -------------*/
@@ -367,6 +369,21 @@ void tud_audio_feedback_params_cb(uint8_t func_id, uint8_t alt_itf, audio_feedba
   feedback_param->sample_freq = current_sample_rate;
 }
 
+#if CFG_AUDIO_DEBUG
+bool tud_audio_rx_done_pre_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting)
+{
+  (void)rhport;
+  (void)func_id;
+  (void)ep_out;
+  (void)cur_alt_setting;
+
+  fifo_count = tud_audio_available();
+  // Same averaging method used in UAC2 class
+  fifo_count_avg = (uint32_t)(((uint64_t)fifo_count_avg * 63  + ((uint32_t)fifo_count << 16)) >> 6);
+
+  return true;
+}
+#endif
 //--------------------------------------------------------------------+
 // AUDIO Task
 //--------------------------------------------------------------------+
@@ -418,7 +435,6 @@ void led_blinking_task(void)
 //--------------------------------------------------------------------+
 // HID interface for audio debug
 //--------------------------------------------------------------------+
-
 // Every 1ms, we will sent 1 debug information report
 void audio_debug_task(void)
 {
@@ -427,12 +443,6 @@ void audio_debug_task(void)
   if ( start_ms == curr_ms ) return; // not enough time
   start_ms = curr_ms;
 
-  uint16_t fifo_count = tud_audio_available();
-  static uint32_t fifo_count_avg;
-
-  // Same averaging method used in UAC2 class
-  fifo_count_avg = (uint32_t)(((uint64_t)fifo_count_avg * 63  + ((uint32_t)fifo_count << 16)) >> 6);
-
   audio_debug_info_t debug_info;
   debug_info.sample_rate    = current_sample_rate;
   debug_info.alt_settings   = current_alt_settings;

From 32d0baaaf81df65ec386ac6940dbfa897348b086 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 12 May 2024 14:03:29 +0200
Subject: [PATCH 019/204] Tested 3 bytes feedback work on OSX.

---
 src/class/audio/audio_device.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 0df24c1632..2a786725b6 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -1216,7 +1216,7 @@ static uint16_t audiod_encode_type_I_pcm(uint8_t rhport, audiod_function_t* audi
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
 static inline bool audiod_fb_send(audiod_function_t *audio)
 {
-  bool apply_correction = TUSB_SPEED_FULL == tud_speed_get() && audio->feedback.format_correction;
+  bool apply_correction = (TUSB_SPEED_FULL == tud_speed_get()) && audio->feedback.format_correction;
   // Format the feedback value
   if (apply_correction)
   {
@@ -1226,6 +1226,7 @@ static inline bool audiod_fb_send(audiod_function_t *audio)
     *(fb++) = (audio->feedback.value >> 2) & 0xFF;
     *(fb++) = (audio->feedback.value >> 10) & 0xFF;
     *(fb++) = (audio->feedback.value >> 18) & 0xFF;
+    *fb = 0;
   } else
   {
     audio->feedback.send_buf = audio->feedback.value;
@@ -1241,10 +1242,10 @@ static inline bool audiod_fb_send(audiod_function_t *audio)
   //              10.14    4            4          Linux
   //              10.14    4            3          Linux
   //              10.14    3            4          Linux, OSX
-  //              10.14    3            3          Linux
+  //              10.14    3            3          Linux, OSX
   //
-  // OSX requires wMaxPacketSize=3 while sending 4 bytes (WTF ?!), so we still send 4 bytes even of correction is applied
-  return usbd_edpt_xfer(audio->rhport, audio->ep_fb, (uint8_t *) &audio->feedback.send_buf, 4);
+  // We send 3 bytes since sending packet larger than wMaxPacketSize is pretty ugly
+  return usbd_edpt_xfer(audio->rhport, audio->ep_fb, (uint8_t *) &audio->feedback.send_buf, apply_correction ? 3 : 4);
 }
 #endif
 

From 301fb2a9f77a50c806c2147946eb434e360be8b0 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 12 May 2024 14:05:57 +0200
Subject: [PATCH 020/204] Fix CI.

---
 examples/device/uac2_speaker_fb/src/main.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/examples/device/uac2_speaker_fb/src/main.c b/examples/device/uac2_speaker_fb/src/main.c
index 6609fcedbe..6ac8fe9896 100644
--- a/examples/device/uac2_speaker_fb/src/main.c
+++ b/examples/device/uac2_speaker_fb/src/main.c
@@ -373,6 +373,7 @@ void tud_audio_feedback_params_cb(uint8_t func_id, uint8_t alt_itf, audio_feedba
 bool tud_audio_rx_done_pre_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting)
 {
   (void)rhport;
+  (void)n_bytes_received;
   (void)func_id;
   (void)ep_out;
   (void)cur_alt_setting;

From d54a1578aadfce059550801ec78f715f249ccb76 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 12 May 2024 17:30:43 +0200
Subject: [PATCH 021/204] Typo.

---
 examples/device/uac2_speaker_fb/src/main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/examples/device/uac2_speaker_fb/src/main.c b/examples/device/uac2_speaker_fb/src/main.c
index 6ac8fe9896..8573dfa4c5 100644
--- a/examples/device/uac2_speaker_fb/src/main.c
+++ b/examples/device/uac2_speaker_fb/src/main.c
@@ -370,7 +370,7 @@ void tud_audio_feedback_params_cb(uint8_t func_id, uint8_t alt_itf, audio_feedba
 }
 
 #if CFG_AUDIO_DEBUG
-bool tud_audio_rx_done_pre_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting)
+bool tud_audio_rx_done_post_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting)
 {
   (void)rhport;
   (void)n_bytes_received;

From 67456357c54ee81e8418a9e814df774b1a3dee85 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 12 May 2024 18:59:32 +0200
Subject: [PATCH 022/204] Fix HS playback on OSX.

---
 src/class/audio/audio_device.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 2a786725b6..e82d52a5b1 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -2050,7 +2050,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
 
           case AUDIO_FEEDBACK_METHOD_FIFO_COUNT:
           {
-            /* Initialize the threshold level to half filled */
+            // Initialize the threshold level to half filled
             uint16_t fifo_lvl_thr;
 #if CFG_TUD_AUDIO_ENABLE_DECODING
             fifo_lvl_thr = tu_fifo_depth(&audio->rx_supp_ff[0]) / 2;
@@ -2059,11 +2059,16 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
 #endif
             audio->feedback.compute.fifo_count.fifo_lvl_thr = fifo_lvl_thr;
             audio->feedback.compute.fifo_count.fifo_lvl_avg = ((uint32_t)fifo_lvl_thr) << 16;
-            /* Avoid 64bit division */
+            // Avoid 64bit division
             uint32_t nominal = ((fb_param.sample_freq / 100) << 16) / (frame_div / 100);
             audio->feedback.compute.fifo_count.nom_value = nominal;
             audio->feedback.compute.fifo_count.rate_const[0] = (audio->feedback.max_value - nominal) / fifo_lvl_thr;
             audio->feedback.compute.fifo_count.rate_const[1] = (nominal - audio->feedback.min_value) / fifo_lvl_thr;
+            // On HS feedback is more sensitive since packet size can vary every MSOF, could cause instability
+            if(tud_speed_get() == TUSB_SPEED_HIGH) {
+              audio->feedback.compute.fifo_count.rate_const[0] /= 8;
+              audio->feedback.compute.fifo_count.rate_const[1] /= 8;
+            }
           }
           break;
 

From 5e58ec127ff30ce48a9fcb819acfc05edc92f332 Mon Sep 17 00:00:00 2001
From: Ryzee119 <wendland@live.com.au>
Date: Thu, 20 Jun 2024 09:33:01 +0930
Subject: [PATCH 023/204] usbh: Add set address recovery time

Ref USB Spec 9.2.6.3
---
 src/host/usbh.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index a94c22c4c6..8c488aaa29 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -1421,6 +1421,9 @@ static void process_enumeration(tuh_xfer_t* xfer) {
       break;
 
     case ENUM_GET_DEVICE_DESC: {
+      // Allow 2ms for address recovery time, Ref USB Spec 9.2.6.3
+      osal_task_delay(2);
+
       uint8_t const new_addr = (uint8_t) tu_le16toh(xfer->setup->wValue);
 
       usbh_device_t* new_dev = get_device(new_addr);

From b82e0a9f1ed28979e04cb5e16cb9651905dd991e Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Thu, 27 Jun 2024 20:44:40 +0200
Subject: [PATCH 024/204] update lpc55 bsp for rtos use.

---
 hw/bsp/lpc55/family.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index cfd5b70320..f1ac861780 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -120,12 +120,17 @@ void board_init(void) {
   // Init 96 MHz clock
   BootClockFROHF96M();
 
+#if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 
-#if CFG_TUSB_OS == OPT_OS_FREERTOS
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  SysTick->CTRL &= ~1U;
+
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+  NVIC_SetPriority(USB1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
 
   // Init all GPIO ports
@@ -239,6 +244,10 @@ void board_init(void) {
 //  phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
 //  phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
 //  USBPHY->TX = phytx;
+
+    ARM_MPU_SetMemAttr(0, 0x44); // Normal memory, non-cacheable (inner and outer)
+    ARM_MPU_SetRegion(0, ARM_MPU_RBAR(0x40100000, ARM_MPU_SH_NON, 0, 1, 1), ARM_MPU_RLAR(0x40104000, 0));
+    ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_HFNMIENA_Msk);
 #endif
 }
 

From fbe025190cf65e16b756c428f84bb8b22b8aa3eb Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Thu, 27 Jun 2024 20:45:37 +0200
Subject: [PATCH 025/204] Make FreeRTOS config work with Cortex-M33.

---
 .../src/FreeRTOSConfig/FreeRTOSConfig.h                          | 1 +
 .../audio_test_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h      | 1 +
 .../device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h  | 1 +
 .../hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h   | 1 +
 hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h                     | 1 +
 5 files changed, 5 insertions(+)

diff --git a/examples/device/audio_4_channel_mic_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h b/examples/device/audio_4_channel_mic_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
index 6cc7a6577c..869500ad2a 100644
--- a/examples/device/audio_4_channel_mic_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/examples/device/audio_4_channel_mic_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
@@ -67,6 +67,7 @@
 #define configENABLE_FPU								        1
 #define configENABLE_TRUSTZONE					        0
 #define configMINIMAL_SECURE_STACK_SIZE					( 1024 )
+#define configRUN_FREERTOS_SECURE_ONLY          1
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/examples/device/audio_test_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h b/examples/device/audio_test_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
index 6cc7a6577c..869500ad2a 100644
--- a/examples/device/audio_test_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/examples/device/audio_test_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
@@ -67,6 +67,7 @@
 #define configENABLE_FPU								        1
 #define configENABLE_TRUSTZONE					        0
 #define configMINIMAL_SECURE_STACK_SIZE					( 1024 )
+#define configRUN_FREERTOS_SECURE_ONLY          1
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h b/examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
index 6cc7a6577c..869500ad2a 100644
--- a/examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
@@ -67,6 +67,7 @@
 #define configENABLE_FPU								        1
 #define configENABLE_TRUSTZONE					        0
 #define configMINIMAL_SECURE_STACK_SIZE					( 1024 )
+#define configRUN_FREERTOS_SECURE_ONLY          1
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h b/examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
index 6cc7a6577c..869500ad2a 100644
--- a/examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
@@ -67,6 +67,7 @@
 #define configENABLE_FPU								        1
 #define configENABLE_TRUSTZONE					        0
 #define configMINIMAL_SECURE_STACK_SIZE					( 1024 )
+#define configRUN_FREERTOS_SECURE_ONLY          1
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
index 6f10a7ab0d..d3f3575762 100644
--- a/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
@@ -52,6 +52,7 @@
 #define configENABLE_FPU                        1
 #define configENABLE_TRUSTZONE                  0
 #define configMINIMAL_SECURE_STACK_SIZE         (1024)
+#define configRUN_FREERTOS_SECURE_ONLY          1
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0

From 85e1f423bf67776bf2c7113f3f287297f6e81404 Mon Sep 17 00:00:00 2001
From: Davide Gerhard <rainbow@irh.it>
Date: Thu, 27 Jun 2024 21:30:16 +0200
Subject: [PATCH 026/204] remove double semicolon since ISO C not allow it

ISO C does not allow extra ';' outside of a function [-Werror=pedantic]
---
 src/osal/osal_freertos.h | 2 +-
 src/typec/tcd.h          | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index f1f05f353e..a3a0f3a3fe 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -78,7 +78,7 @@ typedef struct
 // _int_set is not used with an RTOS
 #define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
   static _type _name##_##buf[_depth];\
-  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, _OSAL_Q_NAME(_name) };
+  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, _OSAL_Q_NAME(_name) }
 
 //--------------------------------------------------------------------+
 // TASK API
diff --git a/src/typec/tcd.h b/src/typec/tcd.h
index 86499c9516..bcbdab8ed2 100644
--- a/src/typec/tcd.h
+++ b/src/typec/tcd.h
@@ -63,7 +63,7 @@ typedef struct TU_ATTR_PACKED {
     } xfer_complete;
   };
 
-} tcd_event_t;;
+} tcd_event_t;
 
 //--------------------------------------------------------------------+
 //

From 8f699023f3ff2434efa4433ddc92a9c01756d1f1 Mon Sep 17 00:00:00 2001
From: Davide Gerhard <rainbow@irh.it>
Date: Fri, 28 Jun 2024 10:55:43 +0200
Subject: [PATCH 027/204] audio_device.c: fix strict-overflow warning with gcc
 >= 12

Fix the following error

~/libs/tinyusb/src/class/audio/audio_device.c:1493:23: error: assuming pointer wraparound does not occur when comparing P +- C1 with P +- C2 [-Werror=strict-overflow]
 1493 |         while (p_desc < p_desc_end)
      |                ~~~~~~~^~~~~~~~~~~~
compilation terminated due to -Wfatal-errors.
---
 src/class/audio/audio_device.c | 26 ++++++++++++++++----------
 1 file changed, 16 insertions(+), 10 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 46db96ea9c..65cac2fd50 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -1490,7 +1490,8 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
   #endif
         uint8_t const *p_desc = _audiod_fct[i].p_desc;
         uint8_t const *p_desc_end = p_desc + _audiod_fct[i].desc_length - TUD_AUDIO_DESC_IAD_LEN;
-        while (p_desc < p_desc_end)
+        // Condition modified from p_desc < p_desc_end to prevent gcc>=12 strict-overflow warning
+        while (p_desc_end - p_desc > 0)
         {
           if (tu_desc_type(p_desc) == TUSB_DESC_ENDPOINT)
           {
@@ -1740,7 +1741,8 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
   uint8_t const *p_desc_end = audio->p_desc + audio->desc_length - TUD_AUDIO_DESC_IAD_LEN;
 
   // p_desc starts at required interface with alternate setting zero
-  while (p_desc < p_desc_end)
+  // Condition modified from p_desc < p_desc_end to prevent gcc>=12 strict-overflow warning
+  while (p_desc_end - p_desc > 0)
   {
     // Find correct interface
     if (tu_desc_type(p_desc) == TUSB_DESC_INTERFACE && ((tusb_desc_interface_t const * )p_desc)->bInterfaceNumber == itf && ((tusb_desc_interface_t const * )p_desc)->bAlternateSetting == alt)
@@ -1750,7 +1752,8 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
 #endif
       // From this point forward follow the EP descriptors associated to the current alternate setting interface - Open EPs if necessary
       uint8_t foundEPs = 0, nEps = ((tusb_desc_interface_t const * )p_desc)->bNumEndpoints;
-      while (foundEPs < nEps && p_desc < p_desc_end)
+      // Condition modified from p_desc < p_desc_end to prevent gcc>=12 strict-overflow warning
+      while (foundEPs < nEps && (p_desc_end - p_desc > 0))
       {
         if (tu_desc_type(p_desc) == TUSB_DESC_ENDPOINT)
         {
@@ -2394,7 +2397,8 @@ static bool audiod_get_AS_interface_index(uint8_t itf, audiod_function_t * audio
     p_desc += ((audio_desc_cs_ac_interface_t const *)p_desc)->wTotalLength;
 
     uint8_t tmp = 0;
-    while (p_desc < p_desc_end)
+    // Condition modified from p_desc < p_desc_end to prevent gcc>=12 strict-overflow warning
+    while (p_desc_end - p_desc > 0)
     {
       // We assume the number of alternate settings is increasing thus we return the index of alternate setting zero!
       if (tu_desc_type(p_desc) == TUSB_DESC_INTERFACE && ((tusb_desc_interface_t const * )p_desc)->bAlternateSetting == 0)
@@ -2447,7 +2451,8 @@ static bool audiod_verify_entity_exists(uint8_t itf, uint8_t entityID, uint8_t *
       uint8_t const *p_desc_end = ((audio_desc_cs_ac_interface_t const *)p_desc)->wTotalLength + p_desc;
       p_desc = tu_desc_next(p_desc);                                                                            // Get past CS AC descriptor
 
-      while (p_desc < p_desc_end)
+      // Condition modified from p_desc < p_desc_end to prevent gcc>=12 strict-overflow warning
+      while (p_desc_end - p_desc > 0)
       {
         if (p_desc[3] == entityID)  // Entity IDs are always at offset 3
         {
@@ -2471,8 +2476,8 @@ static bool audiod_verify_itf_exists(uint8_t itf, uint8_t *func_id)
       // Get pointer at beginning and end
       uint8_t const *p_desc = _audiod_fct[i].p_desc;
       uint8_t const *p_desc_end = _audiod_fct[i].p_desc + _audiod_fct[i].desc_length - TUD_AUDIO_DESC_IAD_LEN;
-
-      while (p_desc < p_desc_end)
+      // Condition modified from p_desc < p_desc_end to prevent gcc>=12 strict-overflow warning
+      while (p_desc_end - p_desc > 0)
       {
         if (tu_desc_type(p_desc) == TUSB_DESC_INTERFACE && ((tusb_desc_interface_t const *)_audiod_fct[i].p_desc)->bInterfaceNumber == itf)
         {
@@ -2500,7 +2505,8 @@ static bool audiod_verify_ep_exists(uint8_t ep, uint8_t *func_id)
       uint8_t const *p_desc = tu_desc_next(_audiod_fct[i].p_desc);
       p_desc += ((audio_desc_cs_ac_interface_t const *)p_desc)->wTotalLength;
 
-      while (p_desc < p_desc_end)
+      // Condition modified from p_desc < p_desc_end to prevent gcc>=12 strict-overflow warning
+      while (p_desc_end - p_desc > 0)
       {
         if (tu_desc_type(p_desc) == TUSB_DESC_ENDPOINT && ((tusb_desc_endpoint_t const * )p_desc)->bEndpointAddress == ep)
         {
@@ -2531,8 +2537,8 @@ static void audiod_parse_for_AS_params(audiod_function_t* audio, uint8_t const *
 #endif
 
   p_desc = tu_desc_next(p_desc);    // Exclude standard AS interface descriptor of current alternate interface descriptor
-
-  while (p_desc < p_desc_end)
+  // Condition modified from p_desc < p_desc_end to prevent gcc>=12 strict-overflow warning
+  while (p_desc_end - p_desc > 0)
   {
     // Abort if follow up descriptor is a new standard interface descriptor - indicates the last AS descriptor was already finished
     if (tu_desc_type(p_desc) == TUSB_DESC_INTERFACE) break;

From 8f9a57636c9ae6b51e272274ea79f01a7a2631c1 Mon Sep 17 00:00:00 2001
From: Davide Gerhard <rainbow@irh.it>
Date: Fri, 28 Jun 2024 19:57:59 +0200
Subject: [PATCH 028/204] audio.h: fix error ISO C restricts enumerator values
 to range of 'int'

fix error

~/dsp/libs/tinyusb/src/class/audio/audio.h:643:53: error: ISO C restricts enumerator values to range of 'int' before C23 [-Werror=pedantic]
  643 |   AUDIO_CHANNEL_CONFIG_RAW_DATA                   = 0x80000000, // TODO
      |                                                     ^~~~~~~~~~
compilation terminated due to -Wfatal-errors.

Closes: https://github.com/hathach/tinyusb/issues/2690
---
 src/class/audio/audio.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/class/audio/audio.h b/src/class/audio/audio.h
index d6f3e22e20..49ccbe863b 100644
--- a/src/class/audio/audio.h
+++ b/src/class/audio/audio.h
@@ -489,7 +489,7 @@ typedef enum
   AUDIO_DATA_FORMAT_TYPE_I_IEEE_FLOAT     = (uint32_t) (1 << 2),
   AUDIO_DATA_FORMAT_TYPE_I_ALAW           = (uint32_t) (1 << 3),
   AUDIO_DATA_FORMAT_TYPE_I_MULAW          = (uint32_t) (1 << 4),
-  AUDIO_DATA_FORMAT_TYPE_I_RAW_DATA       = 0x80000000,
+  AUDIO_DATA_FORMAT_TYPE_I_RAW_DATA       = (int)(1U << 31U),
 } audio_data_format_type_I_t;
 
 /// All remaining definitions are taken from the descriptor descriptions in the UAC2 main specification
@@ -640,7 +640,7 @@ typedef enum
   AUDIO_CHANNEL_CONFIG_BOTTOM_CENTER              = 0x01000000,
   AUDIO_CHANNEL_CONFIG_BACK_LEFT_OF_CENTER        = 0x02000000,
   AUDIO_CHANNEL_CONFIG_BACK_RIGHT_OF_CENTER       = 0x04000000,
-  AUDIO_CHANNEL_CONFIG_RAW_DATA                   = 0x80000000,
+  AUDIO_CHANNEL_CONFIG_RAW_DATA                   = (int)(1U << 31U),
 } audio_channel_config_t;
 
 /// AUDIO Channel Cluster Descriptor (4.1)

From 0f288326cc80dba192d08b74116aa0be91a81a6f Mon Sep 17 00:00:00 2001
From: Brent Kowal <brent.kowal@analog.com>
Date: Fri, 28 Jun 2024 16:55:27 -0400
Subject: [PATCH 029/204] Initial Commit for MAX32 Support

Initial commit for the port of TUSB to MAX32xxx parts, staring with MAX32690
 - Added dcd_max32.c (based on dcd_musb.c) for interfacing with the peripheral
 - Added MAX32690 part family support
 - Added max32690evkit board support
 - Updated examples for unique EP number requirement
 - Updated get_deps.py to fetch the MSDK

Known Issues / Additional Testing Required
 - msc_dual_lun only shown 1 volume on Windows
 - USBTMC does not have a valid Windowsdriver
 - DFU does not have a valid Windows driver
 - WebUSB is "Device not Recognized"
 - Need to test build scripts with IAR and Clang
---
 examples/device/cdc_msc/src/usb_descriptors.c |  10 +
 .../cdc_msc_freertos/src/usb_descriptors.c    |  10 +
 .../device/cdc_uac2/src/usb_descriptors.c     |  10 +
 .../src/usb_descriptors.c                     |  13 +
 .../device/midi_test/src/usb_descriptors.c    |   4 +
 .../device/msc_dual_lun/src/usb_descriptors.c |   6 +
 .../net_lwip_webserver/src/tusb_config.h      |   2 +
 .../net_lwip_webserver/src/usb_descriptors.c  |   7 +
 .../device/uac2_headset/src/usb_descriptors.c |   7 +
 .../webusb_serial/src/usb_descriptors.c       |   7 +
 hw/bsp/board_mcu.h                            |   3 +
 .../max32690/FreeRTOSConfig/FreeRTOSConfig.h  | 149 ++++
 .../max32690/boards/max32690evkit/board.cmake |   1 +
 hw/bsp/max32690/boards/max32690evkit/board.h  |  56 ++
 hw/bsp/max32690/boards/max32690evkit/board.mk |   1 +
 hw/bsp/max32690/family.c                      | 159 ++++
 hw/bsp/max32690/family.cmake                  | 152 ++++
 hw/bsp/max32690/family.mk                     | 106 +++
 hw/bsp/max32690/max32690.ld                   | 162 ++++
 src/common/tusb_mcu.h                         |   8 +
 src/portable/analog/max32/dcd_max32.c         | 841 ++++++++++++++++++
 src/tusb_option.h                             |   3 +
 tools/get_deps.py                             |   3 +
 23 files changed, 1720 insertions(+)
 create mode 100644 hw/bsp/max32690/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/max32690/boards/max32690evkit/board.cmake
 create mode 100644 hw/bsp/max32690/boards/max32690evkit/board.h
 create mode 100644 hw/bsp/max32690/boards/max32690evkit/board.mk
 create mode 100644 hw/bsp/max32690/family.c
 create mode 100644 hw/bsp/max32690/family.cmake
 create mode 100644 hw/bsp/max32690/family.mk
 create mode 100644 hw/bsp/max32690/max32690.ld
 create mode 100644 src/portable/analog/max32/dcd_max32.c

diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c
index 2afa249037..1ca614f4ec 100644
--- a/examples/device/cdc_msc/src/usb_descriptors.c
+++ b/examples/device/cdc_msc/src/usb_descriptors.c
@@ -125,6 +125,16 @@ enum {
   #define EPNUM_MSC_OUT     0x04
   #define EPNUM_MSC_IN      0x85
 
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_CDC_NOTIF   0x81
+  #define EPNUM_CDC_OUT     0x02
+  #define EPNUM_CDC_IN      0x83
+
+  #define EPNUM_MSC_OUT     0x04
+  #define EPNUM_MSC_IN      0x85
+
 #else
   #define EPNUM_CDC_NOTIF   0x81
   #define EPNUM_CDC_OUT     0x02
diff --git a/examples/device/cdc_msc_freertos/src/usb_descriptors.c b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
index 9c29701c72..f563e80d32 100644
--- a/examples/device/cdc_msc_freertos/src/usb_descriptors.c
+++ b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
@@ -106,6 +106,16 @@ enum
   #define EPNUM_MSC_OUT     0x04
   #define EPNUM_MSC_IN      0x85
 
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_CDC_NOTIF   0x81
+  #define EPNUM_CDC_OUT     0x02
+  #define EPNUM_CDC_IN      0x83
+
+  #define EPNUM_MSC_OUT     0x04
+  #define EPNUM_MSC_IN      0x85
+
 #else
   #define EPNUM_CDC_NOTIF   0x81
   #define EPNUM_CDC_OUT     0x02
diff --git a/examples/device/cdc_uac2/src/usb_descriptors.c b/examples/device/cdc_uac2/src/usb_descriptors.c
index 72a695622e..43e8cf3d7a 100644
--- a/examples/device/cdc_uac2/src/usb_descriptors.c
+++ b/examples/device/cdc_uac2/src/usb_descriptors.c
@@ -117,6 +117,16 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_CDC_OUT     0x04
   #define EPNUM_CDC_IN      0x85
 
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_AUDIO_IN    0x01
+  #define EPNUM_AUDIO_OUT   0x02
+
+  #define EPNUM_CDC_NOTIF   0x83
+  #define EPNUM_CDC_OUT     0x04
+  #define EPNUM_CDC_IN      0x85
+
 #else
   #define EPNUM_AUDIO_IN    0x01
   #define EPNUM_AUDIO_OUT   0x01
diff --git a/examples/device/dynamic_configuration/src/usb_descriptors.c b/examples/device/dynamic_configuration/src/usb_descriptors.c
index 7f35b4b22e..eebdd4f698 100644
--- a/examples/device/dynamic_configuration/src/usb_descriptors.c
+++ b/examples/device/dynamic_configuration/src/usb_descriptors.c
@@ -158,6 +158,19 @@ enum
   #define EPNUM_1_MSC_OUT     0x01
   #define EPNUM_1_MSC_IN      0x82
 
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+  // FT9XX doesn't support a same endpoint number with different direction IN and OUT
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_0_CDC_NOTIF   0x81
+  #define EPNUM_0_CDC_OUT     0x02
+  #define EPNUM_0_CDC_IN      0x83
+
+  #define EPNUM_0_MIDI_OUT    0x04
+  #define EPNUM_0_MIDI_IN     0x85
+
+  #define EPNUM_1_MSC_OUT     0x01
+  #define EPNUM_1_MSC_IN      0x82
+
 #else
   #define EPNUM_0_CDC_NOTIF   0x81
   #define EPNUM_0_CDC_OUT     0x02
diff --git a/examples/device/midi_test/src/usb_descriptors.c b/examples/device/midi_test/src/usb_descriptors.c
index 9781d3d6fd..797b50ab23 100644
--- a/examples/device/midi_test/src/usb_descriptors.c
+++ b/examples/device/midi_test/src/usb_descriptors.c
@@ -90,6 +90,10 @@ enum
   // On Bridgetek FT9xx endpoint numbers must be unique...
   #define EPNUM_MIDI_OUT   0x02
   #define EPNUM_MIDI_IN   0x03
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+  // On MAX32 endpoint numbers must be unique...
+  #define EPNUM_MIDI_OUT   0x02
+  #define EPNUM_MIDI_IN   0x03
 #else
   #define EPNUM_MIDI_OUT   0x01
   #define EPNUM_MIDI_IN   0x01
diff --git a/examples/device/msc_dual_lun/src/usb_descriptors.c b/examples/device/msc_dual_lun/src/usb_descriptors.c
index c0610945f9..e32466228f 100644
--- a/examples/device/msc_dual_lun/src/usb_descriptors.c
+++ b/examples/device/msc_dual_lun/src/usb_descriptors.c
@@ -97,6 +97,12 @@ enum
   #define EPNUM_MSC_OUT   0x01
   #define EPNUM_MSC_IN    0x82
 
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_MSC_OUT   0x01
+  #define EPNUM_MSC_IN    0x82
+
 #else
   #define EPNUM_MSC_OUT   0x01
   #define EPNUM_MSC_IN    0x81
diff --git a/examples/device/net_lwip_webserver/src/tusb_config.h b/examples/device/net_lwip_webserver/src/tusb_config.h
index d3e0945175..2f641f33e6 100644
--- a/examples/device/net_lwip_webserver/src/tusb_config.h
+++ b/examples/device/net_lwip_webserver/src/tusb_config.h
@@ -91,6 +91,8 @@ extern "C" {
   #define USE_ECM 1
 #elif TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F1)
   #define USE_ECM 1
+#elif TU_CHECK_MCU(OPT_MCU_MAX32690)
+  #define USE_ECM 1
 #else
   #define USE_ECM 0
   #define INCLUDE_IPERF
diff --git a/examples/device/net_lwip_webserver/src/usb_descriptors.c b/examples/device/net_lwip_webserver/src/usb_descriptors.c
index da628c8bea..ba30b869ed 100644
--- a/examples/device/net_lwip_webserver/src/usb_descriptors.c
+++ b/examples/device/net_lwip_webserver/src/usb_descriptors.c
@@ -120,6 +120,13 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_NET_OUT     0x02
   #define EPNUM_NET_IN      0x83
 
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_NET_NOTIF   0x81
+  #define EPNUM_NET_OUT     0x02
+  #define EPNUM_NET_IN      0x83
+
 #else
   #define EPNUM_NET_NOTIF   0x81
   #define EPNUM_NET_OUT     0x02
diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c
index ff4dc2acc9..bfc8a4ab5e 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.c
+++ b/examples/device/uac2_headset/src/usb_descriptors.c
@@ -104,6 +104,13 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_AUDIO_OUT   0x02
   #define EPNUM_AUDIO_INT   0x03
 
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_AUDIO_IN    0x01
+  #define EPNUM_AUDIO_OUT   0x02
+  #define EPNUM_AUDIO_INT   0x03
+
 #else
   #define EPNUM_AUDIO_IN    0x01
   #define EPNUM_AUDIO_OUT   0x01
diff --git a/examples/device/webusb_serial/src/usb_descriptors.c b/examples/device/webusb_serial/src/usb_descriptors.c
index b01fae8e3e..bcfbe590e9 100644
--- a/examples/device/webusb_serial/src/usb_descriptors.c
+++ b/examples/device/webusb_serial/src/usb_descriptors.c
@@ -105,6 +105,13 @@ enum
   #define EPNUM_CDC_OUT    3
   #define EPNUM_VENDOR_IN  4
   #define EPNUM_VENDOR_OUT 5
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_CDC_IN     2
+  #define EPNUM_CDC_OUT    3
+  #define EPNUM_VENDOR_IN  4
+  #define EPNUM_VENDOR_OUT 5
 #else
   #define EPNUM_CDC_IN     2
   #define EPNUM_CDC_OUT    2
diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h
index 013eb1c834..436164c352 100644
--- a/hw/bsp/board_mcu.h
+++ b/hw/bsp/board_mcu.h
@@ -170,6 +170,9 @@
 #elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837)
   // no header needed
 
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+  #include "max32690.h"
+
 #else
   #error "Missing MCU header"
 #endif
diff --git a/hw/bsp/max32690/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/max32690/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 0000000000..e5a76af85c
--- /dev/null
+++ b/hw/bsp/max32690/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,149 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "mxc_device.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       __NVIC_PRIO_BITS
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/max32690/boards/max32690evkit/board.cmake b/hw/bsp/max32690/boards/max32690evkit/board.cmake
new file mode 100644
index 0000000000..9dc6962eb9
--- /dev/null
+++ b/hw/bsp/max32690/boards/max32690evkit/board.cmake
@@ -0,0 +1 @@
+# Nothing to be done at the board level
diff --git a/hw/bsp/max32690/boards/max32690evkit/board.h b/hw/bsp/max32690/boards/max32690evkit/board.h
new file mode 100644
index 0000000000..f5a9047028
--- /dev/null
+++ b/hw/bsp/max32690/boards/max32690evkit/board.h
@@ -0,0 +1,56 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024, Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#include "gpio.h"
+#include "mxc_sys.h"
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PORT              MXC_GPIO0
+#define LED_PIN               MXC_GPIO_PIN_14
+#define LED_VDDIO             MXC_GPIO_VSSEL_VDDIOH
+#define LED_STATE_ON          0
+
+// Button
+#define BUTTON_PORT           MXC_GPIO4
+#define BUTTON_PIN            MXC_GPIO_PIN_0
+#define BUTTON_PULL           MXC_GPIO_PAD_PULL_UP
+#define BUTTON_STATE_ACTIVE   0
+
+// UART Enable for EvKit's Integrated FTDI Adapter. Pin Mux handled by the HAL
+#define UART_NUM              2
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/max32690/boards/max32690evkit/board.mk b/hw/bsp/max32690/boards/max32690evkit/board.mk
new file mode 100644
index 0000000000..a813a5327b
--- /dev/null
+++ b/hw/bsp/max32690/boards/max32690evkit/board.mk
@@ -0,0 +1 @@
+# No specific build requirements for the board.
diff --git a/hw/bsp/max32690/family.c b/hw/bsp/max32690/family.c
new file mode 100644
index 0000000000..f443bc575a
--- /dev/null
+++ b/hw/bsp/max32690/family.c
@@ -0,0 +1,159 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "bsp/board_api.h"
+#include "board.h"
+#include "mxc_device.h"
+#include "mcr_regs.h"
+#include "uart.h"
+#include "gpio.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USB_IRQHandler(void) {
+  tud_int_handler(0);
+}
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM
+//--------------------------------------------------------------------+
+mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(UART_NUM);
+
+void board_init(void) {
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+#endif
+  mxc_gpio_cfg_t gpioConfig;
+
+  // LED
+  gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
+  gpioConfig.func = MXC_GPIO_FUNC_OUT;
+  gpioConfig.mask = LED_PIN;
+  gpioConfig.pad = MXC_GPIO_PAD_NONE;
+  gpioConfig.port = LED_PORT;
+  gpioConfig.vssel = LED_VDDIO;
+  MXC_GPIO_Config(&gpioConfig);
+  board_led_write(false);
+
+  // Button
+  gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
+  gpioConfig.func = MXC_GPIO_FUNC_IN;
+  gpioConfig.mask = BUTTON_PIN;
+  gpioConfig.pad = BUTTON_PULL;
+  gpioConfig.port = BUTTON_PORT;
+  gpioConfig.vssel = MXC_GPIO_VSSEL_VDDIO;
+  MXC_GPIO_Config(&gpioConfig);
+
+  // UART
+  MXC_UART_Init(ConsoleUart, CFG_BOARD_UART_BAUDRATE, MXC_UART_IBRO_CLK);
+
+  //USB
+  MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IPO);
+  MXC_MCR->ldoctrl |= MXC_F_MCR_LDOCTRL_0P9EN;
+  MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
+  MXC_SYS_Reset_Periph(MXC_SYS_RESET0_USB);
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+  #if LED_STATE_ON
+    state = !state;
+  #endif
+  if(state) {
+    MXC_GPIO_OutClr(LED_PORT, LED_PIN);
+  } else {
+    MXC_GPIO_OutSet(LED_PORT, LED_PIN);
+  }
+}
+
+uint32_t board_button_read(void) {
+  uint32_t state = MXC_GPIO_InGet(BUTTON_PORT, BUTTON_PIN) ? 1 : 0;
+  return BUTTON_STATE_ACTIVE == state;
+}
+
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  uint8_t hw_id[MXC_SYS_USN_CHECKSUM_LEN]; //USN Buffer
+  /* All other 2nd parameter is optional checkum buffer */
+   MXC_SYS_GetUSN(hw_id, NULL);
+
+  size_t act_len = TU_MIN(max_len, MXC_SYS_USN_LEN);
+  memcpy(id, hw_id, act_len);
+  return act_len;
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+  int uart_val;
+  int act_len = 0;
+
+  while( act_len < len ) {
+    if((uart_val = MXC_UART_ReadCharacterRaw(ConsoleUart)) == E_UNDERFLOW) {
+      break;
+    } else {
+      *buf++ = (uint8_t)uart_val;
+      act_len++;
+    }
+  }
+  return act_len;
+}
+
+int board_uart_write(void const *buf, int len) {
+  int act_len = 0;
+  const uint8_t* ch_ptr = (const uint8_t*)buf;
+  while(act_len < len){
+    MXC_UART_WriteCharacter(ConsoleUart, *ch_ptr++);
+    act_len++;
+  }
+  return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+void SysTick_Handler(void) {
+  system_ticks++;
+}
+
+uint32_t board_millis(void) {
+  return system_ticks;
+}
+#endif
+
+void HardFault_Handler(void) {
+  __asm("BKPT #0\n");
+}
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void) {
+}
diff --git a/hw/bsp/max32690/family.cmake b/hw/bsp/max32690/family.cmake
new file mode 100644
index 0000000000..e1d797f587
--- /dev/null
+++ b/hw/bsp/max32690/family.cmake
@@ -0,0 +1,152 @@
+include_guard()
+
+set(MAX32_PERIPH ${TOP}/hw/mcu/analog/max32/Libraries/PeriphDrivers)
+set(MAX32_CMSIS ${TOP}/hw/mcu/analog/max32/Libraries/CMSIS)
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# Get the linker file from current location (family)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32690.ld)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+set(JLINK_DEVICE max32690)
+
+set(FAMILY_MCUS MAX32690 CACHE INTERNAL "")
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    TARGET=MAX32690
+    TARGET_REV=0x4131
+    MXC_ASSERT_ENABLE
+    MAX32690
+    FLASH_ORIGIN=0x10000000
+    FLASH_SIZE=0x340000
+    SRAM_ORIGIN=0x20000000
+    SRAM_SIZE=0x100000
+    IAR_PRAGMAS=0
+    CFG_TUSB_MCU=OPT_MCU_MAX32690
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    )
+endfunction()
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  # Startup & Linker script
+  set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX32690/Source/GCC/startup_max32690.s)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+  set(STARTUP_FILE_IAR ${MAX32_CMSIS}/Device/Maxim/MAX32690/Source/IAR/startup_max32690.s)
+
+  set(PERIPH_SRC ${MAX32_PERIPH}/Source)
+  add_library(${BOARD_TARGET} STATIC
+    ${MAX32_CMSIS}/Device/Maxim/MAX32690/Source/heap.c
+    ${MAX32_CMSIS}/Device/Maxim/MAX32690/Source/system_max32690.c
+    ${PERIPH_SRC}/SYS/mxc_assert.c
+    ${PERIPH_SRC}/SYS/mxc_delay.c
+    ${PERIPH_SRC}/SYS/mxc_lock.c
+    ${PERIPH_SRC}/SYS/nvic_table.c
+    ${PERIPH_SRC}/SYS/pins_me18.c
+    ${PERIPH_SRC}/SYS/sys_me18.c
+    ${PERIPH_SRC}/CTB/ctb_me18.c
+    ${PERIPH_SRC}/CTB/ctb_reva.c
+    ${PERIPH_SRC}/CTB/ctb_common.c
+    ${PERIPH_SRC}/FLC/flc_common.c
+    ${PERIPH_SRC}/FLC/flc_me18.c
+    ${PERIPH_SRC}/FLC/flc_reva.c
+    ${PERIPH_SRC}/GPIO/gpio_common.c
+    ${PERIPH_SRC}/GPIO/gpio_me18.c
+    ${PERIPH_SRC}/GPIO/gpio_reva.c
+    ${PERIPH_SRC}/ICC/icc_me18.c
+    ${PERIPH_SRC}/ICC/icc_reva.c
+    ${PERIPH_SRC}/UART/uart_common.c
+    ${PERIPH_SRC}/UART/uart_me18.c
+    ${PERIPH_SRC}/UART/uart_revb.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMSIS_5}/CMSIS/Core/Include
+    ${MAX32_CMSIS}/Include
+    ${MAX32_CMSIS}/Device/Maxim/MAX32690/Include
+    ${MAX32_PERIPH}/Include/MAX32690
+    ${PERIPH_SRC}/SYS
+    ${PERIPH_SRC}/GPIO
+    ${PERIPH_SRC}/CTB
+    ${PERIPH_SRC}/ICC
+    ${PERIPH_SRC}/FLC
+    ${PERIPH_SRC}/UART
+    )
+
+  target_compile_options(${TARGET} PRIVATE
+  -Wno-error=strict-prototypes
+  )
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_MAX32690 ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/analog/max32/dcd_max32.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+  target_compile_options(${TARGET}-tinyusb PRIVATE
+  -Wno-error=strict-prototypes
+  )
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_jlink(${TARGET})
+endfunction()
diff --git a/hw/bsp/max32690/family.mk b/hw/bsp/max32690/family.mk
new file mode 100644
index 0000000000..08d5e8671a
--- /dev/null
+++ b/hw/bsp/max32690/family.mk
@@ -0,0 +1,106 @@
+DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/analog/max32
+
+# Important locations in the hw support for MCU
+MAX32_CMSIS = hw/mcu/analog/max32/Libraries/CMSIS
+MAX32_PERIPH = hw/mcu/analog/max32/Libraries/PeriphDrivers
+
+# Add any board specific make rules
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CPU_CORE ?= cortex-m4
+PORT ?= 0
+
+# GCC
+SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/GCC/startup_max32690.s
+LD_FILE = $(FAMILY_PATH)/max32690.ld
+
+# IAR
+SRC_S_IAR += $(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/IAR/startup_max32690.s
+
+# --------------
+# Compiler Flags
+# --------------
+# Flags for the MAX32690 SDK
+CFLAGS +=   -DTARGET=MAX32690 \
+			-DTARGET_REV=0x4131 \
+			-DMXC_ASSERT_ENABLE \
+			-DMAX32690 \
+			-DFLASH_ORIGIN=0x10000000 \
+			-DFLASH_SIZE=0x340000 \
+			-DSRAM_ORIGIN=0x20000000 \
+			-DSRAM_SIZE=0x100000 \
+			-DIAR_PRAGMAS=0
+
+# Flags for TUSB features
+CFLAGS += \
+  -DCFG_TUSB_MCU=OPT_MCU_MAX32690 \
+  -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+
+# mcu driver cause following warnings
+CFLAGS += 	-Wno-error=unused-parameter \
+			-Wno-error=strict-prototypes \
+			-Wno-error=old-style-declaration \
+			-Wno-error=sign-compare \
+			-Wno-error=cast-qual \
+			-Wno-lto-type-mismatch
+
+LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
+
+# For flash-jlink target
+JLINK_DEVICE = max32690
+
+# flash target using Jlik
+flash: flash-jlink
+
+# Optional flash option when running within an installed MSDK to use OpenOCD
+# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
+# If the MSDK is installed, flash-msdk can be run to utilize the the modified
+# openocd with the algorithms
+MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
+flash-msdk:
+	$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
+		-f interface/cmsis-dap.cfg -f target/max32690.cfg \
+		-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
+
+# -----------------
+# Sources & Include
+# -----------------
+PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
+SRC_C += \
+	src/portable/analog/max32/dcd_max32.c \
+	$(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/heap.c \
+	$(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/system_max32690.c \
+	$(PERIPH_SRC)/SYS/mxc_assert.c \
+	$(PERIPH_SRC)/SYS/mxc_delay.c \
+	$(PERIPH_SRC)/SYS/mxc_lock.c \
+	$(PERIPH_SRC)/SYS/nvic_table.c \
+	$(PERIPH_SRC)/SYS/pins_me18.c \
+	$(PERIPH_SRC)/SYS/sys_me18.c \
+	$(PERIPH_SRC)/CTB/ctb_me18.c \
+	$(PERIPH_SRC)/CTB/ctb_reva.c \
+	$(PERIPH_SRC)/CTB/ctb_common.c \
+	$(PERIPH_SRC)/FLC/flc_common.c \
+	$(PERIPH_SRC)/FLC/flc_me18.c \
+	$(PERIPH_SRC)/FLC/flc_reva.c \
+	$(PERIPH_SRC)/GPIO/gpio_common.c \
+	$(PERIPH_SRC)/GPIO/gpio_me18.c \
+	$(PERIPH_SRC)/GPIO/gpio_reva.c \
+	$(PERIPH_SRC)/ICC/icc_me18.c \
+	$(PERIPH_SRC)/ICC/icc_reva.c \
+	$(PERIPH_SRC)/UART/uart_common.c \
+	$(PERIPH_SRC)/UART/uart_me18.c \
+	$(PERIPH_SRC)/UART/uart_revb.c \
+
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+	$(TOP)/$(MAX32_CMSIS)/Include \
+	$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX32690/Include \
+	$(TOP)/$(MAX32_PERIPH)/Include/MAX32690 \
+	$(PERIPH_SRC)/SYS \
+	$(PERIPH_SRC)/GPIO \
+	$(PERIPH_SRC)/CTB \
+	$(PERIPH_SRC)/ICC \
+	$(PERIPH_SRC)/FLC \
+	$(PERIPH_SRC)/UART
diff --git a/hw/bsp/max32690/max32690.ld b/hw/bsp/max32690/max32690.ld
new file mode 100644
index 0000000000..35886fe3a8
--- /dev/null
+++ b/hw/bsp/max32690/max32690.ld
@@ -0,0 +1,162 @@
+MEMORY {
+    ROM        (rx) : ORIGIN = 0x00000000,    LENGTH = 0x00020000 /* 128kB ROM */
+    FLASH      (rx) : ORIGIN = 0x10000000,    LENGTH = 0x00340000
+    SRAM      (rwx) : ORIGIN = 0x20000000,    LENGTH = 0x00100000
+
+	/*
+     * Note that CS0/CS1 address mappings may be reversed using MXC_HPC->mbr0 and ->mbr1
+     * The following mappings are selected for simplicity
+     */
+    HPB_CS0 (rwx)  : ORIGIN = 0x60000000, LENGTH = 0x10000000  /* External Hyperbus/Xccelabus chip select 0 */
+    HPB_CS1 (rwx)  : ORIGIN = 0x70000000, LENGTH = 0x10000000  /* External Hyperbus/Xccelabus chip select 1 */
+}
+
+SECTIONS {
+    .rom :
+    {
+        KEEP(*(.rom_vector))
+        *(.rom_handlers*)
+    } > ROM
+
+    .text :
+    {
+        _text = .;
+        KEEP(*(.isr_vector))
+        EXCLUDE_FILE (*riscv.o) *(.text*)    /* program code, exclude RISCV code */
+        *(.rodata*)  /* read-only data: "const" */
+
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+        /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        /* C++ Exception handling */
+        KEEP(*(.eh_frame*))
+        _etext = .;
+    } > FLASH
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    /* These sections allow code to be compiled/linked for HPB addresses, but reside in
+     * flash until copied by code to the external HPB flash device
+     */
+    .hpb_cs0_section :
+    {
+	__hpb_cs0_start = ABSOLUTE(.);
+        KEEP(*(.hpb_cs0_section*))
+    } > HPB_CS0 AT>FLASH
+
+    __load_start_hpb_cs0 = LOADADDR(.hpb_cs0_section);
+    __load_length_hpb_cs0 = SIZEOF(.hpb_cs0_section);
+
+    .hpb_cs1_section :
+    {
+    	__hpb_cs1_start = ABSOLUTE(.);
+        KEEP(*(.hpb_cs1_section*))
+    } > HPB_CS1 AT>FLASH
+
+    __load_start_hpb_cs1 = LOADADDR(.hpb_cs1_section);
+    __load_length_hpb_cs1 = SIZEOF(.hpb_cs1_section);
+
+    /* Binary import */
+    .bin_storage :
+    {
+       FILL(0xFF)
+      _bin_start_ = .;
+      KEEP(*(.bin_storage_img))
+      _bin_end_ = .;
+      . = ALIGN(4);
+    } > FLASH
+
+    /* it's used for C++ exception handling      */
+    /* we need to keep this to avoid overlapping */
+    .ARM.exidx :
+    {
+        __exidx_start = .;
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+        __exidx_end = .;
+    } > FLASH
+
+    .data :
+    {
+        _data = ALIGN(., 4);
+        *(vtable)
+        *(.data*)           /*read-write initialized data: initialized global variable*/
+
+        /* These array sections are used by __libc_init_array to call static C++ constructors */
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        /* Run the flash programming functions from SRAM */
+        *(.flashprog)
+
+        _edata = ALIGN(., 4);
+    } > SRAM AT>FLASH
+    __load_data = LOADADDR(.data);
+
+    .bss :
+    {
+        . = ALIGN(4);
+        _bss = .;
+        *(.bss*)     /*read-write zero initialized data: uninitialzed global variable*/
+        *(COMMON)
+        _ebss = ALIGN(., 4);
+    } > SRAM
+
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy (COPY):
+    {
+        *(.stack*)
+    } > SRAM
+
+    .heap (COPY):
+    {
+        . = ALIGN(4);
+        *(.heap*)
+        __HeapLimit = ABSOLUTE(__StackLimit);
+    } > SRAM
+
+    PROVIDE(__stack = __StackTop);
+
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= _ebss, "region RAM overflowed with stack")
+}
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index c66996c4f7..a68e160bd8 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -452,6 +452,14 @@
   #define TUP_RHPORT_HIGHSPEED    CFG_TUD_WCH_USBIP_USBHS
   #define TUP_DCD_ENDPOINT_MAX    (CFG_TUD_WCH_USBIP_USBHS ? 16 : 8)
 
+//--------------------------------------------------------------------+
+// Analog Devices
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_MAX32690)
+  #define TUP_DCD_ENDPOINT_MAX    12
+  #define TUP_RHPORT_HIGHSPEED    1
+
+
 #endif
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/analog/max32/dcd_max32.c b/src/portable/analog/max32/dcd_max32.c
new file mode 100644
index 0000000000..150d476fa3
--- /dev/null
+++ b/src/portable/analog/max32/dcd_max32.c
@@ -0,0 +1,841 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Koji KITAYAMA
+ * Copyright (c) 2024 Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "tusb_option.h"
+
+#if CFG_TUD_ENABLED && TU_CHECK_MCU(OPT_MCU_MAX32690)
+
+#if __GNUC__ > 8 && defined(__ARM_FEATURE_UNALIGNED)
+/* GCC warns that an address may be unaligned, even though
+ * the target CPU has the capability for unaligned memory access. */
+_Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
+#endif
+
+#include "device/dcd.h"
+
+#include "mxc_delay.h"
+#include "mxc_device.h"
+#include "mxc_sys.h"
+#include "nvic_table.h"
+#include "usbhs_regs.h"
+
+#define USBHS_M31_CLOCK_RECOVERY
+
+/*------------------------------------------------------------------
+ * MACRO TYPEDEF CONSTANT ENUM DECLARATION
+ *------------------------------------------------------------------*/
+#define REQUEST_TYPE_INVALID  (0xFFu)
+
+
+typedef union {
+  uint8_t   u8;
+  uint16_t  u16;
+  uint32_t  u32;
+} hw_fifo_t;
+
+typedef struct TU_ATTR_PACKED
+{
+  void      *buf;      /* the start address of a transfer data buffer */
+  uint16_t  length;    /* the number of bytes in the buffer */
+  uint16_t  remaining; /* the number of bytes remaining in the buffer */
+} pipe_state_t;
+
+typedef struct
+{
+  tusb_control_request_t setup_packet;
+  uint16_t     remaining_ctrl; /* The number of bytes remaining in data stage of control transfer. */
+  int8_t       status_out;
+  pipe_state_t pipe0;
+  pipe_state_t pipe[2][TUP_DCD_ENDPOINT_MAX - 1];   /* pipe[direction][endpoint number - 1] */
+  uint16_t     pipe_buf_is_fifo[2]; /* Bitmap. Each bit means whether 1:TU_FIFO or 0:POD. */
+} dcd_data_t;
+
+/*------------------------------------------------------------------
+ * INTERNAL OBJECT & FUNCTION DECLARATION
+ *------------------------------------------------------------------*/
+static dcd_data_t _dcd;
+
+
+static volatile void* edpt_get_fifo_ptr(unsigned epnum)
+{
+    volatile uint32_t *ptr;
+
+    ptr = &MXC_USBHS->fifo0;
+    ptr += epnum; /* Pointer math: multiplies ep by sizeof(uint32_t) */
+
+    return (volatile void *)ptr;
+}
+
+static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
+{
+  volatile hw_fifo_t *reg = (volatile hw_fifo_t*)fifo;
+  uintptr_t addr = (uintptr_t)buf;
+  while (len >= 4) {
+    reg->u32 = *(uint32_t const *)addr;
+    addr += 4;
+    len  -= 4;
+  }
+  if (len >= 2) {
+    reg->u16 = *(uint16_t const *)addr;
+    addr += 2;
+    len  -= 2;
+  }
+  if (len) {
+    reg->u8 = *(uint8_t const *)addr;
+  }
+}
+
+static void pipe_read_packet(void *buf, volatile void *fifo, unsigned len)
+{
+  volatile hw_fifo_t *reg = (volatile hw_fifo_t*)fifo;
+  uintptr_t addr = (uintptr_t)buf;
+  while (len >= 4) {
+    *(uint32_t *)addr = reg->u32;
+    addr += 4;
+    len  -= 4;
+  }
+  if (len >= 2) {
+    *(uint16_t *)addr = reg->u16;
+    addr += 2;
+    len  -= 2;
+  }
+  if (len) {
+    *(uint8_t *)addr = reg->u8;
+  }
+}
+
+static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigned len, unsigned dir)
+{
+  static const struct {
+    void (*tu_fifo_get_info)(tu_fifo_t *f, tu_fifo_buffer_info_t *info);
+    void (*tu_fifo_advance)(tu_fifo_t *f, uint16_t n);
+    void (*pipe_read_write)(void *buf, volatile void *fifo, unsigned len);
+  } ops[] = {
+    /* OUT */ {tu_fifo_get_write_info,tu_fifo_advance_write_pointer,pipe_read_packet},
+    /* IN  */ {tu_fifo_get_read_info, tu_fifo_advance_read_pointer, pipe_write_packet},
+  };
+  tu_fifo_buffer_info_t info;
+  ops[dir].tu_fifo_get_info(f, &info);
+  unsigned total_len = len;
+  len = TU_MIN(total_len, info.len_lin);
+  ops[dir].pipe_read_write(info.ptr_lin, fifo, len);
+  unsigned rem = total_len - len;
+  if (rem) {
+    len = TU_MIN(rem, info.len_wrap);
+    ops[dir].pipe_read_write(info.ptr_wrap, fifo, len);
+    rem -= len;
+  }
+  ops[dir].tu_fifo_advance(f, total_len - rem);
+}
+
+static void process_setup_packet(uint8_t rhport)
+{
+  uint32_t *p = (void*)&_dcd.setup_packet;
+  p[0]        = MXC_USBHS->fifo0;
+  p[1]        = MXC_USBHS->fifo0;
+
+  _dcd.pipe0.buf       = NULL;
+  _dcd.pipe0.length    = 0;
+  _dcd.pipe0.remaining = 0;
+  dcd_event_setup_received(rhport, (const uint8_t*)(uintptr_t)&_dcd.setup_packet, true);
+
+  const unsigned len    = _dcd.setup_packet.wLength;
+  _dcd.remaining_ctrl   = len;
+  const unsigned dir_in = tu_edpt_dir(_dcd.setup_packet.bmRequestType);
+  /* Clear RX FIFO and reverse the transaction direction */
+  if (len && dir_in) {
+    MXC_USBHS->index = 0;
+    MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_SERV_OUTPKTRDY;
+  }
+}
+
+static bool handle_xfer_in(uint_fast8_t ep_addr)
+{
+  unsigned epnum = tu_edpt_number(ep_addr);
+  unsigned epnum_minus1 = epnum - 1;
+  pipe_state_t  *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
+  const unsigned rem  = pipe->remaining;
+
+  //This function should not be for ep0
+  TU_ASSERT(epnum);
+
+  if (!rem) {
+    pipe->buf = NULL;
+    return true;
+  }
+
+  MXC_USBHS->index = epnum;
+  const unsigned mps = MXC_USBHS->inmaxp;
+  const unsigned len = TU_MIN(mps, rem);
+  void          *buf = pipe->buf;
+  volatile void* fifo_ptr = edpt_get_fifo_ptr(epnum);
+  // TU_LOG1("   %p mps %d len %d rem %d\r\n", buf, mps, len, rem);
+  if (len) {
+    if (_dcd.pipe_buf_is_fifo[TUSB_DIR_IN] & TU_BIT(epnum_minus1)) {
+      pipe_read_write_packet_ff(buf, fifo_ptr, len, TUSB_DIR_IN);
+    } else {
+      pipe_write_packet(buf,fifo_ptr, len);
+      pipe->buf       = buf + len;
+    }
+    pipe->remaining = rem - len;
+  }
+  MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_INPKTRDY; //TODO: Verify a | isnt needed
+
+  return false;
+}
+
+static bool handle_xfer_out(uint_fast8_t ep_addr)
+{
+  unsigned epnum = tu_edpt_number(ep_addr);
+  unsigned epnum_minus1 = epnum - 1;
+  pipe_state_t  *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
+
+  //This function should not be for ep0
+  TU_ASSERT(epnum);
+
+  MXC_USBHS->index = epnum;
+
+  TU_ASSERT(MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY);
+
+  const unsigned mps = MXC_USBHS->outmaxp;
+  const unsigned rem = pipe->remaining;
+  const unsigned vld = MXC_USBHS->outcount;
+  const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
+  void          *buf = pipe->buf;
+  volatile void* fifo_ptr = edpt_get_fifo_ptr(epnum);
+  if (len) {
+    if (_dcd.pipe_buf_is_fifo[TUSB_DIR_OUT] & TU_BIT(epnum_minus1)) {
+      pipe_read_write_packet_ff(buf,fifo_ptr, len, TUSB_DIR_OUT);
+    } else {
+      pipe_read_packet(buf, fifo_ptr, len);
+      pipe->buf       = buf + len;
+    }
+    pipe->remaining = rem - len;
+  }
+  if ((len < mps) || (rem == len)) {
+    pipe->buf = NULL;
+    return NULL != buf;
+  }
+  MXC_USBHS->outcsrl = 0; /* Clear RXRDY bit */ //TODO: Verify just setting to 0 is ok
+  return false;
+}
+
+static bool edpt_n_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
+{
+  (void)rhport;
+
+  unsigned epnum        = tu_edpt_number(ep_addr);
+  unsigned epnum_minus1 = epnum - 1;
+  unsigned dir_in       = tu_edpt_dir(ep_addr);
+
+  pipe_state_t *pipe = &_dcd.pipe[dir_in][epnum_minus1];
+  pipe->buf          = buffer;
+  pipe->length       = total_bytes;
+  pipe->remaining    = total_bytes;
+
+  if (dir_in) {
+    handle_xfer_in(ep_addr);
+  } else {
+    MXC_USBHS->index = epnum;
+    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY){
+      MXC_USBHS->outcsrl = 0; //TODO: Verify just setting to 0 is ok
+    }
+  }
+  return true;
+}
+
+static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
+{
+  (void)rhport;
+  TU_ASSERT(total_bytes <= 64); /* Current implementation supports for only up to 64 bytes. */
+
+  const unsigned req = _dcd.setup_packet.bmRequestType;
+  TU_ASSERT(req != REQUEST_TYPE_INVALID || total_bytes == 0);
+
+  if (req == REQUEST_TYPE_INVALID || _dcd.status_out) {
+    /* STATUS OUT stage.
+     * MUSB controller automatically handles STATUS OUT packets without
+     * software helps. We do not have to do anything. And STATUS stage
+     * may have already finished and received the next setup packet
+     * without calling this function, so we have no choice but to
+     * invoke the callback function of status packet here. */
+    _dcd.status_out = 0;
+    if (req == REQUEST_TYPE_INVALID) {
+      dcd_event_xfer_complete(rhport, ep_addr, total_bytes, XFER_RESULT_SUCCESS, false);
+    } else {
+      /* The next setup packet has already been received, it aborts
+       * invoking callback function to avoid confusing TUSB stack. */
+      TU_LOG1("Drop CONTROL_STAGE_ACK\r\n");
+    }
+    return true;
+  }
+  const unsigned dir_in = tu_edpt_dir(ep_addr);
+  MXC_USBHS->index = 0;
+  if (tu_edpt_dir(req) == dir_in) { /* DATA stage */
+    TU_ASSERT(total_bytes <= _dcd.remaining_ctrl);
+    const unsigned rem = _dcd.remaining_ctrl;
+    const unsigned len = TU_MIN(TU_MIN(rem, 64), total_bytes);
+    volatile void* fifo_ptr = edpt_get_fifo_ptr(0);
+    if (dir_in) {
+      pipe_write_packet(buffer, fifo_ptr, len);
+
+      _dcd.pipe0.buf       = buffer + len;
+      _dcd.pipe0.length    = len;
+      _dcd.pipe0.remaining = 0;
+
+      _dcd.remaining_ctrl  = rem - len;
+      if ((len < 64) || (rem == len)) {
+        _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID; /* Change to STATUS/SETUP stage */
+        _dcd.status_out = 1;
+        /* Flush TX FIFO and reverse the transaction direction. */
+        MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_INPKTRDY | MXC_F_USBHS_CSR0_DATA_END;
+      } else {
+        MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_INPKTRDY; /* Flush TX FIFO to return ACK. */
+      }
+    } else {
+      _dcd.pipe0.buf       = buffer;
+      _dcd.pipe0.length    = len;
+      _dcd.pipe0.remaining = len;
+      MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_SERV_OUTPKTRDY; /* Clear RX FIFO to return ACK. */
+    }
+  } else if (dir_in) {
+    _dcd.pipe0.buf = NULL;
+    _dcd.pipe0.length    = 0;
+    _dcd.pipe0.remaining = 0;
+    /* Clear RX FIFO and reverse the transaction direction */
+    MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_SERV_OUTPKTRDY | MXC_F_USBHS_CSR0_DATA_END;
+  }
+  return true;
+}
+
+static void process_ep0(uint8_t rhport)
+{
+  MXC_USBHS->index = 0;
+  uint_fast8_t csrl = MXC_USBHS->csr0;
+
+  if (csrl & MXC_F_USBHS_CSR0_SENT_STALL) {
+    /* Returned STALL packet to HOST. */
+    MXC_USBHS->csr0 = 0; /* Clear STALL */
+    return;
+  }
+
+  unsigned req = _dcd.setup_packet.bmRequestType;
+  if (csrl & MXC_F_USBHS_CSR0_SETUP_END) {
+    TU_LOG1("   ABORT by the next packets\r\n");
+    MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_SERV_SETUP_END;
+    if (req != REQUEST_TYPE_INVALID && _dcd.pipe0.buf) {
+      /* DATA stage was aborted by receiving STATUS or SETUP packet. */
+      _dcd.pipe0.buf = NULL;
+      _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
+      dcd_event_xfer_complete(rhport,
+                              req & TUSB_DIR_IN_MASK,
+                              _dcd.pipe0.length - _dcd.pipe0.remaining,
+                              XFER_RESULT_SUCCESS, true);
+    }
+    req = REQUEST_TYPE_INVALID;
+    if (!(csrl & MXC_F_USBHS_CSR0_OUTPKTRDY)) return; /* Received SETUP packet */
+  }
+
+  if (csrl & MXC_F_USBHS_CSR0_OUTPKTRDY) {
+    /* Received SETUP or DATA OUT packet */
+    if (req == REQUEST_TYPE_INVALID) {
+      /* SETUP */
+      TU_ASSERT(sizeof(tusb_control_request_t) == MXC_USBHS->count0,);
+      process_setup_packet(rhport);
+      return;
+    }
+    if (_dcd.pipe0.buf) {
+      /* DATA OUT */
+      const unsigned vld = MXC_USBHS->count0;
+      const unsigned rem = _dcd.pipe0.remaining;
+      const unsigned len = TU_MIN(TU_MIN(rem, 64), vld);
+      volatile void* fifo_ptr = edpt_get_fifo_ptr(0);
+      pipe_read_packet(_dcd.pipe0.buf, fifo_ptr, len);
+
+      _dcd.pipe0.remaining = rem - len;
+      _dcd.remaining_ctrl -= len;
+
+      _dcd.pipe0.buf = NULL;
+      dcd_event_xfer_complete(rhport,
+                              tu_edpt_addr(0, TUSB_DIR_OUT),
+                              _dcd.pipe0.length - _dcd.pipe0.remaining,
+                              XFER_RESULT_SUCCESS, true);
+    }
+    return;
+  }
+
+  /* When CSRL0 is zero, it means that completion of sending a any length packet
+   * or receiving a zero length packet. */
+  if (req != REQUEST_TYPE_INVALID && !tu_edpt_dir(req)) {
+    /* STATUS IN */
+    if (*(const uint16_t*)(uintptr_t)&_dcd.setup_packet == 0x0500) {
+      /* The address must be changed on completion of the control transfer. */
+      MXC_USBHS->faddr = (uint8_t)_dcd.setup_packet.wValue;
+    }
+    _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
+    dcd_event_xfer_complete(rhport,
+                            tu_edpt_addr(0, TUSB_DIR_IN),
+                            _dcd.pipe0.length - _dcd.pipe0.remaining,
+                            XFER_RESULT_SUCCESS, true);
+    return;
+  }
+  if (_dcd.pipe0.buf) {
+    /* DATA IN */
+    _dcd.pipe0.buf = NULL;
+    dcd_event_xfer_complete(rhport,
+                            tu_edpt_addr(0, TUSB_DIR_IN),
+                            _dcd.pipe0.length - _dcd.pipe0.remaining,
+                            XFER_RESULT_SUCCESS, true);
+  }
+}
+
+static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
+{
+  bool completed;
+  const unsigned dir_in     = tu_edpt_dir(ep_addr);
+  const unsigned epnum      = tu_edpt_number(ep_addr);
+
+  MXC_USBHS->index = epnum;
+
+  if (dir_in) {
+    if (MXC_USBHS->incsrl & MXC_F_USBHS_INCSRL_SENTSTALL) {
+      MXC_USBHS->incsrl &= ~(MXC_F_USBHS_INCSRL_SENTSTALL | MXC_F_USBHS_INCSRL_UNDERRUN);
+      return;
+    }
+    completed = handle_xfer_in(ep_addr);
+  } else {
+    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_SENTSTALL) {
+      MXC_USBHS->outcsrl &= ~(MXC_F_USBHS_OUTCSRL_SENTSTALL | MXC_F_USBHS_OUTCSRL_OVERRUN);
+      return;
+    }
+    completed = handle_xfer_out(ep_addr);
+  }
+
+  if (completed) {
+    pipe_state_t *pipe = &_dcd.pipe[dir_in][tu_edpt_number(ep_addr) - 1];
+    dcd_event_xfer_complete(rhport, ep_addr,
+                            pipe->length - pipe->remaining,
+                            XFER_RESULT_SUCCESS, true);
+  }
+}
+
+static void process_bus_reset(uint8_t rhport)
+{
+  (void)rhport;
+  TU_LOG0("------Bus Reset\r\n");
+  /* When bmRequestType is REQUEST_TYPE_INVALID(0xFF),
+   * a control transfer state is SETUP or STATUS stage. */
+  _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
+  _dcd.status_out = 0;
+  /* When pipe0.buf has not NULL, DATA stage works in progress. */
+  _dcd.pipe0.buf = NULL;
+
+  MXC_USBHS->intrinen = 1; /* Enable only EP0 */
+  MXC_USBHS->introuten = 0;
+
+
+  /* Clear FIFO settings */
+  for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
+    MXC_USBHS->index = i;
+    if (MXC_USBHS->incsrl & MXC_F_USBHS_INCSRL_INPKTRDY) {
+          /* Per musbhsfc_pg, only flush FIFO if IN packet loaded */
+          MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_FLUSHFIFO;
+      }
+
+      if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
+          /* Per musbhsfc_pg, only flush FIFO if OUT packet is ready */
+          MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_FLUSHFIFO;
+      }
+  }
+  dcd_event_bus_reset(0, (MXC_USBHS->power & MXC_F_USBHS_POWER_HS_MODE) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL, true);
+}
+
+/*------------------------------------------------------------------
+ * Device API
+ *------------------------------------------------------------------*/
+
+void dcd_init(uint8_t rhport)
+{
+  (void)rhport;
+  MXC_USBHS->intrusben |= MXC_F_USBHS_INTRUSBEN_SUSPEND_INT_EN;
+
+  //Interrupt for VBUS disconnect
+  MXC_USBHS->mxm_int_en |= MXC_F_USBHS_MXM_INT_EN_NOVBUS;
+
+  NVIC_ClearPendingIRQ(USB_IRQn);
+  dcd_edpt_close_all(rhport);
+
+  //Unsuspend the MAC
+  MXC_USBHS->mxm_suspend = 0;
+
+  /* Configure PHY */
+  MXC_USBHS->m31_phy_xcfgi_31_0 = (0x1 << 3) | (0x1 << 11);
+  MXC_USBHS->m31_phy_xcfgi_63_32 = 0;
+  MXC_USBHS->m31_phy_xcfgi_95_64 = 0x1 << (72-64);
+  MXC_USBHS->m31_phy_xcfgi_127_96 = 0;
+
+
+#ifdef USBHS_M31_CLOCK_RECOVERY
+  MXC_USBHS->m31_phy_noncry_rstb = 1;
+  MXC_USBHS->m31_phy_noncry_en = 1;
+  MXC_USBHS->m31_phy_outclksel = 0;
+  MXC_USBHS->m31_phy_coreclkin = 0;
+  MXC_USBHS->m31_phy_xtlsel = 2; /* Select 25 MHz clock */
+#else
+  /* Use this option to feed the PHY a 30 MHz clock, which is them used as a PLL reference */
+  /* As it depends on the system core clock, this should probably be done at the SYS level */
+  MXC_USBHS->m31_phy_noncry_rstb = 0;
+  MXC_USBHS->m31_phy_noncry_en = 0;
+  MXC_USBHS->m31_phy_outclksel = 1;
+  MXC_USBHS->m31_phy_coreclkin = 1;
+  MXC_USBHS->m31_phy_xtlsel = 3; /* Select 30 MHz clock */
+#endif
+  MXC_USBHS->m31_phy_pll_en = 1;
+  MXC_USBHS->m31_phy_oscouten = 1;
+
+  /* Reset PHY */
+  MXC_USBHS->m31_phy_ponrst = 0;
+  MXC_USBHS->m31_phy_ponrst = 1;
+
+  dcd_connect(rhport);
+}
+
+void dcd_int_enable(uint8_t rhport)
+{
+  (void)rhport;
+  NVIC_EnableIRQ(USB_IRQn);
+}
+
+void dcd_int_disable(uint8_t rhport)
+{
+  (void)rhport;
+  NVIC_DisableIRQ(USB_IRQn);
+}
+
+// Receive Set Address request, mcu port must also include status IN response
+void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
+{
+  (void)rhport;
+  (void)dev_addr;
+  _dcd.pipe0.buf       = NULL;
+  _dcd.pipe0.length    = 0;
+  _dcd.pipe0.remaining = 0;
+  /* Clear RX FIFO to return ACK. */
+  MXC_USBHS->index = 0;
+  MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_SERV_OUTPKTRDY | MXC_F_USBHS_CSR0_DATA_END;
+}
+
+// Wake up host
+void dcd_remote_wakeup(uint8_t rhport)
+{
+  (void)rhport;
+  MXC_USBHS->power |= MXC_F_USBHS_POWER_RESUME;
+
+#if CFG_TUSB_OS != OPT_OS_NONE
+  osal_task_delay(10);
+#else
+  MXC_Delay(MXC_DELAY_MSEC(10));
+#endif
+
+  MXC_USBHS->power &= ~MXC_F_USBHS_POWER_RESUME;
+}
+
+// Connect by enabling internal pull-up resistor on D+/D-
+void dcd_connect(uint8_t rhport)
+{
+  (void)rhport;
+  MXC_USBHS->power |= TUD_OPT_HIGH_SPEED ? MXC_F_USBHS_POWER_HS_ENABLE : 0;
+  MXC_USBHS->power |= MXC_F_USBHS_POWER_SOFTCONN;
+}
+
+// Disconnect by disabling internal pull-up resistor on D+/D-
+void dcd_disconnect(uint8_t rhport)
+{
+  (void)rhport;
+  MXC_USBHS->power &= ~MXC_F_USBHS_POWER_SOFTCONN;
+}
+
+void dcd_sof_enable(uint8_t rhport, bool en)
+{
+  (void) rhport;
+  (void) en;
+
+  // TODO implement later
+}
+
+//--------------------------------------------------------------------+
+// Endpoint API
+//--------------------------------------------------------------------+
+
+// Configure endpoint's registers according to descriptor
+bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
+{
+  (void) rhport;
+
+  const unsigned ep_addr = ep_desc->bEndpointAddress;
+  const unsigned epn     = tu_edpt_number(ep_addr);
+  const unsigned dir_in  = tu_edpt_dir(ep_addr);
+  const unsigned xfer    = ep_desc->bmAttributes.xfer;
+  const unsigned mps     = tu_edpt_packet_size(ep_desc);
+
+  TU_ASSERT(epn < TUP_DCD_ENDPOINT_MAX);
+
+  pipe_state_t *pipe = &_dcd.pipe[dir_in][epn - 1];
+  pipe->buf       = NULL;
+  pipe->length    = 0;
+  pipe->remaining = 0;
+
+  MXC_USBHS->index = epn;
+
+  if (dir_in) {
+    MXC_USBHS->inmaxp = mps;
+    MXC_USBHS->incsru = (MXC_F_USBHS_INCSRU_DPKTBUFDIS | MXC_F_USBHS_INCSRU_MODE) | ((xfer == TUSB_XFER_ISOCHRONOUS) ? MXC_F_USBHS_INCSRU_ISO : 0);
+    if (MXC_USBHS->incsrl & MXC_F_USBHS_INCSRL_INPKTRDY) {
+      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG | MXC_F_USBHS_INCSRL_FLUSHFIFO;
+    } else {
+      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG;
+    }
+    MXC_USBHS->intrinen |= TU_BIT(epn);
+  } else {
+    MXC_USBHS->outmaxp = mps;
+    MXC_USBHS->outcsru = (MXC_F_USBHS_OUTCSRU_DPKTBUFDIS) | ((xfer == TUSB_XFER_ISOCHRONOUS) ? MXC_F_USBHS_OUTCSRU_ISO : 0);
+    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
+      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG | MXC_F_USBHS_OUTCSRL_FLUSHFIFO;
+    } else {
+      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG;
+    }
+    MXC_USBHS->introuten |= TU_BIT(epn);
+  }
+
+  return true;
+}
+
+void dcd_edpt_close_all(uint8_t rhport)
+{
+  (void) rhport;
+
+  MXC_SYS_Crit_Enter();
+  MXC_USBHS->intrinen = 1; /* Enable only EP0 */
+  MXC_USBHS->introuten = 0;
+
+  for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
+    MXC_USBHS->index = i;
+    MXC_USBHS->inmaxp = 0;
+    MXC_USBHS->incsru = MXC_F_USBHS_INCSRU_DPKTBUFDIS;
+
+    if (MXC_USBHS->incsrl & MXC_F_USBHS_INCSRL_INPKTRDY) {
+      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG | MXC_F_USBHS_INCSRL_FLUSHFIFO;
+    } else {
+      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG;
+    }
+
+    MXC_USBHS->outmaxp = 0;
+    MXC_USBHS->outcsru = MXC_F_USBHS_OUTCSRU_DPKTBUFDIS;
+
+    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
+      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG | MXC_F_USBHS_OUTCSRL_FLUSHFIFO;
+    } else {
+      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG;
+    }
+  }
+  MXC_SYS_Crit_Exit();
+}
+
+void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
+{
+  (void)rhport;
+  unsigned const epn    = tu_edpt_number(ep_addr);
+  unsigned const dir_in = tu_edpt_dir(ep_addr);
+
+  MXC_SYS_Crit_Enter();
+  MXC_USBHS->index = epn;
+  if (dir_in) {
+    MXC_USBHS->intrinen &= ~TU_BIT(epn);
+    MXC_USBHS->inmaxp = 0;
+    MXC_USBHS->incsru = MXC_F_USBHS_INCSRU_DPKTBUFDIS;
+    if (MXC_USBHS->incsrl & MXC_F_USBHS_INCSRL_INPKTRDY) {
+      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG | MXC_F_USBHS_INCSRL_FLUSHFIFO;
+    } else {
+      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG;
+    }
+  } else {
+    MXC_USBHS->introuten  &= ~TU_BIT(epn);
+    MXC_USBHS->outmaxp = 0;
+    MXC_USBHS->outcsru = MXC_F_USBHS_OUTCSRU_DPKTBUFDIS;
+    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
+      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG | MXC_F_USBHS_OUTCSRL_FLUSHFIFO;
+    } else {
+      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG;
+    }
+  }
+  MXC_SYS_Crit_Exit();
+}
+
+// Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack
+bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
+{
+  (void)rhport;
+  bool ret;
+  unsigned const epnum = tu_edpt_number(ep_addr);
+  MXC_SYS_Crit_Enter();
+  if (epnum) {
+    _dcd.pipe_buf_is_fifo[tu_edpt_dir(ep_addr)] &= ~TU_BIT(epnum - 1);
+    ret = edpt_n_xfer(rhport, ep_addr, buffer, total_bytes);
+  } else
+    ret = edpt0_xfer(rhport, ep_addr, buffer, total_bytes);
+  MXC_SYS_Crit_Exit();
+  return ret;
+}
+
+// Submit a transfer where is managed by FIFO, When complete dcd_event_xfer_complete() is invoked to notify the stack - optional, however, must be listed in usbd.c
+bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
+{
+  (void)rhport;
+  bool ret;
+  unsigned const epnum = tu_edpt_number(ep_addr);
+  TU_ASSERT(epnum);
+  MXC_SYS_Crit_Enter();
+  _dcd.pipe_buf_is_fifo[tu_edpt_dir(ep_addr)] |= TU_BIT(epnum - 1);
+  ret = edpt_n_xfer(rhport, ep_addr, (uint8_t*)ff, total_bytes);
+  MXC_SYS_Crit_Exit();
+  return ret;
+}
+
+// Stall endpoint
+void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
+{
+  (void)rhport;
+  unsigned const epn = tu_edpt_number(ep_addr);
+  MXC_SYS_Crit_Enter();
+  MXC_USBHS->index = epn;
+  if (0 == epn) {
+    if (!ep_addr) { /* Ignore EP80 */
+      _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
+      _dcd.pipe0.buf = NULL;
+      MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_SEND_STALL;
+    }
+  } else {
+    if (tu_edpt_dir(ep_addr)) { /* IN */
+      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_SENDSTALL;
+    } else { /* OUT */
+      TU_ASSERT(!(MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY),);
+      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_SENDSTALL;
+    }
+  }
+  MXC_SYS_Crit_Exit();
+}
+
+// clear stall, data toggle is also reset to DATA0
+void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
+{
+  (void)rhport;
+  unsigned const epn = tu_edpt_number(ep_addr);
+  MXC_SYS_Crit_Enter();
+  MXC_USBHS->index = epn;
+  if (tu_edpt_dir(ep_addr)) { /* IN */
+    /* IN endpoint */
+    if (MXC_USBHS->incsrl & MXC_F_USBHS_INCSRL_INPKTRDY) {
+      /* Per musbhsfc_pg, only flush FIFO if IN packet loaded */
+      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG | MXC_F_USBHS_INCSRL_FLUSHFIFO;
+    } else {
+      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG;
+    }
+  } else { /* OUT */
+    /* Otherwise, must be OUT endpoint */
+    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
+      /* Per musbhsfc_pg, only flush FIFO if OUT packet is ready */
+      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG | MXC_F_USBHS_OUTCSRL_FLUSHFIFO;
+    } else {
+      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG;
+    }
+  }
+  MXC_SYS_Crit_Exit();
+}
+
+/*-------------------------------------------------------------------
+ * ISR
+ *-------------------------------------------------------------------*/
+void dcd_int_handler(uint8_t rhport)
+{
+  uint_fast8_t is, txis, rxis;
+  uint32_t mxm_int, mxm_int_en, mxm_is;
+  uint32_t saved_index;
+
+  /* Save current index register */
+  saved_index = MXC_USBHS->index;
+
+  is   = MXC_USBHS->intrusb; /* read and clear interrupt status */
+  txis = MXC_USBHS->intrin;  /* read and clear interrupt status */
+  rxis = MXC_USBHS->introut; /* read and clear interrupt status */
+
+  /* These USB interrupt flags are W1C. */
+  /* Order of volatile accesses must be separated for IAR */
+  mxm_int = MXC_USBHS->mxm_int;
+  mxm_int_en = MXC_USBHS->mxm_int_en;
+  mxm_is = mxm_int & mxm_int_en;
+  MXC_USBHS->mxm_int = mxm_is;
+
+  is &= MXC_USBHS->intrusben; /* Clear disabled interrupts */
+
+  if (mxm_is & MXC_F_USBHS_MXM_INT_NOVBUS) {
+    dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true);
+  }
+  if (is & MXC_F_USBHS_INTRUSB_SOF_INT) {
+    dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
+  }
+  if (is & MXC_F_USBHS_INTRUSB_RESET_INT) {
+    process_bus_reset(rhport);
+  }
+  if (is & MXC_F_USBHS_INTRUSB_RESUME_INT) {
+    dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
+  }
+  if (is & MXC_F_USBHS_INTRUSB_SUSPEND_INT) {
+    dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
+  }
+
+  txis &= MXC_USBHS->intrinen; /* Clear disabled interrupts */
+  if (txis & MXC_F_USBHS_INTRIN_EP0_IN_INT) {
+    process_ep0(rhport);
+    txis &= ~TU_BIT(0);
+  }
+  while (txis) {
+    unsigned const num = __builtin_ctz(txis);
+    process_edpt_n(rhport, tu_edpt_addr(num, TUSB_DIR_IN));
+    txis &= ~TU_BIT(num);
+  }
+  rxis &= MXC_USBHS->introuten; /* Clear disabled interrupts */
+  while (rxis) {
+    unsigned const num = __builtin_ctz(rxis);
+    process_edpt_n(rhport, tu_edpt_addr(num, TUSB_DIR_OUT));
+    rxis &= ~TU_BIT(num);
+  }
+
+  /* Restore register index before exiting ISR */
+  MXC_USBHS->index = saved_index;
+}
+
+#endif
diff --git a/src/tusb_option.h b/src/tusb_option.h
index db8b945808..18f78b49c2 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -188,6 +188,9 @@
 #define OPT_MCU_MCXN9            2300  ///< NXP MCX N9 Series
 #define OPT_MCU_MCXA15           2301  ///< NXP MCX A15 Series
 
+// Analog Devices
+#define OPT_MCU_MAX32690         2400  ///< ADI MAX32690
+
 // Check if configured MCU is one of listed
 // Apply _TU_CHECK_MCU with || as separator to list of input
 #define _TU_CHECK_MCU(_m)    (CFG_TUSB_MCU == _m)
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 50cc5c893b..e05cc4d76e 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -24,6 +24,9 @@
     'hw/mcu/allwinner': ['https://github.com/hathach/allwinner_driver.git',
                          '8e5e89e8e132c0fd90e72d5422e5d3d68232b756',
                          'fc100s'],
+    'hw/mcu/analog/max32' : ['https://github.com/analogdevicesinc/msdk.git',
+                             'b20b398d3e5e2007594e54a74ba3d2a2e50ddd75',
+                             'max32690'],
     'hw/mcu/bridgetek/ft9xx/ft90x-sdk': ['https://github.com/BRTSG-FOSS/ft90x-sdk.git',
                                          '91060164afe239fcb394122e8bf9eb24d3194eb1',
                                          'brtmm90x'],

From 0b82af61f3ca7f6b708399c49519fb109ab33abb Mon Sep 17 00:00:00 2001
From: Brent Kowal <brent.kowal@analog.com>
Date: Mon, 1 Jul 2024 16:31:17 -0400
Subject: [PATCH 030/204] AD-APARD32690-SL Support and Cleanup

 - Added BSP for AD-APARD32690-SL board (apard32690)
 - Ran clang-formatting on previously committed code
 - Removed LOG messages from dcd_max32.c
---
 hw/bsp/max32690/boards/apard32690/board.cmake |   1 +
 hw/bsp/max32690/boards/apard32690/board.h     |  56 +++
 hw/bsp/max32690/boards/apard32690/board.mk    |   1 +
 hw/bsp/max32690/boards/max32690evkit/board.h  |  22 +-
 hw/bsp/max32690/family.c                      |  32 +-
 src/portable/analog/max32/dcd_max32.c         | 339 ++++++++----------
 6 files changed, 239 insertions(+), 212 deletions(-)
 create mode 100644 hw/bsp/max32690/boards/apard32690/board.cmake
 create mode 100644 hw/bsp/max32690/boards/apard32690/board.h
 create mode 100644 hw/bsp/max32690/boards/apard32690/board.mk

diff --git a/hw/bsp/max32690/boards/apard32690/board.cmake b/hw/bsp/max32690/boards/apard32690/board.cmake
new file mode 100644
index 0000000000..9dc6962eb9
--- /dev/null
+++ b/hw/bsp/max32690/boards/apard32690/board.cmake
@@ -0,0 +1 @@
+# Nothing to be done at the board level
diff --git a/hw/bsp/max32690/boards/apard32690/board.h b/hw/bsp/max32690/boards/apard32690/board.h
new file mode 100644
index 0000000000..f94097ca9a
--- /dev/null
+++ b/hw/bsp/max32690/boards/apard32690/board.h
@@ -0,0 +1,56 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024, Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#include "gpio.h"
+#include "mxc_sys.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// LED
+#define LED_PORT        MXC_GPIO2
+#define LED_PIN         MXC_GPIO_PIN_1
+#define LED_VDDIO       MXC_GPIO_VSSEL_VDDIOH
+#define LED_STATE_ON    1
+
+// Button
+#define BUTTON_PORT         MXC_GPIO1
+#define BUTTON_PIN          MXC_GPIO_PIN_27
+#define BUTTON_PULL         MXC_GPIO_PAD_NONE
+#define BUTTON_STATE_ACTIVE 1
+
+// UART Enable for UART on ARM SWD Connector
+#define UART_NUM 0
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/max32690/boards/apard32690/board.mk b/hw/bsp/max32690/boards/apard32690/board.mk
new file mode 100644
index 0000000000..a813a5327b
--- /dev/null
+++ b/hw/bsp/max32690/boards/apard32690/board.mk
@@ -0,0 +1 @@
+# No specific build requirements for the board.
diff --git a/hw/bsp/max32690/boards/max32690evkit/board.h b/hw/bsp/max32690/boards/max32690evkit/board.h
index f5a9047028..05d60f2205 100644
--- a/hw/bsp/max32690/boards/max32690evkit/board.h
+++ b/hw/bsp/max32690/boards/max32690evkit/board.h
@@ -31,26 +31,26 @@
 #include "mxc_sys.h"
 
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 // LED
-#define LED_PORT              MXC_GPIO0
-#define LED_PIN               MXC_GPIO_PIN_14
-#define LED_VDDIO             MXC_GPIO_VSSEL_VDDIOH
-#define LED_STATE_ON          0
+#define LED_PORT        MXC_GPIO0
+#define LED_PIN         MXC_GPIO_PIN_14
+#define LED_VDDIO       MXC_GPIO_VSSEL_VDDIOH
+#define LED_STATE_ON    0
 
 // Button
-#define BUTTON_PORT           MXC_GPIO4
-#define BUTTON_PIN            MXC_GPIO_PIN_0
-#define BUTTON_PULL           MXC_GPIO_PAD_PULL_UP
-#define BUTTON_STATE_ACTIVE   0
+#define BUTTON_PORT         MXC_GPIO4
+#define BUTTON_PIN          MXC_GPIO_PIN_0
+#define BUTTON_PULL         MXC_GPIO_PAD_PULL_UP
+#define BUTTON_STATE_ACTIVE 0
 
 // UART Enable for EvKit's Integrated FTDI Adapter. Pin Mux handled by the HAL
-#define UART_NUM              2
+#define UART_NUM 2
 
 #ifdef __cplusplus
- }
+}
 #endif
 
 #endif /* BOARD_H_ */
diff --git a/hw/bsp/max32690/family.c b/hw/bsp/max32690/family.c
index f443bc575a..acd6e25937 100644
--- a/hw/bsp/max32690/family.c
+++ b/hw/bsp/max32690/family.c
@@ -24,12 +24,12 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board_api.h"
 #include "board.h"
-#include "mxc_device.h"
+#include "bsp/board_api.h"
+#include "gpio.h"
 #include "mcr_regs.h"
+#include "mxc_device.h"
 #include "uart.h"
-#include "gpio.h"
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
@@ -49,7 +49,7 @@ void board_init(void) {
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+  NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
   mxc_gpio_cfg_t gpioConfig;
 
@@ -87,10 +87,10 @@ void board_init(void) {
 //--------------------------------------------------------------------+
 
 void board_led_write(bool state) {
-  #if LED_STATE_ON
-    state = !state;
-  #endif
-  if(state) {
+#if LED_STATE_ON
+  state = !state;
+#endif
+  if (state) {
     MXC_GPIO_OutClr(LED_PORT, LED_PIN);
   } else {
     MXC_GPIO_OutSet(LED_PORT, LED_PIN);
@@ -103,9 +103,9 @@ uint32_t board_button_read(void) {
 }
 
 size_t board_get_unique_id(uint8_t id[], size_t max_len) {
-  uint8_t hw_id[MXC_SYS_USN_CHECKSUM_LEN]; //USN Buffer
-  /* All other 2nd parameter is optional checkum buffer */
-   MXC_SYS_GetUSN(hw_id, NULL);
+  uint8_t hw_id[MXC_SYS_USN_CHECKSUM_LEN];//USN Buffer
+                                          /* All other 2nd parameter is optional checkum buffer */
+  MXC_SYS_GetUSN(hw_id, NULL);
 
   size_t act_len = TU_MIN(max_len, MXC_SYS_USN_LEN);
   memcpy(id, hw_id, act_len);
@@ -116,11 +116,11 @@ int board_uart_read(uint8_t *buf, int len) {
   int uart_val;
   int act_len = 0;
 
-  while( act_len < len ) {
-    if((uart_val = MXC_UART_ReadCharacterRaw(ConsoleUart)) == E_UNDERFLOW) {
+  while (act_len < len) {
+    if ((uart_val = MXC_UART_ReadCharacterRaw(ConsoleUart)) == E_UNDERFLOW) {
       break;
     } else {
-      *buf++ = (uint8_t)uart_val;
+      *buf++ = (uint8_t) uart_val;
       act_len++;
     }
   }
@@ -129,8 +129,8 @@ int board_uart_read(uint8_t *buf, int len) {
 
 int board_uart_write(void const *buf, int len) {
   int act_len = 0;
-  const uint8_t* ch_ptr = (const uint8_t*)buf;
-  while(act_len < len){
+  const uint8_t *ch_ptr = (const uint8_t *) buf;
+  while (act_len < len) {
     MXC_UART_WriteCharacter(ConsoleUart, *ch_ptr++);
     act_len++;
   }
diff --git a/src/portable/analog/max32/dcd_max32.c b/src/portable/analog/max32/dcd_max32.c
index 150d476fa3..b3370ddd17 100644
--- a/src/portable/analog/max32/dcd_max32.c
+++ b/src/portable/analog/max32/dcd_max32.c
@@ -29,49 +29,48 @@
 
 #if CFG_TUD_ENABLED && TU_CHECK_MCU(OPT_MCU_MAX32690)
 
-#if __GNUC__ > 8 && defined(__ARM_FEATURE_UNALIGNED)
+  #if __GNUC__ > 8 && defined(__ARM_FEATURE_UNALIGNED)
 /* GCC warns that an address may be unaligned, even though
  * the target CPU has the capability for unaligned memory access. */
 _Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
-#endif
+  #endif
 
-#include "device/dcd.h"
+  #include "device/dcd.h"
 
-#include "mxc_delay.h"
-#include "mxc_device.h"
-#include "mxc_sys.h"
-#include "nvic_table.h"
-#include "usbhs_regs.h"
+  #include "mxc_delay.h"
+  #include "mxc_device.h"
+  #include "mxc_sys.h"
+  #include "nvic_table.h"
+  #include "usbhs_regs.h"
 
-#define USBHS_M31_CLOCK_RECOVERY
+  #define USBHS_M31_CLOCK_RECOVERY
 
-/*------------------------------------------------------------------
+  /*------------------------------------------------------------------
  * MACRO TYPEDEF CONSTANT ENUM DECLARATION
  *------------------------------------------------------------------*/
-#define REQUEST_TYPE_INVALID  (0xFFu)
+  #define REQUEST_TYPE_INVALID (0xFFu)
 
 
 typedef union {
-  uint8_t   u8;
-  uint16_t  u16;
-  uint32_t  u32;
+  uint8_t u8;
+  uint16_t u16;
+  uint32_t u32;
 } hw_fifo_t;
 
-typedef struct TU_ATTR_PACKED
-{
-  void      *buf;      /* the start address of a transfer data buffer */
-  uint16_t  length;    /* the number of bytes in the buffer */
-  uint16_t  remaining; /* the number of bytes remaining in the buffer */
+typedef struct TU_ATTR_PACKED {
+  void *buf;          /* the start address of a transfer data buffer */
+  uint16_t length;    /* the number of bytes in the buffer */
+  uint16_t remaining; /* the number of bytes remaining in the buffer */
 } pipe_state_t;
 
 typedef struct
 {
   tusb_control_request_t setup_packet;
-  uint16_t     remaining_ctrl; /* The number of bytes remaining in data stage of control transfer. */
-  int8_t       status_out;
+  uint16_t remaining_ctrl; /* The number of bytes remaining in data stage of control transfer. */
+  int8_t status_out;
   pipe_state_t pipe0;
-  pipe_state_t pipe[2][TUP_DCD_ENDPOINT_MAX - 1];   /* pipe[direction][endpoint number - 1] */
-  uint16_t     pipe_buf_is_fifo[2]; /* Bitmap. Each bit means whether 1:TU_FIFO or 0:POD. */
+  pipe_state_t pipe[2][TUP_DCD_ENDPOINT_MAX - 1]; /* pipe[direction][endpoint number - 1] */
+  uint16_t pipe_buf_is_fifo[2];                   /* Bitmap. Each bit means whether 1:TU_FIFO or 0:POD. */
 } dcd_data_t;
 
 /*------------------------------------------------------------------
@@ -80,63 +79,59 @@ typedef struct
 static dcd_data_t _dcd;
 
 
-static volatile void* edpt_get_fifo_ptr(unsigned epnum)
-{
-    volatile uint32_t *ptr;
+static volatile void *edpt_get_fifo_ptr(unsigned epnum) {
+  volatile uint32_t *ptr;
 
-    ptr = &MXC_USBHS->fifo0;
-    ptr += epnum; /* Pointer math: multiplies ep by sizeof(uint32_t) */
+  ptr = &MXC_USBHS->fifo0;
+  ptr += epnum; /* Pointer math: multiplies ep by sizeof(uint32_t) */
 
-    return (volatile void *)ptr;
+  return (volatile void *) ptr;
 }
 
-static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
-{
-  volatile hw_fifo_t *reg = (volatile hw_fifo_t*)fifo;
-  uintptr_t addr = (uintptr_t)buf;
+static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len) {
+  volatile hw_fifo_t *reg = (volatile hw_fifo_t *) fifo;
+  uintptr_t addr = (uintptr_t) buf;
   while (len >= 4) {
-    reg->u32 = *(uint32_t const *)addr;
+    reg->u32 = *(uint32_t const *) addr;
     addr += 4;
-    len  -= 4;
+    len -= 4;
   }
   if (len >= 2) {
-    reg->u16 = *(uint16_t const *)addr;
+    reg->u16 = *(uint16_t const *) addr;
     addr += 2;
-    len  -= 2;
+    len -= 2;
   }
   if (len) {
-    reg->u8 = *(uint8_t const *)addr;
+    reg->u8 = *(uint8_t const *) addr;
   }
 }
 
-static void pipe_read_packet(void *buf, volatile void *fifo, unsigned len)
-{
-  volatile hw_fifo_t *reg = (volatile hw_fifo_t*)fifo;
-  uintptr_t addr = (uintptr_t)buf;
+static void pipe_read_packet(void *buf, volatile void *fifo, unsigned len) {
+  volatile hw_fifo_t *reg = (volatile hw_fifo_t *) fifo;
+  uintptr_t addr = (uintptr_t) buf;
   while (len >= 4) {
-    *(uint32_t *)addr = reg->u32;
+    *(uint32_t *) addr = reg->u32;
     addr += 4;
-    len  -= 4;
+    len -= 4;
   }
   if (len >= 2) {
-    *(uint16_t *)addr = reg->u16;
+    *(uint16_t *) addr = reg->u16;
     addr += 2;
-    len  -= 2;
+    len -= 2;
   }
   if (len) {
-    *(uint8_t *)addr = reg->u8;
+    *(uint8_t *) addr = reg->u8;
   }
 }
 
-static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigned len, unsigned dir)
-{
+static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigned len, unsigned dir) {
   static const struct {
     void (*tu_fifo_get_info)(tu_fifo_t *f, tu_fifo_buffer_info_t *info);
     void (*tu_fifo_advance)(tu_fifo_t *f, uint16_t n);
     void (*pipe_read_write)(void *buf, volatile void *fifo, unsigned len);
   } ops[] = {
-    /* OUT */ {tu_fifo_get_write_info,tu_fifo_advance_write_pointer,pipe_read_packet},
-    /* IN  */ {tu_fifo_get_read_info, tu_fifo_advance_read_pointer, pipe_write_packet},
+      /* OUT */ {tu_fifo_get_write_info, tu_fifo_advance_write_pointer, pipe_read_packet},
+      /* IN  */ {tu_fifo_get_read_info, tu_fifo_advance_read_pointer, pipe_write_packet},
   };
   tu_fifo_buffer_info_t info;
   ops[dir].tu_fifo_get_info(f, &info);
@@ -152,19 +147,18 @@ static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigne
   ops[dir].tu_fifo_advance(f, total_len - rem);
 }
 
-static void process_setup_packet(uint8_t rhport)
-{
-  uint32_t *p = (void*)&_dcd.setup_packet;
-  p[0]        = MXC_USBHS->fifo0;
-  p[1]        = MXC_USBHS->fifo0;
+static void process_setup_packet(uint8_t rhport) {
+  uint32_t *p = (void *) &_dcd.setup_packet;
+  p[0] = MXC_USBHS->fifo0;
+  p[1] = MXC_USBHS->fifo0;
 
-  _dcd.pipe0.buf       = NULL;
-  _dcd.pipe0.length    = 0;
+  _dcd.pipe0.buf = NULL;
+  _dcd.pipe0.length = 0;
   _dcd.pipe0.remaining = 0;
-  dcd_event_setup_received(rhport, (const uint8_t*)(uintptr_t)&_dcd.setup_packet, true);
+  dcd_event_setup_received(rhport, (const uint8_t *) (uintptr_t) &_dcd.setup_packet, true);
 
-  const unsigned len    = _dcd.setup_packet.wLength;
-  _dcd.remaining_ctrl   = len;
+  const unsigned len = _dcd.setup_packet.wLength;
+  _dcd.remaining_ctrl = len;
   const unsigned dir_in = tu_edpt_dir(_dcd.setup_packet.bmRequestType);
   /* Clear RX FIFO and reverse the transaction direction */
   if (len && dir_in) {
@@ -173,12 +167,11 @@ static void process_setup_packet(uint8_t rhport)
   }
 }
 
-static bool handle_xfer_in(uint_fast8_t ep_addr)
-{
+static bool handle_xfer_in(uint_fast8_t ep_addr) {
   unsigned epnum = tu_edpt_number(ep_addr);
   unsigned epnum_minus1 = epnum - 1;
-  pipe_state_t  *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
-  const unsigned rem  = pipe->remaining;
+  pipe_state_t *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
+  const unsigned rem = pipe->remaining;
 
   //This function should not be for ep0
   TU_ASSERT(epnum);
@@ -191,28 +184,26 @@ static bool handle_xfer_in(uint_fast8_t ep_addr)
   MXC_USBHS->index = epnum;
   const unsigned mps = MXC_USBHS->inmaxp;
   const unsigned len = TU_MIN(mps, rem);
-  void          *buf = pipe->buf;
-  volatile void* fifo_ptr = edpt_get_fifo_ptr(epnum);
-  // TU_LOG1("   %p mps %d len %d rem %d\r\n", buf, mps, len, rem);
+  void *buf = pipe->buf;
+  volatile void *fifo_ptr = edpt_get_fifo_ptr(epnum);
   if (len) {
     if (_dcd.pipe_buf_is_fifo[TUSB_DIR_IN] & TU_BIT(epnum_minus1)) {
       pipe_read_write_packet_ff(buf, fifo_ptr, len, TUSB_DIR_IN);
     } else {
-      pipe_write_packet(buf,fifo_ptr, len);
-      pipe->buf       = buf + len;
+      pipe_write_packet(buf, fifo_ptr, len);
+      pipe->buf = buf + len;
     }
     pipe->remaining = rem - len;
   }
-  MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_INPKTRDY; //TODO: Verify a | isnt needed
+  MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_INPKTRDY;//TODO: Verify a | isnt needed
 
   return false;
 }
 
-static bool handle_xfer_out(uint_fast8_t ep_addr)
-{
+static bool handle_xfer_out(uint_fast8_t ep_addr) {
   unsigned epnum = tu_edpt_number(ep_addr);
   unsigned epnum_minus1 = epnum - 1;
-  pipe_state_t  *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
+  pipe_state_t *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
 
   //This function should not be for ep0
   TU_ASSERT(epnum);
@@ -225,14 +216,14 @@ static bool handle_xfer_out(uint_fast8_t ep_addr)
   const unsigned rem = pipe->remaining;
   const unsigned vld = MXC_USBHS->outcount;
   const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
-  void          *buf = pipe->buf;
-  volatile void* fifo_ptr = edpt_get_fifo_ptr(epnum);
+  void *buf = pipe->buf;
+  volatile void *fifo_ptr = edpt_get_fifo_ptr(epnum);
   if (len) {
     if (_dcd.pipe_buf_is_fifo[TUSB_DIR_OUT] & TU_BIT(epnum_minus1)) {
-      pipe_read_write_packet_ff(buf,fifo_ptr, len, TUSB_DIR_OUT);
+      pipe_read_write_packet_ff(buf, fifo_ptr, len, TUSB_DIR_OUT);
     } else {
       pipe_read_packet(buf, fifo_ptr, len);
-      pipe->buf       = buf + len;
+      pipe->buf = buf + len;
     }
     pipe->remaining = rem - len;
   }
@@ -240,37 +231,35 @@ static bool handle_xfer_out(uint_fast8_t ep_addr)
     pipe->buf = NULL;
     return NULL != buf;
   }
-  MXC_USBHS->outcsrl = 0; /* Clear RXRDY bit */ //TODO: Verify just setting to 0 is ok
+  MXC_USBHS->outcsrl = 0; /* Clear RXRDY bit *///TODO: Verify just setting to 0 is ok
   return false;
 }
 
-static bool edpt_n_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
-{
-  (void)rhport;
+static bool edpt_n_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes) {
+  (void) rhport;
 
-  unsigned epnum        = tu_edpt_number(ep_addr);
+  unsigned epnum = tu_edpt_number(ep_addr);
   unsigned epnum_minus1 = epnum - 1;
-  unsigned dir_in       = tu_edpt_dir(ep_addr);
+  unsigned dir_in = tu_edpt_dir(ep_addr);
 
   pipe_state_t *pipe = &_dcd.pipe[dir_in][epnum_minus1];
-  pipe->buf          = buffer;
-  pipe->length       = total_bytes;
-  pipe->remaining    = total_bytes;
+  pipe->buf = buffer;
+  pipe->length = total_bytes;
+  pipe->remaining = total_bytes;
 
   if (dir_in) {
     handle_xfer_in(ep_addr);
   } else {
     MXC_USBHS->index = epnum;
-    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY){
-      MXC_USBHS->outcsrl = 0; //TODO: Verify just setting to 0 is ok
+    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
+      MXC_USBHS->outcsrl = 0;//TODO: Verify just setting to 0 is ok
     }
   }
   return true;
 }
 
-static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
-{
-  (void)rhport;
+static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes) {
+  (void) rhport;
   TU_ASSERT(total_bytes <= 64); /* Current implementation supports for only up to 64 bytes. */
 
   const unsigned req = _dcd.setup_packet.bmRequestType;
@@ -299,15 +288,15 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
     TU_ASSERT(total_bytes <= _dcd.remaining_ctrl);
     const unsigned rem = _dcd.remaining_ctrl;
     const unsigned len = TU_MIN(TU_MIN(rem, 64), total_bytes);
-    volatile void* fifo_ptr = edpt_get_fifo_ptr(0);
+    volatile void *fifo_ptr = edpt_get_fifo_ptr(0);
     if (dir_in) {
       pipe_write_packet(buffer, fifo_ptr, len);
 
-      _dcd.pipe0.buf       = buffer + len;
-      _dcd.pipe0.length    = len;
+      _dcd.pipe0.buf = buffer + len;
+      _dcd.pipe0.length = len;
       _dcd.pipe0.remaining = 0;
 
-      _dcd.remaining_ctrl  = rem - len;
+      _dcd.remaining_ctrl = rem - len;
       if ((len < 64) || (rem == len)) {
         _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID; /* Change to STATUS/SETUP stage */
         _dcd.status_out = 1;
@@ -317,14 +306,14 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
         MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_INPKTRDY; /* Flush TX FIFO to return ACK. */
       }
     } else {
-      _dcd.pipe0.buf       = buffer;
-      _dcd.pipe0.length    = len;
+      _dcd.pipe0.buf = buffer;
+      _dcd.pipe0.length = len;
       _dcd.pipe0.remaining = len;
       MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_SERV_OUTPKTRDY; /* Clear RX FIFO to return ACK. */
     }
   } else if (dir_in) {
     _dcd.pipe0.buf = NULL;
-    _dcd.pipe0.length    = 0;
+    _dcd.pipe0.length = 0;
     _dcd.pipe0.remaining = 0;
     /* Clear RX FIFO and reverse the transaction direction */
     MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_SERV_OUTPKTRDY | MXC_F_USBHS_CSR0_DATA_END;
@@ -332,8 +321,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
   return true;
 }
 
-static void process_ep0(uint8_t rhport)
-{
+static void process_ep0(uint8_t rhport) {
   MXC_USBHS->index = 0;
   uint_fast8_t csrl = MXC_USBHS->csr0;
 
@@ -364,7 +352,7 @@ static void process_ep0(uint8_t rhport)
     /* Received SETUP or DATA OUT packet */
     if (req == REQUEST_TYPE_INVALID) {
       /* SETUP */
-      TU_ASSERT(sizeof(tusb_control_request_t) == MXC_USBHS->count0,);
+      TU_ASSERT(sizeof(tusb_control_request_t) == MXC_USBHS->count0, );
       process_setup_packet(rhport);
       return;
     }
@@ -373,7 +361,7 @@ static void process_ep0(uint8_t rhport)
       const unsigned vld = MXC_USBHS->count0;
       const unsigned rem = _dcd.pipe0.remaining;
       const unsigned len = TU_MIN(TU_MIN(rem, 64), vld);
-      volatile void* fifo_ptr = edpt_get_fifo_ptr(0);
+      volatile void *fifo_ptr = edpt_get_fifo_ptr(0);
       pipe_read_packet(_dcd.pipe0.buf, fifo_ptr, len);
 
       _dcd.pipe0.remaining = rem - len;
@@ -392,9 +380,9 @@ static void process_ep0(uint8_t rhport)
    * or receiving a zero length packet. */
   if (req != REQUEST_TYPE_INVALID && !tu_edpt_dir(req)) {
     /* STATUS IN */
-    if (*(const uint16_t*)(uintptr_t)&_dcd.setup_packet == 0x0500) {
+    if (*(const uint16_t *) (uintptr_t) &_dcd.setup_packet == 0x0500) {
       /* The address must be changed on completion of the control transfer. */
-      MXC_USBHS->faddr = (uint8_t)_dcd.setup_packet.wValue;
+      MXC_USBHS->faddr = (uint8_t) _dcd.setup_packet.wValue;
     }
     _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
     dcd_event_xfer_complete(rhport,
@@ -413,11 +401,10 @@ static void process_ep0(uint8_t rhport)
   }
 }
 
-static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
-{
+static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr) {
   bool completed;
-  const unsigned dir_in     = tu_edpt_dir(ep_addr);
-  const unsigned epnum      = tu_edpt_number(ep_addr);
+  const unsigned dir_in = tu_edpt_dir(ep_addr);
+  const unsigned epnum = tu_edpt_number(ep_addr);
 
   MXC_USBHS->index = epnum;
 
@@ -443,10 +430,8 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
   }
 }
 
-static void process_bus_reset(uint8_t rhport)
-{
-  (void)rhport;
-  TU_LOG0("------Bus Reset\r\n");
+static void process_bus_reset(uint8_t rhport) {
+  (void) rhport;
   /* When bmRequestType is REQUEST_TYPE_INVALID(0xFF),
    * a control transfer state is SETUP or STATUS stage. */
   _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
@@ -462,14 +447,14 @@ static void process_bus_reset(uint8_t rhport)
   for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
     MXC_USBHS->index = i;
     if (MXC_USBHS->incsrl & MXC_F_USBHS_INCSRL_INPKTRDY) {
-          /* Per musbhsfc_pg, only flush FIFO if IN packet loaded */
-          MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_FLUSHFIFO;
-      }
+      /* Per musbhsfc_pg, only flush FIFO if IN packet loaded */
+      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_FLUSHFIFO;
+    }
 
-      if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
-          /* Per musbhsfc_pg, only flush FIFO if OUT packet is ready */
-          MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_FLUSHFIFO;
-      }
+    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
+      /* Per musbhsfc_pg, only flush FIFO if OUT packet is ready */
+      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_FLUSHFIFO;
+    }
   }
   dcd_event_bus_reset(0, (MXC_USBHS->power & MXC_F_USBHS_POWER_HS_MODE) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL, true);
 }
@@ -478,9 +463,8 @@ static void process_bus_reset(uint8_t rhport)
  * Device API
  *------------------------------------------------------------------*/
 
-void dcd_init(uint8_t rhport)
-{
-  (void)rhport;
+void dcd_init(uint8_t rhport) {
+  (void) rhport;
   MXC_USBHS->intrusben |= MXC_F_USBHS_INTRUSBEN_SUSPEND_INT_EN;
 
   //Interrupt for VBUS disconnect
@@ -495,17 +479,17 @@ void dcd_init(uint8_t rhport)
   /* Configure PHY */
   MXC_USBHS->m31_phy_xcfgi_31_0 = (0x1 << 3) | (0x1 << 11);
   MXC_USBHS->m31_phy_xcfgi_63_32 = 0;
-  MXC_USBHS->m31_phy_xcfgi_95_64 = 0x1 << (72-64);
+  MXC_USBHS->m31_phy_xcfgi_95_64 = 0x1 << (72 - 64);
   MXC_USBHS->m31_phy_xcfgi_127_96 = 0;
 
 
-#ifdef USBHS_M31_CLOCK_RECOVERY
+  #ifdef USBHS_M31_CLOCK_RECOVERY
   MXC_USBHS->m31_phy_noncry_rstb = 1;
   MXC_USBHS->m31_phy_noncry_en = 1;
   MXC_USBHS->m31_phy_outclksel = 0;
   MXC_USBHS->m31_phy_coreclkin = 0;
   MXC_USBHS->m31_phy_xtlsel = 2; /* Select 25 MHz clock */
-#else
+  #else
   /* Use this option to feed the PHY a 30 MHz clock, which is them used as a PLL reference */
   /* As it depends on the system core clock, this should probably be done at the SYS level */
   MXC_USBHS->m31_phy_noncry_rstb = 0;
@@ -513,7 +497,7 @@ void dcd_init(uint8_t rhport)
   MXC_USBHS->m31_phy_outclksel = 1;
   MXC_USBHS->m31_phy_coreclkin = 1;
   MXC_USBHS->m31_phy_xtlsel = 3; /* Select 30 MHz clock */
-#endif
+  #endif
   MXC_USBHS->m31_phy_pll_en = 1;
   MXC_USBHS->m31_phy_oscouten = 1;
 
@@ -524,25 +508,22 @@ void dcd_init(uint8_t rhport)
   dcd_connect(rhport);
 }
 
-void dcd_int_enable(uint8_t rhport)
-{
-  (void)rhport;
+void dcd_int_enable(uint8_t rhport) {
+  (void) rhport;
   NVIC_EnableIRQ(USB_IRQn);
 }
 
-void dcd_int_disable(uint8_t rhport)
-{
-  (void)rhport;
+void dcd_int_disable(uint8_t rhport) {
+  (void) rhport;
   NVIC_DisableIRQ(USB_IRQn);
 }
 
 // Receive Set Address request, mcu port must also include status IN response
-void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
-{
-  (void)rhport;
-  (void)dev_addr;
-  _dcd.pipe0.buf       = NULL;
-  _dcd.pipe0.length    = 0;
+void dcd_set_address(uint8_t rhport, uint8_t dev_addr) {
+  (void) rhport;
+  (void) dev_addr;
+  _dcd.pipe0.buf = NULL;
+  _dcd.pipe0.length = 0;
   _dcd.pipe0.remaining = 0;
   /* Clear RX FIFO to return ACK. */
   MXC_USBHS->index = 0;
@@ -550,37 +531,33 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
 }
 
 // Wake up host
-void dcd_remote_wakeup(uint8_t rhport)
-{
-  (void)rhport;
+void dcd_remote_wakeup(uint8_t rhport) {
+  (void) rhport;
   MXC_USBHS->power |= MXC_F_USBHS_POWER_RESUME;
 
-#if CFG_TUSB_OS != OPT_OS_NONE
+  #if CFG_TUSB_OS != OPT_OS_NONE
   osal_task_delay(10);
-#else
+  #else
   MXC_Delay(MXC_DELAY_MSEC(10));
-#endif
+  #endif
 
   MXC_USBHS->power &= ~MXC_F_USBHS_POWER_RESUME;
 }
 
 // Connect by enabling internal pull-up resistor on D+/D-
-void dcd_connect(uint8_t rhport)
-{
-  (void)rhport;
+void dcd_connect(uint8_t rhport) {
+  (void) rhport;
   MXC_USBHS->power |= TUD_OPT_HIGH_SPEED ? MXC_F_USBHS_POWER_HS_ENABLE : 0;
   MXC_USBHS->power |= MXC_F_USBHS_POWER_SOFTCONN;
 }
 
 // Disconnect by disabling internal pull-up resistor on D+/D-
-void dcd_disconnect(uint8_t rhport)
-{
-  (void)rhport;
+void dcd_disconnect(uint8_t rhport) {
+  (void) rhport;
   MXC_USBHS->power &= ~MXC_F_USBHS_POWER_SOFTCONN;
 }
 
-void dcd_sof_enable(uint8_t rhport, bool en)
-{
+void dcd_sof_enable(uint8_t rhport, bool en) {
   (void) rhport;
   (void) en;
 
@@ -592,21 +569,20 @@ void dcd_sof_enable(uint8_t rhport, bool en)
 //--------------------------------------------------------------------+
 
 // Configure endpoint's registers according to descriptor
-bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
-{
+bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc) {
   (void) rhport;
 
   const unsigned ep_addr = ep_desc->bEndpointAddress;
-  const unsigned epn     = tu_edpt_number(ep_addr);
-  const unsigned dir_in  = tu_edpt_dir(ep_addr);
-  const unsigned xfer    = ep_desc->bmAttributes.xfer;
-  const unsigned mps     = tu_edpt_packet_size(ep_desc);
+  const unsigned epn = tu_edpt_number(ep_addr);
+  const unsigned dir_in = tu_edpt_dir(ep_addr);
+  const unsigned xfer = ep_desc->bmAttributes.xfer;
+  const unsigned mps = tu_edpt_packet_size(ep_desc);
 
   TU_ASSERT(epn < TUP_DCD_ENDPOINT_MAX);
 
   pipe_state_t *pipe = &_dcd.pipe[dir_in][epn - 1];
-  pipe->buf       = NULL;
-  pipe->length    = 0;
+  pipe->buf = NULL;
+  pipe->length = 0;
   pipe->remaining = 0;
 
   MXC_USBHS->index = epn;
@@ -634,8 +610,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   return true;
 }
 
-void dcd_edpt_close_all(uint8_t rhport)
-{
+void dcd_edpt_close_all(uint8_t rhport) {
   (void) rhport;
 
   MXC_SYS_Crit_Enter();
@@ -665,10 +640,9 @@ void dcd_edpt_close_all(uint8_t rhport)
   MXC_SYS_Crit_Exit();
 }
 
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
-{
-  (void)rhport;
-  unsigned const epn    = tu_edpt_number(ep_addr);
+void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
+  (void) rhport;
+  unsigned const epn = tu_edpt_number(ep_addr);
   unsigned const dir_in = tu_edpt_dir(ep_addr);
 
   MXC_SYS_Crit_Enter();
@@ -683,7 +657,7 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
       MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG;
     }
   } else {
-    MXC_USBHS->introuten  &= ~TU_BIT(epn);
+    MXC_USBHS->introuten &= ~TU_BIT(epn);
     MXC_USBHS->outmaxp = 0;
     MXC_USBHS->outcsru = MXC_F_USBHS_OUTCSRU_DPKTBUFDIS;
     if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
@@ -696,9 +670,8 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
 }
 
 // Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack
-bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
-{
-  (void)rhport;
+bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes) {
+  (void) rhport;
   bool ret;
   unsigned const epnum = tu_edpt_number(ep_addr);
   MXC_SYS_Crit_Enter();
@@ -712,23 +685,21 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
 }
 
 // Submit a transfer where is managed by FIFO, When complete dcd_event_xfer_complete() is invoked to notify the stack - optional, however, must be listed in usbd.c
-bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
-{
-  (void)rhport;
+bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t *ff, uint16_t total_bytes) {
+  (void) rhport;
   bool ret;
   unsigned const epnum = tu_edpt_number(ep_addr);
   TU_ASSERT(epnum);
   MXC_SYS_Crit_Enter();
   _dcd.pipe_buf_is_fifo[tu_edpt_dir(ep_addr)] |= TU_BIT(epnum - 1);
-  ret = edpt_n_xfer(rhport, ep_addr, (uint8_t*)ff, total_bytes);
+  ret = edpt_n_xfer(rhport, ep_addr, (uint8_t *) ff, total_bytes);
   MXC_SYS_Crit_Exit();
   return ret;
 }
 
 // Stall endpoint
-void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
-{
-  (void)rhport;
+void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
+  (void) rhport;
   unsigned const epn = tu_edpt_number(ep_addr);
   MXC_SYS_Crit_Enter();
   MXC_USBHS->index = epn;
@@ -742,7 +713,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
     if (tu_edpt_dir(ep_addr)) { /* IN */
       MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_SENDSTALL;
     } else { /* OUT */
-      TU_ASSERT(!(MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY),);
+      TU_ASSERT(!(MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY), );
       MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_SENDSTALL;
     }
   }
@@ -750,9 +721,8 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
 }
 
 // clear stall, data toggle is also reset to DATA0
-void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
-{
-  (void)rhport;
+void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
+  (void) rhport;
   unsigned const epn = tu_edpt_number(ep_addr);
   MXC_SYS_Crit_Enter();
   MXC_USBHS->index = epn;
@@ -779,8 +749,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 /*-------------------------------------------------------------------
  * ISR
  *-------------------------------------------------------------------*/
-void dcd_int_handler(uint8_t rhport)
-{
+void dcd_int_handler(uint8_t rhport) {
   uint_fast8_t is, txis, rxis;
   uint32_t mxm_int, mxm_int_en, mxm_is;
   uint32_t saved_index;
@@ -788,7 +757,7 @@ void dcd_int_handler(uint8_t rhport)
   /* Save current index register */
   saved_index = MXC_USBHS->index;
 
-  is   = MXC_USBHS->intrusb; /* read and clear interrupt status */
+  is = MXC_USBHS->intrusb;   /* read and clear interrupt status */
   txis = MXC_USBHS->intrin;  /* read and clear interrupt status */
   rxis = MXC_USBHS->introut; /* read and clear interrupt status */
 

From 2353c4ffbaa50072d89008df7a06a7732c824018 Mon Sep 17 00:00:00 2001
From: Brent Kowal <brent.kowal@analog.com>
Date: Mon, 1 Jul 2024 17:31:38 -0400
Subject: [PATCH 031/204] Add MAX78002 Support

 -Added support for MAX78002, MAX78002EVKIT
 -Added provisions for remaining MAX32 USB parts
---
 examples/device/cdc_msc/src/usb_descriptors.c |   3 +-
 .../cdc_msc_freertos/src/usb_descriptors.c    |   3 +-
 .../device/cdc_uac2/src/usb_descriptors.c     |   3 +-
 .../src/usb_descriptors.c                     |   3 +-
 .../device/midi_test/src/usb_descriptors.c    |   3 +-
 .../device/msc_dual_lun/src/usb_descriptors.c |   3 +-
 .../net_lwip_webserver/src/tusb_config.h      |   2 +-
 .../net_lwip_webserver/src/usb_descriptors.c  |   3 +-
 .../device/uac2_headset/src/usb_descriptors.c |   3 +-
 .../webusb_serial/src/usb_descriptors.c       |   3 +-
 hw/bsp/board_mcu.h                            |   9 +
 .../max78002/FreeRTOSConfig/FreeRTOSConfig.h  | 149 +++++++++++++++
 .../max78002/boards/max78002evkit/board.cmake |   1 +
 hw/bsp/max78002/boards/max78002evkit/board.h  |  58 ++++++
 hw/bsp/max78002/boards/max78002evkit/board.mk |   1 +
 hw/bsp/max78002/family.c                      | 158 +++++++++++++++
 hw/bsp/max78002/family.cmake                  | 152 +++++++++++++++
 hw/bsp/max78002/family.mk                     | 104 ++++++++++
 hw/bsp/max78002/max78002.ld                   | 180 ++++++++++++++++++
 src/common/tusb_mcu.h                         |   3 +-
 src/portable/analog/max32/dcd_max32.c         |   3 +-
 src/tusb_option.h                             |   3 +
 tools/get_deps.py                             |   2 +-
 23 files changed, 839 insertions(+), 13 deletions(-)
 create mode 100644 hw/bsp/max78002/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/max78002/boards/max78002evkit/board.cmake
 create mode 100644 hw/bsp/max78002/boards/max78002evkit/board.h
 create mode 100644 hw/bsp/max78002/boards/max78002evkit/board.mk
 create mode 100644 hw/bsp/max78002/family.c
 create mode 100644 hw/bsp/max78002/family.cmake
 create mode 100644 hw/bsp/max78002/family.mk
 create mode 100644 hw/bsp/max78002/max78002.ld

diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c
index 1ca614f4ec..fac7cce8f6 100644
--- a/examples/device/cdc_msc/src/usb_descriptors.c
+++ b/examples/device/cdc_msc/src/usb_descriptors.c
@@ -125,7 +125,8 @@ enum {
   #define EPNUM_MSC_OUT     0x04
   #define EPNUM_MSC_IN      0x85
 
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
+      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
   // MAX32 doesn't support a same endpoint number with different direction IN and OUT
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_NOTIF   0x81
diff --git a/examples/device/cdc_msc_freertos/src/usb_descriptors.c b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
index f563e80d32..917b73e10a 100644
--- a/examples/device/cdc_msc_freertos/src/usb_descriptors.c
+++ b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
@@ -106,7 +106,8 @@ enum
   #define EPNUM_MSC_OUT     0x04
   #define EPNUM_MSC_IN      0x85
 
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
+      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
   // MAX32 doesn't support a same endpoint number with different direction IN and OUT
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_NOTIF   0x81
diff --git a/examples/device/cdc_uac2/src/usb_descriptors.c b/examples/device/cdc_uac2/src/usb_descriptors.c
index 43e8cf3d7a..ab1a2ee839 100644
--- a/examples/device/cdc_uac2/src/usb_descriptors.c
+++ b/examples/device/cdc_uac2/src/usb_descriptors.c
@@ -117,7 +117,8 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_CDC_OUT     0x04
   #define EPNUM_CDC_IN      0x85
 
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
+      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
   // MAX32 doesn't support a same endpoint number with different direction IN and OUT
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_AUDIO_IN    0x01
diff --git a/examples/device/dynamic_configuration/src/usb_descriptors.c b/examples/device/dynamic_configuration/src/usb_descriptors.c
index eebdd4f698..20f2371559 100644
--- a/examples/device/dynamic_configuration/src/usb_descriptors.c
+++ b/examples/device/dynamic_configuration/src/usb_descriptors.c
@@ -158,7 +158,8 @@ enum
   #define EPNUM_1_MSC_OUT     0x01
   #define EPNUM_1_MSC_IN      0x82
 
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
+      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
   // FT9XX doesn't support a same endpoint number with different direction IN and OUT
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_0_CDC_NOTIF   0x81
diff --git a/examples/device/midi_test/src/usb_descriptors.c b/examples/device/midi_test/src/usb_descriptors.c
index 797b50ab23..41e6e18186 100644
--- a/examples/device/midi_test/src/usb_descriptors.c
+++ b/examples/device/midi_test/src/usb_descriptors.c
@@ -90,7 +90,8 @@ enum
   // On Bridgetek FT9xx endpoint numbers must be unique...
   #define EPNUM_MIDI_OUT   0x02
   #define EPNUM_MIDI_IN   0x03
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
+      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
   // On MAX32 endpoint numbers must be unique...
   #define EPNUM_MIDI_OUT   0x02
   #define EPNUM_MIDI_IN   0x03
diff --git a/examples/device/msc_dual_lun/src/usb_descriptors.c b/examples/device/msc_dual_lun/src/usb_descriptors.c
index e32466228f..c55bab0d89 100644
--- a/examples/device/msc_dual_lun/src/usb_descriptors.c
+++ b/examples/device/msc_dual_lun/src/usb_descriptors.c
@@ -97,7 +97,8 @@ enum
   #define EPNUM_MSC_OUT   0x01
   #define EPNUM_MSC_IN    0x82
 
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
+      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
   // MAX32 doesn't support a same endpoint number with different direction IN and OUT
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_MSC_OUT   0x01
diff --git a/examples/device/net_lwip_webserver/src/tusb_config.h b/examples/device/net_lwip_webserver/src/tusb_config.h
index 2f641f33e6..22082fc818 100644
--- a/examples/device/net_lwip_webserver/src/tusb_config.h
+++ b/examples/device/net_lwip_webserver/src/tusb_config.h
@@ -91,7 +91,7 @@ extern "C" {
   #define USE_ECM 1
 #elif TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F1)
   #define USE_ECM 1
-#elif TU_CHECK_MCU(OPT_MCU_MAX32690)
+#elif TU_CHECK_MCU(OPT_MCU_MAX32690, OPT_MCU_MAX32650, OPT_MCU_MAX32666, OPT_MCU_MAX78002)
   #define USE_ECM 1
 #else
   #define USE_ECM 0
diff --git a/examples/device/net_lwip_webserver/src/usb_descriptors.c b/examples/device/net_lwip_webserver/src/usb_descriptors.c
index ba30b869ed..012e1bcd84 100644
--- a/examples/device/net_lwip_webserver/src/usb_descriptors.c
+++ b/examples/device/net_lwip_webserver/src/usb_descriptors.c
@@ -120,7 +120,8 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_NET_OUT     0x02
   #define EPNUM_NET_IN      0x83
 
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
+      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
   // MAX32 doesn't support a same endpoint number with different direction IN and OUT
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_NET_NOTIF   0x81
diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c
index bfc8a4ab5e..a042ad206f 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.c
+++ b/examples/device/uac2_headset/src/usb_descriptors.c
@@ -104,7 +104,8 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_AUDIO_OUT   0x02
   #define EPNUM_AUDIO_INT   0x03
 
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
+      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
   // MAX32 doesn't support a same endpoint number with different direction IN and OUT
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_AUDIO_IN    0x01
diff --git a/examples/device/webusb_serial/src/usb_descriptors.c b/examples/device/webusb_serial/src/usb_descriptors.c
index bcfbe590e9..ae1051af61 100644
--- a/examples/device/webusb_serial/src/usb_descriptors.c
+++ b/examples/device/webusb_serial/src/usb_descriptors.c
@@ -105,7 +105,8 @@ enum
   #define EPNUM_CDC_OUT    3
   #define EPNUM_VENDOR_IN  4
   #define EPNUM_VENDOR_OUT 5
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
+      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
   // MAX32 doesn't support a same endpoint number with different direction IN and OUT
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_IN     2
diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h
index 436164c352..d3a33cf36d 100644
--- a/hw/bsp/board_mcu.h
+++ b/hw/bsp/board_mcu.h
@@ -173,6 +173,15 @@
 #elif CFG_TUSB_MCU == OPT_MCU_MAX32690
   #include "max32690.h"
 
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32650
+  #include "max32650.h"
+
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32666
+  #include "max32665.h"
+
+#elif CFG_TUSB_MCU == OPT_MCU_MAX78002
+  #include "max78002.h"
+
 #else
   #error "Missing MCU header"
 #endif
diff --git a/hw/bsp/max78002/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/max78002/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 0000000000..e5a76af85c
--- /dev/null
+++ b/hw/bsp/max78002/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,149 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "mxc_device.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       __NVIC_PRIO_BITS
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/max78002/boards/max78002evkit/board.cmake b/hw/bsp/max78002/boards/max78002evkit/board.cmake
new file mode 100644
index 0000000000..9dc6962eb9
--- /dev/null
+++ b/hw/bsp/max78002/boards/max78002evkit/board.cmake
@@ -0,0 +1 @@
+# Nothing to be done at the board level
diff --git a/hw/bsp/max78002/boards/max78002evkit/board.h b/hw/bsp/max78002/boards/max78002evkit/board.h
new file mode 100644
index 0000000000..f8102c3946
--- /dev/null
+++ b/hw/bsp/max78002/boards/max78002evkit/board.h
@@ -0,0 +1,58 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024, Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#include "gpio.h"
+#include "mxc_sys.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// LED
+#define LED_PORT        MXC_GPIO2
+#define LED_PIN         MXC_GPIO_PIN_4
+#define LED_VDDIO       MXC_GPIO_VSSEL_VDDIOH
+#define LED_STATE_ON    1
+
+// Button
+#define BUTTON_PORT         MXC_GPIO2
+#define BUTTON_PIN          MXC_GPIO_PIN_6
+#define BUTTON_PULL         MXC_GPIO_PAD_PULL_UP
+#define BUTTON_STATE_ACTIVE 0
+
+// UART Enable for EvKit's Integrated FTDI Adapter. Pin Mux handled by the HAL
+#define UART_NUM        0
+#define UART_PORT       MXC_GPIO0
+#define UART_VDDIO_BITS 0xF
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/max78002/boards/max78002evkit/board.mk b/hw/bsp/max78002/boards/max78002evkit/board.mk
new file mode 100644
index 0000000000..a813a5327b
--- /dev/null
+++ b/hw/bsp/max78002/boards/max78002evkit/board.mk
@@ -0,0 +1 @@
+# No specific build requirements for the board.
diff --git a/hw/bsp/max78002/family.c b/hw/bsp/max78002/family.c
new file mode 100644
index 0000000000..c105f056b7
--- /dev/null
+++ b/hw/bsp/max78002/family.c
@@ -0,0 +1,158 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "board.h"
+#include "bsp/board_api.h"
+#include "gpio.h"
+#include "mcr_regs.h"
+#include "mxc_device.h"
+#include "uart.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USB_IRQHandler(void) {
+  tud_int_handler(0);
+}
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM
+//--------------------------------------------------------------------+
+mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(UART_NUM);
+
+void board_init(void) {
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+  mxc_gpio_cfg_t gpioConfig;
+
+  // LED
+  gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
+  gpioConfig.func = MXC_GPIO_FUNC_OUT;
+  gpioConfig.mask = LED_PIN;
+  gpioConfig.pad = MXC_GPIO_PAD_NONE;
+  gpioConfig.port = LED_PORT;
+  gpioConfig.vssel = LED_VDDIO;
+  MXC_GPIO_Config(&gpioConfig);
+  board_led_write(false);
+
+  // Button
+  gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
+  gpioConfig.func = MXC_GPIO_FUNC_IN;
+  gpioConfig.mask = BUTTON_PIN;
+  gpioConfig.pad = BUTTON_PULL;
+  gpioConfig.port = BUTTON_PORT;
+  gpioConfig.vssel = MXC_GPIO_VSSEL_VDDIO;
+  MXC_GPIO_Config(&gpioConfig);
+
+  // UART
+  MXC_UART_Init(ConsoleUart, CFG_BOARD_UART_BAUDRATE, MXC_UART_IBRO_CLK);
+  UART_PORT->vssel |= UART_VDDIO_BITS; //Set necessary bits to 3.3V
+
+  //USB
+  MXC_MCR->ldoctrl |= MXC_F_MCR_LDOCTRL_0P9EN;
+  MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+#if LED_STATE_ON
+  state = !state;
+#endif
+  if (state) {
+    MXC_GPIO_OutClr(LED_PORT, LED_PIN);
+  } else {
+    MXC_GPIO_OutSet(LED_PORT, LED_PIN);
+  }
+}
+
+uint32_t board_button_read(void) {
+  uint32_t state = MXC_GPIO_InGet(BUTTON_PORT, BUTTON_PIN) ? 1 : 0;
+  return BUTTON_STATE_ACTIVE == state;
+}
+
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  uint8_t hw_id[MXC_SYS_USN_CHECKSUM_LEN];//USN Buffer
+                                          /* All other 2nd parameter is optional checkum buffer */
+  MXC_SYS_GetUSN(hw_id, NULL);
+
+  size_t act_len = TU_MIN(max_len, MXC_SYS_USN_LEN);
+  memcpy(id, hw_id, act_len);
+  return act_len;
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+  int uart_val;
+  int act_len = 0;
+
+  while (act_len < len) {
+    if ((uart_val = MXC_UART_ReadCharacterRaw(ConsoleUart)) == E_UNDERFLOW) {
+      break;
+    } else {
+      *buf++ = (uint8_t) uart_val;
+      act_len++;
+    }
+  }
+  return act_len;
+}
+
+int board_uart_write(void const *buf, int len) {
+  int act_len = 0;
+  const uint8_t *ch_ptr = (const uint8_t *) buf;
+  while (act_len < len) {
+    MXC_UART_WriteCharacter(ConsoleUart, *ch_ptr++);
+    act_len++;
+  }
+  return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+void SysTick_Handler(void) {
+  system_ticks++;
+}
+
+uint32_t board_millis(void) {
+  return system_ticks;
+}
+#endif
+
+void HardFault_Handler(void) {
+  __asm("BKPT #0\n");
+}
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void) {
+}
diff --git a/hw/bsp/max78002/family.cmake b/hw/bsp/max78002/family.cmake
new file mode 100644
index 0000000000..43b172b9f8
--- /dev/null
+++ b/hw/bsp/max78002/family.cmake
@@ -0,0 +1,152 @@
+include_guard()
+
+set(MAX32_PERIPH ${TOP}/hw/mcu/analog/max32/Libraries/PeriphDrivers)
+set(MAX32_CMSIS ${TOP}/hw/mcu/analog/max32/Libraries/CMSIS)
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# Get the linker file from current location (family)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max78002.ld)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+set(JLINK_DEVICE max78000)
+
+set(FAMILY_MCUS MAX78002 CACHE INTERNAL "")
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    TARGET=MAX78002
+    TARGET_REV=0x4131
+    MXC_ASSERT_ENABLE
+    MAX78002
+    IAR_PRAGMAS=0
+    CFG_TUSB_MCU=OPT_MCU_MAX78002
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    )
+endfunction()
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  # Startup & Linker script
+  set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX78002/Source/GCC/startup_max78002.S)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+  #set(STARTUP_FILE_IAR ?)
+
+  set(PERIPH_SRC ${MAX32_PERIPH}/Source)
+  add_library(${BOARD_TARGET} STATIC
+    ${MAX32_CMSIS}/Device/Maxim/MAX78002/Source/heap.c
+    ${MAX32_CMSIS}/Device/Maxim/MAX78002/Source/system_max78002.c
+    ${PERIPH_SRC}/SYS/mxc_assert.c
+    ${PERIPH_SRC}/SYS/mxc_delay.c
+    ${PERIPH_SRC}/SYS/mxc_lock.c
+    ${PERIPH_SRC}/SYS/nvic_table.c
+    ${PERIPH_SRC}/SYS/pins_ai87.c
+    ${PERIPH_SRC}/SYS/sys_ai87.c
+    ${PERIPH_SRC}/AES/aes_ai87.c
+    ${PERIPH_SRC}/AES/aes_revb.c
+    ${PERIPH_SRC}/FLC/flc_common.c
+    ${PERIPH_SRC}/FLC/flc_ai87.c
+    ${PERIPH_SRC}/FLC/flc_reva.c
+    ${PERIPH_SRC}/GPIO/gpio_common.c
+    ${PERIPH_SRC}/GPIO/gpio_ai87.c
+    ${PERIPH_SRC}/GPIO/gpio_reva.c
+    ${PERIPH_SRC}/ICC/icc_ai87.c
+    ${PERIPH_SRC}/ICC/icc_reva.c
+    ${PERIPH_SRC}/TRNG/trng_ai87.c
+    ${PERIPH_SRC}/TRNG/trng_revb.c
+    ${PERIPH_SRC}/UART/uart_common.c
+    ${PERIPH_SRC}/UART/uart_ai87.c
+    ${PERIPH_SRC}/UART/uart_revb.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMSIS_5}/CMSIS/Core/Include
+    ${MAX32_CMSIS}/Include
+    ${MAX32_CMSIS}/Device/Maxim/MAX78002/Include
+    ${MAX32_PERIPH}/Include/MAX78002
+    ${PERIPH_SRC}/SYS
+    ${PERIPH_SRC}/GPIO
+    ${PERIPH_SRC}/AES
+    ${PERIPH_SRC}/TRNG
+    ${PERIPH_SRC}/ICC
+    ${PERIPH_SRC}/FLC
+    ${PERIPH_SRC}/UART
+    )
+
+  target_compile_options(${TARGET} PRIVATE
+  -Wno-error=strict-prototypes
+  -Wno-error=redundant-decls
+  )
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_MAX78002 ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/analog/max32/dcd_max32.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+  target_compile_options(${TARGET}-tinyusb PRIVATE
+  -Wno-error=strict-prototypes
+  -Wno-error=redundant-decls
+  )
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_jlink(${TARGET})
+endfunction()
diff --git a/hw/bsp/max78002/family.mk b/hw/bsp/max78002/family.mk
new file mode 100644
index 0000000000..8259205965
--- /dev/null
+++ b/hw/bsp/max78002/family.mk
@@ -0,0 +1,104 @@
+DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/analog/max32
+
+# Important locations in the hw support for MCU
+MAX32_CMSIS = hw/mcu/analog/max32/Libraries/CMSIS
+MAX32_PERIPH = hw/mcu/analog/max32/Libraries/PeriphDrivers
+
+# Add any board specific make rules
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CPU_CORE ?= cortex-m4
+PORT ?= 0
+
+# GCC
+SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX78002/Source/GCC/startup_max78002.S
+LD_FILE = $(FAMILY_PATH)/max78002.ld
+
+# IAR
+#SRC_S_IAR +=
+
+# --------------
+# Compiler Flags
+# --------------
+# Flags for the MAX78002 SDK
+CFLAGS +=   -DTARGET=MAX78002 \
+			-DTARGET_REV=0x4131 \
+			-DMXC_ASSERT_ENABLE \
+			-DMAX78002 \
+			-DIAR_PRAGMAS=0
+
+# Flags for TUSB features
+CFLAGS += \
+  -DCFG_TUSB_MCU=OPT_MCU_MAX78002 \
+  -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+
+# mcu driver cause following warnings
+CFLAGS += 	-Wno-error=redundant-decls \
+			-Wno-error=strict-prototypes \
+			-Wno-error=unused-parameter \
+			-Wno-error=enum-conversion \
+			-Wno-error=sign-compare \
+			-Wno-error=cast-qual
+
+LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
+
+# For flash-jlink target
+JLINK_DEVICE = max78000
+
+# flash target using Jlik
+flash: flash-jlink
+
+# Optional flash option when running within an installed MSDK to use OpenOCD
+# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
+# If the MSDK is installed, flash-msdk can be run to utilize the the modified
+# openocd with the algorithms
+MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
+flash-msdk:
+	$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
+		-f interface/cmsis-dap.cfg -f target/max78002.cfg \
+		-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
+
+# -----------------
+# Sources & Include
+# -----------------
+PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
+SRC_C += \
+	src/portable/analog/max32/dcd_max32.c \
+	$(MAX32_CMSIS)/Device/Maxim/MAX78002/Source/heap.c \
+	$(MAX32_CMSIS)/Device/Maxim/MAX78002/Source/system_max78002.c \
+	$(PERIPH_SRC)/SYS/mxc_assert.c \
+	$(PERIPH_SRC)/SYS/mxc_delay.c \
+	$(PERIPH_SRC)/SYS/mxc_lock.c \
+	$(PERIPH_SRC)/SYS/nvic_table.c \
+	$(PERIPH_SRC)/SYS/pins_ai87.c \
+	$(PERIPH_SRC)/SYS/sys_ai87.c \
+	$(PERIPH_SRC)/AES/aes_ai87.c \
+	$(PERIPH_SRC)/AES/aes_revb.c \
+	$(PERIPH_SRC)/FLC/flc_common.c \
+	$(PERIPH_SRC)/FLC/flc_ai87.c \
+	$(PERIPH_SRC)/FLC/flc_reva.c \
+	$(PERIPH_SRC)/GPIO/gpio_common.c \
+	$(PERIPH_SRC)/GPIO/gpio_ai87.c \
+	$(PERIPH_SRC)/GPIO/gpio_reva.c \
+	$(PERIPH_SRC)/ICC/icc_ai87.c \
+	$(PERIPH_SRC)/ICC/icc_reva.c \
+	$(PERIPH_SRC)/TRNG/trng_ai87.c \
+	$(PERIPH_SRC)/TRNG/trng_revb.c \
+	$(PERIPH_SRC)/UART/uart_common.c \
+	$(PERIPH_SRC)/UART/uart_ai87.c \
+	$(PERIPH_SRC)/UART/uart_revb.c \
+
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+	$(TOP)/$(MAX32_CMSIS)/Include \
+	$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX78002/Include \
+	$(TOP)/$(MAX32_PERIPH)/Include/MAX78002 \
+	$(PERIPH_SRC)/SYS \
+	$(PERIPH_SRC)/GPIO \
+	$(PERIPH_SRC)/AES \
+	$(PERIPH_SRC)/ICC \
+	$(PERIPH_SRC)/FLC \
+	$(PERIPH_SRC)/TRNG \
+	$(PERIPH_SRC)/UART
diff --git a/hw/bsp/max78002/max78002.ld b/hw/bsp/max78002/max78002.ld
new file mode 100644
index 0000000000..5f9ed93564
--- /dev/null
+++ b/hw/bsp/max78002/max78002.ld
@@ -0,0 +1,180 @@
+MEMORY {
+    ROM (rx)   : ORIGIN = 0x00000000, LENGTH = 0x00010000 /* 64 kB ROM */
+    FLASH (rx) : ORIGIN = 0x10000000, LENGTH = 0x00280000 /* 2.5 MB Flash */
+    SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00060000 /* 384 kB SRAM */
+    /*CSI2 (rwx) : ORIGIN = 0x2001F000, LENGTH = 0x00001000 4096 B CSI2 Buffer */
+}
+
+SECTIONS {
+    .rom :
+    {
+        KEEP(*(.rom_vector))
+        *(.rom_handlers*)
+    } > ROM
+
+    .text :
+    {
+        _text = .;
+        KEEP(*(.isr_vector))
+        EXCLUDE_FILE (*riscv.o) *(.text*)    /* Program code (exclude RISCV code) */
+        *(.rodata*)  /* read-only data: "const" */
+
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+         /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        /* C++ Exception handling */
+        KEEP(*(.eh_frame*))
+        _etext = .;
+    } > FLASH
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    /* Binary import */
+    .bin_storage :
+    {
+       FILL(0xFF)
+      _bin_start_ = .;
+      KEEP(*(.bin_storage_img))
+      _bin_end_ = .;
+      . = ALIGN(4);
+    } > FLASH
+
+    .rom_code :
+    {
+        . = ALIGN(16);
+        _sran_code = .;
+        *(.rom_code_section)
+        _esran_code = .;
+    } > ROM
+
+    .flash_code :
+    {
+        . = ALIGN(16);
+        _sran_code = .;
+        *(.flash_code_section)
+        _esran_code = .;
+    } > FLASH
+
+    .sram_code :
+    {
+        . = ALIGN(16);
+        _sran_code = .;
+        *(.sram_code_section)
+        _esran_code = .;
+    } > SRAM
+
+    /* it's used for C++ exception handling      */
+    /* we need to keep this to avoid overlapping */
+    .ARM.exidx :
+    {
+        __exidx_start = .;
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+        __exidx_end = .;
+    } > FLASH
+
+    .data :
+    {
+        _data = ALIGN(., 4);
+        _csi = . + 0x20000;
+        *(vtable)
+        *(.data*)           /*read-write initialized data: initialized global variable*/
+
+
+        /* These array sections are used by __libc_init_array to call static C++ constructors */
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        _edata = ALIGN(., 4);
+
+    } > SRAM AT>FLASH
+    __load_data = LOADADDR(.data);
+
+    .bss :
+    {
+        . = ALIGN(4);
+        _bss = .;
+        *(.bss*)     /*read-write zero initialized data: uninitialzed global variable*/
+        *(COMMON)
+        _ebss = ALIGN(., 4);
+    } > SRAM
+
+    .shared :
+    {
+        . = ALIGN(4);
+        _shared = .;
+        *(.mailbox*)
+        . = ALIGN(4);
+        *(.shared*)     /*read-write zero initialized data: uninitialzed global variable*/
+        _eshared = ALIGN(., 4);
+    } > SRAM
+    __shared_data = LOADADDR(.shared);
+
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy (COPY):
+    {
+        *(.stack*)
+    } > SRAM
+
+    .heap (COPY):
+    {
+        . = ALIGN(4);
+        *(.heap*)
+        __HeapLimit = ABSOLUTE(__StackLimit);
+    } > SRAM
+
+    PROVIDE(__stack = __StackTop);
+
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= _ebss, "region RAM overflowed with stack")
+
+    /* Section used by RISCV loader projects.  See RISCV_LOAD documentation in the build system. */
+    .riscv_flash :
+    {
+        /* Align address to mod 256 with a small offset. This is required to match the flash page size.*/
+        . = ALIGN(256); /* ALIGN operatator is used here.  Note that (. & 0x1FFFFF00) was used in the past, but a strange bug was seen on Windows where the & did not behave as expected.*/
+        . += 0x100;
+        _riscv_boot = .;
+        KEEP(*riscv.o (.text*))
+    } > FLASH
+}
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index a68e160bd8..07cdf3ff0b 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -455,7 +455,8 @@
 //--------------------------------------------------------------------+
 // Analog Devices
 //--------------------------------------------------------------------+
-#elif TU_CHECK_MCU(OPT_MCU_MAX32690)
+#elif TU_CHECK_MCU(OPT_MCU_MAX32690, OPT_MCU_MAX32666, \
+                   OPT_MCU_MAX32650, OPT_MCU_MAX78002)
   #define TUP_DCD_ENDPOINT_MAX    12
   #define TUP_RHPORT_HIGHSPEED    1
 
diff --git a/src/portable/analog/max32/dcd_max32.c b/src/portable/analog/max32/dcd_max32.c
index b3370ddd17..7226003de7 100644
--- a/src/portable/analog/max32/dcd_max32.c
+++ b/src/portable/analog/max32/dcd_max32.c
@@ -27,7 +27,8 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUD_ENABLED && TU_CHECK_MCU(OPT_MCU_MAX32690)
+#if CFG_TUD_ENABLED && \
+    TU_CHECK_MCU(OPT_MCU_MAX32690, OPT_MCU_MAX32650, OPT_MCU_MAX32666, OPT_MCU_MAX78002)
 
   #if __GNUC__ > 8 && defined(__ARM_FEATURE_UNALIGNED)
 /* GCC warns that an address may be unaligned, even though
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 18f78b49c2..1290d605c6 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -190,6 +190,9 @@
 
 // Analog Devices
 #define OPT_MCU_MAX32690         2400  ///< ADI MAX32690
+#define OPT_MCU_MAX32666         2401  ///< ADI MAX32666/5
+#define OPT_MCU_MAX32650         2402  ///< ADI MAX32650/1/2
+#define OPT_MCU_MAX78002         2403  ///< ADI MAX78002
 
 // Check if configured MCU is one of listed
 // Apply _TU_CHECK_MCU with || as separator to list of input
diff --git a/tools/get_deps.py b/tools/get_deps.py
index e05cc4d76e..fe548f4ab9 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -26,7 +26,7 @@
                          'fc100s'],
     'hw/mcu/analog/max32' : ['https://github.com/analogdevicesinc/msdk.git',
                              'b20b398d3e5e2007594e54a74ba3d2a2e50ddd75',
-                             'max32690'],
+                             'max32690 max32650 max32666 max78002'],
     'hw/mcu/bridgetek/ft9xx/ft90x-sdk': ['https://github.com/BRTSG-FOSS/ft90x-sdk.git',
                                          '91060164afe239fcb394122e8bf9eb24d3194eb1',
                                          'brtmm90x'],

From 835a6ed62299ea29c04215d3a4547b74803661c6 Mon Sep 17 00:00:00 2001
From: Brent Kowal <brent.kowal@analog.com>
Date: Tue, 2 Jul 2024 11:54:23 -0400
Subject: [PATCH 032/204] Build System Updates

Updated MAX32690 and MAX78002 linker and cmake scripts to work with CMake + Ninja build system.  Verified all example projects build with the tools/build.py script for both board, and both make and cmake build systems.
---
 hw/bsp/max32690/family.cmake | 12 ++++++++----
 hw/bsp/max32690/max32690.ld  |  2 ++
 hw/bsp/max78002/family.cmake |  8 +++++++-
 hw/bsp/max78002/max78002.ld  |  2 ++
 4 files changed, 19 insertions(+), 5 deletions(-)

diff --git a/hw/bsp/max32690/family.cmake b/hw/bsp/max32690/family.cmake
index e1d797f587..8b117bae53 100644
--- a/hw/bsp/max32690/family.cmake
+++ b/hw/bsp/max32690/family.cmake
@@ -88,7 +88,7 @@ function(add_board_target BOARD_TARGET)
     ${PERIPH_SRC}/UART
     )
 
-  target_compile_options(${TARGET} PRIVATE
+  target_compile_options(${BOARD_TARGET} PRIVATE
   -Wno-error=strict-prototypes
   )
   update_board(${BOARD_TARGET})
@@ -139,10 +139,14 @@ function(family_configure_example TARGET RTOS)
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/analog/max32/dcd_max32.c
     )
-  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+  target_compile_options(${TARGET} PRIVATE
+    -Wno-error=strict-prototypes
+    )
+
+    target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
   target_compile_options(${TARGET}-tinyusb PRIVATE
-  -Wno-error=strict-prototypes
-  )
+    -Wno-error=strict-prototypes
+    )
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
diff --git a/hw/bsp/max32690/max32690.ld b/hw/bsp/max32690/max32690.ld
index 35886fe3a8..3d857b4e83 100644
--- a/hw/bsp/max32690/max32690.ld
+++ b/hw/bsp/max32690/max32690.ld
@@ -151,6 +151,8 @@ SECTIONS {
     .heap (COPY):
     {
         . = ALIGN(4);
+        PROVIDE ( end = . );
+        PROVIDE ( _end = . );
         *(.heap*)
         __HeapLimit = ABSOLUTE(__StackLimit);
     } > SRAM
diff --git a/hw/bsp/max78002/family.cmake b/hw/bsp/max78002/family.cmake
index 43b172b9f8..28eaaa7e94 100644
--- a/hw/bsp/max78002/family.cmake
+++ b/hw/bsp/max78002/family.cmake
@@ -86,7 +86,7 @@ function(add_board_target BOARD_TARGET)
     ${PERIPH_SRC}/UART
     )
 
-  target_compile_options(${TARGET} PRIVATE
+  target_compile_options(${BOARD_TARGET} PRIVATE
   -Wno-error=strict-prototypes
   -Wno-error=redundant-decls
   )
@@ -133,6 +133,12 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
+  target_compile_options(${TARGET} PRIVATE
+    -Wno-error=strict-prototypes
+    -Wno-error=redundant-decls
+    )
+
+
   # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_MAX78002 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
diff --git a/hw/bsp/max78002/max78002.ld b/hw/bsp/max78002/max78002.ld
index 5f9ed93564..60f99e28fd 100644
--- a/hw/bsp/max78002/max78002.ld
+++ b/hw/bsp/max78002/max78002.ld
@@ -159,6 +159,8 @@ SECTIONS {
     .heap (COPY):
     {
         . = ALIGN(4);
+        PROVIDE ( end = . );
+        PROVIDE ( _end = . );
         *(.heap*)
         __HeapLimit = ABSOLUTE(__StackLimit);
     } > SRAM

From 61beb6316d5a69b13c70fabaf71231da92394cc0 Mon Sep 17 00:00:00 2001
From: Brent Kowal <brent.kowal@analog.com>
Date: Tue, 2 Jul 2024 14:31:38 -0400
Subject: [PATCH 033/204] MAX32666 Support

Added support for the MAX32666, Boards MAX32666EvKit and MAX32666FTHR.
---
 .../max32666/FreeRTOSConfig/FreeRTOSConfig.h  | 149 ++++++++++++++++
 .../max32666/boards/max32666evkit/board.cmake |   1 +
 hw/bsp/max32666/boards/max32666evkit/board.h  |  57 +++++++
 hw/bsp/max32666/boards/max32666evkit/board.mk |   1 +
 .../max32666/boards/max32666fthr/board.cmake  |   1 +
 hw/bsp/max32666/boards/max32666fthr/board.h   |  57 +++++++
 hw/bsp/max32666/boards/max32666fthr/board.mk  |   1 +
 hw/bsp/max32666/family.c                      | 161 ++++++++++++++++++
 hw/bsp/max32666/family.cmake                  | 151 ++++++++++++++++
 hw/bsp/max32666/family.mk                     | 104 +++++++++++
 hw/bsp/max32666/max32666.ld                   | 135 +++++++++++++++
 11 files changed, 818 insertions(+)
 create mode 100644 hw/bsp/max32666/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/max32666/boards/max32666evkit/board.cmake
 create mode 100644 hw/bsp/max32666/boards/max32666evkit/board.h
 create mode 100644 hw/bsp/max32666/boards/max32666evkit/board.mk
 create mode 100644 hw/bsp/max32666/boards/max32666fthr/board.cmake
 create mode 100644 hw/bsp/max32666/boards/max32666fthr/board.h
 create mode 100644 hw/bsp/max32666/boards/max32666fthr/board.mk
 create mode 100644 hw/bsp/max32666/family.c
 create mode 100644 hw/bsp/max32666/family.cmake
 create mode 100644 hw/bsp/max32666/family.mk
 create mode 100644 hw/bsp/max32666/max32666.ld

diff --git a/hw/bsp/max32666/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/max32666/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 0000000000..e5a76af85c
--- /dev/null
+++ b/hw/bsp/max32666/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,149 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "mxc_device.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       __NVIC_PRIO_BITS
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/max32666/boards/max32666evkit/board.cmake b/hw/bsp/max32666/boards/max32666evkit/board.cmake
new file mode 100644
index 0000000000..9dc6962eb9
--- /dev/null
+++ b/hw/bsp/max32666/boards/max32666evkit/board.cmake
@@ -0,0 +1 @@
+# Nothing to be done at the board level
diff --git a/hw/bsp/max32666/boards/max32666evkit/board.h b/hw/bsp/max32666/boards/max32666evkit/board.h
new file mode 100644
index 0000000000..0ab1483b8c
--- /dev/null
+++ b/hw/bsp/max32666/boards/max32666evkit/board.h
@@ -0,0 +1,57 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024, Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#include "gpio.h"
+#include "mxc_sys.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// LED
+#define LED_PORT        MXC_GPIO1
+#define LED_PIN         MXC_GPIO_PIN_14
+#define LED_VDDIO       MXC_GPIO_VSSEL_VDDIOH
+#define LED_STATE_ON    0
+
+// Button
+#define BUTTON_PORT         MXC_GPIO1
+#define BUTTON_PIN          MXC_GPIO_PIN_6
+#define BUTTON_PULL         MXC_GPIO_PAD_PULL_UP
+#define BUTTON_STATE_ACTIVE 0
+
+// UART Enable for EvKit's Integrated FTDI Adapter. Pin Mux handled by the HAL
+#define UART_NUM    1
+#define UART_MAP    MAP_A
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/max32666/boards/max32666evkit/board.mk b/hw/bsp/max32666/boards/max32666evkit/board.mk
new file mode 100644
index 0000000000..a813a5327b
--- /dev/null
+++ b/hw/bsp/max32666/boards/max32666evkit/board.mk
@@ -0,0 +1 @@
+# No specific build requirements for the board.
diff --git a/hw/bsp/max32666/boards/max32666fthr/board.cmake b/hw/bsp/max32666/boards/max32666fthr/board.cmake
new file mode 100644
index 0000000000..9dc6962eb9
--- /dev/null
+++ b/hw/bsp/max32666/boards/max32666fthr/board.cmake
@@ -0,0 +1 @@
+# Nothing to be done at the board level
diff --git a/hw/bsp/max32666/boards/max32666fthr/board.h b/hw/bsp/max32666/boards/max32666fthr/board.h
new file mode 100644
index 0000000000..7e24266a1c
--- /dev/null
+++ b/hw/bsp/max32666/boards/max32666fthr/board.h
@@ -0,0 +1,57 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024, Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#include "gpio.h"
+#include "mxc_sys.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// LED
+#define LED_PORT        MXC_GPIO0
+#define LED_PIN         MXC_GPIO_PIN_29
+#define LED_VDDIO       MXC_GPIO_VSSEL_VDDIOH
+#define LED_STATE_ON    0
+
+// Button
+#define BUTTON_PORT         MXC_GPIO1
+#define BUTTON_PIN          MXC_GPIO_PIN_10
+#define BUTTON_PULL         MXC_GPIO_PAD_PULL_UP
+#define BUTTON_STATE_ACTIVE 0
+
+// UART Enable for EvKit's Integrated FTDI Adapter. Pin Mux handled by the HAL
+#define UART_NUM    1
+#define UART_MAP    MAP_B
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/max32666/boards/max32666fthr/board.mk b/hw/bsp/max32666/boards/max32666fthr/board.mk
new file mode 100644
index 0000000000..a813a5327b
--- /dev/null
+++ b/hw/bsp/max32666/boards/max32666fthr/board.mk
@@ -0,0 +1 @@
+# No specific build requirements for the board.
diff --git a/hw/bsp/max32666/family.c b/hw/bsp/max32666/family.c
new file mode 100644
index 0000000000..98e1248d7a
--- /dev/null
+++ b/hw/bsp/max32666/family.c
@@ -0,0 +1,161 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "board.h"
+#include "bsp/board_api.h"
+#include "gpio.h"
+#include "mcr_regs.h"
+#include "mxc_device.h"
+#include "uart.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USB_IRQHandler(void) {
+  tud_int_handler(0);
+}
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM
+//--------------------------------------------------------------------+
+mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(UART_NUM);
+
+void board_init(void) {
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+  mxc_gpio_cfg_t gpioConfig;
+
+  // LED
+  gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
+  gpioConfig.func = MXC_GPIO_FUNC_OUT;
+  gpioConfig.mask = LED_PIN;
+  gpioConfig.pad = MXC_GPIO_PAD_NONE;
+  gpioConfig.port = LED_PORT;
+  gpioConfig.vssel = LED_VDDIO;
+  MXC_GPIO_Config(&gpioConfig);
+  board_led_write(false);
+
+  // Button
+  gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
+  gpioConfig.func = MXC_GPIO_FUNC_IN;
+  gpioConfig.mask = BUTTON_PIN;
+  gpioConfig.pad = BUTTON_PULL;
+  gpioConfig.port = BUTTON_PORT;
+  gpioConfig.vssel = MXC_GPIO_VSSEL_VDDIO;
+  MXC_GPIO_Config(&gpioConfig);
+
+  // UART
+  MXC_UART_Init(ConsoleUart, CFG_BOARD_UART_BAUDRATE, UART_MAP);
+
+  //USB
+  // Startup the HIRC96M clock if it's not on already
+  if (!(MXC_GCR->clkcn & MXC_F_GCR_CLKCN_HIRC96M_EN)) {
+      MXC_GCR->clkcn |= MXC_F_GCR_CLKCN_HIRC96M_EN;
+  }
+
+  MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+#if LED_STATE_ON
+  state = !state;
+#endif
+  if (state) {
+    MXC_GPIO_OutClr(LED_PORT, LED_PIN);
+  } else {
+    MXC_GPIO_OutSet(LED_PORT, LED_PIN);
+  }
+}
+
+uint32_t board_button_read(void) {
+  uint32_t state = MXC_GPIO_InGet(BUTTON_PORT, BUTTON_PIN) ? 1 : 0;
+  return BUTTON_STATE_ACTIVE == state;
+}
+
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  uint8_t hw_id[MXC_SYS_USN_CHECKSUM_LEN];//USN Buffer
+                                          /* All other 2nd parameter is optional checkum buffer */
+  MXC_SYS_GetUSN(hw_id, NULL);
+
+  size_t act_len = TU_MIN(max_len, MXC_SYS_USN_LEN);
+  memcpy(id, hw_id, act_len);
+  return act_len;
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+  int uart_val;
+  int act_len = 0;
+
+  while (act_len < len) {
+    if ((uart_val = MXC_UART_ReadCharacterRaw(ConsoleUart)) == E_UNDERFLOW) {
+      break;
+    } else {
+      *buf++ = (uint8_t) uart_val;
+      act_len++;
+    }
+  }
+  return act_len;
+}
+
+int board_uart_write(void const *buf, int len) {
+  int act_len = 0;
+  const uint8_t *ch_ptr = (const uint8_t *) buf;
+  while (act_len < len) {
+    MXC_UART_WriteCharacter(ConsoleUart, *ch_ptr++);
+    act_len++;
+  }
+  return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+void SysTick_Handler(void) {
+  system_ticks++;
+}
+
+uint32_t board_millis(void) {
+  return system_ticks;
+}
+#endif
+
+void HardFault_Handler(void) {
+  __asm("BKPT #0\n");
+}
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void) {
+}
diff --git a/hw/bsp/max32666/family.cmake b/hw/bsp/max32666/family.cmake
new file mode 100644
index 0000000000..c9fa2510a9
--- /dev/null
+++ b/hw/bsp/max32666/family.cmake
@@ -0,0 +1,151 @@
+include_guard()
+
+set(MAX32_PERIPH ${TOP}/hw/mcu/analog/max32/Libraries/PeriphDrivers)
+set(MAX32_CMSIS ${TOP}/hw/mcu/analog/max32/Libraries/CMSIS)
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# Get the linker file from current location (family)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32666.ld)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+set(JLINK_DEVICE max32666)
+
+set(FAMILY_MCUS MAX32666 CACHE INTERNAL "")
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    TARGET=MAX32665
+    TARGET_REV=0x4131
+    MXC_ASSERT_ENABLE
+    MAX32665
+    IAR_PRAGMAS=0
+    CFG_TUSB_MCU=OPT_MCU_MAX32666
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    )
+endfunction()
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  # Startup & Linker script
+  set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX32665/Source/GCC/startup_max32665.S)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+  set(STARTUP_FILE_IAR ${MAX32_CMSIS}/Device/Maxim/MAX32665/Source/IAR/startup_max32665.S)
+
+  set(PERIPH_SRC ${MAX32_PERIPH}/Source)
+  add_library(${BOARD_TARGET} STATIC
+    ${MAX32_CMSIS}/Device/Maxim/MAX32665/Source/heap.c
+    ${MAX32_CMSIS}/Device/Maxim/MAX32665/Source/system_max32665.c
+    ${PERIPH_SRC}/SYS/mxc_assert.c
+    ${PERIPH_SRC}/SYS/mxc_delay.c
+    ${PERIPH_SRC}/SYS/mxc_lock.c
+    ${PERIPH_SRC}/SYS/nvic_table.c
+    ${PERIPH_SRC}/SYS/pins_me14.c
+    ${PERIPH_SRC}/SYS/sys_me14.c
+    ${PERIPH_SRC}/TPU/tpu_me14.c
+    ${PERIPH_SRC}/TPU/tpu_reva.c
+    ${PERIPH_SRC}/FLC/flc_common.c
+    ${PERIPH_SRC}/FLC/flc_me14.c
+    ${PERIPH_SRC}/FLC/flc_reva.c
+    ${PERIPH_SRC}/GPIO/gpio_common.c
+    ${PERIPH_SRC}/GPIO/gpio_me14.c
+    ${PERIPH_SRC}/GPIO/gpio_reva.c
+    ${PERIPH_SRC}/ICC/icc_me14.c
+    ${PERIPH_SRC}/ICC/icc_reva.c
+    ${PERIPH_SRC}/UART/uart_common.c
+    ${PERIPH_SRC}/UART/uart_me14.c
+    ${PERIPH_SRC}/UART/uart_reva.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMSIS_5}/CMSIS/Core/Include
+    ${MAX32_CMSIS}/Include
+    ${MAX32_CMSIS}/Device/Maxim/MAX32665/Include
+    ${MAX32_PERIPH}/Include/MAX32665
+    ${PERIPH_SRC}/SYS
+    ${PERIPH_SRC}/GPIO
+    ${PERIPH_SRC}/TPU
+    ${PERIPH_SRC}/ICC
+    ${PERIPH_SRC}/FLC
+    ${PERIPH_SRC}/UART
+    )
+
+  target_compile_options(${BOARD_TARGET} PRIVATE
+  -Wno-error=strict-prototypes
+  )
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_MAX32666 ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/analog/max32/dcd_max32.c
+    )
+  target_compile_options(${TARGET} PRIVATE
+    -Wno-error=strict-prototypes
+    )
+
+    target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+  target_compile_options(${TARGET}-tinyusb PRIVATE
+    -Wno-error=strict-prototypes
+    )
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_jlink(${TARGET})
+endfunction()
diff --git a/hw/bsp/max32666/family.mk b/hw/bsp/max32666/family.mk
new file mode 100644
index 0000000000..d35b6d5085
--- /dev/null
+++ b/hw/bsp/max32666/family.mk
@@ -0,0 +1,104 @@
+DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/analog/max32
+
+# Important locations in the hw support for MCU
+MAX32_CMSIS = hw/mcu/analog/max32/Libraries/CMSIS
+MAX32_PERIPH = hw/mcu/analog/max32/Libraries/PeriphDrivers
+
+# Add any board specific make rules
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CPU_CORE ?= cortex-m4
+PORT ?= 0
+
+# GCC
+SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32665/Source/GCC/startup_max32665.S
+LD_FILE = $(FAMILY_PATH)/max32666.ld
+
+# IAR
+#SRC_S_IAR += ?
+
+# --------------
+# Compiler Flags
+# --------------
+# Flags for the MAX32665/6 SDK
+CFLAGS +=   -DTARGET=MAX32665 \
+			-DTARGET_REV=0x4131 \
+			-DMXC_ASSERT_ENABLE \
+			-DMAX32665 \
+			-DIAR_PRAGMAS=0
+
+# Flags for TUSB features
+CFLAGS += \
+  -DCFG_TUSB_MCU=OPT_MCU_MAX32666 \
+  -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+
+# mcu driver cause following warnings
+CFLAGS += 	-Wno-error=strict-prototypes \
+			-Wno-error=unused-parameter \
+			-Wno-error=cast-align \
+			-Wno-error=cast-qual \
+#
+#			-Wno-error=old-style-declaration \
+#			-Wno-error=sign-compare \
+#			-Wno-error=cast-qual \
+#			-Wno-lto-type-mismatch
+
+LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
+
+# For flash-jlink target
+JLINK_DEVICE = max32666
+
+# flash target using Jlik
+flash: flash-jlink
+
+# Optional flash option when running within an installed MSDK to use OpenOCD
+# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
+# If the MSDK is installed, flash-msdk can be run to utilize the the modified
+# openocd with the algorithms
+MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
+flash-msdk:
+	$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
+		-f interface/cmsis-dap.cfg -f target/max32665.cfg \
+		-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
+
+# -----------------
+# Sources & Include
+# -----------------
+PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
+SRC_C += \
+	src/portable/analog/max32/dcd_max32.c \
+	$(MAX32_CMSIS)/Device/Maxim/MAX32665/Source/heap.c \
+	$(MAX32_CMSIS)/Device/Maxim/MAX32665/Source/system_max32665.c \
+	$(PERIPH_SRC)/SYS/mxc_assert.c \
+	$(PERIPH_SRC)/SYS/mxc_delay.c \
+	$(PERIPH_SRC)/SYS/mxc_lock.c \
+	$(PERIPH_SRC)/SYS/nvic_table.c \
+	$(PERIPH_SRC)/SYS/pins_me14.c \
+	$(PERIPH_SRC)/SYS/sys_me14.c \
+	$(PERIPH_SRC)/FLC/flc_common.c \
+	$(PERIPH_SRC)/FLC/flc_me14.c \
+	$(PERIPH_SRC)/FLC/flc_reva.c \
+	$(PERIPH_SRC)/GPIO/gpio_common.c \
+	$(PERIPH_SRC)/GPIO/gpio_me14.c \
+	$(PERIPH_SRC)/GPIO/gpio_reva.c \
+	$(PERIPH_SRC)/ICC/icc_me14.c \
+	$(PERIPH_SRC)/ICC/icc_reva.c \
+	$(PERIPH_SRC)/TPU/tpu_me14.c \
+    $(PERIPH_SRC)/TPU/tpu_reva.c \
+	$(PERIPH_SRC)/UART/uart_common.c \
+	$(PERIPH_SRC)/UART/uart_me14.c \
+	$(PERIPH_SRC)/UART/uart_reva.c \
+
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+	$(TOP)/$(MAX32_CMSIS)/Include \
+	$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX32665/Include \
+	$(TOP)/$(MAX32_PERIPH)/Include/MAX32665 \
+	$(PERIPH_SRC)/SYS \
+	$(PERIPH_SRC)/GPIO \
+	$(PERIPH_SRC)/ICC \
+	$(PERIPH_SRC)/FLC \
+	$(PERIPH_SRC)/TPU \
+	$(PERIPH_SRC)/UART
diff --git a/hw/bsp/max32666/max32666.ld b/hw/bsp/max32666/max32666.ld
new file mode 100644
index 0000000000..dcf61a3d08
--- /dev/null
+++ b/hw/bsp/max32666/max32666.ld
@@ -0,0 +1,135 @@
+/* SPID and SPIX Sections here are maximum possible sizes */
+/* If used, they should be adjusted for the external Flash/RAM size */
+MEMORY {
+
+    SPIX (rx)  : ORIGIN = 0x08000000,                           LENGTH = 0x08000000
+    FLASH (rx) : ORIGIN = 0x10000000,                           LENGTH = 0x00100000
+    SRAM (rwx)      : ORIGIN = 0x20000000,                      LENGTH = 0x0008C000
+    SPID (rw)       : ORIGIN = 0x80000000,                      LENGTH = 512M
+}
+
+/* Sections Definitions */
+SECTIONS {
+    .text :
+    {
+        _text = .;
+        KEEP(*(.isr_vector))
+        *(.text*)    /* program code */
+        *(.rodata*)  /* read-only data: "const" */
+
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+        /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        /* C++ Exception handling */
+        KEEP(*(.eh_frame*))
+        _etext = .;
+    } > FLASH
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    /* This section will keep the SPIX data until loaded into the external device */
+    /* Upon initialization of SPIX (user code needs to do this) */
+    .xip_section :
+    {
+        KEEP(*(.xip_section*))
+    } > SPIX AT>FLASH
+
+    __load_start_xip = LOADADDR(.xip_section);
+    __load_length_xip = SIZEOF(.xip_section);
+
+    /* it's used for C++ exception handling      */
+    /* we need to keep this to avoid overlapping */
+    .ARM.exidx :
+    {
+        __exidx_start = .;
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+        __exidx_end = .;
+    } > FLASH
+
+    .data :
+    {
+        _data = ALIGN(., 4);
+        *(vtable)
+        *(.data*)           /*read-write initialized data: initialized global variable*/
+        *(.spix_config*)    /* SPIX configuration functions need to be run from SRAM */
+        *(.flashprog*)      /* Flash program */
+
+
+        /* These array sections are used by __libc_init_array to call static C++ constructors */
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        _edata = ALIGN(., 4);
+    } > SRAM AT>FLASH
+    __load_data = LOADADDR(.data);
+
+    .bss :
+    {
+        . = ALIGN(4);
+        _bss = .;
+        *(.bss*)     /*read-write zero initialized data: uninitialzed global variable*/
+        *(COMMON)
+        _ebss = ALIGN(., 4);
+    } > SRAM
+
+    /* Setup the stack for Core 1, it will only be used if the user code
+     * includes a definition of Stack_Size_Core1, which defines the space
+     * reserved above the main core's stack for core 1's stack */
+
+    __StackTop_Core1 = ORIGIN(SRAM) + LENGTH(SRAM);
+    __StackLimit_Core1 = DEFINED(Stack_Size_Core1) ? __StackTop_Core1 - Stack_Size_Core1 : __StackTop_Core1;
+
+    /* Set stack top to end of RAM, and stack limit move down by Stack_Size.
+     * If core 1 is used, set the stack to the bottom of Core 1's stack region */
+
+    __StackTop = DEFINED(Stack_Size_Core1) ? __StackLimit_Core1 : ORIGIN(SRAM) + LENGTH(SRAM);
+    __StackLimit = __StackTop - Stack_Size;
+
+    .heap (COPY):
+    {
+        . = ALIGN(4);
+        PROVIDE ( end = . );
+        PROVIDE ( _end = . );
+        *(.heap*)
+        __HeapLimit = ABSOLUTE(__StackLimit);
+    } > SRAM
+
+    PROVIDE(__stack = __StackTop);
+
+    /* Check if data + heap + stack(s) exceeds RAM limit */
+    ASSERT(__StackLimit >= _ebss, "region RAM overflowed with stack")
+}

From 0c37f93bc850a881327714997ec1bfeaf69173ed Mon Sep 17 00:00:00 2001
From: Brent Kowal <brent.kowal@analog.com>
Date: Tue, 2 Jul 2024 18:02:11 -0400
Subject: [PATCH 034/204] MAX32650/1/2 Support

Added support for the MAX32650/1/2 series parts
 - MAX32650FTHR, MAX32650EvKit, MAX32651EvKit
 - Added special flash rule for MAX32651 due to signing required
 - Added depencies to flash-msdk rules for executable
---
 .../max32650/FreeRTOSConfig/FreeRTOSConfig.h  | 149 ++++++++++++++++
 .../max32650/boards/max32650evkit/board.cmake |   1 +
 hw/bsp/max32650/boards/max32650evkit/board.h  |  56 ++++++
 hw/bsp/max32650/boards/max32650evkit/board.mk |  17 ++
 .../max32650/boards/max32650evkit/max32650.ld | 119 +++++++++++++
 .../max32650/boards/max32650fthr/board.cmake  |   1 +
 hw/bsp/max32650/boards/max32650fthr/board.h   |  57 +++++++
 hw/bsp/max32650/boards/max32650fthr/board.mk  |  17 ++
 .../max32650/boards/max32650fthr/max32650.ld  | 119 +++++++++++++
 .../max32650/boards/max32651evkit/board.cmake |   1 +
 hw/bsp/max32650/boards/max32651evkit/board.h  |  56 ++++++
 hw/bsp/max32650/boards/max32651evkit/board.mk |  42 +++++
 .../max32650/boards/max32651evkit/max32651.ld | 132 +++++++++++++++
 hw/bsp/max32650/family.c                      | 160 ++++++++++++++++++
 hw/bsp/max32650/family.cmake                  | 152 +++++++++++++++++
 hw/bsp/max32650/family.mk                     |  85 ++++++++++
 hw/bsp/max32666/boards/max32666fthr/board.h   |   2 +-
 hw/bsp/max32666/family.mk                     |  10 +-
 hw/bsp/max32690/family.mk                     |   2 +-
 hw/bsp/max78002/family.mk                     |   2 +-
 20 files changed, 1169 insertions(+), 11 deletions(-)
 create mode 100644 hw/bsp/max32650/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/max32650/boards/max32650evkit/board.cmake
 create mode 100644 hw/bsp/max32650/boards/max32650evkit/board.h
 create mode 100644 hw/bsp/max32650/boards/max32650evkit/board.mk
 create mode 100644 hw/bsp/max32650/boards/max32650evkit/max32650.ld
 create mode 100644 hw/bsp/max32650/boards/max32650fthr/board.cmake
 create mode 100644 hw/bsp/max32650/boards/max32650fthr/board.h
 create mode 100644 hw/bsp/max32650/boards/max32650fthr/board.mk
 create mode 100644 hw/bsp/max32650/boards/max32650fthr/max32650.ld
 create mode 100644 hw/bsp/max32650/boards/max32651evkit/board.cmake
 create mode 100644 hw/bsp/max32650/boards/max32651evkit/board.h
 create mode 100644 hw/bsp/max32650/boards/max32651evkit/board.mk
 create mode 100644 hw/bsp/max32650/boards/max32651evkit/max32651.ld
 create mode 100644 hw/bsp/max32650/family.c
 create mode 100644 hw/bsp/max32650/family.cmake
 create mode 100644 hw/bsp/max32650/family.mk

diff --git a/hw/bsp/max32650/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/max32650/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 0000000000..e5a76af85c
--- /dev/null
+++ b/hw/bsp/max32650/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,149 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "mxc_device.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       __NVIC_PRIO_BITS
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/max32650/boards/max32650evkit/board.cmake b/hw/bsp/max32650/boards/max32650evkit/board.cmake
new file mode 100644
index 0000000000..e094b89e14
--- /dev/null
+++ b/hw/bsp/max32650/boards/max32650evkit/board.cmake
@@ -0,0 +1 @@
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32650.ld)
\ No newline at end of file
diff --git a/hw/bsp/max32650/boards/max32650evkit/board.h b/hw/bsp/max32650/boards/max32650evkit/board.h
new file mode 100644
index 0000000000..196abdaca7
--- /dev/null
+++ b/hw/bsp/max32650/boards/max32650evkit/board.h
@@ -0,0 +1,56 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024, Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#include "gpio.h"
+#include "mxc_sys.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// LED
+#define LED_PORT        MXC_GPIO2
+#define LED_PIN         MXC_GPIO_PIN_25
+#define LED_VDDIO       MXC_GPIO_VSSEL_VDDIOH
+#define LED_STATE_ON    0
+
+// Button
+#define BUTTON_PORT         MXC_GPIO2
+#define BUTTON_PIN          MXC_GPIO_PIN_28
+#define BUTTON_PULL         MXC_GPIO_PAD_WEAK_PULL_UP
+#define BUTTON_STATE_ACTIVE 0
+
+// UART Enable for EvKit's Integrated FTDI Adapter. Pin Mux handled by the HAL
+#define UART_NUM    0
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/max32650/boards/max32650evkit/board.mk b/hw/bsp/max32650/boards/max32650evkit/board.mk
new file mode 100644
index 0000000000..ad71255739
--- /dev/null
+++ b/hw/bsp/max32650/boards/max32650evkit/board.mk
@@ -0,0 +1,17 @@
+LD_FILE = $(BOARD_PATH)/max32650.ld
+
+# For flash-jlink target
+JLINK_DEVICE = max32650
+
+# flash target using Jlik
+flash: flash-jlink
+
+# Optional flash option when running within an installed MSDK to use OpenOCD
+# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
+# If the MSDK is installed, flash-msdk can be run to utilize the the modified
+# openocd with the algorithms
+MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
+flash-msdk: $(BUILD)/$(PROJECT).elf
+	$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
+		-f interface/cmsis-dap.cfg -f target/max32650.cfg \
+		-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
\ No newline at end of file
diff --git a/hw/bsp/max32650/boards/max32650evkit/max32650.ld b/hw/bsp/max32650/boards/max32650evkit/max32650.ld
new file mode 100644
index 0000000000..3a1e5100d6
--- /dev/null
+++ b/hw/bsp/max32650/boards/max32650evkit/max32650.ld
@@ -0,0 +1,119 @@
+MEMORY {
+    ROM (rx)   : ORIGIN = 0x00000000, LENGTH = 0x00010000 /* 64kB ROM */
+    FLASH (rx) : ORIGIN = 0x10000000, LENGTH = 0x00300000 /* 3MB flash */
+    SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00100000 /* 1MB SRAM */
+}
+
+SECTIONS {
+    .text :
+    {
+        _text = .;
+        KEEP(*(.isr_vector))
+        *(.text*)    /* program code */
+        *(.rodata*)  /* read-only data: "const" */
+
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+         /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        /* C++ Exception handling */
+        KEEP(*(.eh_frame*))
+        _etext = .;
+    } > FLASH
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    /* it's used for C++ exception handling      */
+    /* we need to keep this to avoid overlapping */
+    .ARM.exidx :
+    {
+        __exidx_start = .;
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+        __exidx_end = .;
+    } > FLASH
+
+    .data :
+    {
+        _data = ALIGN(., 4);
+        *(vtable)
+        *(.data*)           /*read-write initialized data: initialized global variable*/
+        *(.spix_config*)    /* SPIX configuration functions need to be run from SRAM */
+        *(.flashprog*)      /* Flash program */
+
+
+        /* These array sections are used by __libc_init_array to call static C++ constructors */
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        _edata = ALIGN(., 4);
+    } > SRAM AT>FLASH
+    __load_data = LOADADDR(.data);
+    .bss :
+    {
+        . = ALIGN(4);
+        _bss = .;
+        *(.bss*)     /*read-write zero initialized data: uninitialzed global variable*/
+        *(COMMON)
+        _ebss = ALIGN(., 4);
+    } > SRAM
+
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy (COPY):
+    {
+        *(.stack*)
+    } > SRAM
+
+    .heap (COPY):
+    {
+        . = ALIGN(4);
+        PROVIDE ( end = . );
+        PROVIDE ( _end = . );
+        *(.heap*)
+        __HeapLimit = ABSOLUTE(__StackLimit);
+    } > SRAM
+
+    PROVIDE(__stack = __StackTop);
+
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= _ebss, "region RAM overflowed with stack")
+}
diff --git a/hw/bsp/max32650/boards/max32650fthr/board.cmake b/hw/bsp/max32650/boards/max32650fthr/board.cmake
new file mode 100644
index 0000000000..a9ce39b4de
--- /dev/null
+++ b/hw/bsp/max32650/boards/max32650fthr/board.cmake
@@ -0,0 +1 @@
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32650.ld)
diff --git a/hw/bsp/max32650/boards/max32650fthr/board.h b/hw/bsp/max32650/boards/max32650fthr/board.h
new file mode 100644
index 0000000000..d80a8fcae4
--- /dev/null
+++ b/hw/bsp/max32650/boards/max32650fthr/board.h
@@ -0,0 +1,57 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024, Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#include "gpio.h"
+#include "mxc_sys.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// LED
+#define LED_PORT        MXC_GPIO1
+#define LED_PIN         MXC_GPIO_PIN_14
+#define LED_VDDIO       MXC_GPIO_VSSEL_VDDIO
+#define LED_STATE_ON    0
+
+// Button
+#define BUTTON_PORT         MXC_GPIO1
+#define BUTTON_PIN          MXC_GPIO_PIN_19
+#define BUTTON_PULL         MXC_GPIO_PAD_WEAK_PULL_UP
+#define BUTTON_STATE_ACTIVE 0
+
+// UART Enable for SWD UART Pins. Pin Mux handled by the HAL
+#define UART_NUM    0
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/max32650/boards/max32650fthr/board.mk b/hw/bsp/max32650/boards/max32650fthr/board.mk
new file mode 100644
index 0000000000..c6f018810d
--- /dev/null
+++ b/hw/bsp/max32650/boards/max32650fthr/board.mk
@@ -0,0 +1,17 @@
+LD_FILE = $(BOARD_PATH)/max32650.ld
+
+# For flash-jlink target
+JLINK_DEVICE = max32650
+
+# flash target using Jlik
+flash: flash-jlink
+
+# Optional flash option when running within an installed MSDK to use OpenOCD
+# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
+# If the MSDK is installed, flash-msdk can be run to utilize the the modified
+# openocd with the algorithms
+MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
+flash-msdk: $(BUILD)/$(PROJECT).elf
+	$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
+		-f interface/cmsis-dap.cfg -f target/max32650.cfg \
+		-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
diff --git a/hw/bsp/max32650/boards/max32650fthr/max32650.ld b/hw/bsp/max32650/boards/max32650fthr/max32650.ld
new file mode 100644
index 0000000000..3a1e5100d6
--- /dev/null
+++ b/hw/bsp/max32650/boards/max32650fthr/max32650.ld
@@ -0,0 +1,119 @@
+MEMORY {
+    ROM (rx)   : ORIGIN = 0x00000000, LENGTH = 0x00010000 /* 64kB ROM */
+    FLASH (rx) : ORIGIN = 0x10000000, LENGTH = 0x00300000 /* 3MB flash */
+    SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00100000 /* 1MB SRAM */
+}
+
+SECTIONS {
+    .text :
+    {
+        _text = .;
+        KEEP(*(.isr_vector))
+        *(.text*)    /* program code */
+        *(.rodata*)  /* read-only data: "const" */
+
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+         /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        /* C++ Exception handling */
+        KEEP(*(.eh_frame*))
+        _etext = .;
+    } > FLASH
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    /* it's used for C++ exception handling      */
+    /* we need to keep this to avoid overlapping */
+    .ARM.exidx :
+    {
+        __exidx_start = .;
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+        __exidx_end = .;
+    } > FLASH
+
+    .data :
+    {
+        _data = ALIGN(., 4);
+        *(vtable)
+        *(.data*)           /*read-write initialized data: initialized global variable*/
+        *(.spix_config*)    /* SPIX configuration functions need to be run from SRAM */
+        *(.flashprog*)      /* Flash program */
+
+
+        /* These array sections are used by __libc_init_array to call static C++ constructors */
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        _edata = ALIGN(., 4);
+    } > SRAM AT>FLASH
+    __load_data = LOADADDR(.data);
+    .bss :
+    {
+        . = ALIGN(4);
+        _bss = .;
+        *(.bss*)     /*read-write zero initialized data: uninitialzed global variable*/
+        *(COMMON)
+        _ebss = ALIGN(., 4);
+    } > SRAM
+
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy (COPY):
+    {
+        *(.stack*)
+    } > SRAM
+
+    .heap (COPY):
+    {
+        . = ALIGN(4);
+        PROVIDE ( end = . );
+        PROVIDE ( _end = . );
+        *(.heap*)
+        __HeapLimit = ABSOLUTE(__StackLimit);
+    } > SRAM
+
+    PROVIDE(__stack = __StackTop);
+
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= _ebss, "region RAM overflowed with stack")
+}
diff --git a/hw/bsp/max32650/boards/max32651evkit/board.cmake b/hw/bsp/max32650/boards/max32651evkit/board.cmake
new file mode 100644
index 0000000000..8bb3e6edd4
--- /dev/null
+++ b/hw/bsp/max32650/boards/max32651evkit/board.cmake
@@ -0,0 +1 @@
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32651.ld)
\ No newline at end of file
diff --git a/hw/bsp/max32650/boards/max32651evkit/board.h b/hw/bsp/max32650/boards/max32651evkit/board.h
new file mode 100644
index 0000000000..196abdaca7
--- /dev/null
+++ b/hw/bsp/max32650/boards/max32651evkit/board.h
@@ -0,0 +1,56 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024, Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#include "gpio.h"
+#include "mxc_sys.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// LED
+#define LED_PORT        MXC_GPIO2
+#define LED_PIN         MXC_GPIO_PIN_25
+#define LED_VDDIO       MXC_GPIO_VSSEL_VDDIOH
+#define LED_STATE_ON    0
+
+// Button
+#define BUTTON_PORT         MXC_GPIO2
+#define BUTTON_PIN          MXC_GPIO_PIN_28
+#define BUTTON_PULL         MXC_GPIO_PAD_WEAK_PULL_UP
+#define BUTTON_STATE_ACTIVE 0
+
+// UART Enable for EvKit's Integrated FTDI Adapter. Pin Mux handled by the HAL
+#define UART_NUM    0
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/max32650/boards/max32651evkit/board.mk b/hw/bsp/max32650/boards/max32651evkit/board.mk
new file mode 100644
index 0000000000..8d13d8edf7
--- /dev/null
+++ b/hw/bsp/max32650/boards/max32651evkit/board.mk
@@ -0,0 +1,42 @@
+LD_FILE = $(BOARD_PATH)/max32651.ld
+CFLAGS += -D__SLA_FWK__
+
+# For flash-jlink target
+JLINK_DEVICE = max32650
+
+# flash target using MSDK signing the image
+flash: flash-msdk-signed
+
+
+MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
+
+# The MAX32651EVKIT is pin for pin identical to the MAX32650EVKIT, however the
+# MAX32651 has a secure bootloader which requires the image to be signed before
+# loading into flash. All MAX32651EVKIT's have the same key for evaluation
+# purposes, so create a special flash rule to sign the binary and flash using
+# the MSDK.
+# For the MAX32650, the regular flash, flash-jlink and flash-msdk are sufficient
+MCU_PATH = $(TOP)/hw/mcu/analog/max32/
+# Assume no extension for sign utility
+SIGN_EXE = sign_app
+ifeq ($(OS), Windows_NT)
+# Must use .exe extension on Windows, since the binaries
+# for Linux may live in the same place.
+SIGN_EXE := sign_app.exe
+else
+UNAME = $(shell uname -s)
+ifneq ($(findstring MSYS_NT,$(UNAME)),)
+# Must also use .exe extension for MSYS2
+SIGN_EXE := sign_app.exe
+endif
+endif
+
+flash-msdk-signed: $(BUILD)/$(PROJECT).elf
+	$(OBJCOPY) $(BUILD)/$(PROJECT).elf -R .sig -O binary $(BUILD)/$(PROJECT).bin
+	$(MCU_PATH)/Tools/SBT/bin/$(SIGN_EXE) -c MAX32651 key_file="$(MCU_PATH)/Tools/SBT/devices/MAX32651/keys/maximtestcrk.key" \
+		ca=$(BUILD)/$(PROJECT).bin sca=$(BUILD)/$(PROJECT).sbin
+	$(OBJCOPY) $(BUILD)/$(PROJECT).elf --update-section .sig=$(BUILD)/$(PROJECT).sig
+	$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
+		-f interface/cmsis-dap.cfg -f target/max32650.cfg \
+		-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
+
diff --git a/hw/bsp/max32650/boards/max32651evkit/max32651.ld b/hw/bsp/max32650/boards/max32651evkit/max32651.ld
new file mode 100644
index 0000000000..a873463d4d
--- /dev/null
+++ b/hw/bsp/max32650/boards/max32651evkit/max32651.ld
@@ -0,0 +1,132 @@
+MEMORY {
+    HEADER (rx): ORIGIN = 0x10000000, LENGTH = 0x200
+    FLASH (rx) : ORIGIN = 0x10000200, LENGTH = 0x002FFE00 /* 3MB flash */
+    SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00100000 /* 1MB SRAM */
+}
+
+/* Added Oct 9, 2018 to go to correct reset vector. */
+ENTRY(Reset_Handler)
+PROVIDE( _start_SWAP = (((Reset_Handler) >> 24) | (((Reset_Handler) & 0x00FF0000) >> 8) | (((Reset_Handler) & 0x0000FF00) << 8) | ((Reset_Handler) << 24)));
+PROVIDE_HIDDEN( _SLA_Size = _endimage - __end_header );
+PROVIDE( _SLA_Size_SWAP = (((_SLA_Size) >> 24) | (((_SLA_Size) & 0x00FF0000) >> 8) | (((_SLA_Size) & 0x0000FF00) << 8) | ((_SLA_Size) << 24)));
+
+/* Sections Definitions */
+SECTIONS {
+     .sb_sla_header : ALIGN(4)
+    {
+       FILL(0xFF)
+        KEEP(*(.sb_sla_header)) /* Header for ROM code */
+         __end_header = . ;
+        . = ALIGN(512);
+    } > HEADER
+
+    .text :
+    {
+        _text = .;
+        KEEP(*(.isr_vector))
+        *(.text*)    /* program code */
+        *(.rodata*)  /* read-only data: "const" */
+
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+        /* C++ Exception handling */
+        KEEP(*(.eh_frame*))
+        _etext = .;
+    } > FLASH
+
+    /* it's used for C++ exception handling      */
+    /* we need to keep this to avoid overlapping */
+    .ARM.exidx :
+    {
+        __exidx_start = .;
+        *(.ARM.exidx*)
+        __exidx_end = .;
+    } > FLASH
+
+    .data :
+    {
+        _data = ALIGN(., 4);
+        *(.data*)           /*read-write initialized data: initialized global variable*/
+        *(.spix_config*)    /* SPIX configuration functions need to be run from SRAM */
+        *(.flashprog*)      /* Flash program */
+
+
+        /* These array sections are used by __libc_init_array to call static C++ constructors */
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        _edata = ALIGN(., 4);
+    } > SRAM AT>FLASH
+    __load_data = LOADADDR(.data);
+    _enddata = LOADADDR(.data)+SIZEOF(.data);
+
+    .sb_sla_trailer : AT(_enddata)
+    {
+        KEEP(*(.sb_sla_trailer))
+        /* Align image with 16 byte boundary to conform to flash encryption block size. */
+        FILL(0xDEADC0DE);
+        /* NOTE: The FILL and ALIGN will not work unless something is written to the section.  So, we use LONG. */
+        LONG(0xDEADC0DE);
+        . = ALIGN(16);
+    }  > FLASH
+    _endimage = LOADADDR(.sb_sla_trailer)+SIZEOF(.sb_sla_trailer);
+    .sig :
+    {
+        KEEP(*(.sig))
+        LONG(0xDEADBEEF);
+
+    }  > FLASH
+    .bss :
+    {
+        . = ALIGN(4);
+        _bss = .;
+        *(.bss*)     /*read-write zero initialized data: uninitialzed global variable*/
+        *(COMMON)
+        _ebss = ALIGN(., 4);
+    } > SRAM
+
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(SRAM) + LENGTH(SRAM);
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy (COPY):
+    {
+        *(.stack*)
+    } > SRAM
+
+    .heap (COPY):
+    {
+        . = ALIGN(4);
+        PROVIDE ( end = . );
+        PROVIDE ( _end = . );
+        *(.heap*)
+        __HeapLimit = ABSOLUTE(__StackLimit);
+    } > SRAM
+
+    PROVIDE(__stack = __StackTop);
+
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= _ebss, "region RAM overflowed with stack")
+}
diff --git a/hw/bsp/max32650/family.c b/hw/bsp/max32650/family.c
new file mode 100644
index 0000000000..16b5233b95
--- /dev/null
+++ b/hw/bsp/max32650/family.c
@@ -0,0 +1,160 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "board.h"
+#include "bsp/board_api.h"
+#include "gpio.h"
+#include "mxc_device.h"
+#include "uart.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USB_IRQHandler(void) {
+  tud_int_handler(0);
+}
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM
+//--------------------------------------------------------------------+
+mxc_uart_regs_t *ConsoleUart = MXC_UART_GET_UART(UART_NUM);
+
+void board_init(void) {
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+  mxc_gpio_cfg_t gpioConfig;
+
+  // LED
+  gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
+  gpioConfig.func = MXC_GPIO_FUNC_OUT;
+  gpioConfig.mask = LED_PIN;
+  gpioConfig.pad = MXC_GPIO_PAD_NONE;
+  gpioConfig.port = LED_PORT;
+  gpioConfig.vssel = LED_VDDIO;
+  MXC_GPIO_Config(&gpioConfig);
+  board_led_write(false);
+
+  // Button
+  gpioConfig.drvstr = MXC_GPIO_DRVSTR_0;
+  gpioConfig.func = MXC_GPIO_FUNC_IN;
+  gpioConfig.mask = BUTTON_PIN;
+  gpioConfig.pad = BUTTON_PULL;
+  gpioConfig.port = BUTTON_PORT;
+  gpioConfig.vssel = MXC_GPIO_VSSEL_VDDIO;
+  MXC_GPIO_Config(&gpioConfig);
+
+  // UART
+  MXC_UART_Init(ConsoleUart, CFG_BOARD_UART_BAUDRATE);
+
+  //USB
+  // Startup the HIRC96M clock if it's not on already
+  if (!(MXC_GCR->clk_ctrl & MXC_F_GCR_CLK_CTRL_HIRC96_EN)) {
+      MXC_GCR->clk_ctrl |= MXC_F_GCR_CLK_CTRL_HIRC96_EN;
+      MXC_SYS_Clock_Timeout(MXC_F_GCR_CLK_CTRL_HIRC96_RDY);
+  }
+
+  MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+#if LED_STATE_ON
+  state = !state;
+#endif
+  if (state) {
+    MXC_GPIO_OutClr(LED_PORT, LED_PIN);
+  } else {
+    MXC_GPIO_OutSet(LED_PORT, LED_PIN);
+  }
+}
+
+uint32_t board_button_read(void) {
+  uint32_t state = MXC_GPIO_InGet(BUTTON_PORT, BUTTON_PIN) ? 1 : 0;
+  return BUTTON_STATE_ACTIVE == state;
+}
+
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  uint8_t hw_id[13];//USN Buffer
+  MXC_SYS_GetUSN(hw_id, 13);
+
+  size_t act_len = TU_MIN(max_len, 13);
+  memcpy(id, hw_id, act_len);
+  return act_len;
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+  int uart_val;
+  int act_len = 0;
+
+  while (act_len < len) {
+    if ((uart_val = MXC_UART_ReadCharacterRaw(ConsoleUart)) == E_UNDERFLOW) {
+      break;
+    } else {
+      *buf++ = (uint8_t) uart_val;
+      act_len++;
+    }
+  }
+  return act_len;
+}
+
+int board_uart_write(void const *buf, int len) {
+  int act_len = 0;
+  const uint8_t *ch_ptr = (const uint8_t *) buf;
+  while (act_len < len) {
+    MXC_UART_WriteCharacter(ConsoleUart, *ch_ptr++);
+    act_len++;
+  }
+  return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+void SysTick_Handler(void) {
+  system_ticks++;
+}
+
+uint32_t board_millis(void) {
+  return system_ticks;
+}
+#endif
+
+void HardFault_Handler(void) {
+  __asm("BKPT #0\n");
+}
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void) {
+}
diff --git a/hw/bsp/max32650/family.cmake b/hw/bsp/max32650/family.cmake
new file mode 100644
index 0000000000..7643564959
--- /dev/null
+++ b/hw/bsp/max32650/family.cmake
@@ -0,0 +1,152 @@
+include_guard()
+
+set(MAX32_PERIPH ${TOP}/hw/mcu/analog/max32/Libraries/PeriphDrivers)
+set(MAX32_CMSIS ${TOP}/hw/mcu/analog/max32/Libraries/CMSIS)
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# Get the linker file from current location (family)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+set(JLINK_DEVICE max32650)
+
+set(FAMILY_MCUS MAX32650 CACHE INTERNAL "")
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    TARGET=MAX32650
+    TARGET_REV=0x4131
+    MXC_ASSERT_ENABLE
+    MAX32650
+    IAR_PRAGMAS=0
+    CFG_TUSB_MCU=OPT_MCU_MAX32650
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    )
+endfunction()
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  # Startup & Linker script
+  set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/GCC/startup_max32650.S)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+  #set(STARTUP_FILE_IAR ?)
+
+  set(PERIPH_SRC ${MAX32_PERIPH}/Source)
+  add_library(${BOARD_TARGET} STATIC
+    ${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/heap.c
+    ${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/system_max32650.c
+    ${PERIPH_SRC}/SYS/mxc_assert.c
+    ${PERIPH_SRC}/SYS/mxc_delay.c
+    ${PERIPH_SRC}/SYS/mxc_lock.c
+    ${PERIPH_SRC}/SYS/nvic_table.c
+    ${PERIPH_SRC}/SYS/pins_me10.c
+    ${PERIPH_SRC}/SYS/sys_me10.c
+    ${PERIPH_SRC}/TPU/tpu_me10.c
+    ${PERIPH_SRC}/TPU/tpu_reva.c
+    ${PERIPH_SRC}/FLC/flc_common.c
+    ${PERIPH_SRC}/FLC/flc_me10.c
+    ${PERIPH_SRC}/FLC/flc_reva.c
+    ${PERIPH_SRC}/GPIO/gpio_common.c
+    ${PERIPH_SRC}/GPIO/gpio_me10.c
+    ${PERIPH_SRC}/GPIO/gpio_reva.c
+    ${PERIPH_SRC}/ICC/icc_me10.c
+    ${PERIPH_SRC}/ICC/icc_reva.c
+    ${PERIPH_SRC}/ICC/icc_common.c
+    ${PERIPH_SRC}/UART/uart_common.c
+    ${PERIPH_SRC}/UART/uart_me10.c
+    ${PERIPH_SRC}/UART/uart_reva.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMSIS_5}/CMSIS/Core/Include
+    ${MAX32_CMSIS}/Include
+    ${MAX32_CMSIS}/Device/Maxim/MAX32650/Include
+    ${MAX32_PERIPH}/Include/MAX32650
+    ${PERIPH_SRC}/SYS
+    ${PERIPH_SRC}/GPIO
+    ${PERIPH_SRC}/TPU
+    ${PERIPH_SRC}/ICC
+    ${PERIPH_SRC}/FLC
+    ${PERIPH_SRC}/UART
+    )
+
+  target_compile_options(${BOARD_TARGET} PRIVATE
+  -Wno-error=strict-prototypes
+  )
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_MAX32650 ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/analog/max32/dcd_max32.c
+    )
+  target_compile_options(${TARGET} PRIVATE
+    -Wno-error=strict-prototypes
+    )
+
+    target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+  target_compile_options(${TARGET}-tinyusb PRIVATE
+    -Wno-error=strict-prototypes
+    )
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_jlink(${TARGET})
+endfunction()
+
diff --git a/hw/bsp/max32650/family.mk b/hw/bsp/max32650/family.mk
new file mode 100644
index 0000000000..6e9b7b8355
--- /dev/null
+++ b/hw/bsp/max32650/family.mk
@@ -0,0 +1,85 @@
+DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/analog/max32
+
+# Important locations in the hw support for MCU
+MAX32_CMSIS = hw/mcu/analog/max32/Libraries/CMSIS
+MAX32_PERIPH = hw/mcu/analog/max32/Libraries/PeriphDrivers
+
+# Add any board specific make rules
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CPU_CORE ?= cortex-m4
+PORT ?= 0
+
+# GCC
+SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/GCC/startup_max32650.S
+
+# IAR
+#SRC_S_IAR += ?
+
+# --------------
+# Compiler Flags
+# --------------
+# Flags for the MAX32650/1/2 SDK
+CFLAGS +=   -DTARGET=MAX32650 \
+			-DTARGET_REV=0x4131 \
+			-DMXC_ASSERT_ENABLE \
+			-DMAX32650 \
+			-DIAR_PRAGMAS=0
+
+# Flags for TUSB features
+CFLAGS += \
+  -DCFG_TUSB_MCU=OPT_MCU_MAX32650 \
+  -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+
+# mcu driver cause following warnings
+CFLAGS += 	-Wno-error=strict-prototypes \
+			-Wno-error=unused-parameter \
+			-Wno-error=cast-align \
+			-Wno-error=cast-qual \
+			-Wno-error=sign-compare
+
+LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
+
+# -----------------
+# Sources & Include
+# -----------------
+PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
+SRC_C += \
+	src/portable/analog/max32/dcd_max32.c \
+	$(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/heap.c \
+	$(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/system_max32650.c \
+	$(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/header_MAX32650.c \
+	$(PERIPH_SRC)/SYS/mxc_assert.c \
+	$(PERIPH_SRC)/SYS/mxc_delay.c \
+	$(PERIPH_SRC)/SYS/mxc_lock.c \
+	$(PERIPH_SRC)/SYS/nvic_table.c \
+	$(PERIPH_SRC)/SYS/pins_me10.c \
+	$(PERIPH_SRC)/SYS/sys_me10.c \
+	$(PERIPH_SRC)/FLC/flc_common.c \
+	$(PERIPH_SRC)/FLC/flc_me10.c \
+	$(PERIPH_SRC)/FLC/flc_reva.c \
+	$(PERIPH_SRC)/GPIO/gpio_common.c \
+	$(PERIPH_SRC)/GPIO/gpio_me10.c \
+	$(PERIPH_SRC)/GPIO/gpio_reva.c \
+	$(PERIPH_SRC)/ICC/icc_me10.c \
+	$(PERIPH_SRC)/ICC/icc_reva.c \
+	$(PERIPH_SRC)/ICC/icc_common.c \
+	$(PERIPH_SRC)/TPU/tpu_me10.c \
+    $(PERIPH_SRC)/TPU/tpu_reva.c \
+	$(PERIPH_SRC)/UART/uart_common.c \
+	$(PERIPH_SRC)/UART/uart_me10.c \
+	$(PERIPH_SRC)/UART/uart_reva.c \
+
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+	$(TOP)/$(MAX32_CMSIS)/Include \
+	$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX32650/Include \
+	$(TOP)/$(MAX32_PERIPH)/Include/MAX32650 \
+	$(PERIPH_SRC)/SYS \
+	$(PERIPH_SRC)/GPIO \
+	$(PERIPH_SRC)/ICC \
+	$(PERIPH_SRC)/FLC \
+	$(PERIPH_SRC)/TPU \
+	$(PERIPH_SRC)/UART
diff --git a/hw/bsp/max32666/boards/max32666fthr/board.h b/hw/bsp/max32666/boards/max32666fthr/board.h
index 7e24266a1c..c719b748a2 100644
--- a/hw/bsp/max32666/boards/max32666fthr/board.h
+++ b/hw/bsp/max32666/boards/max32666fthr/board.h
@@ -46,7 +46,7 @@ extern "C" {
 #define BUTTON_PULL         MXC_GPIO_PAD_PULL_UP
 #define BUTTON_STATE_ACTIVE 0
 
-// UART Enable for EvKit's Integrated FTDI Adapter. Pin Mux handled by the HAL
+// UART Enable for UART on SWD. Pin Mux handled by the HAL
 #define UART_NUM    1
 #define UART_MAP    MAP_B
 
diff --git a/hw/bsp/max32666/family.mk b/hw/bsp/max32666/family.mk
index d35b6d5085..31428cacd2 100644
--- a/hw/bsp/max32666/family.mk
+++ b/hw/bsp/max32666/family.mk
@@ -36,13 +36,7 @@ CFLAGS += \
 CFLAGS += 	-Wno-error=strict-prototypes \
 			-Wno-error=unused-parameter \
 			-Wno-error=cast-align \
-			-Wno-error=cast-qual \
-#
-#			-Wno-error=old-style-declaration \
-#			-Wno-error=sign-compare \
-#			-Wno-error=cast-qual \
-#			-Wno-lto-type-mismatch
-
+			-Wno-error=cast-qual
 LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
 
 # For flash-jlink target
@@ -56,7 +50,7 @@ flash: flash-jlink
 # If the MSDK is installed, flash-msdk can be run to utilize the the modified
 # openocd with the algorithms
 MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
-flash-msdk:
+flash-msdk: $(BUILD)/$(PROJECT).elf
 	$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
 		-f interface/cmsis-dap.cfg -f target/max32665.cfg \
 		-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
diff --git a/hw/bsp/max32690/family.mk b/hw/bsp/max32690/family.mk
index 08d5e8671a..0405a29146 100644
--- a/hw/bsp/max32690/family.mk
+++ b/hw/bsp/max32690/family.mk
@@ -57,7 +57,7 @@ flash: flash-jlink
 # If the MSDK is installed, flash-msdk can be run to utilize the the modified
 # openocd with the algorithms
 MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
-flash-msdk:
+flash-msdk: $(BUILD)/$(PROJECT).elf
 	$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
 		-f interface/cmsis-dap.cfg -f target/max32690.cfg \
 		-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
diff --git a/hw/bsp/max78002/family.mk b/hw/bsp/max78002/family.mk
index 8259205965..04163417c5 100644
--- a/hw/bsp/max78002/family.mk
+++ b/hw/bsp/max78002/family.mk
@@ -53,7 +53,7 @@ flash: flash-jlink
 # If the MSDK is installed, flash-msdk can be run to utilize the the modified
 # openocd with the algorithms
 MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
-flash-msdk:
+flash-msdk: $(BUILD)/$(PROJECT).elf
 	$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
 		-f interface/cmsis-dap.cfg -f target/max78002.cfg \
 		-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"

From bd562e418080d4d9e4213d38a123b93f30250c48 Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Fri, 5 Jul 2024 15:15:00 +0700
Subject: [PATCH 035/204] Revert "audio.h: fix error ISO C restricts enumerator
 values to range of 'int'"

---
 src/class/audio/audio.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/class/audio/audio.h b/src/class/audio/audio.h
index 49ccbe863b..d6f3e22e20 100644
--- a/src/class/audio/audio.h
+++ b/src/class/audio/audio.h
@@ -489,7 +489,7 @@ typedef enum
   AUDIO_DATA_FORMAT_TYPE_I_IEEE_FLOAT     = (uint32_t) (1 << 2),
   AUDIO_DATA_FORMAT_TYPE_I_ALAW           = (uint32_t) (1 << 3),
   AUDIO_DATA_FORMAT_TYPE_I_MULAW          = (uint32_t) (1 << 4),
-  AUDIO_DATA_FORMAT_TYPE_I_RAW_DATA       = (int)(1U << 31U),
+  AUDIO_DATA_FORMAT_TYPE_I_RAW_DATA       = 0x80000000,
 } audio_data_format_type_I_t;
 
 /// All remaining definitions are taken from the descriptor descriptions in the UAC2 main specification
@@ -640,7 +640,7 @@ typedef enum
   AUDIO_CHANNEL_CONFIG_BOTTOM_CENTER              = 0x01000000,
   AUDIO_CHANNEL_CONFIG_BACK_LEFT_OF_CENTER        = 0x02000000,
   AUDIO_CHANNEL_CONFIG_BACK_RIGHT_OF_CENTER       = 0x04000000,
-  AUDIO_CHANNEL_CONFIG_RAW_DATA                   = (int)(1U << 31U),
+  AUDIO_CHANNEL_CONFIG_RAW_DATA                   = 0x80000000,
 } audio_channel_config_t;
 
 /// AUDIO Channel Cluster Descriptor (4.1)

From ca12a579020184c0e3f6d66d8081d5bb927cb4b2 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 5 Jul 2024 15:19:16 +0700
Subject: [PATCH 036/204] add u for unsigned

---
 src/class/audio/audio.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/class/audio/audio.h b/src/class/audio/audio.h
index d6f3e22e20..2f97c0f23d 100644
--- a/src/class/audio/audio.h
+++ b/src/class/audio/audio.h
@@ -489,7 +489,7 @@ typedef enum
   AUDIO_DATA_FORMAT_TYPE_I_IEEE_FLOAT     = (uint32_t) (1 << 2),
   AUDIO_DATA_FORMAT_TYPE_I_ALAW           = (uint32_t) (1 << 3),
   AUDIO_DATA_FORMAT_TYPE_I_MULAW          = (uint32_t) (1 << 4),
-  AUDIO_DATA_FORMAT_TYPE_I_RAW_DATA       = 0x80000000,
+  AUDIO_DATA_FORMAT_TYPE_I_RAW_DATA       = 0x80000000u,
 } audio_data_format_type_I_t;
 
 /// All remaining definitions are taken from the descriptor descriptions in the UAC2 main specification
@@ -640,7 +640,7 @@ typedef enum
   AUDIO_CHANNEL_CONFIG_BOTTOM_CENTER              = 0x01000000,
   AUDIO_CHANNEL_CONFIG_BACK_LEFT_OF_CENTER        = 0x02000000,
   AUDIO_CHANNEL_CONFIG_BACK_RIGHT_OF_CENTER       = 0x04000000,
-  AUDIO_CHANNEL_CONFIG_RAW_DATA                   = 0x80000000,
+  AUDIO_CHANNEL_CONFIG_RAW_DATA                   = 0x80000000u,
 } audio_channel_config_t;
 
 /// AUDIO Channel Cluster Descriptor (4.1)

From 8d5dbb957766921eba78b8762a458e6518521b66 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 5 Jul 2024 15:40:02 +0700
Subject: [PATCH 037/204] add board_reset_to_bootloader(), try to implement
 that for ch32v203 but not working yet

---
 examples/device/cdc_dual_ports/src/main.c     | 20 ++++++++++++
 hw/bsp/board_api.h                            |  3 ++
 .../ch32v20x/boards/ch32v203c_r0_1v0/board.h  |  2 +-
 .../ch32v20x/boards/ch32v203g_r0_1v0/board.h  |  2 +-
 hw/bsp/ch32v20x/family.c                      | 32 +++++++++++++++++++
 5 files changed, 57 insertions(+), 2 deletions(-)

diff --git a/examples/device/cdc_dual_ports/src/main.c b/examples/device/cdc_dual_ports/src/main.c
index 1167a5d50a..ef12186f2b 100644
--- a/examples/device/cdc_dual_ports/src/main.c
+++ b/examples/device/cdc_dual_ports/src/main.c
@@ -119,6 +119,26 @@ static void cdc_task(void) {
   }
 }
 
+// Invoked when cdc when line state changed e.g connected/disconnected
+// Use to reset to DFU when disconnect with 1200 bps
+void tud_cdc_line_state_cb(uint8_t instance, bool dtr, bool rts) {
+  (void)rts;
+
+  // DTR = false is counted as disconnected
+  if (!dtr) {
+    // touch1200 only with first CDC instance (Serial)
+    if (instance == 0) {
+      cdc_line_coding_t coding;
+      tud_cdc_get_line_coding(&coding);
+      if (coding.bit_rate == 1200) {
+        if (board_reset_to_bootloader) {
+          board_reset_to_bootloader();
+        }
+      }
+    }
+  }
+}
+
 //--------------------------------------------------------------------+
 // BLINKING TASK
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/board_api.h b/hw/bsp/board_api.h
index eee9ed9c5d..774deca24b 100644
--- a/hw/bsp/board_api.h
+++ b/hw/bsp/board_api.h
@@ -72,6 +72,9 @@ void board_init(void);
 // Init board after tinyusb is initialized
 void board_init_after_tusb(void) TU_ATTR_WEAK;
 
+// Jump to bootloader
+void board_reset_to_bootloader(void) TU_ATTR_WEAK;
+
 // Turn LED on or off
 void board_led_write(bool state);
 
diff --git a/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.h b/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.h
index 64eaf931eb..692cf11bf1 100644
--- a/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.h
+++ b/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.h
@@ -6,7 +6,7 @@ extern "C" {
 #endif
 
 #define LED_PORT       GPIOA
-#define LED_PIN        GPIO_Pin_15
+#define LED_PIN        GPIO_Pin_0
 #define LED_STATE_ON   0
 
 #define UART_DEV        USART1
diff --git a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.h b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.h
index d6c3a64c88..783831edd6 100644
--- a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.h
+++ b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.h
@@ -7,7 +7,7 @@ extern "C" {
 
 #define LED_PORT       GPIOA
 #define LED_PIN        GPIO_Pin_0
-#define LED_STATE_ON   1
+#define LED_STATE_ON   0
 
 #define UART_DEV        USART2
 #define UART_CLOCK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE)
diff --git a/hw/bsp/ch32v20x/family.c b/hw/bsp/ch32v20x/family.c
index ea98a5e194..e3075757e5 100644
--- a/hw/bsp/ch32v20x/family.c
+++ b/hw/bsp/ch32v20x/family.c
@@ -139,6 +139,34 @@ void board_init(void) {
   __enable_irq();
 }
 
+void board_reset_to_bootloader(void) {
+  board_led_write(true);
+
+  __disable_irq();
+
+#if CFG_TUD_ENABLED
+  tud_deinit(0);
+  RCC_APB1PeriphResetCmd(RCC_APB1Periph_USB, ENABLE);
+  RCC_APB1PeriphResetCmd(RCC_APB1Periph_USB, DISABLE);
+#endif
+
+  SysTick->CTLR = 0;
+  for (int i = WWDG_IRQn; i< DMA1_Channel8_IRQn; i++) {
+    NVIC_DisableIRQ(i);
+  }
+
+  __enable_irq();
+
+  // define function pointer to BOOT ROM address
+  void (*bootloader_entry)(void) = (void (*)(void))0x1FFF8000;
+
+  bootloader_entry();
+
+  board_led_write(false);
+
+  // while(1) { }
+}
+
 void board_led_write(bool state) {
   GPIO_WriteBit(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
 }
@@ -166,3 +194,7 @@ int board_uart_write(void const *buf, int len) {
 
   return len;
 }
+
+//--------------------------------------------------------------------
+// Neopixel
+//--------------------------------------------------------------------

From c1175b70131fa5020713381a850f2ce1018f390f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 10 Jul 2024 22:48:06 +0700
Subject: [PATCH 038/204] enable full 224KB flash for ch32v203 with flash
 enhanced read mode in SystemInit (better with startup). add flash with
 wlink-rs

---
 .gitignore                                    | 60 +------------------
 examples/build_system/make/rules.mk           |  6 ++
 .../boards/ch32v203c_r0_1v0/board.cmake       |  5 +-
 .../ch32v20x/boards/ch32v203c_r0_1v0/board.mk |  4 +-
 .../boards/ch32v203g_r0_1v0/board.cmake       |  5 +-
 .../ch32v20x/boards/ch32v203g_r0_1v0/board.mk |  4 +-
 .../ch32v20x/boards/nanoch32v203/board.cmake  |  5 +-
 hw/bsp/ch32v20x/boards/nanoch32v203/board.mk  |  4 +-
 hw/bsp/ch32v20x/family.c                      | 48 +++++++--------
 hw/bsp/ch32v20x/family.cmake                  |  1 +
 hw/bsp/ch32v20x/family.mk                     |  3 +-
 hw/bsp/ch32v20x/system_ch32v20x.c             | 11 +++-
 hw/bsp/family_support.cmake                   | 12 ++++
 13 files changed, 75 insertions(+), 93 deletions(-)

diff --git a/.gitignore b/.gitignore
index 7a37d65dc6..f2150a26fb 100644
--- a/.gitignore
+++ b/.gitignore
@@ -31,62 +31,4 @@ cov-int
 __pycache__
 cmake-build-*
 sdkconfig
-
-# submodules
-hw/mcu/allwinner
-hw/mcu/bridgetek/ft9xx/ft90x-sdk
-hw/mcu/broadcom
-hw/mcu/gd/nuclei-sdk
-hw/mcu/infineon/mtb-xmclib-cat3
-hw/mcu/microchip
-hw/mcu/mindmotion/mm32sdk
-hw/mcu/nordic/nrfx
-hw/mcu/nuvoton
-hw/mcu/nxp/lpcopen
-hw/mcu/nxp/mcux-sdk
-hw/mcu/nxp/nxp_sdk
-hw/mcu/raspberry_pi/Pico-PIO-USB
-hw/mcu/renesas/rx
-hw/mcu/silabs/cmsis-dfp-efm32gg12b
-hw/mcu/sony/cxd56/spresense-exported-sdk
-hw/mcu/st/cmsis_device_f0
-hw/mcu/st/cmsis_device_f1
-hw/mcu/st/cmsis_device_f2
-hw/mcu/st/cmsis_device_f3
-hw/mcu/st/cmsis_device_f4
-hw/mcu/st/cmsis_device_f7
-hw/mcu/st/cmsis_device_g0
-hw/mcu/st/cmsis_device_g4
-hw/mcu/st/cmsis_device_h5
-hw/mcu/st/cmsis_device_h7
-hw/mcu/st/cmsis_device_l0
-hw/mcu/st/cmsis_device_l1
-hw/mcu/st/cmsis_device_l4
-hw/mcu/st/cmsis_device_l5
-hw/mcu/st/cmsis_device_u5
-hw/mcu/st/cmsis_device_wb
-hw/mcu/st/stm32f0xx_hal_driver
-hw/mcu/st/stm32f1xx_hal_driver
-hw/mcu/st/stm32f2xx_hal_driver
-hw/mcu/st/stm32f3xx_hal_driver
-hw/mcu/st/stm32f4xx_hal_driver
-hw/mcu/st/stm32f7xx_hal_driver
-hw/mcu/st/stm32g0xx_hal_driver
-hw/mcu/st/stm32g4xx_hal_driver
-hw/mcu/st/stm32h5xx_hal_driver
-hw/mcu/st/stm32h7xx_hal_driver
-hw/mcu/st/stm32l0xx_hal_driver
-hw/mcu/st/stm32l1xx_hal_driver
-hw/mcu/st/stm32l4xx_hal_driver
-hw/mcu/st/stm32l5xx_hal_driver
-hw/mcu/st/stm32u5xx_hal_driver
-hw/mcu/st/stm32wbxx_hal_driver
-hw/mcu/ti
-hw/mcu/wch/ch32v20x
-hw/mcu/wch/ch32v307
-hw/mcu/wch/ch32f20x
-lib/CMSIS_5
-lib/FreeRTOS-Kernel
-lib/lwip
-lib/sct_neopixel
-tools/uf2
+.PVS-Studio
diff --git a/examples/build_system/make/rules.mk b/examples/build_system/make/rules.mk
index 102c6db0cf..f322dbae64 100644
--- a/examples/build_system/make/rules.mk
+++ b/examples/build_system/make/rules.mk
@@ -145,6 +145,12 @@ OPENOCD_WCH_OPTION ?=
 flash-openocd-wch: $(BUILD)/$(PROJECT).elf
 	$(OPENOCD_WCH) $(OPENOCD_WCH_OPTION) -c init -c halt -c "flash write_image $<" -c reset -c exit
 
+# --------------- wlink-rs -----------------
+# flash with https://github.com/ch32-rs/wlink
+WLINK_RS ?= wlink
+flash-wlink-rs: $(BUILD)/$(PROJECT).elf
+	$(WLINK_RS) flash $<
+
 # --------------- dfu-util -----------------
 DFU_UTIL_OPTION ?= -a 0
 flash-dfu-util: $(BUILD)/$(PROJECT).bin
diff --git a/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.cmake b/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.cmake
index 3dd87d3de7..adb0ea7416 100644
--- a/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.cmake
+++ b/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.cmake
@@ -1,6 +1,8 @@
 set(MCU_VARIANT D6)
 
-set(LD_FLASH_SIZE 64K)
+# 64KB zero-wait, 224KB total flash
+#set(LD_FLASH_SIZE 64K)
+set(LD_FLASH_SIZE 224K)
 set(LD_RAM_SIZE 20K)
 
 # set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${CH32_FAMILY}_tinyuf2.ld)
@@ -8,6 +10,7 @@ set(LD_RAM_SIZE 20K)
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     SYSCLK_FREQ_144MHz_HSE=144000000
+    CH32_FLASH_ENHANCE_READ_MODE=1
     CFG_EXAMPLE_MSC_DUAL_READONLY
     )
 endfunction()
diff --git a/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.mk b/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.mk
index 7d58946299..bdd15f737d 100644
--- a/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.mk
+++ b/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.mk
@@ -2,8 +2,10 @@ MCU_VARIANT = D6
 
 CFLAGS += \
   -DSYSCLK_FREQ_144MHz_HSE=144000000 \
+  -DCH32_FLASH_ENHANCE_READ_MODE=1 \
   -DCFG_EXAMPLE_MSC_DUAL_READONLY \
 
+# 64KB zero-wait, 224KB total flash
 LDFLAGS += \
-  -Wl,--defsym=__FLASH_SIZE=64K \
+  -Wl,--defsym=__FLASH_SIZE=224K \
   -Wl,--defsym=__RAM_SIZE=20K \
diff --git a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake
index 6e53052121..6fe3e05b22 100644
--- a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake
+++ b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake
@@ -1,11 +1,14 @@
 set(MCU_VARIANT D6)
 
-set(LD_FLASH_SIZE 32K)
+# 32KB zero-wait, 224KB total flash
+#set(LD_FLASH_SIZE 32K)
+set(LD_FLASH_SIZE 224K)
 set(LD_RAM_SIZE 10K)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     SYSCLK_FREQ_144MHz_HSI=144000000
+    CH32_FLASH_ENHANCE_READ_MODE=1
     CFG_EXAMPLE_MSC_DUAL_READONLY
     )
 endfunction()
diff --git a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.mk b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.mk
index e5e4d63bab..f71f53478e 100644
--- a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.mk
+++ b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.mk
@@ -2,8 +2,10 @@ MCU_VARIANT = D6
 
 CFLAGS += \
   -DSYSCLK_FREQ_144MHz_HSI=144000000 \
+  -DCH32_FLASH_ENHANCE_READ_MODE=1 \
   -DCFG_EXAMPLE_MSC_DUAL_READONLY \
 
+# 32KB zero-wait, 224KB total flash
 LDFLAGS += \
-  -Wl,--defsym=__FLASH_SIZE=32K \
+  -Wl,--defsym=__FLASH_SIZE=224K \
   -Wl,--defsym=__RAM_SIZE=10K \
diff --git a/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake b/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake
index f8dc862a7a..ed73657972 100644
--- a/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake
+++ b/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake
@@ -1,11 +1,14 @@
 set(MCU_VARIANT D6)
 
-set(LD_FLASH_SIZE 64K)
+# 64KB zero-wait, 224KB total flash
+#set(LD_FLASH_SIZE 64K)
+set(LD_FLASH_SIZE 224K)
 set(LD_RAM_SIZE 20K)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     SYSCLK_FREQ_144MHz_HSE=144000000
+    CH32_FLASH_ENHANCE_READ_MODE=1
     CFG_EXAMPLE_MSC_DUAL_READONLY
     )
 endfunction()
diff --git a/hw/bsp/ch32v20x/boards/nanoch32v203/board.mk b/hw/bsp/ch32v20x/boards/nanoch32v203/board.mk
index 7d58946299..362aace477 100644
--- a/hw/bsp/ch32v20x/boards/nanoch32v203/board.mk
+++ b/hw/bsp/ch32v20x/boards/nanoch32v203/board.mk
@@ -2,8 +2,10 @@ MCU_VARIANT = D6
 
 CFLAGS += \
   -DSYSCLK_FREQ_144MHz_HSE=144000000 \
+	-DCH32_FLASH_ENHANCE_READ_MODE=1 \
   -DCFG_EXAMPLE_MSC_DUAL_READONLY \
 
+# 64KB zero-wait , 224KB total flash
 LDFLAGS += \
-  -Wl,--defsym=__FLASH_SIZE=64K \
+  -Wl,--defsym=__FLASH_SIZE=224K \
   -Wl,--defsym=__RAM_SIZE=20K \
diff --git a/hw/bsp/ch32v20x/family.c b/hw/bsp/ch32v20x/family.c
index e3075757e5..542d4b5db7 100644
--- a/hw/bsp/ch32v20x/family.c
+++ b/hw/bsp/ch32v20x/family.c
@@ -62,7 +62,6 @@ void USBWakeUp_IRQHandler(void) {
 
 
 #if CFG_TUSB_OS == OPT_OS_NONE
-
 volatile uint32_t system_ticks = 0;
 
 __attribute__((interrupt))
@@ -84,7 +83,6 @@ uint32_t SysTick_Config(uint32_t ticks) {
 uint32_t board_millis(void) {
   return system_ticks;
 }
-
 #endif
 
 void board_init(void) {
@@ -140,29 +138,29 @@ void board_init(void) {
 }
 
 void board_reset_to_bootloader(void) {
-  board_led_write(true);
-
-  __disable_irq();
-
-#if CFG_TUD_ENABLED
-  tud_deinit(0);
-  RCC_APB1PeriphResetCmd(RCC_APB1Periph_USB, ENABLE);
-  RCC_APB1PeriphResetCmd(RCC_APB1Periph_USB, DISABLE);
-#endif
-
-  SysTick->CTLR = 0;
-  for (int i = WWDG_IRQn; i< DMA1_Channel8_IRQn; i++) {
-    NVIC_DisableIRQ(i);
-  }
-
-  __enable_irq();
-
-  // define function pointer to BOOT ROM address
-  void (*bootloader_entry)(void) = (void (*)(void))0x1FFF8000;
-
-  bootloader_entry();
-
-  board_led_write(false);
+//   board_led_write(true);
+//
+//   __disable_irq();
+//
+// #if CFG_TUD_ENABLED
+//   tud_deinit(0);
+//   RCC_APB1PeriphResetCmd(RCC_APB1Periph_USB, ENABLE);
+//   RCC_APB1PeriphResetCmd(RCC_APB1Periph_USB, DISABLE);
+// #endif
+//
+//   SysTick->CTLR = 0;
+//   for (int i = WWDG_IRQn; i< DMA1_Channel8_IRQn; i++) {
+//     NVIC_DisableIRQ(i);
+//   }
+//
+//   __enable_irq();
+//
+//   // define function pointer to BOOT ROM address
+//   void (*bootloader_entry)(void) = (void (*)(void))0x1FFF8000;
+//
+//   bootloader_entry();
+//
+//   board_led_write(false);
 
   // while(1) { }
 }
diff --git a/hw/bsp/ch32v20x/family.cmake b/hw/bsp/ch32v20x/family.cmake
index faa79ed665..bf929b862d 100644
--- a/hw/bsp/ch32v20x/family.cmake
+++ b/hw/bsp/ch32v20x/family.cmake
@@ -131,6 +131,7 @@ function(family_configure_example TARGET RTOS)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_openocd_wch(${TARGET})
+  family_flash_wlink_rs(${TARGET})
 
   #family_add_uf2(${TARGET} ${UF2_FAMILY_ID})
   #family_flash_uf2(${TARGET} ${UF2_FAMILY_ID})
diff --git a/hw/bsp/ch32v20x/family.mk b/hw/bsp/ch32v20x/family.mk
index 4485091dc1..08761dc0d2 100644
--- a/hw/bsp/ch32v20x/family.mk
+++ b/hw/bsp/ch32v20x/family.mk
@@ -60,4 +60,5 @@ INC += \
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V
 
 OPENOCD_WCH_OPTION=-f $(TOP)/$(FAMILY_PATH)/wch-riscv.cfg
-flash: flash-openocd-wch
+flash: flash-wlink-rs
+#flash: flash-openocd-wch
diff --git a/hw/bsp/ch32v20x/system_ch32v20x.c b/hw/bsp/ch32v20x/system_ch32v20x.c
index 435feae1bb..882e7ed716 100644
--- a/hw/bsp/ch32v20x/system_ch32v20x.c
+++ b/hw/bsp/ch32v20x/system_ch32v20x.c
@@ -19,9 +19,9 @@
 * If none of the define below is enabled, the HSI is used as System clock source.
 */
 //#define SYSCLK_FREQ_HSE    HSE_VALUE
-//#define SYSCLK_FREQ_48MHz_HSE  48000000
+// #define SYSCLK_FREQ_48MHz_HSE  48000000
 //#define SYSCLK_FREQ_56MHz_HSE  56000000
-//#define SYSCLK_FREQ_72MHz_HSE  72000000
+// #define SYSCLK_FREQ_72MHz_HSE  72000000
 // #define SYSCLK_FREQ_96MHz_HSE  96000000
 //#define SYSCLK_FREQ_120MHz_HSE  120000000
 //#define SYSCLK_FREQ_144MHz_HSE  144000000
@@ -109,6 +109,13 @@ static void SetSysClockTo144_HSI( void );
  */
 void SystemInit (void)
 {
+  // Enable Flash enhance read mode for full 224KB
+#if defined(CH32_FLASH_ENHANCE_READ_MODE) && CH32_FLASH_ENHANCE_READ_MODE == 1
+  FLASH_Unlock_Fast();
+  FLASH->CTLR |= (1 << 24);
+  FLASH_Lock_Fast();
+#endif
+
   RCC->CTLR |= (uint32_t)0x00000001;
   RCC->CFGR0 &= (uint32_t)0xF8FF0000;
   RCC->CTLR &= (uint32_t)0xFEF6FFFF;
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 9f2e346914..bc2d481bb6 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -455,6 +455,18 @@ function(family_flash_openocd_wch TARGET)
   family_flash_openocd(${TARGET})
 endfunction()
 
+# Add flash with https://github.com/ch32-rs/wlink
+function(family_flash_wlink_rs TARGET)
+  if (NOT DEFINED WLINK_RS)
+    set(WLINK_RS wlink)
+  endif ()
+
+  add_custom_target(${TARGET}-wlink-rs
+    DEPENDS ${TARGET}
+    COMMAND ${WLINK_RS} flash $<TARGET_FILE:${TARGET}>
+    )
+endfunction()
+
 # Add flash pycod target
 function(family_flash_pyocd TARGET)
   if (NOT DEFINED PYOC)

From e251493a161b5a383fd7f8861e3bf7ea72bf872c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 10 Jul 2024 22:58:00 +0700
Subject: [PATCH 039/204] skip FLASH_ function to reduce dependency

---
 hw/bsp/ch32v20x/system_ch32v20x.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/hw/bsp/ch32v20x/system_ch32v20x.c b/hw/bsp/ch32v20x/system_ch32v20x.c
index 882e7ed716..d32ee8d172 100644
--- a/hw/bsp/ch32v20x/system_ch32v20x.c
+++ b/hw/bsp/ch32v20x/system_ch32v20x.c
@@ -111,9 +111,12 @@ void SystemInit (void)
 {
   // Enable Flash enhance read mode for full 224KB
 #if defined(CH32_FLASH_ENHANCE_READ_MODE) && CH32_FLASH_ENHANCE_READ_MODE == 1
-  FLASH_Unlock_Fast();
-  FLASH->CTLR |= (1 << 24);
-  FLASH_Lock_Fast();
+  FLASH->KEYR = 0x45670123; // FLASH_Unlock_Fast();
+  FLASH->KEYR = 0xCDEF89AB;
+
+  FLASH->CTLR |= (1 << 24); // Enhanced Read Mode
+
+  FLASH->CTLR |= (1 << 15); // FLASH_Lock_Fast();
 #endif
 
   RCC->CTLR |= (uint32_t)0x00000001;

From f49725d2c958dd1368b5ca191a00be72543c0752 Mon Sep 17 00:00:00 2001
From: Brent Kowal <brent.kowal@analog.com>
Date: Wed, 10 Jul 2024 15:18:59 -0400
Subject: [PATCH 040/204] BSP Cleanup

 - Added MSDK flash rules for CMake
 - Removed partial IAR support. Uniform GCC support across MAX32 parts
 - Updated build scripts for correctly signing the MAX32651
 - Added README files for the BSPs to describe flashing and limitiations
---
 hw/bsp/max32650/README.md                     | 46 +++++++++++++
 .../max32650/boards/max32650evkit/board.cmake | 11 +++-
 hw/bsp/max32650/boards/max32650evkit/board.mk | 17 +----
 .../max32650/boards/max32650fthr/board.cmake  |  9 +++
 hw/bsp/max32650/boards/max32650fthr/board.mk  | 17 +----
 .../max32650/boards/max32651evkit/board.cmake | 31 ++++++++-
 hw/bsp/max32650/boards/max32651evkit/board.mk | 43 +------------
 hw/bsp/max32650/family.cmake                  | 32 +++++++---
 hw/bsp/max32650/family.mk                     | 64 +++++++++++++++++--
 hw/bsp/max32666/README.md                     | 32 ++++++++++
 hw/bsp/max32666/family.cmake                  | 19 ++++--
 hw/bsp/max32666/family.mk                     |  6 +-
 hw/bsp/max32690/README.md                     | 31 +++++++++
 hw/bsp/max32690/family.cmake                  | 21 ++++--
 hw/bsp/max32690/family.mk                     |  6 +-
 hw/bsp/max78002/README.md                     | 28 ++++++++
 hw/bsp/max78002/family.cmake                  | 27 +++++---
 hw/bsp/max78002/family.mk                     |  6 +-
 18 files changed, 325 insertions(+), 121 deletions(-)
 create mode 100644 hw/bsp/max32650/README.md
 create mode 100644 hw/bsp/max32666/README.md
 create mode 100644 hw/bsp/max32690/README.md
 create mode 100644 hw/bsp/max78002/README.md

diff --git a/hw/bsp/max32650/README.md b/hw/bsp/max32650/README.md
new file mode 100644
index 0000000000..cb8069bba7
--- /dev/null
+++ b/hw/bsp/max32650/README.md
@@ -0,0 +1,46 @@
+# Analog Devices MAX32650/1/2
+
+This BSP is for working with the Analog Devices
+[MAX32650](https://www.analog.com/en/products/max32650.html),
+[MAX32651](https://www.analog.com/en/products/max32651.html) and
+[MAX32652](https://www.analog.com/en/products/max32652.html)
+microcontrollers.  The following boards are supported:
+ * [MAX32650EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32650-evkit.html)
+ * [MAX32650FTHR](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32650fthr.html)
+ * [MAX32651EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32651-evkit.html) (Secure Bootloader)
+
+This part family leverages the Maxim Microcontrollers SDK (MSDK) for the device
+interfaces and hardware abstraction layers. This source code package is fetched
+as part of the get-deps script.
+
+The microcontrollers utilize the standard GNU ARM toolchain.  If this toolchain
+is not already available on your build machine, it can be installed by using the
+bundled MSDK installation.  Details on downloading and installing can be found
+in the [User's Guide](https://analogdevicesinc.github.io/msdk//USERGUIDE/).
+
+## Flashing
+
+### MAX32650 and MAX32652
+
+The default flashing behavior in this BSP for the MAX32650 and MAX32652 is to
+utilize JLink.  This can be done by running the `flash` or `flash-jlink` rule
+for Makefiles, or the `<target>-jlink` target for CMake.
+
+Both the Evaluation Kit and Feather boards are shipped with a CMSIS-DAP
+compatible debug probe. However, at the time of writing, the necessary flashing
+algorithms for OpenOCD have not yet been incorporated into the OpenOCD master
+branch.  To utilize the provided debug probes, please install the bundled MSDK
+package which includes the appropriate OpenOCD modifications.   To leverage this
+OpenOCD instance, run the `flash-msdk` Makefile rule, or `<target>-msdk` CMake
+target.
+
+### MAX32651
+
+The MAX32651 features an integrated secure bootloader which requires the
+application image be signed prior to flashing.  Both the Makefile and CMake
+scripts account for this signing automatically when building for the
+MAX32651EVKIT.
+
+To flash the signed image, the MSDK's OpenOCD variant must be used.  To flash
+the MAX32651EVKIT please install the bundled MSDK, and utilize the `flash-msdk`
+and `<target>-msdk` rule and target.
\ No newline at end of file
diff --git a/hw/bsp/max32650/boards/max32650evkit/board.cmake b/hw/bsp/max32650/boards/max32650evkit/board.cmake
index e094b89e14..fffdcc9fb1 100644
--- a/hw/bsp/max32650/boards/max32650evkit/board.cmake
+++ b/hw/bsp/max32650/boards/max32650evkit/board.cmake
@@ -1 +1,10 @@
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32650.ld)
\ No newline at end of file
+# Use the standard, non-secure linker file
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32650.ld)
+
+function(update_board_extras TARGET)
+  #No extra arguments
+endfunction()
+
+function(prepare_image TARGET_IN)
+  #No signing required
+endfunction()
diff --git a/hw/bsp/max32650/boards/max32650evkit/board.mk b/hw/bsp/max32650/boards/max32650evkit/board.mk
index ad71255739..0bc210e112 100644
--- a/hw/bsp/max32650/boards/max32650evkit/board.mk
+++ b/hw/bsp/max32650/boards/max32650evkit/board.mk
@@ -1,17 +1,2 @@
+# Use the standard, non-secure linker file
 LD_FILE = $(BOARD_PATH)/max32650.ld
-
-# For flash-jlink target
-JLINK_DEVICE = max32650
-
-# flash target using Jlik
-flash: flash-jlink
-
-# Optional flash option when running within an installed MSDK to use OpenOCD
-# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
-# If the MSDK is installed, flash-msdk can be run to utilize the the modified
-# openocd with the algorithms
-MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
-flash-msdk: $(BUILD)/$(PROJECT).elf
-	$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
-		-f interface/cmsis-dap.cfg -f target/max32650.cfg \
-		-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
\ No newline at end of file
diff --git a/hw/bsp/max32650/boards/max32650fthr/board.cmake b/hw/bsp/max32650/boards/max32650fthr/board.cmake
index a9ce39b4de..fffdcc9fb1 100644
--- a/hw/bsp/max32650/boards/max32650fthr/board.cmake
+++ b/hw/bsp/max32650/boards/max32650fthr/board.cmake
@@ -1 +1,10 @@
+# Use the standard, non-secure linker file
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32650.ld)
+
+function(update_board_extras TARGET)
+  #No extra arguments
+endfunction()
+
+function(prepare_image TARGET_IN)
+  #No signing required
+endfunction()
diff --git a/hw/bsp/max32650/boards/max32650fthr/board.mk b/hw/bsp/max32650/boards/max32650fthr/board.mk
index c6f018810d..0bc210e112 100644
--- a/hw/bsp/max32650/boards/max32650fthr/board.mk
+++ b/hw/bsp/max32650/boards/max32650fthr/board.mk
@@ -1,17 +1,2 @@
+# Use the standard, non-secure linker file
 LD_FILE = $(BOARD_PATH)/max32650.ld
-
-# For flash-jlink target
-JLINK_DEVICE = max32650
-
-# flash target using Jlik
-flash: flash-jlink
-
-# Optional flash option when running within an installed MSDK to use OpenOCD
-# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
-# If the MSDK is installed, flash-msdk can be run to utilize the the modified
-# openocd with the algorithms
-MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
-flash-msdk: $(BUILD)/$(PROJECT).elf
-	$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
-		-f interface/cmsis-dap.cfg -f target/max32650.cfg \
-		-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
diff --git a/hw/bsp/max32650/boards/max32651evkit/board.cmake b/hw/bsp/max32650/boards/max32651evkit/board.cmake
index 8bb3e6edd4..bd8077a421 100644
--- a/hw/bsp/max32650/boards/max32651evkit/board.cmake
+++ b/hw/bsp/max32650/boards/max32651evkit/board.cmake
@@ -1 +1,30 @@
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32651.ld)
\ No newline at end of file
+# Use the secure linker file
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/max32651.ld)
+
+function(update_board_extras TARGET)
+  # for the signed target, need to add the __SLA_FWK__ define
+  target_compile_definitions(${TARGET} PUBLIC
+    __SLA_FWK__
+    )
+endfunction()
+
+function(prepare_image TARGET_IN)
+  #For the signed target, set up a POST_BUILD command to sign the elf file once
+  #created
+  if((WIN32) OR (MINGW) OR (MSYS))
+    set(SIGN_EXE "sign_app.exe")
+  else()
+    set(SIGN_EXE "sign_app")
+  endif()
+  set(MCU_PATH "${TOP}/hw/mcu/analog/max32/")
+
+  # Custom POST_BUILD command
+  add_custom_command(
+    TARGET ${TARGET_IN} POST_BUILD
+    COMMAND ${CMAKE_OBJCOPY} $<TARGET_FILE:${TARGET_IN}>  -R .sig -O binary $<TARGET_FILE_DIR:${TARGET_IN}>/${TARGET_IN}.bin
+    COMMAND ${MCU_PATH}/Tools/SBT/bin/${SIGN_EXE} -c MAX32651 key_file=${MCU_PATH}/Tools/SBT/devices/MAX32651/keys/maximtestcrk.key
+            ca=$<TARGET_FILE_DIR:${TARGET_IN}>/${TARGET_IN}.bin sca=$<TARGET_FILE_DIR:${TARGET_IN}>/${TARGET_IN}.sbin
+    COMMAND ${CMAKE_OBJCOPY} $<TARGET_FILE:${TARGET_IN}> --update-section .sig=$<TARGET_FILE_DIR:${TARGET_IN}>/${TARGET_IN}.sig
+    VERBATIM
+    )
+endfunction()
diff --git a/hw/bsp/max32650/boards/max32651evkit/board.mk b/hw/bsp/max32650/boards/max32651evkit/board.mk
index 8d13d8edf7..b609598c16 100644
--- a/hw/bsp/max32650/boards/max32651evkit/board.mk
+++ b/hw/bsp/max32650/boards/max32651evkit/board.mk
@@ -1,42 +1,5 @@
+# Use the secure linker file
 LD_FILE = $(BOARD_PATH)/max32651.ld
-CFLAGS += -D__SLA_FWK__
-
-# For flash-jlink target
-JLINK_DEVICE = max32650
-
-# flash target using MSDK signing the image
-flash: flash-msdk-signed
-
-
-MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
-
-# The MAX32651EVKIT is pin for pin identical to the MAX32650EVKIT, however the
-# MAX32651 has a secure bootloader which requires the image to be signed before
-# loading into flash. All MAX32651EVKIT's have the same key for evaluation
-# purposes, so create a special flash rule to sign the binary and flash using
-# the MSDK.
-# For the MAX32650, the regular flash, flash-jlink and flash-msdk are sufficient
-MCU_PATH = $(TOP)/hw/mcu/analog/max32/
-# Assume no extension for sign utility
-SIGN_EXE = sign_app
-ifeq ($(OS), Windows_NT)
-# Must use .exe extension on Windows, since the binaries
-# for Linux may live in the same place.
-SIGN_EXE := sign_app.exe
-else
-UNAME = $(shell uname -s)
-ifneq ($(findstring MSYS_NT,$(UNAME)),)
-# Must also use .exe extension for MSYS2
-SIGN_EXE := sign_app.exe
-endif
-endif
-
-flash-msdk-signed: $(BUILD)/$(PROJECT).elf
-	$(OBJCOPY) $(BUILD)/$(PROJECT).elf -R .sig -O binary $(BUILD)/$(PROJECT).bin
-	$(MCU_PATH)/Tools/SBT/bin/$(SIGN_EXE) -c MAX32651 key_file="$(MCU_PATH)/Tools/SBT/devices/MAX32651/keys/maximtestcrk.key" \
-		ca=$(BUILD)/$(PROJECT).bin sca=$(BUILD)/$(PROJECT).sbin
-	$(OBJCOPY) $(BUILD)/$(PROJECT).elf --update-section .sig=$(BUILD)/$(PROJECT).sig
-	$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
-		-f interface/cmsis-dap.cfg -f target/max32650.cfg \
-		-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
 
+# Let the family script know the build needs to be signed
+SIGNED_BUILD := 1
diff --git a/hw/bsp/max32650/family.cmake b/hw/bsp/max32650/family.cmake
index 7643564959..129d99af87 100644
--- a/hw/bsp/max32650/family.cmake
+++ b/hw/bsp/max32650/family.cmake
@@ -4,10 +4,10 @@ set(MAX32_PERIPH ${TOP}/hw/mcu/analog/max32/Libraries/PeriphDrivers)
 set(MAX32_CMSIS ${TOP}/hw/mcu/analog/max32/Libraries/CMSIS)
 set(CMSIS_5 ${TOP}/lib/CMSIS_5)
 
-# include board specific
+# include board specific information and functions
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
-# Get the linker file from current location (family)
+# Get the linker file
 set(LD_FILE_Clang ${LD_FILE_GNU})
 
 # toolchain set up
@@ -27,6 +27,9 @@ function(update_board TARGET)
     CFG_TUSB_MCU=OPT_MCU_MAX32650
     BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
     )
+
+    # Run any board specific updates
+    update_board_extras(${TARGET})
 endfunction()
 
 #------------------------------------
@@ -41,11 +44,11 @@ function(add_board_target BOARD_TARGET)
   # Startup & Linker script
   set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/GCC/startup_max32650.S)
   set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  #set(STARTUP_FILE_IAR ?)
 
   set(PERIPH_SRC ${MAX32_PERIPH}/Source)
   add_library(${BOARD_TARGET} STATIC
     ${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/heap.c
+    ${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/header_MAX32650.c
     ${MAX32_CMSIS}/Device/Maxim/MAX32650/Source/system_max32650.c
     ${PERIPH_SRC}/SYS/mxc_assert.c
     ${PERIPH_SRC}/SYS/mxc_delay.c
@@ -84,7 +87,7 @@ function(add_board_target BOARD_TARGET)
     )
 
   target_compile_options(${BOARD_TARGET} PRIVATE
-  -Wno-error=strict-prototypes
+    -Wno-error=strict-prototypes
   )
   update_board(${BOARD_TARGET})
 
@@ -93,15 +96,12 @@ function(add_board_target BOARD_TARGET)
       "LINKER:--script=${LD_FILE_GNU}"
       -nostartfiles
       --specs=nosys.specs --specs=nano.specs
+      -u sb_header #Needed when linking libraries to not lose the Signing header
       )
   elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
     target_link_options(${BOARD_TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_Clang}"
       )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
   endif ()
 endfunction()
 
@@ -148,5 +148,21 @@ function(family_configure_example TARGET RTOS)
 
   # Flashing
   family_flash_jlink(${TARGET})
+
+  # Add the optional MSDK OpenOCD flashing
+  family_flash_msdk(${TARGET})
 endfunction()
 
+function(family_flash_msdk TARGET)
+  # Prepare the image (signed) if the board requires it
+  prepare_image(${TARGET})
+
+  set(MAXIM_PATH "$ENV{MAXIM_PATH}")
+  add_custom_target(${TARGET}-msdk
+    DEPENDS ${TARGET}
+    COMMAND ${MAXIM_PATH}/Tools/OpenOCD/openocd -s ${MAXIM_PATH}/Tools/OpenOCD/scripts
+            -f interface/cmsis-dap.cfg -f target/max32650.cfg
+            -c "program $<TARGET_FILE:${TARGET}> verify; init; reset; exit"
+    VERBATIM
+  )
+endfunction()
diff --git a/hw/bsp/max32650/family.mk b/hw/bsp/max32650/family.mk
index 6e9b7b8355..577d967178 100644
--- a/hw/bsp/max32650/family.mk
+++ b/hw/bsp/max32650/family.mk
@@ -13,9 +13,6 @@ PORT ?= 0
 # GCC
 SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/GCC/startup_max32650.S
 
-# IAR
-#SRC_S_IAR += ?
-
 # --------------
 # Compiler Flags
 # --------------
@@ -40,6 +37,26 @@ CFLAGS += 	-Wno-error=strict-prototypes \
 
 LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
 
+# Configure the flash rule. By default, use JLink.
+SIGNED_BUILD ?= 0
+DEFAULT_FLASH = flash-jlink
+
+# If the applications needs to be signed (for the MAX32651), sign it first and
+# then need to use MSDK's OpenOCD to flash it
+# Also need to include the __SLA_FWK__ define to enable the signed header into
+# memory
+ifeq ($(SIGNED_BUILD), 1)
+# Extra definitions to build for the secure part
+CFLAGS += -D__SLA_FWK__
+DEFAULT_FLASH := sign-build flash-msdk
+endif
+
+# For flash-jlink target
+JLINK_DEVICE = max32650
+
+# Configure the flash rule
+flash: $(DEFAULT_FLASH)
+
 # -----------------
 # Sources & Include
 # -----------------
@@ -70,7 +87,6 @@ SRC_C += \
 	$(PERIPH_SRC)/UART/uart_me10.c \
 	$(PERIPH_SRC)/UART/uart_reva.c \
 
-
 INC += \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
@@ -83,3 +99,43 @@ INC += \
 	$(PERIPH_SRC)/FLC \
 	$(PERIPH_SRC)/TPU \
 	$(PERIPH_SRC)/UART
+
+
+# The MAX32651EVKIT is pin for pin identical to the MAX32650EVKIT, however the
+# MAX32651 has a secure bootloader which requires the image to be signed before
+# loading into flash. All MAX32651EVKIT's have the same key for evaluation
+# purposes, so create a special flash rule to sign the binary and flash using
+# the MSDK.
+MCU_PATH = $(TOP)/hw/mcu/analog/max32/
+# Assume no extension for sign utility
+SIGN_EXE = sign_app
+ifeq ($(OS), Windows_NT)
+# Must use .exe extension on Windows, since the binaries
+# for Linux may live in the same place.
+SIGN_EXE := sign_app.exe
+else
+UNAME = $(shell uname -s)
+ifneq ($(findstring MSYS_NT,$(UNAME)),)
+# Must also use .exe extension for MSYS2
+SIGN_EXE := sign_app.exe
+endif
+endif
+
+# Rule to sign the build.  This will in-place modifiy the existing .elf file
+# an populate the .sig section with the signature value
+sign-build: $(BUILD)/$(PROJECT).elf
+	$(OBJCOPY) $(BUILD)/$(PROJECT).elf -R .sig -O binary $(BUILD)/$(PROJECT).bin
+	$(MCU_PATH)/Tools/SBT/bin/$(SIGN_EXE) -c MAX32651 \
+		key_file="$(MCU_PATH)/Tools/SBT/devices/MAX32651/keys/maximtestcrk.key" \
+		ca=$(BUILD)/$(PROJECT).bin sca=$(BUILD)/$(PROJECT).sbin
+	$(OBJCOPY) $(BUILD)/$(PROJECT).elf --update-section .sig=$(BUILD)/$(PROJECT).sig
+
+# Optional flash option when running within an installed MSDK to use OpenOCD
+# Mainline OpenOCD does not yet have the MAX32's flash algorithm integrated.
+# If the MSDK is installed, flash-msdk can be run to utilize the the modified
+# openocd with the algorithms
+MAXIM_PATH := $(subst \,/,$(MAXIM_PATH))
+flash-msdk: $(BUILD)/$(PROJECT).elf
+	$(MAXIM_PATH)/Tools/OpenOCD/openocd -s $(MAXIM_PATH)/Tools/OpenOCD/scripts \
+		-f interface/cmsis-dap.cfg -f target/max32650.cfg \
+		-c "program $(BUILD)/$(PROJECT).elf verify; init; reset; exit"
diff --git a/hw/bsp/max32666/README.md b/hw/bsp/max32666/README.md
new file mode 100644
index 0000000000..902d82e25b
--- /dev/null
+++ b/hw/bsp/max32666/README.md
@@ -0,0 +1,32 @@
+# Analog Devices MAX32665/6
+
+This BSP is for working with the Analog Devices
+[MAX32665](https://www.analog.com/en/products/max32665.html) and
+[MAX32666](https://www.analog.com/en/products/max32666.html) microcontrollers.
+The following boards are supported:
+ * [MAX32666EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32666evkit.html)
+ * [MAX32666FTHR](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32666fthr.html)
+
+
+This part family leverages the Maxim Microcontrollers SDK (MSDK) for the device
+interfaces and hardware abstraction layers. This source code package is fetched
+as part of the get-deps script.
+
+The microcontrollers utilize the standard GNU ARM toolchain.  If this toolchain
+is not already available on your build machine, it can be installed by using the
+bundled MSDK installation.  Details on downloading and installing can be found
+in the [User's Guide](https://analogdevicesinc.github.io/msdk//USERGUIDE/).
+
+## Flashing
+
+The default flashing behavior in this BSP is to utilize JLink.  This can be done
+by running the `flash` or `flash-jlink` rule for Makefiles, or the
+`<target>-jlink` target for CMake.
+
+Both the Evaluation Kit and Feather boards are shipped with a CMSIS-DAP
+compatible debug probe. However, at the time of writing, the necessary flashing
+algorithms for OpenOCD have not yet been incorporated into the OpenOCD master
+branch.  To utilize the provided debug probes, please install the bundled MSDK
+package which includes the appropriate OpenOCD modifications.   To leverage this
+OpenOCD instance, run the `flash-msdk` Makefile rule, or `<target>-msdk` CMake
+target.
diff --git a/hw/bsp/max32666/family.cmake b/hw/bsp/max32666/family.cmake
index c9fa2510a9..ef2a2bb639 100644
--- a/hw/bsp/max32666/family.cmake
+++ b/hw/bsp/max32666/family.cmake
@@ -42,7 +42,6 @@ function(add_board_target BOARD_TARGET)
   # Startup & Linker script
   set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX32665/Source/GCC/startup_max32665.S)
   set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${MAX32_CMSIS}/Device/Maxim/MAX32665/Source/IAR/startup_max32665.S)
 
   set(PERIPH_SRC ${MAX32_PERIPH}/Source)
   add_library(${BOARD_TARGET} STATIC
@@ -98,10 +97,6 @@ function(add_board_target BOARD_TARGET)
     target_link_options(${BOARD_TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_Clang}"
       )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
   endif ()
 endfunction()
 
@@ -148,4 +143,18 @@ function(family_configure_example TARGET RTOS)
 
   # Flashing
   family_flash_jlink(${TARGET})
+  family_flash_msdk(${TARGET})
+endfunction()
+
+# Add flash msdk target
+function(family_flash_msdk TARGET)
+  set(MAXIM_PATH "$ENV{MAXIM_PATH}")
+
+  add_custom_target(${TARGET}-msdk
+    DEPENDS ${TARGET}
+    COMMAND ${MAXIM_PATH}/Tools/OpenOCD/openocd -s ${MAXIM_PATH}/Tools/OpenOCD/scripts
+		        -f interface/cmsis-dap.cfg -f target/max32665.cfg
+		        -c "program $<TARGET_FILE:${TARGET}> verify; init; reset; exit"
+    VERBATIM
+    )
 endfunction()
diff --git a/hw/bsp/max32666/family.mk b/hw/bsp/max32666/family.mk
index 31428cacd2..31f81f014e 100644
--- a/hw/bsp/max32666/family.mk
+++ b/hw/bsp/max32666/family.mk
@@ -14,9 +14,6 @@ PORT ?= 0
 SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32665/Source/GCC/startup_max32665.S
 LD_FILE = $(FAMILY_PATH)/max32666.ld
 
-# IAR
-#SRC_S_IAR += ?
-
 # --------------
 # Compiler Flags
 # --------------
@@ -42,7 +39,7 @@ LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
 # For flash-jlink target
 JLINK_DEVICE = max32666
 
-# flash target using Jlik
+# flash target using Jlink by default
 flash: flash-jlink
 
 # Optional flash option when running within an installed MSDK to use OpenOCD
@@ -83,7 +80,6 @@ SRC_C += \
 	$(PERIPH_SRC)/UART/uart_me14.c \
 	$(PERIPH_SRC)/UART/uart_reva.c \
 
-
 INC += \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
diff --git a/hw/bsp/max32690/README.md b/hw/bsp/max32690/README.md
new file mode 100644
index 0000000000..081ae0ad43
--- /dev/null
+++ b/hw/bsp/max32690/README.md
@@ -0,0 +1,31 @@
+# Analog Devices MAX32690
+
+This BSP is for working with the Analog Devices
+[MAX32690](https://www.analog.com/en/products/max32690.html) microcontroller.
+The following boards are supported:
+ * [MAX32690EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max32690evkit.html)
+ * [AD-APARD32690-SL](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/ad-apard32690-sl.html)
+
+
+This part family leverages the Maxim Microcontrollers SDK (MSDK) for the device
+interfaces and hardware abstraction layers. This source code package is fetched
+as part of the get-deps script.
+
+The microcontroller utilizes the standard GNU ARM toolchain.  If this toolchain
+is not already available on your build machine, it can be installed by using the
+bundled MSDK installation.  Details on downloading and installing can be found
+in the [User's Guide](https://analogdevicesinc.github.io/msdk//USERGUIDE/).
+
+## Flashing
+
+The default flashing behavior in this BSP is to utilize JLink.  This can be done
+by running the `flash` or `flash-jlink` rule for Makefiles, or the
+`<target>-jlink` target for CMake.
+
+Both the Evaluation Kit and APARD boards are shipped with a CMSIS-DAP
+compatible debug probe. However, at the time of writing, the necessary flashing
+algorithms for OpenOCD have not yet been incorporated into the OpenOCD master
+branch.  To utilize the provided debug probes, please install the bundled MSDK
+package which includes the appropriate OpenOCD modifications.   To leverage this
+OpenOCD instance, run the `flash-msdk` Makefile rule, or `<target>-msdk` CMake
+target.
diff --git a/hw/bsp/max32690/family.cmake b/hw/bsp/max32690/family.cmake
index 8b117bae53..5c470f86b6 100644
--- a/hw/bsp/max32690/family.cmake
+++ b/hw/bsp/max32690/family.cmake
@@ -46,7 +46,6 @@ function(add_board_target BOARD_TARGET)
   # Startup & Linker script
   set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX32690/Source/GCC/startup_max32690.s)
   set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${MAX32_CMSIS}/Device/Maxim/MAX32690/Source/IAR/startup_max32690.s)
 
   set(PERIPH_SRC ${MAX32_PERIPH}/Source)
   add_library(${BOARD_TARGET} STATIC
@@ -89,7 +88,7 @@ function(add_board_target BOARD_TARGET)
     )
 
   target_compile_options(${BOARD_TARGET} PRIVATE
-  -Wno-error=strict-prototypes
+    -Wno-error=strict-prototypes
   )
   update_board(${BOARD_TARGET})
 
@@ -103,10 +102,6 @@ function(add_board_target BOARD_TARGET)
     target_link_options(${BOARD_TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_Clang}"
       )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
   endif ()
 endfunction()
 
@@ -153,4 +148,18 @@ function(family_configure_example TARGET RTOS)
 
   # Flashing
   family_flash_jlink(${TARGET})
+  family_flash_msdk(${TARGET})
+endfunction()
+
+# Add flash msdk target
+function(family_flash_msdk TARGET)
+  set(MAXIM_PATH "$ENV{MAXIM_PATH}")
+
+  add_custom_target(${TARGET}-msdk
+    DEPENDS ${TARGET}
+    COMMAND ${MAXIM_PATH}/Tools/OpenOCD/openocd -s ${MAXIM_PATH}/Tools/OpenOCD/scripts
+		        -f interface/cmsis-dap.cfg -f target/max32690.cfg
+		        -c "program $<TARGET_FILE:${TARGET}> verify; init; reset; exit"
+    VERBATIM
+    )
 endfunction()
diff --git a/hw/bsp/max32690/family.mk b/hw/bsp/max32690/family.mk
index 0405a29146..8b9fbc175c 100644
--- a/hw/bsp/max32690/family.mk
+++ b/hw/bsp/max32690/family.mk
@@ -14,9 +14,6 @@ PORT ?= 0
 SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/GCC/startup_max32690.s
 LD_FILE = $(FAMILY_PATH)/max32690.ld
 
-# IAR
-SRC_S_IAR += $(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/IAR/startup_max32690.s
-
 # --------------
 # Compiler Flags
 # --------------
@@ -49,7 +46,7 @@ LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
 # For flash-jlink target
 JLINK_DEVICE = max32690
 
-# flash target using Jlik
+# flash target using Jlink by default
 flash: flash-jlink
 
 # Optional flash option when running within an installed MSDK to use OpenOCD
@@ -91,7 +88,6 @@ SRC_C += \
 	$(PERIPH_SRC)/UART/uart_me18.c \
 	$(PERIPH_SRC)/UART/uart_revb.c \
 
-
 INC += \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
diff --git a/hw/bsp/max78002/README.md b/hw/bsp/max78002/README.md
new file mode 100644
index 0000000000..4fb1bede48
--- /dev/null
+++ b/hw/bsp/max78002/README.md
@@ -0,0 +1,28 @@
+# Analog Devices MAX78002
+
+This BSP is for working with the Analog Devices
+[MAX78002](https://www.analog.com/en/products/max78002.html) AI microcontroller.
+The following boards are supported:
+ * [MAX78002EVKIT](https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max78002evkit.html)
+
+This part family leverages the Maxim Microcontrollers SDK (MSDK) for the device
+interfaces and hardware abstraction layers. This source code package is fetched
+as part of the get-deps script.
+
+The microcontroller utilizes the standard GNU ARM toolchain.  If this toolchain
+is not already available on your build machine, it can be installed by using the
+bundled MSDK installation.  Details on downloading and installing can be found
+in the [User's Guide](https://analogdevicesinc.github.io/msdk//USERGUIDE/).
+
+## Flashing
+
+The default flashing behavior in this BSP is to utilize JLink.  This can be done
+by running the `flash` or `flash-jlink` rule for Makefiles, or the
+`<target>-jlink` target for CMake.
+
+The Evaluation Kit is shipped with a CMSIS-DAP compatible debug probe. However,
+at the time of writing, the necessary flashing algorithms for OpenOCD have not
+yet been incorporated into the OpenOCD master branch.  To utilize the provided
+debug probes, please install the bundled MSDK package which includes the
+appropriate OpenOCD modifications.   To leverage this OpenOCD instance, run the
+`flash-msdk` Makefile rule, or `<target>-msdk` CMake target.
diff --git a/hw/bsp/max78002/family.cmake b/hw/bsp/max78002/family.cmake
index 28eaaa7e94..83fd3007ff 100644
--- a/hw/bsp/max78002/family.cmake
+++ b/hw/bsp/max78002/family.cmake
@@ -42,7 +42,6 @@ function(add_board_target BOARD_TARGET)
   # Startup & Linker script
   set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX78002/Source/GCC/startup_max78002.S)
   set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  #set(STARTUP_FILE_IAR ?)
 
   set(PERIPH_SRC ${MAX32_PERIPH}/Source)
   add_library(${BOARD_TARGET} STATIC
@@ -87,8 +86,8 @@ function(add_board_target BOARD_TARGET)
     )
 
   target_compile_options(${BOARD_TARGET} PRIVATE
-  -Wno-error=strict-prototypes
-  -Wno-error=redundant-decls
+    -Wno-error=strict-prototypes
+    -Wno-error=redundant-decls
   )
   update_board(${BOARD_TARGET})
 
@@ -102,10 +101,6 @@ function(add_board_target BOARD_TARGET)
     target_link_options(${BOARD_TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_Clang}"
       )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
   endif ()
 endfunction()
 
@@ -146,8 +141,8 @@ function(family_configure_example TARGET RTOS)
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
   target_compile_options(${TARGET}-tinyusb PRIVATE
-  -Wno-error=strict-prototypes
-  -Wno-error=redundant-decls
+    -Wno-error=strict-prototypes
+    -Wno-error=redundant-decls
   )
 
   # Link dependencies
@@ -155,4 +150,18 @@ function(family_configure_example TARGET RTOS)
 
   # Flashing
   family_flash_jlink(${TARGET})
+  family_flash_msdk(${TARGET})
+endfunction()
+
+# Add flash msdk target
+function(family_flash_msdk TARGET)
+  set(MAXIM_PATH "$ENV{MAXIM_PATH}")
+
+  add_custom_target(${TARGET}-msdk
+    DEPENDS ${TARGET}
+    COMMAND ${MAXIM_PATH}/Tools/OpenOCD/openocd -s ${MAXIM_PATH}/Tools/OpenOCD/scripts
+		        -f interface/cmsis-dap.cfg -f target/max78002.cfg
+		        -c "program $<TARGET_FILE:${TARGET}> verify; init; reset; exit"
+    VERBATIM
+    )
 endfunction()
diff --git a/hw/bsp/max78002/family.mk b/hw/bsp/max78002/family.mk
index 04163417c5..8df8517da5 100644
--- a/hw/bsp/max78002/family.mk
+++ b/hw/bsp/max78002/family.mk
@@ -14,9 +14,6 @@ PORT ?= 0
 SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX78002/Source/GCC/startup_max78002.S
 LD_FILE = $(FAMILY_PATH)/max78002.ld
 
-# IAR
-#SRC_S_IAR +=
-
 # --------------
 # Compiler Flags
 # --------------
@@ -45,7 +42,7 @@ LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
 # For flash-jlink target
 JLINK_DEVICE = max78000
 
-# flash target using Jlik
+# flash target using Jlink by default
 flash: flash-jlink
 
 # Optional flash option when running within an installed MSDK to use OpenOCD
@@ -88,7 +85,6 @@ SRC_C += \
 	$(PERIPH_SRC)/UART/uart_ai87.c \
 	$(PERIPH_SRC)/UART/uart_revb.c \
 
-
 INC += \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \

From 494533f9d7b7961dd9a3acf7c2e9070f8ba172b5 Mon Sep 17 00:00:00 2001
From: Brent Kowal <brent.kowal@analog.com>
Date: Wed, 10 Jul 2024 15:52:43 -0400
Subject: [PATCH 041/204] Minor build system fix

Correct a case-sensitive file extension issue in the MAX32690 build scripts.  Did not present itself as an issue under MinGW or MSYS, just Linux.
---
 hw/bsp/max32690/family.cmake | 2 +-
 hw/bsp/max32690/family.mk    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/bsp/max32690/family.cmake b/hw/bsp/max32690/family.cmake
index 5c470f86b6..d7a5629566 100644
--- a/hw/bsp/max32690/family.cmake
+++ b/hw/bsp/max32690/family.cmake
@@ -44,7 +44,7 @@ function(add_board_target BOARD_TARGET)
   endif ()
 
   # Startup & Linker script
-  set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX32690/Source/GCC/startup_max32690.s)
+  set(STARTUP_FILE_GNU ${MAX32_CMSIS}/Device/Maxim/MAX32690/Source/GCC/startup_max32690.S)
   set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
   set(PERIPH_SRC ${MAX32_PERIPH}/Source)
diff --git a/hw/bsp/max32690/family.mk b/hw/bsp/max32690/family.mk
index 8b9fbc175c..9360a07c62 100644
--- a/hw/bsp/max32690/family.mk
+++ b/hw/bsp/max32690/family.mk
@@ -11,7 +11,7 @@ CPU_CORE ?= cortex-m4
 PORT ?= 0
 
 # GCC
-SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/GCC/startup_max32690.s
+SRC_S_GCC += $(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/GCC/startup_max32690.S
 LD_FILE = $(FAMILY_PATH)/max32690.ld
 
 # --------------

From 13f5f20c981cc54baa8438e275524db03fb79e94 Mon Sep 17 00:00:00 2001
From: Brent Kowal <brent.kowal@analog.com>
Date: Thu, 11 Jul 2024 12:13:30 -0400
Subject: [PATCH 042/204] Pre-commit fixes.

Resolve codespell and EOF errors found in the pre-commit CI task.
---
 hw/bsp/max32650/README.md                        | 2 +-
 hw/bsp/max32650/boards/max32650evkit/max32650.ld | 2 +-
 hw/bsp/max32650/boards/max32650fthr/max32650.ld  | 2 +-
 hw/bsp/max32650/boards/max32651evkit/max32651.ld | 2 +-
 hw/bsp/max32650/family.mk                        | 2 +-
 hw/bsp/max32666/family.c                         | 2 +-
 hw/bsp/max32666/max32666.ld                      | 2 +-
 hw/bsp/max32690/family.c                         | 2 +-
 hw/bsp/max32690/max32690.ld                      | 2 +-
 hw/bsp/max78002/family.c                         | 2 +-
 hw/bsp/max78002/max78002.ld                      | 4 ++--
 src/portable/analog/max32/dcd_max32.c            | 2 +-
 12 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/hw/bsp/max32650/README.md b/hw/bsp/max32650/README.md
index cb8069bba7..ca66a1ac45 100644
--- a/hw/bsp/max32650/README.md
+++ b/hw/bsp/max32650/README.md
@@ -43,4 +43,4 @@ MAX32651EVKIT.
 
 To flash the signed image, the MSDK's OpenOCD variant must be used.  To flash
 the MAX32651EVKIT please install the bundled MSDK, and utilize the `flash-msdk`
-and `<target>-msdk` rule and target.
\ No newline at end of file
+and `<target>-msdk` rule and target.
diff --git a/hw/bsp/max32650/boards/max32650evkit/max32650.ld b/hw/bsp/max32650/boards/max32650evkit/max32650.ld
index 3a1e5100d6..0e56a91ec3 100644
--- a/hw/bsp/max32650/boards/max32650evkit/max32650.ld
+++ b/hw/bsp/max32650/boards/max32650evkit/max32650.ld
@@ -85,7 +85,7 @@ SECTIONS {
     {
         . = ALIGN(4);
         _bss = .;
-        *(.bss*)     /*read-write zero initialized data: uninitialzed global variable*/
+        *(.bss*)     /*read-write zero initialized data: uninitialized global variable*/
         *(COMMON)
         _ebss = ALIGN(., 4);
     } > SRAM
diff --git a/hw/bsp/max32650/boards/max32650fthr/max32650.ld b/hw/bsp/max32650/boards/max32650fthr/max32650.ld
index 3a1e5100d6..0e56a91ec3 100644
--- a/hw/bsp/max32650/boards/max32650fthr/max32650.ld
+++ b/hw/bsp/max32650/boards/max32650fthr/max32650.ld
@@ -85,7 +85,7 @@ SECTIONS {
     {
         . = ALIGN(4);
         _bss = .;
-        *(.bss*)     /*read-write zero initialized data: uninitialzed global variable*/
+        *(.bss*)     /*read-write zero initialized data: uninitialized global variable*/
         *(COMMON)
         _ebss = ALIGN(., 4);
     } > SRAM
diff --git a/hw/bsp/max32650/boards/max32651evkit/max32651.ld b/hw/bsp/max32650/boards/max32651evkit/max32651.ld
index a873463d4d..3921d10f23 100644
--- a/hw/bsp/max32650/boards/max32651evkit/max32651.ld
+++ b/hw/bsp/max32650/boards/max32651evkit/max32651.ld
@@ -98,7 +98,7 @@ SECTIONS {
     {
         . = ALIGN(4);
         _bss = .;
-        *(.bss*)     /*read-write zero initialized data: uninitialzed global variable*/
+        *(.bss*)     /*read-write zero initialized data: uninitialized global variable*/
         *(COMMON)
         _ebss = ALIGN(., 4);
     } > SRAM
diff --git a/hw/bsp/max32650/family.mk b/hw/bsp/max32650/family.mk
index 577d967178..0718523c36 100644
--- a/hw/bsp/max32650/family.mk
+++ b/hw/bsp/max32650/family.mk
@@ -121,7 +121,7 @@ SIGN_EXE := sign_app.exe
 endif
 endif
 
-# Rule to sign the build.  This will in-place modifiy the existing .elf file
+# Rule to sign the build.  This will in-place modify the existing .elf file
 # an populate the .sig section with the signature value
 sign-build: $(BUILD)/$(PROJECT).elf
 	$(OBJCOPY) $(BUILD)/$(PROJECT).elf -R .sig -O binary $(BUILD)/$(PROJECT).bin
diff --git a/hw/bsp/max32666/family.c b/hw/bsp/max32666/family.c
index 98e1248d7a..1398e09ffe 100644
--- a/hw/bsp/max32666/family.c
+++ b/hw/bsp/max32666/family.c
@@ -106,7 +106,7 @@ uint32_t board_button_read(void) {
 
 size_t board_get_unique_id(uint8_t id[], size_t max_len) {
   uint8_t hw_id[MXC_SYS_USN_CHECKSUM_LEN];//USN Buffer
-                                          /* All other 2nd parameter is optional checkum buffer */
+                                          /* All other 2nd parameter is optional checksum buffer */
   MXC_SYS_GetUSN(hw_id, NULL);
 
   size_t act_len = TU_MIN(max_len, MXC_SYS_USN_LEN);
diff --git a/hw/bsp/max32666/max32666.ld b/hw/bsp/max32666/max32666.ld
index dcf61a3d08..06c1242471 100644
--- a/hw/bsp/max32666/max32666.ld
+++ b/hw/bsp/max32666/max32666.ld
@@ -101,7 +101,7 @@ SECTIONS {
     {
         . = ALIGN(4);
         _bss = .;
-        *(.bss*)     /*read-write zero initialized data: uninitialzed global variable*/
+        *(.bss*)     /*read-write zero initialized data: uninitialized global variable*/
         *(COMMON)
         _ebss = ALIGN(., 4);
     } > SRAM
diff --git a/hw/bsp/max32690/family.c b/hw/bsp/max32690/family.c
index acd6e25937..f4998bdbe3 100644
--- a/hw/bsp/max32690/family.c
+++ b/hw/bsp/max32690/family.c
@@ -104,7 +104,7 @@ uint32_t board_button_read(void) {
 
 size_t board_get_unique_id(uint8_t id[], size_t max_len) {
   uint8_t hw_id[MXC_SYS_USN_CHECKSUM_LEN];//USN Buffer
-                                          /* All other 2nd parameter is optional checkum buffer */
+                                          /* All other 2nd parameter is optional checksum buffer */
   MXC_SYS_GetUSN(hw_id, NULL);
 
   size_t act_len = TU_MIN(max_len, MXC_SYS_USN_LEN);
diff --git a/hw/bsp/max32690/max32690.ld b/hw/bsp/max32690/max32690.ld
index 3d857b4e83..64b906a541 100644
--- a/hw/bsp/max32690/max32690.ld
+++ b/hw/bsp/max32690/max32690.ld
@@ -130,7 +130,7 @@ SECTIONS {
     {
         . = ALIGN(4);
         _bss = .;
-        *(.bss*)     /*read-write zero initialized data: uninitialzed global variable*/
+        *(.bss*)     /*read-write zero initialized data: uninitialized global variable*/
         *(COMMON)
         _ebss = ALIGN(., 4);
     } > SRAM
diff --git a/hw/bsp/max78002/family.c b/hw/bsp/max78002/family.c
index c105f056b7..7758083a2a 100644
--- a/hw/bsp/max78002/family.c
+++ b/hw/bsp/max78002/family.c
@@ -103,7 +103,7 @@ uint32_t board_button_read(void) {
 
 size_t board_get_unique_id(uint8_t id[], size_t max_len) {
   uint8_t hw_id[MXC_SYS_USN_CHECKSUM_LEN];//USN Buffer
-                                          /* All other 2nd parameter is optional checkum buffer */
+                                          /* All other 2nd parameter is optional checksum buffer */
   MXC_SYS_GetUSN(hw_id, NULL);
 
   size_t act_len = TU_MIN(max_len, MXC_SYS_USN_LEN);
diff --git a/hw/bsp/max78002/max78002.ld b/hw/bsp/max78002/max78002.ld
index 60f99e28fd..e5c4866ee0 100644
--- a/hw/bsp/max78002/max78002.ld
+++ b/hw/bsp/max78002/max78002.ld
@@ -127,7 +127,7 @@ SECTIONS {
     {
         . = ALIGN(4);
         _bss = .;
-        *(.bss*)     /*read-write zero initialized data: uninitialzed global variable*/
+        *(.bss*)     /*read-write zero initialized data: uninitialized global variable*/
         *(COMMON)
         _ebss = ALIGN(., 4);
     } > SRAM
@@ -138,7 +138,7 @@ SECTIONS {
         _shared = .;
         *(.mailbox*)
         . = ALIGN(4);
-        *(.shared*)     /*read-write zero initialized data: uninitialzed global variable*/
+        *(.shared*)     /*read-write zero initialized data: uninitialized global variable*/
         _eshared = ALIGN(., 4);
     } > SRAM
     __shared_data = LOADADDR(.shared);
diff --git a/src/portable/analog/max32/dcd_max32.c b/src/portable/analog/max32/dcd_max32.c
index 7226003de7..df616120ab 100644
--- a/src/portable/analog/max32/dcd_max32.c
+++ b/src/portable/analog/max32/dcd_max32.c
@@ -196,7 +196,7 @@ static bool handle_xfer_in(uint_fast8_t ep_addr) {
     }
     pipe->remaining = rem - len;
   }
-  MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_INPKTRDY;//TODO: Verify a | isnt needed
+  MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_INPKTRDY;//TODO: Verify a | isn't needed
 
   return false;
 }

From 1f590c36287e26b6d189bf41f9b7704e957bf8af Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 12 Jul 2024 16:53:21 +0700
Subject: [PATCH 043/204] - add tud_cdc_configure_fifo() to replace
 CFG_TUD_CDC_PERSISTENT_TX_BUFF - new line, and code format

---
 src/class/cdc/cdc_device.c | 237 +++++++++++++++----------------------
 src/class/cdc/cdc_device.h | 195 +++++++++++-------------------
 2 files changed, 168 insertions(+), 264 deletions(-)

diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index f36725ebac..681a1b8520 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -45,8 +45,7 @@
 //--------------------------------------------------------------------+
 #define BULK_PACKET_SIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
 
-typedef struct
-{
+typedef struct {
   uint8_t itf_num;
   uint8_t ep_notif;
   uint8_t ep_in;
@@ -56,7 +55,7 @@ typedef struct
   uint8_t line_state;
 
   /*------------- From this point, data is not cleared by bus reset -------------*/
-  char    wanted_char;
+  char wanted_char;
   TU_ATTR_ALIGNED(4) cdc_line_coding_t line_coding;
 
   // FIFO
@@ -72,18 +71,17 @@ typedef struct
   // Endpoint Transfer buffer
   CFG_TUSB_MEM_ALIGN uint8_t epout_buf[CFG_TUD_CDC_EP_BUFSIZE];
   CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_CDC_EP_BUFSIZE];
-
-}cdcd_interface_t;
+} cdcd_interface_t;
 
 #define ITF_MEM_RESET_SIZE   offsetof(cdcd_interface_t, wanted_char)
 
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-CFG_TUD_MEM_SECTION tu_static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
+CFG_TUD_MEM_SECTION static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
+static tud_cdc_configure_fifo_t _cdcd_fifo_cfg;
 
-static bool _prep_out_transaction (cdcd_interface_t* p_cdc)
-{
+static bool _prep_out_transaction (cdcd_interface_t* p_cdc) {
   uint8_t const rhport = 0;
   uint16_t available = tu_fifo_remaining(&p_cdc->rx_ff);
 
@@ -99,14 +97,11 @@ static bool _prep_out_transaction (cdcd_interface_t* p_cdc)
   // fifo can be changed before endpoint is claimed
   available = tu_fifo_remaining(&p_cdc->rx_ff);
 
-  if ( available >= sizeof(p_cdc->epout_buf) )
-  {
+  if ( available >= sizeof(p_cdc->epout_buf) ) {
     return usbd_edpt_xfer(rhport, p_cdc->ep_out, p_cdc->epout_buf, sizeof(p_cdc->epout_buf));
-  }else
-  {
+  }else {
     // Release endpoint since we don't make any transfer
     usbd_edpt_release(rhport, p_cdc->ep_out);
-
     return false;
   }
 }
@@ -114,51 +109,49 @@ static bool _prep_out_transaction (cdcd_interface_t* p_cdc)
 //--------------------------------------------------------------------+
 // APPLICATION API
 //--------------------------------------------------------------------+
-bool tud_cdc_n_connected(uint8_t itf)
-{
+
+bool tud_cdc_configure_fifo(tud_cdc_configure_fifo_t const* cfg) {
+  TU_VERIFY(cfg);
+  _cdcd_fifo_cfg = (*cfg);
+  return true;
+}
+
+bool tud_cdc_n_connected(uint8_t itf) {
   // DTR (bit 0) active  is considered as connected
   return tud_ready() && tu_bit_test(_cdcd_itf[itf].line_state, 0);
 }
 
-uint8_t tud_cdc_n_get_line_state (uint8_t itf)
-{
+uint8_t tud_cdc_n_get_line_state(uint8_t itf) {
   return _cdcd_itf[itf].line_state;
 }
 
-void tud_cdc_n_get_line_coding (uint8_t itf, cdc_line_coding_t* coding)
-{
+void tud_cdc_n_get_line_coding(uint8_t itf, cdc_line_coding_t* coding) {
   (*coding) = _cdcd_itf[itf].line_coding;
 }
 
-void tud_cdc_n_set_wanted_char (uint8_t itf, char wanted)
-{
+void tud_cdc_n_set_wanted_char(uint8_t itf, char wanted) {
   _cdcd_itf[itf].wanted_char = wanted;
 }
 
-
 //--------------------------------------------------------------------+
 // READ API
 //--------------------------------------------------------------------+
-uint32_t tud_cdc_n_available(uint8_t itf)
-{
+uint32_t tud_cdc_n_available(uint8_t itf) {
   return tu_fifo_count(&_cdcd_itf[itf].rx_ff);
 }
 
-uint32_t tud_cdc_n_read(uint8_t itf, void* buffer, uint32_t bufsize)
-{
+uint32_t tud_cdc_n_read(uint8_t itf, void* buffer, uint32_t bufsize) {
   cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
   uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
   _prep_out_transaction(p_cdc);
   return num_read;
 }
 
-bool tud_cdc_n_peek(uint8_t itf, uint8_t* chr)
-{
+bool tud_cdc_n_peek(uint8_t itf, uint8_t* chr) {
   return tu_fifo_peek(&_cdcd_itf[itf].rx_ff, chr);
 }
 
-void tud_cdc_n_read_flush (uint8_t itf)
-{
+void tud_cdc_n_read_flush(uint8_t itf) {
   cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
   tu_fifo_clear(&p_cdc->rx_ff);
   _prep_out_transaction(p_cdc);
@@ -167,16 +160,15 @@ void tud_cdc_n_read_flush (uint8_t itf)
 //--------------------------------------------------------------------+
 // WRITE API
 //--------------------------------------------------------------------+
-uint32_t tud_cdc_n_write(uint8_t itf, void const* buffer, uint32_t bufsize)
-{
+uint32_t tud_cdc_n_write(uint8_t itf, void const* buffer, uint32_t bufsize) {
   cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
   uint16_t ret = tu_fifo_write_n(&p_cdc->tx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
 
   // flush if queue more than packet size
-  if ( tu_fifo_count(&p_cdc->tx_ff) >= BULK_PACKET_SIZE
-       #if CFG_TUD_CDC_TX_BUFSIZE < BULK_PACKET_SIZE
-       || tu_fifo_full(&p_cdc->tx_ff) // check full if fifo size is less than packet size
-       #endif
+  if (tu_fifo_count(&p_cdc->tx_ff) >= BULK_PACKET_SIZE
+      #if CFG_TUD_CDC_TX_BUFSIZE < BULK_PACKET_SIZE
+      || tu_fifo_full(&p_cdc->tx_ff) // check full if fifo size is less than packet size
+      #endif
       ) {
     tud_cdc_n_write_flush(itf);
   }
@@ -184,30 +176,27 @@ uint32_t tud_cdc_n_write(uint8_t itf, void const* buffer, uint32_t bufsize)
   return ret;
 }
 
-uint32_t tud_cdc_n_write_flush (uint8_t itf)
-{
+uint32_t tud_cdc_n_write_flush(uint8_t itf) {
   cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
 
   // Skip if usb is not ready yet
-  TU_VERIFY( tud_ready(), 0 );
+  TU_VERIFY(tud_ready(), 0);
 
   // No data to send
-  if ( !tu_fifo_count(&p_cdc->tx_ff) ) return 0;
+  if (!tu_fifo_count(&p_cdc->tx_ff)) return 0;
 
   uint8_t const rhport = 0;
 
   // Claim the endpoint
-  TU_VERIFY( usbd_edpt_claim(rhport, p_cdc->ep_in), 0 );
+  TU_VERIFY(usbd_edpt_claim(rhport, p_cdc->ep_in), 0);
 
   // Pull data from FIFO
   uint16_t const count = tu_fifo_read_n(&p_cdc->tx_ff, p_cdc->epin_buf, sizeof(p_cdc->epin_buf));
 
-  if ( count )
-  {
-    TU_ASSERT( usbd_edpt_xfer(rhport, p_cdc->ep_in, p_cdc->epin_buf, count), 0 );
+  if (count) {
+    TU_ASSERT(usbd_edpt_xfer(rhport, p_cdc->ep_in, p_cdc->epin_buf, count), 0);
     return count;
-  }else
-  {
+  } else {
     // Release endpoint since we don't make any transfer
     // Note: data is dropped if terminal is not connected
     usbd_edpt_release(rhport, p_cdc->ep_in);
@@ -215,33 +204,30 @@ uint32_t tud_cdc_n_write_flush (uint8_t itf)
   }
 }
 
-uint32_t tud_cdc_n_write_available (uint8_t itf)
-{
+uint32_t tud_cdc_n_write_available(uint8_t itf) {
   return tu_fifo_remaining(&_cdcd_itf[itf].tx_ff);
 }
 
-bool tud_cdc_n_write_clear (uint8_t itf)
-{
+bool tud_cdc_n_write_clear(uint8_t itf) {
   return tu_fifo_clear(&_cdcd_itf[itf].tx_ff);
 }
 
 //--------------------------------------------------------------------+
 // USBD Driver API
 //--------------------------------------------------------------------+
-void cdcd_init(void)
-{
+void cdcd_init(void) {
   tu_memclr(_cdcd_itf, sizeof(_cdcd_itf));
+  tu_memclr(&_cdcd_fifo_cfg, sizeof(_cdcd_fifo_cfg));
 
-  for(uint8_t i=0; i<CFG_TUD_CDC; i++)
-  {
+  for (uint8_t i = 0; i < CFG_TUD_CDC; i++) {
     cdcd_interface_t* p_cdc = &_cdcd_itf[i];
 
     p_cdc->wanted_char = (char) -1;
 
     // default line coding is : stop bit = 1, parity = none, data bits = 8
-    p_cdc->line_coding.bit_rate  = 115200;
+    p_cdc->line_coding.bit_rate = 115200;
     p_cdc->line_coding.stop_bits = 0;
-    p_cdc->line_coding.parity    = 0;
+    p_cdc->line_coding.parity = 0;
     p_cdc->line_coding.data_bits = 8;
 
     // Config RX fifo
@@ -285,35 +271,28 @@ bool cdcd_deinit(void) {
   return true;
 }
 
-void cdcd_reset(uint8_t rhport)
-{
+void cdcd_reset(uint8_t rhport) {
   (void) rhport;
 
-  for(uint8_t i=0; i<CFG_TUD_CDC; i++)
-  {
+  for (uint8_t i = 0; i < CFG_TUD_CDC; i++) {
     cdcd_interface_t* p_cdc = &_cdcd_itf[i];
 
     tu_memclr(p_cdc, ITF_MEM_RESET_SIZE);
-    tu_fifo_clear(&p_cdc->rx_ff);
-    #if !CFG_TUD_CDC_PERSISTENT_TX_BUFF
-    tu_fifo_clear(&p_cdc->tx_ff);
-    #endif
+    if (!_cdcd_fifo_cfg.rx_persistent) tu_fifo_clear(&p_cdc->rx_ff);
+    if (!_cdcd_fifo_cfg.tx_persistent) tu_fifo_clear(&p_cdc->tx_ff);
     tu_fifo_set_overwritable(&p_cdc->tx_ff, true);
   }
 }
 
-uint16_t cdcd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len)
-{
+uint16_t cdcd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len) {
   // Only support ACM subclass
   TU_VERIFY( TUSB_CLASS_CDC                           == itf_desc->bInterfaceClass &&
              CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL == itf_desc->bInterfaceSubClass, 0);
 
   // Find available interface
-  cdcd_interface_t * p_cdc = NULL;
-  for(uint8_t cdc_id=0; cdc_id<CFG_TUD_CDC; cdc_id++)
-  {
-    if ( _cdcd_itf[cdc_id].ep_in == 0 )
-    {
+  cdcd_interface_t* p_cdc = NULL;
+  for (uint8_t cdc_id = 0; cdc_id < CFG_TUD_CDC; cdc_id++) {
+    if (_cdcd_itf[cdc_id].ep_in == 0) {
       p_cdc = &_cdcd_itf[cdc_id];
       break;
     }
@@ -324,39 +303,36 @@ uint16_t cdcd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint1
   p_cdc->itf_num = itf_desc->bInterfaceNumber;
 
   uint16_t drv_len = sizeof(tusb_desc_interface_t);
-  uint8_t const * p_desc = tu_desc_next( itf_desc );
+  uint8_t const* p_desc = tu_desc_next(itf_desc);
 
   // Communication Functional Descriptors
-  while ( TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc) && drv_len <= max_len )
-  {
+  while (TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc) && drv_len <= max_len) {
     drv_len += tu_desc_len(p_desc);
-    p_desc   = tu_desc_next(p_desc);
+    p_desc = tu_desc_next(p_desc);
   }
 
-  if ( TUSB_DESC_ENDPOINT == tu_desc_type(p_desc) )
-  {
+  if (TUSB_DESC_ENDPOINT == tu_desc_type(p_desc)) {
     // notification endpoint
-    tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) p_desc;
+    tusb_desc_endpoint_t const* desc_ep = (tusb_desc_endpoint_t const*) p_desc;
 
-    TU_ASSERT( usbd_edpt_open(rhport, desc_ep), 0 );
+    TU_ASSERT(usbd_edpt_open(rhport, desc_ep), 0);
     p_cdc->ep_notif = desc_ep->bEndpointAddress;
 
     drv_len += tu_desc_len(p_desc);
-    p_desc   = tu_desc_next(p_desc);
+    p_desc = tu_desc_next(p_desc);
   }
 
   //------------- Data Interface (if any) -------------//
-  if ( (TUSB_DESC_INTERFACE == tu_desc_type(p_desc)) &&
-       (TUSB_CLASS_CDC_DATA == ((tusb_desc_interface_t const *) p_desc)->bInterfaceClass) )
-  {
+  if ((TUSB_DESC_INTERFACE == tu_desc_type(p_desc)) &&
+      (TUSB_CLASS_CDC_DATA == ((tusb_desc_interface_t const*) p_desc)->bInterfaceClass)) {
     // next to endpoint descriptor
     drv_len += tu_desc_len(p_desc);
-    p_desc   = tu_desc_next(p_desc);
+    p_desc = tu_desc_next(p_desc);
 
     // Open endpoint pair
-    TU_ASSERT( usbd_open_edpt_pair(rhport, p_desc, 2, TUSB_XFER_BULK, &p_cdc->ep_out, &p_cdc->ep_in), 0 );
+    TU_ASSERT(usbd_open_edpt_pair(rhport, p_desc, 2, TUSB_XFER_BULK, &p_cdc->ep_out, &p_cdc->ep_in), 0);
 
-    drv_len += 2*sizeof(tusb_desc_endpoint_t);
+    drv_len += 2 * sizeof(tusb_desc_endpoint_t);
   }
 
   // Prepare for incoming data
@@ -368,8 +344,7 @@ uint16_t cdcd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint1
 // Invoked when a control transfer occurred on an interface of this class
 // Driver response accordingly to the request and the transfer stage (setup/data/ack)
 // return false to stall control endpoint (e.g unsupported request)
-bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request)
-{
+bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const* request) {
   // Handle class request only
   TU_VERIFY(request->bmRequestType_bit.type == TUSB_REQ_TYPE_CLASS);
 
@@ -377,42 +352,33 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
   cdcd_interface_t* p_cdc = _cdcd_itf;
 
   // Identify which interface to use
-  for ( ; ; itf++, p_cdc++)
-  {
+  for (;; itf++, p_cdc++) {
     if (itf >= TU_ARRAY_SIZE(_cdcd_itf)) return false;
 
-    if ( p_cdc->itf_num == request->wIndex ) break;
+    if (p_cdc->itf_num == request->wIndex) break;
   }
 
-  switch ( request->bRequest )
-  {
+  switch (request->bRequest) {
     case CDC_REQUEST_SET_LINE_CODING:
-      if (stage == CONTROL_STAGE_SETUP)
-      {
+      if (stage == CONTROL_STAGE_SETUP) {
         TU_LOG_DRV("  Set Line Coding\r\n");
         tud_control_xfer(rhport, request, &p_cdc->line_coding, sizeof(cdc_line_coding_t));
+      } else if (stage == CONTROL_STAGE_ACK) {
+        if (tud_cdc_line_coding_cb) tud_cdc_line_coding_cb(itf, &p_cdc->line_coding);
       }
-      else if ( stage == CONTROL_STAGE_ACK)
-      {
-        if ( tud_cdc_line_coding_cb ) tud_cdc_line_coding_cb(itf, &p_cdc->line_coding);
-      }
-    break;
+      break;
 
     case CDC_REQUEST_GET_LINE_CODING:
-      if (stage == CONTROL_STAGE_SETUP)
-      {
+      if (stage == CONTROL_STAGE_SETUP) {
         TU_LOG_DRV("  Get Line Coding\r\n");
         tud_control_xfer(rhport, request, &p_cdc->line_coding, sizeof(cdc_line_coding_t));
       }
-    break;
+      break;
 
     case CDC_REQUEST_SET_CONTROL_LINE_STATE:
-      if (stage == CONTROL_STAGE_SETUP)
-      {
+      if (stage == CONTROL_STAGE_SETUP) {
         tud_control_status(rhport, request);
-      }
-      else if (stage == CONTROL_STAGE_ACK)
-      {
+      } else if (stage == CONTROL_STAGE_ACK) {
         // CDC PSTN v1.2 section 6.3.12
         // Bit 0: Indicates if DTE is present or not.
         //        This signal corresponds to V.24 signal 108/2 and RS-232 signal DTR (Data Terminal Ready)
@@ -429,61 +395,54 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
         TU_LOG_DRV("  Set Control Line State: DTR = %d, RTS = %d\r\n", dtr, rts);
 
         // Invoke callback
-        if ( tud_cdc_line_state_cb ) tud_cdc_line_state_cb(itf, dtr, rts);
+        if (tud_cdc_line_state_cb) tud_cdc_line_state_cb(itf, dtr, rts);
       }
-    break;
+      break;
+
     case CDC_REQUEST_SEND_BREAK:
-      if (stage == CONTROL_STAGE_SETUP)
-      {
+      if (stage == CONTROL_STAGE_SETUP) {
         tud_control_status(rhport, request);
-      }
-      else if (stage == CONTROL_STAGE_ACK)
-      {
+      } else if (stage == CONTROL_STAGE_ACK) {
         TU_LOG_DRV("  Send Break\r\n");
-        if ( tud_cdc_send_break_cb ) tud_cdc_send_break_cb(itf, request->wValue);
+        if (tud_cdc_send_break_cb) tud_cdc_send_break_cb(itf, request->wValue);
       }
-    break;
+      break;
 
-    default: return false; // stall unsupported request
+    default:
+      return false; // stall unsupported request
   }
 
   return true;
 }
 
-bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes)
-{
+bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) {
   (void) result;
 
   uint8_t itf;
   cdcd_interface_t* p_cdc;
 
   // Identify which interface to use
-  for (itf = 0; itf < CFG_TUD_CDC; itf++)
-  {
+  for (itf = 0; itf < CFG_TUD_CDC; itf++) {
     p_cdc = &_cdcd_itf[itf];
-    if ( ( ep_addr == p_cdc->ep_out ) || ( ep_addr == p_cdc->ep_in ) ) break;
+    if ((ep_addr == p_cdc->ep_out) || (ep_addr == p_cdc->ep_in)) break;
   }
   TU_ASSERT(itf < CFG_TUD_CDC);
 
   // Received new data
-  if ( ep_addr == p_cdc->ep_out )
-  {
+  if (ep_addr == p_cdc->ep_out) {
     tu_fifo_write_n(&p_cdc->rx_ff, p_cdc->epout_buf, (uint16_t) xferred_bytes);
 
     // Check for wanted char and invoke callback if needed
-    if ( tud_cdc_rx_wanted_cb && (((signed char) p_cdc->wanted_char) != -1) )
-    {
-      for ( uint32_t i = 0; i < xferred_bytes; i++ )
-      {
-        if ( (p_cdc->wanted_char == p_cdc->epout_buf[i]) && !tu_fifo_empty(&p_cdc->rx_ff) )
-        {
+    if (tud_cdc_rx_wanted_cb && (((signed char) p_cdc->wanted_char) != -1)) {
+      for (uint32_t i = 0; i < xferred_bytes; i++) {
+        if ((p_cdc->wanted_char == p_cdc->epout_buf[i]) && !tu_fifo_empty(&p_cdc->rx_ff)) {
           tud_cdc_rx_wanted_cb(itf, p_cdc->wanted_char);
         }
       }
     }
 
     // invoke receive callback (if there is still data)
-    if (tud_cdc_rx_cb && !tu_fifo_empty(&p_cdc->rx_ff) ) tud_cdc_rx_cb(itf);
+    if (tud_cdc_rx_cb && !tu_fifo_empty(&p_cdc->rx_ff)) tud_cdc_rx_cb(itf);
 
     // prepare for OUT transaction
     _prep_out_transaction(p_cdc);
@@ -492,19 +451,15 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
   // Data sent to host, we continue to fetch from tx fifo to send.
   // Note: This will cause incorrect baudrate set in line coding.
   //       Though maybe the baudrate is not really important !!!
-  if ( ep_addr == p_cdc->ep_in )
-  {
+  if (ep_addr == p_cdc->ep_in) {
     // invoke transmit callback to possibly refill tx fifo
-    if ( tud_cdc_tx_complete_cb ) tud_cdc_tx_complete_cb(itf);
+    if (tud_cdc_tx_complete_cb) tud_cdc_tx_complete_cb(itf);
 
-    if ( 0 == tud_cdc_n_write_flush(itf) )
-    {
+    if (0 == tud_cdc_n_write_flush(itf)) {
       // If there is no data left, a ZLP should be sent if
       // xferred_bytes is multiple of EP Packet size and not zero
-      if ( !tu_fifo_count(&p_cdc->tx_ff) && xferred_bytes && (0 == (xferred_bytes & (BULK_PACKET_SIZE-1))) )
-      {
-        if ( usbd_edpt_claim(rhport, p_cdc->ep_in) )
-        {
+      if (!tu_fifo_count(&p_cdc->tx_ff) && xferred_bytes && (0 == (xferred_bytes & (BULK_PACKET_SIZE - 1)))) {
+        if (usbd_edpt_claim(rhport, p_cdc->ep_in)) {
           usbd_edpt_xfer(rhport, p_cdc->ep_in, NULL, 0);
         }
       }
diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h
index db709b3bc3..5c2d07c5b3 100644
--- a/src/class/cdc/cdc_device.h
+++ b/src/class/cdc/cdc_device.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_CDC_DEVICE_H_
-#define _TUSB_CDC_DEVICE_H_
+#ifndef TUSB_CDC_DEVICE_H_
+#define TUSB_CDC_DEVICE_H_
 
 #include "cdc.h"
 
@@ -41,213 +41,162 @@
   #define CFG_TUD_CDC_EP_BUFSIZE    (TUD_OPT_HIGH_SPEED ? 512 : 64)
 #endif
 
-// By default the TX fifo buffer is cleared on connect / bus reset.
-// Enable this to persist any data in the fifo instead.
-#ifndef CFG_TUD_CDC_PERSISTENT_TX_BUFF
-  #define CFG_TUD_CDC_PERSISTENT_TX_BUFF    (0)
-#endif
-
 #ifdef __cplusplus
  extern "C" {
 #endif
 
-/** \addtogroup CDC_Serial Serial
- *  @{
- *  \defgroup   CDC_Serial_Device Device
- *  @{ */
+//--------------------------------------------------------------------+
+// Driver Configuration
+//--------------------------------------------------------------------+
+
+typedef struct TU_ATTR_PACKED {
+  uint8_t rx_persistent : 1; // keep rx fifo on bus reset or disconnect
+  uint8_t tx_persistent : 1; // keep tx fifo on bus reset or disconnect
+} tud_cdc_configure_fifo_t;
+
+// Configure CDC FIFOs behavior
+bool tud_cdc_configure_fifo(tud_cdc_configure_fifo_t const* cfg);
 
 //--------------------------------------------------------------------+
-// Application API (Multiple Ports)
-// CFG_TUD_CDC > 1
+// Application API (Multiple Ports) i.e CFG_TUD_CDC > 1
 //--------------------------------------------------------------------+
 
 // Check if terminal is connected to this port
-bool     tud_cdc_n_connected       (uint8_t itf);
+bool tud_cdc_n_connected(uint8_t itf);
 
 // Get current line state. Bit 0:  DTR (Data Terminal Ready), Bit 1: RTS (Request to Send)
-uint8_t  tud_cdc_n_get_line_state  (uint8_t itf);
+uint8_t tud_cdc_n_get_line_state(uint8_t itf);
 
 // Get current line encoding: bit rate, stop bits parity etc ..
-void     tud_cdc_n_get_line_coding (uint8_t itf, cdc_line_coding_t* coding);
+void tud_cdc_n_get_line_coding(uint8_t itf, cdc_line_coding_t* coding);
 
 // Set special character that will trigger tud_cdc_rx_wanted_cb() callback on receiving
-void     tud_cdc_n_set_wanted_char (uint8_t itf, char wanted);
+void tud_cdc_n_set_wanted_char(uint8_t itf, char wanted);
 
 // Get the number of bytes available for reading
-uint32_t tud_cdc_n_available       (uint8_t itf);
+uint32_t tud_cdc_n_available(uint8_t itf);
 
 // Read received bytes
-uint32_t tud_cdc_n_read            (uint8_t itf, void* buffer, uint32_t bufsize);
+uint32_t tud_cdc_n_read(uint8_t itf, void* buffer, uint32_t bufsize);
 
 // Read a byte, return -1 if there is none
-static inline
-int32_t  tud_cdc_n_read_char       (uint8_t itf);
+TU_ATTR_ALWAYS_INLINE static inline int32_t tud_cdc_n_read_char(uint8_t itf) {
+  uint8_t ch;
+  return tud_cdc_n_read(itf, &ch, 1) ? (int32_t) ch : -1;
+}
 
 // Clear the received FIFO
-void     tud_cdc_n_read_flush      (uint8_t itf);
+void tud_cdc_n_read_flush(uint8_t itf);
 
 // Get a byte from FIFO without removing it
-bool     tud_cdc_n_peek            (uint8_t itf, uint8_t* ui8);
+bool tud_cdc_n_peek(uint8_t itf, uint8_t* ui8);
 
 // Write bytes to TX FIFO, data may remain in the FIFO for a while
-uint32_t tud_cdc_n_write           (uint8_t itf, void const* buffer, uint32_t bufsize);
+uint32_t tud_cdc_n_write(uint8_t itf, void const* buffer, uint32_t bufsize);
 
 // Write a byte
-static inline
-uint32_t tud_cdc_n_write_char      (uint8_t itf, char ch);
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_n_write_char(uint8_t itf, char ch) {
+  return tud_cdc_n_write(itf, &ch, 1);
+}
 
 // Write a null-terminated string
-static inline
-uint32_t tud_cdc_n_write_str       (uint8_t itf, char const* str);
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_n_write_str(uint8_t itf, char const* str) {
+  return tud_cdc_n_write(itf, str, strlen(str));
+}
 
 // Force sending data if possible, return number of forced bytes
-uint32_t tud_cdc_n_write_flush     (uint8_t itf);
+uint32_t tud_cdc_n_write_flush(uint8_t itf);
 
 // Return the number of bytes (characters) available for writing to TX FIFO buffer in a single n_write operation.
-uint32_t tud_cdc_n_write_available (uint8_t itf);
+uint32_t tud_cdc_n_write_available(uint8_t itf);
 
 // Clear the transmit FIFO
-bool tud_cdc_n_write_clear (uint8_t itf);
+bool tud_cdc_n_write_clear(uint8_t itf);
 
 //--------------------------------------------------------------------+
 // Application API (Single Port)
 //--------------------------------------------------------------------+
-static inline bool     tud_cdc_connected       (void);
-static inline uint8_t  tud_cdc_get_line_state  (void);
-static inline void     tud_cdc_get_line_coding (cdc_line_coding_t* coding);
-static inline void     tud_cdc_set_wanted_char (char wanted);
-
-static inline uint32_t tud_cdc_available       (void);
-static inline int32_t  tud_cdc_read_char       (void);
-static inline uint32_t tud_cdc_read            (void* buffer, uint32_t bufsize);
-static inline void     tud_cdc_read_flush      (void);
-static inline bool     tud_cdc_peek            (uint8_t* ui8);
-
-static inline uint32_t tud_cdc_write_char      (char ch);
-static inline uint32_t tud_cdc_write           (void const* buffer, uint32_t bufsize);
-static inline uint32_t tud_cdc_write_str       (char const* str);
-static inline uint32_t tud_cdc_write_flush     (void);
-static inline uint32_t tud_cdc_write_available (void);
-static inline bool     tud_cdc_write_clear     (void);
-
-//--------------------------------------------------------------------+
-// Application Callback API (weak is optional)
-//--------------------------------------------------------------------+
-
-// Invoked when received new data
-TU_ATTR_WEAK void tud_cdc_rx_cb(uint8_t itf);
-
-// Invoked when received `wanted_char`
-TU_ATTR_WEAK void tud_cdc_rx_wanted_cb(uint8_t itf, char wanted_char);
-
-// Invoked when a TX is complete and therefore space becomes available in TX buffer
-TU_ATTR_WEAK void tud_cdc_tx_complete_cb(uint8_t itf);
-
-// Invoked when line state DTR & RTS are changed via SET_CONTROL_LINE_STATE
-TU_ATTR_WEAK void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts);
-
-// Invoked when line coding is change via SET_LINE_CODING
-TU_ATTR_WEAK void tud_cdc_line_coding_cb(uint8_t itf, cdc_line_coding_t const* p_line_coding);
-
-// Invoked when received send break
-TU_ATTR_WEAK void tud_cdc_send_break_cb(uint8_t itf, uint16_t duration_ms);
-
-//--------------------------------------------------------------------+
-// Inline Functions
-//--------------------------------------------------------------------+
-static inline int32_t tud_cdc_n_read_char (uint8_t itf)
-{
-  uint8_t ch;
-  return tud_cdc_n_read(itf, &ch, 1) ? (int32_t) ch : -1;
-}
-
-static inline uint32_t tud_cdc_n_write_char(uint8_t itf, char ch)
-{
-  return tud_cdc_n_write(itf, &ch, 1);
-}
-
-static inline uint32_t tud_cdc_n_write_str (uint8_t itf, char const* str)
-{
-  return tud_cdc_n_write(itf, str, strlen(str));
-}
-
-static inline bool tud_cdc_connected (void)
-{
+TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_connected(void) {
   return tud_cdc_n_connected(0);
 }
 
-static inline uint8_t tud_cdc_get_line_state (void)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tud_cdc_get_line_state(void) {
   return tud_cdc_n_get_line_state(0);
 }
 
-static inline void tud_cdc_get_line_coding (cdc_line_coding_t* coding)
-{
+TU_ATTR_ALWAYS_INLINE static inline void tud_cdc_get_line_coding(cdc_line_coding_t* coding) {
   tud_cdc_n_get_line_coding(0, coding);
 }
 
-static inline void tud_cdc_set_wanted_char (char wanted)
-{
+TU_ATTR_ALWAYS_INLINE static inline void tud_cdc_set_wanted_char(char wanted) {
   tud_cdc_n_set_wanted_char(0, wanted);
 }
 
-static inline uint32_t tud_cdc_available (void)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_available(void) {
   return tud_cdc_n_available(0);
 }
 
-static inline int32_t tud_cdc_read_char (void)
-{
+TU_ATTR_ALWAYS_INLINE static inline int32_t tud_cdc_read_char(void) {
   return tud_cdc_n_read_char(0);
 }
 
-static inline uint32_t tud_cdc_read (void* buffer, uint32_t bufsize)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_read(void* buffer, uint32_t bufsize) {
   return tud_cdc_n_read(0, buffer, bufsize);
 }
 
-static inline void tud_cdc_read_flush (void)
-{
+TU_ATTR_ALWAYS_INLINE static inline void tud_cdc_read_flush(void) {
   tud_cdc_n_read_flush(0);
 }
 
-static inline bool tud_cdc_peek (uint8_t* ui8)
-{
+TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_peek(uint8_t* ui8) {
   return tud_cdc_n_peek(0, ui8);
 }
 
-static inline uint32_t tud_cdc_write_char (char ch)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_write_char(char ch) {
   return tud_cdc_n_write_char(0, ch);
 }
 
-static inline uint32_t tud_cdc_write (void const* buffer, uint32_t bufsize)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_write(void const* buffer, uint32_t bufsize) {
   return tud_cdc_n_write(0, buffer, bufsize);
 }
 
-static inline uint32_t tud_cdc_write_str (char const* str)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_write_str(char const* str) {
   return tud_cdc_n_write_str(0, str);
 }
 
-static inline uint32_t tud_cdc_write_flush (void)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_write_flush(void) {
   return tud_cdc_n_write_flush(0);
 }
 
-static inline uint32_t tud_cdc_write_available(void)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_cdc_write_available(void) {
   return tud_cdc_n_write_available(0);
 }
 
-static inline bool tud_cdc_write_clear(void)
-{
+TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_write_clear(void) {
   return tud_cdc_n_write_clear(0);
 }
 
-/** @} */
-/** @} */
+//--------------------------------------------------------------------+
+// Application Callback API (weak is optional)
+//--------------------------------------------------------------------+
+
+// Invoked when received new data
+TU_ATTR_WEAK void tud_cdc_rx_cb(uint8_t itf);
+
+// Invoked when received `wanted_char`
+TU_ATTR_WEAK void tud_cdc_rx_wanted_cb(uint8_t itf, char wanted_char);
+
+// Invoked when a TX is complete and therefore space becomes available in TX buffer
+TU_ATTR_WEAK void tud_cdc_tx_complete_cb(uint8_t itf);
+
+// Invoked when line state DTR & RTS are changed via SET_CONTROL_LINE_STATE
+TU_ATTR_WEAK void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts);
+
+// Invoked when line coding is change via SET_LINE_CODING
+TU_ATTR_WEAK void tud_cdc_line_coding_cb(uint8_t itf, cdc_line_coding_t const* p_line_coding);
+
+// Invoked when received send break
+TU_ATTR_WEAK void tud_cdc_send_break_cb(uint8_t itf, uint16_t duration_ms);
 
 //--------------------------------------------------------------------+
 // INTERNAL USBD-CLASS DRIVER API

From ef71093046c948973ff3c9bc316ca7195686835d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 12 Jul 2024 17:20:06 +0700
Subject: [PATCH 044/204] add lsusb for hil pi4

---
 .github/workflows/hil_test.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/hil_test.yml b/.github/workflows/hil_test.yml
index 39a9060a27..d5bd9c200a 100644
--- a/.github/workflows/hil_test.yml
+++ b/.github/workflows/hil_test.yml
@@ -132,9 +132,9 @@ jobs:
         # USB bus on rpi4 is not stable, reset it before testing
       - name: Reset USB bus
         run: |
-          # lsusb -t
           # reset VIA Labs 2.0 hub
           sudo usbreset 001/002
+          lsusb -t
 
       - name: Checkout TinyUSB
         uses: actions/checkout@v4

From 4ce1cce40a01dce56cab2c73745f4f2c9d212b25 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 12 Jul 2024 20:17:14 +0700
Subject: [PATCH 045/204] simplify dwc2 test mode - all dwc2 ip seems to
 support test mode in both fs/hs -> remove TUP_USBIP_DWC2_TEST_MODE - remove
 dcd_check_test_mode_support(), all should be supported - move enum
 tusb_feature_test_mode_t to tusb_types.h

---
 src/common/tusb_mcu.h                 |  3 --
 src/common/tusb_types.h               |  9 +++++
 src/device/dcd.h                      | 13 +------
 src/device/usbd.c                     | 56 ++++++++-------------------
 src/portable/synopsys/dwc2/dcd_dwc2.c | 20 ++--------
 src/tusb_option.h                     |  2 +-
 6 files changed, 32 insertions(+), 71 deletions(-)

diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 80826c895e..637281bfce 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -195,7 +195,6 @@
 #elif TU_CHECK_MCU(OPT_MCU_STM32F4)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_STM32
-  #define TUP_USBIP_DWC2_TEST_MODE
 
   // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9
   #define TUP_DCD_ENDPOINT_MAX    6
@@ -210,7 +209,6 @@
   // MCU with on-chip HS Phy
   #if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx)
     #define TUP_RHPORT_HIGHSPEED  1 // Port0: FS, Port1: HS
-    #define TUP_USBIP_DWC2_TEST_MODE
   #endif
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32H7)
@@ -285,7 +283,6 @@
         defined(STM32U5F7xx) || defined(STM32U5F9xx) || defined(STM32U5G7xx) || defined(STM32U5G9xx)
       #define TUP_DCD_ENDPOINT_MAX  9
       #define TUP_RHPORT_HIGHSPEED  1
-      #define TUP_USBIP_DWC2_TEST_MODE
     #else
       #define TUP_DCD_ENDPOINT_MAX  6
     #endif
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index b571f9b72c..1501a5af6b 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -214,6 +214,15 @@ enum {
 
 #define TUSB_DESC_CONFIG_POWER_MA(x)  ((x)/2)
 
+// USB 2.0 Spec Table 9-7: Test Mode Selectors
+typedef enum {
+  TUSB_FEATURE_TEST_J = 1,
+  TUSB_FEATURE_TEST_K,
+  TUSB_FEATURE_TEST_SE0_NAK,
+  TUSB_FEATURE_TEST_PACKET,
+  TUSB_FEATURE_TEST_FORCE_ENABLE,
+} tusb_feature_test_mode_t;
+
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
diff --git a/src/device/dcd.h b/src/device/dcd.h
index f6735b0775..5356e9be1a 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -89,14 +89,6 @@ typedef struct TU_ATTR_ALIGNED(4) {
   };
 } dcd_event_t;
 
-typedef enum {
-  TEST_J = 1,
-  TEST_K,
-  TEST_SE0_NAK,
-  TEST_PACKET,
-  TEST_FORCE_ENABLE,
-} test_mode_t;
-
 //TU_VERIFY_STATIC(sizeof(dcd_event_t) <= 12, "size is not correct");
 
 //--------------------------------------------------------------------+
@@ -150,11 +142,8 @@ void dcd_disconnect(uint8_t rhport);
 void dcd_sof_enable(uint8_t rhport, bool en);
 
 #if CFG_TUD_TEST_MODE
-// Check if the test mode is supported, returns true is test mode selector is supported
-bool dcd_check_test_mode_support(test_mode_t test_selector) TU_ATTR_WEAK;
-
 // Put device into a test mode (needs power cycle to quit)
-void dcd_enter_test_mode(uint8_t rhport, test_mode_t test_selector) TU_ATTR_WEAK;
+void dcd_enter_test_mode(uint8_t rhport, tusb_feature_test_mode_t test_selector);
 #endif
 //--------------------------------------------------------------------+
 // Endpoint API
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 800d9c8249..4105a71a46 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -321,9 +321,17 @@ TU_ATTR_ALWAYS_INLINE static inline bool queue_event(dcd_event_t const * event,
 static bool process_control_request(uint8_t rhport, tusb_control_request_t const * p_request);
 static bool process_set_config(uint8_t rhport, uint8_t cfg_num);
 static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const * p_request);
+
 #if CFG_TUD_TEST_MODE
-static bool process_test_mode_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+static bool process_test_mode_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request) {
+  TU_VERIFY(CONTROL_STAGE_ACK == stage);
+  uint8_t const selector = tu_u16_high(request->wIndex);
+  TU_LOG_USBD("    Enter Test Mode (test selector index: %d)\r\n", selector);
+  dcd_enter_test_mode(rhport, (tusb_feature_test_mode_t) selector);
+  return true;
+}
 #endif
+
 // from usbd_control.c
 void usbd_control_reset(void);
 void usbd_control_set_request(tusb_control_request_t const *request);
@@ -695,7 +703,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
       }
 
       if ( TUSB_REQ_TYPE_STANDARD != p_request->bmRequestType_bit.type ) {
-        // Non standard request is not supported
+        // Non-standard request is not supported
         TU_BREAKPOINT();
         return false;
       }
@@ -759,43 +767,27 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
         break;
 
         case TUSB_REQ_SET_FEATURE:
-          // Handle the feature selector
-          switch(p_request->wValue)
-          {
-            // Support for remote wakeup
+          switch(p_request->wValue) {
             case TUSB_REQ_FEATURE_REMOTE_WAKEUP:
               TU_LOG_USBD("    Enable Remote Wakeup\r\n");
-
               // Host may enable remote wake up before suspending especially HID device
               _usbd_dev.remote_wakeup_en = true;
               tud_control_status(rhport, p_request);
             break;
 
-#if CFG_TUD_TEST_MODE
-            // Support for TEST_MODE
+            #if CFG_TUD_TEST_MODE
             case TUSB_REQ_FEATURE_TEST_MODE: {
               // Only handle the test mode if supported and valid
-              TU_VERIFY(dcd_enter_test_mode && dcd_check_test_mode_support && 0 == tu_u16_low(p_request->wIndex));
-
-              uint8_t selector = tu_u16_high(p_request->wIndex);
-
-              // Stall request if the selected test mode isn't supported
-              if (!dcd_check_test_mode_support((test_mode_t)selector))
-              {
-                TU_LOG_USBD("    Unsupported Test Mode (test selector index: %d)\r\n", selector);
+              TU_VERIFY(0 == tu_u16_low(p_request->wIndex));
 
-                return false;
-              }
-
-              // Acknowledge request
-              tud_control_status(rhport, p_request);
-
-              TU_LOG_USBD("    Enter Test Mode (test selector index: %d)\r\n", selector);
+              uint8_t const selector = tu_u16_high(p_request->wIndex);
+              TU_VERIFY(TUSB_FEATURE_TEST_J <= selector && selector <= TUSB_FEATURE_TEST_FORCE_ENABLE);
 
               usbd_control_set_complete_callback(process_test_mode_cb);
+              tud_control_status(rhport, p_request);
               break;
             }
-#endif /* CFG_TUD_TEST_MODE */
+            #endif /* CFG_TUD_TEST_MODE */
 
             // Stall unsupported feature selector
             default: return false;
@@ -1127,20 +1119,6 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
   }
 }
 
-#if CFG_TUD_TEST_MODE
-static bool process_test_mode_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request)
-{
-  // At this point it should already be ensured that dcd_enter_test_mode() is defined
-
-  // Only enter the test mode after the request for it has completed
-  TU_VERIFY(CONTROL_STAGE_ACK == stage);
-
-  dcd_enter_test_mode(rhport, (test_mode_t)tu_u16_high(request->wIndex));
-
-  return true;
-}
-#endif /* CFG_TUD_TEST_MODE */
-
 //--------------------------------------------------------------------+
 // DCD Event Handler
 //--------------------------------------------------------------------+
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index dbcd586c54..9a38b46dc5 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -1195,25 +1195,13 @@ void dcd_int_handler(uint8_t rhport) {
   //  }
 }
 
-#if defined(TUP_USBIP_DWC2_TEST_MODE) && CFG_TUD_TEST_MODE
-
-bool dcd_check_test_mode_support(test_mode_t test_selector) {
-  // Check if test mode selector is unsupported
-  if (TEST_FORCE_ENABLE < test_selector || TEST_J > test_selector) {
-    return false;
-  }
-
-  return true;
-}
-
-void dcd_enter_test_mode(uint8_t rhport, test_mode_t test_selector) {
-  // Get port address...
+#if CFG_TUD_TEST_MODE
+void dcd_enter_test_mode(uint8_t rhport, tusb_feature_test_mode_t test_selector) {
   dwc2_regs_t* dwc2 = DWC2_REG(rhport);
 
   // Enable the test mode
-  dwc2->dctl = (dwc2->dctl & ~DCTL_TCTL_Msk) | (test_selector << DCTL_TCTL_Pos);
+  dwc2->dctl = (dwc2->dctl & ~DCTL_TCTL_Msk) | (((uint8_t) test_selector) << DCTL_TCTL_Pos);
 }
-
-#endif /* TUP_USBIP_DWC2_TEST_MODE && CFG_TUD_TEST_MODE */
+#endif
 
 #endif
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 8990cf92b2..f2cc284dc9 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -381,7 +381,7 @@
   #error "CFG_TUD_ENDPPOINT_MAX must be less than or equal to TUP_DCD_ENDPOINT_MAX"
 #endif
 
-// USB 2.0 compliance test mode support
+// USB 2.0 7.1.20: compliance test mode support
 #ifndef CFG_TUD_TEST_MODE
   #define CFG_TUD_TEST_MODE       0
 #endif

From cc6806144fa0ff4fba4d63c8ec2cc580bb4db48a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 15 Jul 2024 17:46:20 +0700
Subject: [PATCH 046/204] update hil test to run on new pi5

---
 .github/workflows/hil_test.yml  | 35 ++++++++++++++++++---------------
 test/hil/hil_test.py            |  4 +++-
 test/hil/{pi4.json => rpi.json} |  0
 3 files changed, 22 insertions(+), 17 deletions(-)
 rename test/hil/{pi4.json => rpi.json} (100%)

diff --git a/.github/workflows/hil_test.yml b/.github/workflows/hil_test.yml
index d5bd9c200a..51227d4082 100644
--- a/.github/workflows/hil_test.yml
+++ b/.github/workflows/hil_test.yml
@@ -17,6 +17,9 @@ concurrency:
   group: ${{ github.workflow }}-${{ github.ref }}
   cancel-in-progress: true
 
+env:
+  HIL_JSON: test/hil/rpi.json
+
 jobs:
   # ---------------------------------------
   # Build Non Espressif
@@ -36,7 +39,7 @@ jobs:
           sudo apt install -y jq
 
           # Non-Espresif boards
-          BOARDS_LIST=$(jq -r '.boards[] | select(.flasher != "esptool") | "-b " + .name' test/hil/pi4.json | tr '\n' ' ')
+          BOARDS_LIST=$(jq -r '.boards[] | select(.flasher != "esptool") | "-b " + .name' ${{ env.HIL_JSON }} | tr '\n' ' ')
           echo "BOARDS_LIST=$BOARDS_LIST"
           echo "BOARDS_LIST=$BOARDS_LIST" >> $GITHUB_ENV
           echo "BOARDS_LIST=$BOARDS_LIST" >> $GITHUB_OUTPUT
@@ -57,7 +60,7 @@ jobs:
       - name: Upload Artifacts for Hardware Testing
         uses: actions/upload-artifact@v4
         with:
-          name: hil_pi4
+          name: hil_rpi
           path: |
             cmake-build/cmake-build-*/*/*/*.elf
             cmake-build/cmake-build-*/*/*/*.bin
@@ -78,7 +81,7 @@ jobs:
         run: |
           sudo apt install -y jq
           # Espressif boards
-          BOARDS_LIST=$(jq -r '.boards[] | select(.flasher == "esptool") | "-b " + .name' test/hil/pi4.json | tr '\n' ' ')
+          BOARDS_LIST=$(jq -r '.boards[] | select(.flasher == "esptool") | "-b " + .name' ${{ env.HIL_JSON }} | tr '\n' ' ')
           echo "BOARDS_LIST=$BOARDS_LIST"
           echo "BOARDS_LIST=$BOARDS_LIST" >> $GITHUB_ENV
           echo "BOARDS_LIST=$BOARDS_LIST" >> $GITHUB_OUTPUT
@@ -102,7 +105,7 @@ jobs:
       - name: Upload Artifacts for Hardware Testing
         uses: actions/upload-artifact@v4
         with:
-          name: hil_pi4_esp
+          name: hil_rpi_esp
           path: |
             cmake-build/cmake-build-*/*/*/*.bin
             cmake-build/cmake-build-*/*/*/bootloader/bootloader.bin
@@ -112,14 +115,14 @@ jobs:
 
   # ---------------------------------------
   # Hardware in the loop (HIL)
-  # Current self-hosted instance is running on an RPI4. For attached hardware checkout test/hil/pi4.json
+  # self-hosted running on an RPI. For attached hardware checkout test/hil/rpi.json
   # ---------------------------------------
-  hil-pi4:
+  hil-rpi:
     if: github.repository_owner == 'hathach'
     needs:
       - build
       - build-esp
-    runs-on: [self-hosted, rp2040, nrf52840, esp32s3, hardware-in-the-loop]
+    runs-on: [self-hosted, ARM64, rpi, hardware-in-the-loop]
     env:
       BOARDS_LIST: "${{ needs.build.outputs.BOARDS_LIST }} ${{ needs.build-esp.outputs.BOARDS_LIST }}"
     steps:
@@ -129,12 +132,12 @@ jobs:
           rm -rf "${{ github.workspace }}"
           mkdir -p "${{ github.workspace }}"
 
-        # USB bus on rpi4 is not stable, reset it before testing
-      - name: Reset USB bus
-        run: |
-          # reset VIA Labs 2.0 hub
-          sudo usbreset 001/002
-          lsusb -t
+        # USB bus on rpi is not stable, reset it before testing
+#      - name: Reset USB bus
+#        run: |
+#          # reset VIA Labs 2.0 hub
+#          sudo usbreset 001/002
+#          lsusb -t
 
       - name: Checkout TinyUSB
         uses: actions/checkout@v4
@@ -144,13 +147,13 @@ jobs:
       - name: Download Artifacts
         uses: actions/download-artifact@v4
         with:
-          name: hil_pi4
+          name: hil_rpi
           path: cmake-build
 
       - name: Download Artifacts
         uses: actions/download-artifact@v4
         with:
-          name: hil_pi4_esp
+          name: hil_rpi_esp
           path: cmake-build
 
       - name: Test on actual hardware
@@ -159,4 +162,4 @@ jobs:
           echo "::group::{cmake-build contents}"
           tree cmake-build
           echo "::endgroup::"
-          python3 test/hil/hil_test.py $BOARDS_LIST pi4.json
+          python3 test/hil/hil_test.py $BOARDS_LIST ${{ env.HIL_JSON }}
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index c2699cc6f8..3ba84f8810 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -330,7 +330,9 @@ def main():
     config_file = args.config_file
     boards = args.board
 
-    config_file = os.path.join(os.path.dirname(__file__), config_file)
+    # if config file is not found, try to find it in the same directory as this script
+    if not os.path.exists(config_file):
+        config_file = os.path.join(os.path.dirname(__file__), config_file)
     with open(config_file) as f:
         config = json.load(f)
 
diff --git a/test/hil/pi4.json b/test/hil/rpi.json
similarity index 100%
rename from test/hil/pi4.json
rename to test/hil/rpi.json

From 5edc8458f2db7bd24fa3767e652632227833535f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 16 Jul 2024 14:30:51 +0700
Subject: [PATCH 047/204] hil flash itsybitsy m4 with picoprobe

---
 test/hil/hil_test.py | 24 +++++++++++++-----------
 test/hil/rpi.json    |  8 +++-----
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 3ba84f8810..f571e6e02e 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -114,11 +114,10 @@ def read_disk_file(id, fname):
 # Flashing firmware
 # -------------------------------------------------------------
 def run_cmd(cmd):
-    # print(cmd)
+    #print(cmd)
     r = subprocess.run(cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
-    title = 'command error'
     if r.returncode != 0:
-        # print build output if failed
+        title = 'command error'
         if os.getenv('CI'):
             print(f"::group::{title}")
             print(r.stdout.decode("utf-8"))
@@ -156,23 +155,23 @@ def flash_esptool(board, firmware):
     return ret
 
 
-def doublereset_with_rpi_gpio(board):
+def doublereset_with_rpi_gpio(pin):
     # Off = 0 = Reset
-    led = gpiozero.LED(board["flasher_reset_pin"])
+    nrst = gpiozero.LED(pin)
 
-    led.off()
+    nrst.off()
     time.sleep(0.1)
-    led.on()
+    nrst.on()
     time.sleep(0.1)
-    led.off()
+    nrst.off()
     time.sleep(0.1)
-    led.on()
+    nrst.on()
 
 
 def flash_bossac(board, firmware):
     # double reset to enter bootloader
     if platform.machine() == 'aarch64':
-        doublereset_with_rpi_gpio(board)
+        doublereset_with_rpi_gpio(board["flasher_reset_pin"])
 
     port = get_serial_dev(board["uid"], board["flashser_vendor"], board["flasher_product"], 0)
     timeout = ENUM_TIMEOUT
@@ -367,7 +366,10 @@ def main():
                     test_list.remove(skip)
 
         for test in test_list:
-            fw_name = f'cmake-build/cmake-build-{name}/device/{test}/{test}'
+            fw_dir = f'cmake-build/cmake-build-{name}/device/{test}'
+            if not os.path.exists(fw_dir):
+                fw_dir = f'examples/cmake-build-{name}/device/{test}'
+            fw_name = f'{fw_dir}/{test}'
             print(f'  {test} ...', end='')
 
             # flash firmware. It may fail randomly, retry a few times
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index bdb8a5fa52..c9a77936de 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -17,11 +17,9 @@
         {
             "name": "itsybitsy_m4",
             "uid": "D784B28C5338533335202020FF044726",
-            "flasher": "bossac",
-            "flashser_vendor": "Adafruit Industries",
-            "flasher_product": "ItsyBitsy M4 Express",
-            "flasher_reset_pin": "2",
-            "flasher_args": "--offset 0x4000"
+            "flasher": "openocd",
+            "flasher_sn": "E6614C311B597D32",
+            "flasher_args": "-f interface/cmsis-dap.cfg -f target/atsame5x.cfg -c \"adapter speed 5000\""
         },
         {
             "name": "espressif_s3_devkitm",

From 0ecf15bc61b2684e53250437d295d6c43682a724 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 17 Jul 2024 14:35:23 +0700
Subject: [PATCH 048/204] follow up to #2253 - rename tud_hid_report_fail_cb()
 to tud_hid_report_failed_cb() and change its signature - use default
 implementation for hid callbacks to be compatible with keil compiler - code
 format

---
 src/class/cdc/cdc_device.h |   2 +-
 src/class/hid/hid_device.c | 268 +++++++++++++++++++------------------
 src/class/hid/hid_device.h | 106 ++++++---------
 3 files changed, 180 insertions(+), 196 deletions(-)

diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h
index 5c2d07c5b3..34670517a1 100644
--- a/src/class/cdc/cdc_device.h
+++ b/src/class/cdc/cdc_device.h
@@ -58,7 +58,7 @@ typedef struct TU_ATTR_PACKED {
 bool tud_cdc_configure_fifo(tud_cdc_configure_fifo_t const* cfg);
 
 //--------------------------------------------------------------------+
-// Application API (Multiple Ports) i.e CFG_TUD_CDC > 1
+// Application API (Multiple Ports) i.e. CFG_TUD_CDC > 1
 //--------------------------------------------------------------------+
 
 // Check if terminal is connected to this port
diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c
index ada01582e8..7168ab3d56 100644
--- a/src/class/hid/hid_device.c
+++ b/src/class/hid/hid_device.c
@@ -61,28 +61,53 @@ typedef struct {
 CFG_TUD_MEM_SECTION tu_static hidd_interface_t _hidd_itf[CFG_TUD_HID];
 
 /*------------- Helpers -------------*/
-static inline uint8_t get_index_by_itfnum(uint8_t itf_num)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint8_t get_index_by_itfnum(uint8_t itf_num) {
   for (uint8_t i = 0; i < CFG_TUD_HID; i++) {
-    if (itf_num == _hidd_itf[i].itf_num)
+    if (itf_num == _hidd_itf[i].itf_num) {
       return i;
+    }
   }
-
   return 0xFF;
 }
 
+//--------------------------------------------------------------------+
+// Weak stubs: invoked if no strong implementation is available
+//--------------------------------------------------------------------+
+TU_ATTR_WEAK void tud_hid_set_protocol_cb(uint8_t instance, uint8_t protocol) {
+  (void) instance;
+  (void) protocol;
+}
+
+TU_ATTR_WEAK bool tud_hid_set_idle_cb(uint8_t instance, uint8_t idle_rate) {
+  (void) instance;
+  (void) idle_rate;
+  return true;
+}
+
+TU_ATTR_WEAK void tud_hid_report_complete_cb(uint8_t instance, uint8_t const* report, uint16_t len) {
+  (void) instance;
+  (void) report;
+  (void) len;
+}
+
+// Invoked when a transfer wasn't successful
+TU_ATTR_WEAK void tud_hid_report_failed_cb(uint8_t instance, hid_report_type_t report_type, uint8_t const* report, uint16_t xferred_bytes) {
+  (void) instance;
+  (void) report_type;
+  (void) report;
+  (void) xferred_bytes;
+}
+
 //--------------------------------------------------------------------+
 // APPLICATION API
 //--------------------------------------------------------------------+
-bool tud_hid_n_ready(uint8_t instance)
-{
+bool tud_hid_n_ready(uint8_t instance) {
   uint8_t const rhport = 0;
   uint8_t const ep_in = _hidd_itf[instance].ep_in;
   return tud_ready() && (ep_in != 0) && !usbd_edpt_busy(rhport, ep_in);
 }
 
-bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const *report, uint16_t len)
-{
+bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const *report, uint16_t len) {
   uint8_t const rhport = 0;
   hidd_interface_t *p_hid = &_hidd_itf[instance];
 
@@ -101,14 +126,16 @@ bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const *report, u
   return usbd_edpt_xfer(rhport, p_hid->ep_in, p_hid->epin_buf, len);
 }
 
-uint8_t tud_hid_n_interface_protocol(uint8_t instance) { return _hidd_itf[instance].itf_protocol; }
+uint8_t tud_hid_n_interface_protocol(uint8_t instance) {
+  return _hidd_itf[instance].itf_protocol;
+}
 
-uint8_t tud_hid_n_get_protocol(uint8_t instance) { return _hidd_itf[instance].protocol_mode; }
+uint8_t tud_hid_n_get_protocol(uint8_t instance) {
+  return _hidd_itf[instance].protocol_mode;
+}
 
-bool tud_hid_n_keyboard_report(uint8_t instance, uint8_t report_id, uint8_t modifier, uint8_t keycode[6])
-{
+bool tud_hid_n_keyboard_report(uint8_t instance, uint8_t report_id, uint8_t modifier, uint8_t keycode[6]) {
   hid_keyboard_report_t report;
-
   report.modifier = modifier;
   report.reserved = 0;
 
@@ -121,8 +148,8 @@ bool tud_hid_n_keyboard_report(uint8_t instance, uint8_t report_id, uint8_t modi
   return tud_hid_n_report(instance, report_id, &report, sizeof(report));
 }
 
-bool tud_hid_n_mouse_report(uint8_t instance, uint8_t report_id, uint8_t buttons, int8_t x, int8_t y, int8_t vertical, int8_t horizontal)
-{
+bool tud_hid_n_mouse_report(uint8_t instance, uint8_t report_id,
+                            uint8_t buttons, int8_t x, int8_t y, int8_t vertical, int8_t horizontal) {
   hid_mouse_report_t report = {
     .buttons = buttons,
     .x = x,
@@ -134,8 +161,8 @@ bool tud_hid_n_mouse_report(uint8_t instance, uint8_t report_id, uint8_t buttons
   return tud_hid_n_report(instance, report_id, &report, sizeof(report));
 }
 
-bool tud_hid_n_abs_mouse_report(uint8_t instance, uint8_t report_id, uint8_t buttons, int16_t x, int16_t y, int8_t vertical, int8_t horizontal)
-{
+bool tud_hid_n_abs_mouse_report(uint8_t instance, uint8_t report_id,
+                                uint8_t buttons, int16_t x, int16_t y, int8_t vertical, int8_t horizontal) {
   hid_abs_mouse_report_t report = {
     .buttons = buttons,
     .x = x,
@@ -146,8 +173,8 @@ bool tud_hid_n_abs_mouse_report(uint8_t instance, uint8_t report_id, uint8_t but
   return tud_hid_n_report(instance, report_id, &report, sizeof(report));
 }
 
-bool tud_hid_n_gamepad_report(uint8_t instance, uint8_t report_id, int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons)
-{
+bool tud_hid_n_gamepad_report(uint8_t instance, uint8_t report_id,
+                              int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons) {
   hid_gamepad_report_t report = {
       .x = x,
       .y = y,
@@ -165,28 +192,25 @@ bool tud_hid_n_gamepad_report(uint8_t instance, uint8_t report_id, int8_t x, int
 //--------------------------------------------------------------------+
 // USBD-CLASS API
 //--------------------------------------------------------------------+
-void hidd_init(void)
-{
+void hidd_init(void) {
   hidd_reset(0);
 }
 
-bool hidd_deinit(void)
-{
+bool hidd_deinit(void) {
   return true;
 }
 
-void hidd_reset(uint8_t rhport)
-{
+void hidd_reset(uint8_t rhport) {
   (void)rhport;
   tu_memclr(_hidd_itf, sizeof(_hidd_itf));
 }
 
-uint16_t hidd_open(uint8_t rhport, tusb_desc_interface_t const *desc_itf, uint16_t max_len)
-{
+uint16_t hidd_open(uint8_t rhport, tusb_desc_interface_t const *desc_itf, uint16_t max_len) {
   TU_VERIFY(TUSB_CLASS_HID == desc_itf->bInterfaceClass, 0);
 
   // len = interface + hid + n*endpoints
-  uint16_t const drv_len = (uint16_t)(sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + desc_itf->bNumEndpoints * sizeof(tusb_desc_endpoint_t));
+  uint16_t const drv_len = (uint16_t) (sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) +
+                                       desc_itf->bNumEndpoints * sizeof(tusb_desc_endpoint_t));
   TU_ASSERT(max_len >= drv_len, 0);
 
   // Find available interface
@@ -211,8 +235,9 @@ uint16_t hidd_open(uint8_t rhport, tusb_desc_interface_t const *desc_itf, uint16
   p_desc = tu_desc_next(p_desc);
   TU_ASSERT(usbd_open_edpt_pair(rhport, p_desc, desc_itf->bNumEndpoints, TUSB_XFER_INTERRUPT, &p_hid->ep_out, &p_hid->ep_in), 0);
 
-  if (desc_itf->bInterfaceSubClass == HID_SUBCLASS_BOOT)
+  if (desc_itf->bInterfaceSubClass == HID_SUBCLASS_BOOT) {
     p_hid->itf_protocol = desc_itf->bInterfaceProtocol;
+  }
 
   p_hid->protocol_mode = HID_PROTOCOL_REPORT; // Per Specs: default is report mode
   p_hid->itf_num = desc_itf->bInterfaceNumber;
@@ -234,8 +259,7 @@ uint16_t hidd_open(uint8_t rhport, tusb_desc_interface_t const *desc_itf, uint16
 // Invoked when a control transfer occurred on an interface of this class
 // Driver response accordingly to the request and the transfer stage (setup/data/ack)
 // return false to stall control endpoint (e.g unsupported request)
-bool hidd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const *request)
-{
+bool hidd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const *request) {
   TU_VERIFY(request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_INTERFACE);
 
   uint8_t const hid_itf = get_index_by_itfnum((uint8_t)request->wIndex);
@@ -262,90 +286,82 @@ bool hidd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
   } else if (request->bmRequestType_bit.type == TUSB_REQ_TYPE_CLASS) {
     //------------- Class Specific Request -------------//
     switch (request->bRequest) {
-    case HID_REQ_CONTROL_GET_REPORT:
-      if (stage == CONTROL_STAGE_SETUP) {
-        uint8_t const report_type = tu_u16_high(request->wValue);
-        uint8_t const report_id = tu_u16_low(request->wValue);
-
-        uint8_t *report_buf = p_hid->ctrl_buf;
-        uint16_t req_len = tu_min16(request->wLength, CFG_TUD_HID_EP_BUFSIZE);
-
-        uint16_t xferlen = 0;
-
-        // If host request a specific Report ID, add ID to as 1 byte of response
-        if ((report_id != HID_REPORT_TYPE_INVALID) && (req_len > 1)) {
-          *report_buf++ = report_id;
-          req_len--;
-
-          xferlen++;
+      case HID_REQ_CONTROL_GET_REPORT:
+        if (stage == CONTROL_STAGE_SETUP) {
+          uint8_t const report_type = tu_u16_high(request->wValue);
+          uint8_t const report_id = tu_u16_low(request->wValue);
+
+          uint8_t* report_buf = p_hid->ctrl_buf;
+          uint16_t req_len = tu_min16(request->wLength, CFG_TUD_HID_EP_BUFSIZE);
+          uint16_t xferlen = 0;
+
+          // If host request a specific Report ID, add ID to as 1 byte of response
+          if ((report_id != HID_REPORT_TYPE_INVALID) && (req_len > 1)) {
+            *report_buf++ = report_id;
+            req_len--;
+            xferlen++;
+          }
+
+          xferlen += tud_hid_get_report_cb(hid_itf, report_id, (hid_report_type_t) report_type, report_buf, req_len);
+          TU_ASSERT(xferlen > 0);
+
+          tud_control_xfer(rhport, request, p_hid->ctrl_buf, xferlen);
         }
-
-        xferlen += tud_hid_get_report_cb(hid_itf, report_id, (hid_report_type_t)report_type, report_buf, req_len);
-        TU_ASSERT(xferlen > 0);
-
-        tud_control_xfer(rhport, request, p_hid->ctrl_buf, xferlen);
-      }
-      break;
-
-    case HID_REQ_CONTROL_SET_REPORT:
-      if (stage == CONTROL_STAGE_SETUP) {
-        TU_VERIFY(request->wLength <= sizeof(p_hid->ctrl_buf));
-        tud_control_xfer(rhport, request, p_hid->ctrl_buf, request->wLength);
-      } else if (stage == CONTROL_STAGE_ACK) {
-        uint8_t const report_type = tu_u16_high(request->wValue);
-        uint8_t const report_id = tu_u16_low(request->wValue);
-
-        uint8_t const *report_buf = p_hid->ctrl_buf;
-        uint16_t report_len = tu_min16(request->wLength, CFG_TUD_HID_EP_BUFSIZE);
-
-        // If host request a specific Report ID, extract report ID in buffer before invoking callback
-        if ((report_id != HID_REPORT_TYPE_INVALID) && (report_len > 1) && (report_id == report_buf[0])) {
-          report_buf++;
-          report_len--;
+        break;
+
+      case HID_REQ_CONTROL_SET_REPORT:
+        if (stage == CONTROL_STAGE_SETUP) {
+          TU_VERIFY(request->wLength <= sizeof(p_hid->ctrl_buf));
+          tud_control_xfer(rhport, request, p_hid->ctrl_buf, request->wLength);
+        } else if (stage == CONTROL_STAGE_ACK) {
+          uint8_t const report_type = tu_u16_high(request->wValue);
+          uint8_t const report_id = tu_u16_low(request->wValue);
+
+          uint8_t const* report_buf = p_hid->ctrl_buf;
+          uint16_t report_len = tu_min16(request->wLength, CFG_TUD_HID_EP_BUFSIZE);
+
+          // If host request a specific Report ID, extract report ID in buffer before invoking callback
+          if ((report_id != HID_REPORT_TYPE_INVALID) && (report_len > 1) && (report_id == report_buf[0])) {
+            report_buf++;
+            report_len--;
+          }
+
+          tud_hid_set_report_cb(hid_itf, report_id, (hid_report_type_t) report_type, report_buf, report_len);
         }
+        break;
 
-        tud_hid_set_report_cb(hid_itf, report_id, (hid_report_type_t)report_type, report_buf, report_len);
-      }
-      break;
-
-    case HID_REQ_CONTROL_SET_IDLE:
-      if (stage == CONTROL_STAGE_SETUP) {
-        p_hid->idle_rate = tu_u16_high(request->wValue);
-        if (tud_hid_set_idle_cb) {
-          // stall request if callback return false
-          TU_VERIFY(tud_hid_set_idle_cb(hid_itf, p_hid->idle_rate));
+      case HID_REQ_CONTROL_SET_IDLE:
+        if (stage == CONTROL_STAGE_SETUP) {
+          p_hid->idle_rate = tu_u16_high(request->wValue);
+          TU_VERIFY(tud_hid_set_idle_cb(hid_itf, p_hid->idle_rate)); // stall if false
+          tud_control_status(rhport, request);
         }
+        break;
 
-        tud_control_status(rhport, request);
-      }
-      break;
-
-    case HID_REQ_CONTROL_GET_IDLE:
-      if (stage == CONTROL_STAGE_SETUP) {
-        // TODO idle rate of report
-        tud_control_xfer(rhport, request, &p_hid->idle_rate, 1);
-      }
-      break;
+      case HID_REQ_CONTROL_GET_IDLE:
+        if (stage == CONTROL_STAGE_SETUP) {
+          // TODO idle rate of report
+          tud_control_xfer(rhport, request, &p_hid->idle_rate, 1);
+        }
+        break;
 
-    case HID_REQ_CONTROL_GET_PROTOCOL:
-      if (stage == CONTROL_STAGE_SETUP) {
-        tud_control_xfer(rhport, request, &p_hid->protocol_mode, 1);
-      }
-      break;
+      case HID_REQ_CONTROL_GET_PROTOCOL:
+        if (stage == CONTROL_STAGE_SETUP) {
+          tud_control_xfer(rhport, request, &p_hid->protocol_mode, 1);
+        }
+        break;
 
-    case HID_REQ_CONTROL_SET_PROTOCOL:
-      if (stage == CONTROL_STAGE_SETUP) {
-        tud_control_status(rhport, request);
-      } else if (stage == CONTROL_STAGE_ACK) {
-        p_hid->protocol_mode = (uint8_t)request->wValue;
-        if (tud_hid_set_protocol_cb) {
+      case HID_REQ_CONTROL_SET_PROTOCOL:
+        if (stage == CONTROL_STAGE_SETUP) {
+          tud_control_status(rhport, request);
+        } else if (stage == CONTROL_STAGE_ACK) {
+          p_hid->protocol_mode = (uint8_t) request->wValue;
           tud_hid_set_protocol_cb(hid_itf, p_hid->protocol_mode);
         }
-      }
-      break;
+        break;
 
-    default:
-      return false; // stall unsupported request
+      default:
+        return false; // stall unsupported request
     }
   } else {
     return false; // stall unsupported request
@@ -354,45 +370,35 @@ bool hidd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
   return true;
 }
 
-bool hidd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes)
-{
-  (void)result;
-
+bool hidd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) {
   uint8_t instance = 0;
   hidd_interface_t *p_hid = _hidd_itf;
 
   // Identify which interface to use
   for (instance = 0; instance < CFG_TUD_HID; instance++) {
     p_hid = &_hidd_itf[instance];
-    if ((ep_addr == p_hid->ep_out) || (ep_addr == p_hid->ep_in))
+    if ((ep_addr == p_hid->ep_out) || (ep_addr == p_hid->ep_in)) {
       break;
+    }
   }
   TU_ASSERT(instance < CFG_TUD_HID);
 
-  // Check if there was a problem
-  if (XFER_RESULT_SUCCESS != result) { // Inform application about the issue
-    if (tud_hid_report_fail_cb) {
-      tud_hid_report_fail_cb(instance, ep_addr, (uint16_t)xferred_bytes);
+  if (ep_addr == p_hid->ep_in) {
+    // Input report
+    if (XFER_RESULT_SUCCESS == result) {
+      tud_hid_report_complete_cb(instance, p_hid->epin_buf, (uint16_t) xferred_bytes);
+    } else {
+      tud_hid_report_failed_cb(instance, HID_REPORT_TYPE_INPUT, p_hid->epin_buf, (uint16_t) xferred_bytes);
     }
-
-    // Allow a new transfer to be received if issue happened on an OUT endpoint
-    if (ep_addr == p_hid->ep_out) {
-      // Prepare the OUT endpoint to be able to receive a new transfer
-      TU_ASSERT(usbd_edpt_xfer(rhport, p_hid->ep_out, p_hid->epout_buf, sizeof(p_hid->epout_buf)));
+  } else {
+    // Output report
+    if (XFER_RESULT_SUCCESS == result) {
+      tud_hid_set_report_cb(instance, 0, HID_REPORT_TYPE_OUTPUT, p_hid->epout_buf, (uint16_t)xferred_bytes);
+    } else {
+      tud_hid_report_failed_cb(instance, HID_REPORT_TYPE_OUTPUT, p_hid->epout_buf, (uint16_t) xferred_bytes);
     }
 
-    return true;
-  }
-
-  // Sent report successfully
-  if (ep_addr == p_hid->ep_in) {
-    if (tud_hid_report_complete_cb) {
-      tud_hid_report_complete_cb(instance, p_hid->epin_buf, (uint16_t)xferred_bytes);
-    }
-  }
-  // Received report successfully
-  else if (ep_addr == p_hid->ep_out) {
-    tud_hid_set_report_cb(instance, 0, HID_REPORT_TYPE_OUTPUT, p_hid->epout_buf, (uint16_t)xferred_bytes);
+    // prepare for new transfer
     TU_ASSERT(usbd_edpt_xfer(rhport, p_hid->ep_out, p_hid->epout_buf, sizeof(p_hid->epout_buf)));
   }
 
diff --git a/src/class/hid/hid_device.h b/src/class/hid/hid_device.h
index fcbf161c45..89c28e0618 100644
--- a/src/class/hid/hid_device.h
+++ b/src/class/hid/hid_device.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_HID_DEVICE_H_
-#define _TUSB_HID_DEVICE_H_
+#ifndef TUSB_HID_DEVICE_H_
+#define TUSB_HID_DEVICE_H_
 
 #include "hid.h"
 
@@ -48,8 +48,7 @@
 #endif
 
 //--------------------------------------------------------------------+
-// Application API (Multiple Instances)
-// CFG_TUD_HID > 1
+// Application API (Multiple Instances) i.e. CFG_TUD_HID > 1
 //--------------------------------------------------------------------+
 
 // Check if the interface is ready to use
@@ -76,12 +75,6 @@ bool tud_hid_n_mouse_report(uint8_t instance, uint8_t report_id, uint8_t buttons
 // use template layout report as defined by hid_abs_mouse_report_t
 bool tud_hid_n_abs_mouse_report(uint8_t instance, uint8_t report_id, uint8_t buttons, int16_t x, int16_t y, int8_t vertical, int8_t horizontal);
 
-
-static inline bool tud_hid_abs_mouse_report(uint8_t report_id, uint8_t buttons, int16_t x, int16_t y, int8_t vertical, int8_t horizontal)
-{
-  return tud_hid_n_abs_mouse_report(0, report_id, buttons, x, y, vertical, horizontal);
-}
-
 // Gamepad: convenient helper to send gamepad report if application
 // use template layout report TUD_HID_REPORT_DESC_GAMEPAD
 bool tud_hid_n_gamepad_report(uint8_t instance, uint8_t report_id, int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons);
@@ -89,16 +82,40 @@ bool tud_hid_n_gamepad_report(uint8_t instance, uint8_t report_id, int8_t x, int
 //--------------------------------------------------------------------+
 // Application API (Single Port)
 //--------------------------------------------------------------------+
-static inline bool    tud_hid_ready(void);
-static inline uint8_t tud_hid_interface_protocol(void);
-static inline uint8_t tud_hid_get_protocol(void);
-static inline bool    tud_hid_report(uint8_t report_id, void const* report, uint16_t len);
-static inline bool    tud_hid_keyboard_report(uint8_t report_id, uint8_t modifier, uint8_t keycode[6]);
-static inline bool    tud_hid_mouse_report(uint8_t report_id, uint8_t buttons, int8_t x, int8_t y, int8_t vertical, int8_t horizontal);
-static inline bool    tud_hid_gamepad_report(uint8_t report_id, int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons);
+TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_ready(void) {
+  return tud_hid_n_ready(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tud_hid_interface_protocol(void) {
+  return tud_hid_n_interface_protocol(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tud_hid_get_protocol(void) {
+  return tud_hid_n_get_protocol(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_report(uint8_t report_id, void const* report, uint16_t len) {
+  return tud_hid_n_report(0, report_id, report, len);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_keyboard_report(uint8_t report_id, uint8_t modifier, uint8_t keycode[6]) {
+  return tud_hid_n_keyboard_report(0, report_id, modifier, keycode);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_mouse_report(uint8_t report_id, uint8_t buttons, int8_t x, int8_t y, int8_t vertical, int8_t horizontal) {
+  return tud_hid_n_mouse_report(0, report_id, buttons, x, y, vertical, horizontal);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_abs_mouse_report(uint8_t report_id, uint8_t buttons, int16_t x, int16_t y, int8_t vertical, int8_t horizontal) {
+  return tud_hid_n_abs_mouse_report(0, report_id, buttons, x, y, vertical, horizontal);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_gamepad_report(uint8_t report_id, int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons) {
+  return tud_hid_n_gamepad_report(0, report_id, x, y, z, rz, rx, ry, hat, buttons);
+}
 
 //--------------------------------------------------------------------+
-// Callbacks (Weak is optional)
+// Application Callbacks
 //--------------------------------------------------------------------+
 
 // Invoked when received GET HID REPORT DESCRIPTOR request
@@ -111,63 +128,25 @@ uint8_t const * tud_hid_descriptor_report_cb(uint8_t instance);
 uint16_t tud_hid_get_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t* buffer, uint16_t reqlen);
 
 // Invoked when received SET_REPORT control request or
-// received data on OUT endpoint ( Report ID = 0, Type = 0 )
+// received data on OUT endpoint (Report ID = 0, Type = OUTPUT)
 void tud_hid_set_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t const* buffer, uint16_t bufsize);
 
 // Invoked when received SET_PROTOCOL request
 // protocol is either HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
-TU_ATTR_WEAK void tud_hid_set_protocol_cb(uint8_t instance, uint8_t protocol);
+void tud_hid_set_protocol_cb(uint8_t instance, uint8_t protocol);
 
 // Invoked when received SET_IDLE request. return false will stall the request
-// - Idle Rate = 0 : only send report if there is changes, i.e skip duplication
+// - Idle Rate = 0 : only send report if there is changes, i.e. skip duplication
 // - Idle Rate > 0 : skip duplication, but send at least 1 report every idle rate (in unit of 4 ms).
-TU_ATTR_WEAK bool tud_hid_set_idle_cb(uint8_t instance, uint8_t idle_rate);
+bool tud_hid_set_idle_cb(uint8_t instance, uint8_t idle_rate);
 
 // Invoked when sent REPORT successfully to host
 // Application can use this to send the next report
 // Note: For composite reports, report[0] is report ID
-TU_ATTR_WEAK void tud_hid_report_complete_cb(uint8_t instance, uint8_t const* report, uint16_t len);
+void tud_hid_report_complete_cb(uint8_t instance, uint8_t const* report, uint16_t len);
 
 // Invoked when a transfer wasn't successful
-TU_ATTR_WEAK void tud_hid_report_fail_cb(uint8_t instance, uint8_t ep_addr, uint16_t len);
-
-//--------------------------------------------------------------------+
-// Inline Functions
-//--------------------------------------------------------------------+
-static inline bool tud_hid_ready(void)
-{
-  return tud_hid_n_ready(0);
-}
-
-static inline uint8_t tud_hid_interface_protocol(void)
-{
-  return tud_hid_n_interface_protocol(0);
-}
-
-static inline uint8_t tud_hid_get_protocol(void)
-{
-  return tud_hid_n_get_protocol(0);
-}
-
-static inline bool tud_hid_report(uint8_t report_id, void const* report, uint16_t len)
-{
-  return tud_hid_n_report(0, report_id, report, len);
-}
-
-static inline bool tud_hid_keyboard_report(uint8_t report_id, uint8_t modifier, uint8_t keycode[6])
-{
-  return tud_hid_n_keyboard_report(0, report_id, modifier, keycode);
-}
-
-static inline bool tud_hid_mouse_report(uint8_t report_id, uint8_t buttons, int8_t x, int8_t y, int8_t vertical, int8_t horizontal)
-{
-  return tud_hid_n_mouse_report(0, report_id, buttons, x, y, vertical, horizontal);
-}
-
-static inline bool  tud_hid_gamepad_report(uint8_t report_id, int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons)
-{
-  return tud_hid_n_gamepad_report(0, report_id, x, y, z, rz, rx, ry, hat, buttons);
-}
+void tud_hid_report_failed_cb(uint8_t instance, hid_report_type_t report_type, uint8_t const* report, uint16_t xferred_bytes);
 
 /* --------------------------------------------------------------------+
  * HID Report Descriptor Template
@@ -645,9 +624,8 @@ uint16_t hidd_open            (uint8_t rhport, tusb_desc_interface_t const * itf
 bool     hidd_control_xfer_cb (uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
 bool     hidd_xfer_cb         (uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
 
-
 #ifdef __cplusplus
  }
 #endif
 
-#endif /* _TUSB_HID_DEVICE_H_ */
+#endif

From 57a08200fc19bf49cf2c497011e88e83c3cbf249 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 17 Jul 2024 19:28:59 +0700
Subject: [PATCH 049/204] add family cmake/make for da1469x boards

---
 .idea/cmake.xml                               |   7 +-
 .../cmake/cpu/cortex-m33-nodsp.cmake          |  25 ++
 hw/bsp/da14695_dk_usb/da14695_dk_usb.c        | 134 --------
 .../da1469x/boards/da14695_dk_usb/board.cmake |   4 +
 hw/bsp/da1469x/boards/da14695_dk_usb/board.h  |  10 +
 hw/bsp/da1469x/boards/da14695_dk_usb/board.mk |   1 +
 .../boards}/da14695_dk_usb/syscfg/syscfg.h    |   0
 .../da1469x/boards/da1469x_dk_pro/board.cmake |   4 +
 hw/bsp/da1469x/boards/da1469x_dk_pro/board.h  |  12 +
 hw/bsp/da1469x/boards/da1469x_dk_pro/board.mk |   2 +
 .../boards}/da1469x_dk_pro/syscfg/syscfg.h    |   0
 .../da1469x-dk-pro.c => da1469x/family.c}     |  65 ++--
 hw/bsp/da1469x/family.cmake                   | 141 ++++++++
 .../board.mk => da1469x/family.mk}            |  46 +--
 .../gcc_startup_da1469x.S                     |   0
 .../linker}/da1469x.ld                        |   0
 .../product_header.dump                       | Bin
 hw/bsp/da1469x_dk_pro/board.mk                |  56 ----
 hw/bsp/da1469x_dk_pro/da1469x.ld              | 244 --------------
 hw/bsp/da1469x_dk_pro/gcc_startup_da1469x.S   | 301 ------------------
 hw/bsp/da1469x_dk_pro/product_header.dump     | Bin 8192 -> 0 bytes
 21 files changed, 257 insertions(+), 795 deletions(-)
 create mode 100644 examples/build_system/cmake/cpu/cortex-m33-nodsp.cmake
 delete mode 100644 hw/bsp/da14695_dk_usb/da14695_dk_usb.c
 create mode 100644 hw/bsp/da1469x/boards/da14695_dk_usb/board.cmake
 create mode 100644 hw/bsp/da1469x/boards/da14695_dk_usb/board.h
 create mode 100644 hw/bsp/da1469x/boards/da14695_dk_usb/board.mk
 rename hw/bsp/{ => da1469x/boards}/da14695_dk_usb/syscfg/syscfg.h (100%)
 create mode 100644 hw/bsp/da1469x/boards/da1469x_dk_pro/board.cmake
 create mode 100644 hw/bsp/da1469x/boards/da1469x_dk_pro/board.h
 create mode 100644 hw/bsp/da1469x/boards/da1469x_dk_pro/board.mk
 rename hw/bsp/{ => da1469x/boards}/da1469x_dk_pro/syscfg/syscfg.h (100%)
 rename hw/bsp/{da1469x_dk_pro/da1469x-dk-pro.c => da1469x/family.c} (80%)
 create mode 100644 hw/bsp/da1469x/family.cmake
 rename hw/bsp/{da14695_dk_usb/board.mk => da1469x/family.mk} (52%)
 rename hw/bsp/{da14695_dk_usb => da1469x}/gcc_startup_da1469x.S (100%)
 rename hw/bsp/{da14695_dk_usb => da1469x/linker}/da1469x.ld (100%)
 rename hw/bsp/{da14695_dk_usb => da1469x}/product_header.dump (100%)
 delete mode 100644 hw/bsp/da1469x_dk_pro/board.mk
 delete mode 100644 hw/bsp/da1469x_dk_pro/da1469x.ld
 delete mode 100644 hw/bsp/da1469x_dk_pro/gcc_startup_da1469x.S
 delete mode 100644 hw/bsp/da1469x_dk_pro/product_header.dump

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 1055e31d30..ec900b4a6d 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -3,7 +3,7 @@
   <component name="CMakeSharedSettings">
     <configurations>
       <configuration PROFILE_NAME="pico" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=1" />
-      <configuration PROFILE_NAME="pico pio-host" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=1 -DCFLAGS_CLI=&quot;-DCFG_TUH_RPI_PIO_USB=1&quot;" BUILD_OPTIONS="-v" />
+      <configuration PROFILE_NAME="pico pio-host" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=1 -DCFLAGS_CLI=&quot;-DCFG_TUH_RPI_PIO_USB=1&quot;" />
       <configuration PROFILE_NAME="feather_rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pico_sdk -DPICO_BOARD=adafruit_feather_rp2040 -DLOG=2" />
       <configuration PROFILE_NAME="feather_rp2040_max3421" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_rp2040_max3421 -DLOG=2" />
       <configuration PROFILE_NAME="metro_rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pico_sdk -DPICO_BOARD=adafruit_metro_rp2040 -DLOG=2 -DMAX3421_HOST=1" />
@@ -67,7 +67,7 @@
       <configuration PROFILE_NAME="metro_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
       <configuration PROFILE_NAME="feather_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
       <configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
-      <configuration PROFILE_NAME="itsybitsy_m4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=itsybitsy_m4 -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="itsybitsy_m4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=itsybitsy_m4" />
       <configuration PROFILE_NAME="same54_xplained" ENABLED="false" GENERATION_OPTIONS="-DBOARD=same54_xplained -DLOG=2 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="feather_nrf52840_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_nrf52840_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
       <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
@@ -134,9 +134,10 @@
       <configuration PROFILE_NAME="nanoch32v203" ENABLED="false" GENERATION_OPTIONS="-DBOARD=nanoch32v203" />
       <configuration PROFILE_NAME="ch32v203c_r0_1v0" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=ch32v203c_r0_1v0" />
       <configuration PROFILE_NAME="ch32v203c_r0_1v0 USBFS" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=ch32v203c_r0_1v0 -DPORT=1" />
-      <configuration PROFILE_NAME="ch32v203g_r0_1v0" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=ch32v203g_r0_1v0" />
+      <configuration PROFILE_NAME="ch32v203g_r0_1v0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ch32v203g_r0_1v0" />
       <configuration PROFILE_NAME="ch32v307v_r1_1v0" ENABLED="false" GENERATION_OPTIONS="-DBOARD=ch32v307v_r1_1v0 -DLOG=2" />
       <configuration PROFILE_NAME="ch32v307v_r1_1v0 USBFS" ENABLED="false" GENERATION_OPTIONS="-DBOARD=ch32v307v_r1_1v0 -DSPEED=full" />
+      <configuration PROFILE_NAME="da14695_dk_usb" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=da14695_dk_usb" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/examples/build_system/cmake/cpu/cortex-m33-nodsp.cmake b/examples/build_system/cmake/cpu/cortex-m33-nodsp.cmake
new file mode 100644
index 0000000000..b3cd743fdf
--- /dev/null
+++ b/examples/build_system/cmake/cpu/cortex-m33-nodsp.cmake
@@ -0,0 +1,25 @@
+if (TOOLCHAIN STREQUAL "gcc")
+  set(TOOLCHAIN_COMMON_FLAGS
+    -mthumb
+    -mcpu=cortex-m33+nodsp
+    -mfloat-abi=hard
+    -mfpu=fpv5-sp-d16
+    )
+  set(FREERTOS_PORT GCC_ARM_CM33_NTZ_NONSECURE CACHE INTERNAL "")
+
+elseif (TOOLCHAIN STREQUAL "clang")
+  set(TOOLCHAIN_COMMON_FLAGS
+    --target=arm-none-eabi
+    -mcpu=cortex-m33+nodsp
+    -mfpu=fpv5-sp-d16
+    )
+  set(FREERTOS_PORT GCC_ARM_CM33_NTZ_NONSECURE CACHE INTERNAL "")
+
+elseif (TOOLCHAIN STREQUAL "iar")
+  set(TOOLCHAIN_COMMON_FLAGS
+    --cpu cortex-m33+nodsp
+    --fpu VFPv5-SP
+    )
+  set(FREERTOS_PORT IAR_ARM_CM33_NTZ_NONSECURE CACHE INTERNAL "")
+
+endif ()
diff --git a/hw/bsp/da14695_dk_usb/da14695_dk_usb.c b/hw/bsp/da14695_dk_usb/da14695_dk_usb.c
deleted file mode 100644
index 667b83de38..0000000000
--- a/hw/bsp/da14695_dk_usb/da14695_dk_usb.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020 Jerzy Kasenberg
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "bsp/board_api.h"
-#include <hal/hal_gpio.h>
-#include <mcu/mcu.h>
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USB_IRQHandler(void)
-{
-  tud_int_handler(0);
-}
-
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM
-//--------------------------------------------------------------------+
-
-#define LED_PIN         33 // P1.1
-#define LED_STATE_ON    1
-#define LED_STATE_OFF   (1-LED_STATE_ON)
-
-#define BUTTON_PIN      6
-
-void UnhandledIRQ(void)
-{
-  CRG_TOP->SYS_CTRL_REG = 0x80;
-  __BKPT(1);
-  while(1);
-}
-
-// DA146xx driver function that must be called whenever VBUS changes.
-extern void tusb_vbus_changed(bool present);
-
-void board_init(void)
-{
-  // LED
-  hal_gpio_init_out(LED_PIN, LED_STATE_ON);
-
-  hal_gpio_init_out(1, 0);
-  hal_gpio_init_out(2, 0);
-  hal_gpio_init_out(3, 0);
-  hal_gpio_init_out(4, 0);
-  hal_gpio_init_out(5, 0);
-
-  // Button
-  hal_gpio_init_in(BUTTON_PIN, HAL_GPIO_PULL_DOWN);
-
-  // 1ms tick timer
-  SysTick_Config(SystemCoreClock / 1000);
-
-#if CFG_TUD_ENABLED
-  // This board is USB powered there is no need to monitor
-  // VBUS line.  Notify driver that VBUS is present.
-  tusb_vbus_changed(true);
-
-  /* Setup USB IRQ */
-  NVIC_SetPriority(USB_IRQn, 2);
-  NVIC_EnableIRQ(USB_IRQn);
-
-  /* Use PLL96 / 2 clock not HCLK */
-  CRG_TOP->CLK_CTRL_REG &= ~CRG_TOP_CLK_CTRL_REG_USB_CLK_SRC_Msk;
-
-  mcu_gpio_set_pin_function(14, MCU_GPIO_MODE_INPUT, MCU_GPIO_FUNC_USB);
-  mcu_gpio_set_pin_function(15, MCU_GPIO_MODE_INPUT, MCU_GPIO_FUNC_USB);
-#endif
-}
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
-  hal_gpio_write(LED_PIN, state ? LED_STATE_ON : LED_STATE_OFF);
-}
-
-uint32_t board_button_read(void)
-{
-  // button is active HIGH
-  return hal_gpio_read(BUTTON_PIN);
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void)buf;
-  (void)len;
-  return 0;
-}
-
-int board_uart_write(void const * buf, int len)
-{
-  (void)buf;
-  (void)len;
-
-  return 0;
-}
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler(void)
-{
-  system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
-  return system_ticks;
-}
-#endif
diff --git a/hw/bsp/da1469x/boards/da14695_dk_usb/board.cmake b/hw/bsp/da1469x/boards/da14695_dk_usb/board.cmake
new file mode 100644
index 0000000000..f9ef2dc861
--- /dev/null
+++ b/hw/bsp/da1469x/boards/da14695_dk_usb/board.cmake
@@ -0,0 +1,4 @@
+set(JLINK_DEVICE DA14695)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/da1469x/boards/da14695_dk_usb/board.h b/hw/bsp/da1469x/boards/da14695_dk_usb/board.h
new file mode 100644
index 0000000000..5efdd43e0c
--- /dev/null
+++ b/hw/bsp/da1469x/boards/da14695_dk_usb/board.h
@@ -0,0 +1,10 @@
+#ifndef BOARD_H
+#define BOARD_H
+
+#define LED_PIN         33 // P1.1
+#define LED_STATE_ON    1
+
+#define BUTTON_PIN      6
+#define BUTTON_STATE_ACTIVE 1
+
+#endif
diff --git a/hw/bsp/da1469x/boards/da14695_dk_usb/board.mk b/hw/bsp/da1469x/boards/da14695_dk_usb/board.mk
new file mode 100644
index 0000000000..1ca17ea00c
--- /dev/null
+++ b/hw/bsp/da1469x/boards/da14695_dk_usb/board.mk
@@ -0,0 +1 @@
+JLINK_DEVICE = DA14695
diff --git a/hw/bsp/da14695_dk_usb/syscfg/syscfg.h b/hw/bsp/da1469x/boards/da14695_dk_usb/syscfg/syscfg.h
similarity index 100%
rename from hw/bsp/da14695_dk_usb/syscfg/syscfg.h
rename to hw/bsp/da1469x/boards/da14695_dk_usb/syscfg/syscfg.h
diff --git a/hw/bsp/da1469x/boards/da1469x_dk_pro/board.cmake b/hw/bsp/da1469x/boards/da1469x_dk_pro/board.cmake
new file mode 100644
index 0000000000..f6408b72b8
--- /dev/null
+++ b/hw/bsp/da1469x/boards/da1469x_dk_pro/board.cmake
@@ -0,0 +1,4 @@
+set(JLINK_DEVICE DA14699)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/da1469x/boards/da1469x_dk_pro/board.h b/hw/bsp/da1469x/boards/da1469x_dk_pro/board.h
new file mode 100644
index 0000000000..f969acf90a
--- /dev/null
+++ b/hw/bsp/da1469x/boards/da1469x_dk_pro/board.h
@@ -0,0 +1,12 @@
+#ifndef BOARD_H
+#define BOARD_H
+
+#define LED_PIN         33
+#define LED_STATE_ON    1
+
+#define BUTTON_PIN      6
+#define BUTTON_STATE_ACTIVE 0
+
+#define NEED_VBUS_MONITOR
+
+#endif
diff --git a/hw/bsp/da1469x/boards/da1469x_dk_pro/board.mk b/hw/bsp/da1469x/boards/da1469x_dk_pro/board.mk
new file mode 100644
index 0000000000..40fe93b41f
--- /dev/null
+++ b/hw/bsp/da1469x/boards/da1469x_dk_pro/board.mk
@@ -0,0 +1,2 @@
+# For flash-jlink target
+JLINK_DEVICE = DA14699
diff --git a/hw/bsp/da1469x_dk_pro/syscfg/syscfg.h b/hw/bsp/da1469x/boards/da1469x_dk_pro/syscfg/syscfg.h
similarity index 100%
rename from hw/bsp/da1469x_dk_pro/syscfg/syscfg.h
rename to hw/bsp/da1469x/boards/da1469x_dk_pro/syscfg/syscfg.h
diff --git a/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c b/hw/bsp/da1469x/family.c
similarity index 80%
rename from hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c
rename to hw/bsp/da1469x/family.c
index 21bd62714e..70bedf6d9f 100644
--- a/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c
+++ b/hw/bsp/da1469x/family.c
@@ -25,24 +25,25 @@
  */
 
 #include "bsp/board_api.h"
+#include "board.h"
 #include <hal/hal_gpio.h>
 #include <mcu/mcu.h>
 
+#define LED_STATE_OFF   (1-LED_STATE_ON)
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void USB_IRQHandler(void)
-{
+void USB_IRQHandler(void) {
   tud_int_handler(0);
 }
 
-#if CFG_TUD_ENABLED
-// DA146xx driver function that must be called whenever VBUS changes
+// DA146xx driver function that must be called whenever VBUS changes.
 extern void tusb_vbus_changed(bool present);
 
+#if defined(NEED_VBUS_MONITOR) && CFG_TUD_ENABLED
 // VBUS change interrupt handler
-void VBUS_IRQHandler(void)
-{
+void VBUS_IRQHandler(void) {
   bool present = (CRG_TOP->ANA_STATUS_REG & CRG_TOP_ANA_STATUS_REG_VBUS_AVAILABLE_Msk) != 0;
   // Clear VBUS interrupt
   CRG_TOP->VBUS_IRQ_CLEAR_REG = 1;
@@ -54,22 +55,13 @@ void VBUS_IRQHandler(void)
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-
-#define LED_PIN         33
-#define LED_STATE_ON    1
-#define LED_STATE_OFF   0
-
-#define BUTTON_PIN      6
-
-void UnhandledIRQ(void)
-{
+void UnhandledIRQ(void) {
   CRG_TOP->SYS_CTRL_REG = 0x80;
   __BKPT(1);
-  while(1);
+  while (1);
 }
 
-void board_init(void)
-{
+void board_init(void) {
   // LED
   hal_gpio_init_out(LED_PIN, LED_STATE_ON);
 
@@ -80,12 +72,13 @@ void board_init(void)
   hal_gpio_init_out(5, 0);
 
   // Button
-  hal_gpio_init_in(BUTTON_PIN, HAL_GPIO_PULL_UP);
+  hal_gpio_init_in(BUTTON_PIN, BUTTON_STATE_ACTIVE ? HAL_GPIO_PULL_DOWN : HAL_GPIO_PULL_UP);
 
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 
 #if CFG_TUD_ENABLED
+  #ifdef NEED_VBUS_MONITOR
   // Setup interrupt for both connect and disconnect
   CRG_TOP->VBUS_IRQ_MASK_REG = CRG_TOP_VBUS_IRQ_MASK_REG_VBUS_IRQ_EN_FALL_Msk |
                                CRG_TOP_VBUS_IRQ_MASK_REG_VBUS_IRQ_EN_RISE_Msk;
@@ -94,6 +87,10 @@ void board_init(void)
   // otherwise it could go unnoticed.
   NVIC_SetPendingIRQ(VBUS_IRQn);
   NVIC_EnableIRQ(VBUS_IRQn);
+  #else
+  // This board is USB powered there is no need to monitor VBUS line.  Notify driver that VBUS is present.
+  tusb_vbus_changed(true);
+  #endif
 
   /* Setup USB IRQ */
   NVIC_SetPriority(USB_IRQn, 2);
@@ -111,41 +108,35 @@ void board_init(void)
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
+void board_led_write(bool state) {
   hal_gpio_write(LED_PIN, state ? LED_STATE_ON : LED_STATE_OFF);
 }
 
-uint32_t board_button_read(void)
-{
-  // button is active LOW
-  return hal_gpio_read(BUTTON_PIN) ^ 1;
+uint32_t board_button_read(void) {
+  return BUTTON_STATE_ACTIVE == hal_gpio_read(BUTTON_PIN);
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void)buf;
-  (void)len;
+int board_uart_read(uint8_t* buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 }
 
-int board_uart_write(void const * buf, int len)
-{
-  (void)buf;
-  (void)len;
+int board_uart_write(void const* buf, int len) {
+  (void) buf;
+  (void) len;
 
   return 0;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler(void)
-{
+
+void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/da1469x/family.cmake b/hw/bsp/da1469x/family.cmake
new file mode 100644
index 0000000000..8c89141fee
--- /dev/null
+++ b/hw/bsp/da1469x/family.cmake
@@ -0,0 +1,141 @@
+include_guard()
+
+set(MCU_DIR ${TOP}/hw/mcu/dialog/da1469x)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+set(CMAKE_SYSTEM_PROCESSOR cortex-m33-nodsp CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+set(FAMILY_MCUS DA1469X CACHE INTERNAL "")
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  if (NOT DEFINED LD_FILE_GNU)
+    set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/da1469x.ld)
+  endif ()
+
+  if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
+    set(STARTUP_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/gcc_startup_da1469x.S)
+    set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+  endif ()
+
+  add_library(${BOARD_TARGET} STATIC
+    ${MCU_DIR}/src/system_da1469x.c
+    ${MCU_DIR}/src/da1469x_clock.c
+    ${MCU_DIR}/src/hal_gpio.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_compile_options(${BOARD_TARGET} PUBLIC -mthumb-interwork)
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    CORE_M33
+    CFG_TUD_ENDPOINT0_SIZE=8
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    ${MCU_DIR}/include
+    ${MCU_DIR}/SDK_10.0.8.105/sdk/bsp/include
+    )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -L${NRFX_DIR}/mdk
+      --specs=nosys.specs --specs=nano.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -L${NRFX_DIR}/mdk
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+
+function(family_flash_jlink_dialog TARGET)
+  set(JLINKEXE JLinkExe)
+  set(JLINK_IF swd)
+
+  # mkimage from sdk
+  set(MKIMAGE $ENV{HOME}/code/tinyusb-mcu-driver/dialog/SDK_10.0.8.105/binaries/mkimage)
+
+  file(GENERATE OUTPUT $<TARGET_FILE_DIR:${TARGET}>/version.h
+    CONTENT "#define SW_VERSION \"v_1.0.0.1\"
+#define SW_VERSION_DATE \"2024-07-17 17:55\""
+    )
+
+  file(GENERATE OUTPUT $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.jlink
+    CONTENT "r
+halt
+loadfile $<TARGET_FILE_DIR:${TARGET}>/${TARGET}-image.bin 0x16000000
+r
+go
+exit"
+  )
+
+  add_custom_target(${TARGET}-image
+    DEPENDS ${TARGET}
+    COMMAND ${MKIMAGE} da1469x $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin $<TARGET_FILE_DIR:${TARGET}>/version.h $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin.img
+    COMMAND cp ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/product_header.dump $<TARGET_FILE_DIR:${TARGET}>/${TARGET}-image.bin
+    COMMAND cat $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin.img >> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}-image.bin
+    )
+  add_custom_target(${TARGET}-jlink
+    DEPENDS ${TARGET}-image
+    COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} -if ${JLINK_IF} -JTAGConf -1,-1 -speed auto -CommandFile $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.jlink
+    )
+endfunction()
+
+
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_DA1469X ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/dialog/da146xx/dcd_da146xx.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_add_bin_hex(${TARGET})
+  family_flash_jlink_dialog(${TARGET})
+endfunction()
diff --git a/hw/bsp/da14695_dk_usb/board.mk b/hw/bsp/da1469x/family.mk
similarity index 52%
rename from hw/bsp/da14695_dk_usb/board.mk
rename to hw/bsp/da1469x/family.mk
index 980b1a3615..f35fe2cb5f 100644
--- a/hw/bsp/da14695_dk_usb/board.mk
+++ b/hw/bsp/da1469x/family.mk
@@ -1,4 +1,6 @@
-MCU_FAMILY_DIR = hw/mcu/dialog/da1469x
+MCU_DIR = hw/mcu/dialog/da1469x
+
+include $(TOP)/$(BOARD_PATH)/board.mk
 
 CFLAGS += \
   -flto \
@@ -8,48 +10,52 @@ CFLAGS += \
   -mcpu=cortex-m33+nodsp \
   -mfloat-abi=hard \
   -mfpu=fpv5-sp-d16 \
-  -nostdlib \
   -DCORE_M33 \
   -DCFG_TUSB_MCU=OPT_MCU_DA1469X \
   -DCFG_TUD_ENDPOINT0_SIZE=8\
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS_GCC += \
+  -nostdlib \
+  --specs=nosys.specs --specs=nano.specs
 
 # All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/da1469x.ld
+LD_FILE = $(FAMILY_PATH)/linker/da1469x.ld
 
 # While this is for da1469x chip, there is chance that da1468x chip family will also work
 SRC_C += \
 	src/portable/dialog/da146xx/dcd_da146xx.c \
-	$(MCU_FAMILY_DIR)/src/system_da1469x.c \
-	$(MCU_FAMILY_DIR)/src/da1469x_clock.c \
-	$(MCU_FAMILY_DIR)/src/hal_gpio.c \
+	${MCU_DIR}/src/system_da1469x.c \
+	${MCU_DIR}/src/da1469x_clock.c \
+	${MCU_DIR}/src/hal_gpio.c \
 
-SRC_S += hw/bsp/$(BOARD)/gcc_startup_da1469x.S
+SRC_S += $(FAMILY_PATH)/gcc_startup_da1469x.S
 
 INC += \
-	$(TOP)/hw/bsp/$(BOARD) \
-	$(TOP)/$(MCU_FAMILY_DIR)/include \
-	$(TOP)/$(MCU_FAMILY_DIR)/SDK_10.0.8.105/sdk/bsp/include
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/${MCU_DIR}/include \
+	$(TOP)/${MCU_DIR}/SDK_10.0.8.105/sdk/bsp/include
 
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
 
-# For flash-jlink target
-JLINK_DEVICE = DA14695
-
 # flash using jlink but with some twists
 flash: flash-dialog
 
-flash-dialog: $(BUILD)/$(PROJECT).bin
+# SDK_BINARY_PATH is the path to the SDK binary files
+SDK_BINARY_PATH = $(HOME)/code/tinyusb-mcu-driver/dialog/SDK_10.0.8.105/binaries
+MKIMAGE = $(SDK_BINARY_PATH)/mkimage
+
+$(BUILD)/$(PROJECT)-image.bin: $(BUILD)/$(PROJECT).bin
 	@echo '#define SW_VERSION "v_1.0.0.1"' >$(BUILD)/version.h
-	@echo '#define SW_VERSION_DATE "'`date +"%Y-%m-%d %H:%M"`'"' >>$(BUILD)/version.h
-	mkimage da1469x $(BUILD)/$(PROJECT).bin $(BUILD)/version.h $^.img
-	cp $(TOP)/hw/bsp/$(BOARD)/product_header.dump $(BUILD)/$(BOARD)-image.bin
-	cat $^.img >> $(BUILD)/$(BOARD)-image.bin
+	@echo '#define SW_VERSION_DATE "'`date +"%Y-%m-%d %H:%M"`'"' >> $(BUILD)/version.h
+	$(MKIMAGE) da1469x $^ $(BUILD)/version.h $^.img
+	cp $(TOP)/$(FAMILY_PATH)/product_header.dump $(BUILD)/$(PROJECT)-image.bin
+	cat $^.img >> $(BUILD)/$(PROJECT)-image.bin
+
+flash-dialog: $(BUILD)/$(PROJECT)-image.bin
 	@echo r > $(BUILD)/$(BOARD).jlink
 	@echo halt >> $(BUILD)/$(BOARD).jlink
-	@echo loadfile $(BUILD)/$(BOARD)-image.bin 0x16000000 >> $(BUILD)/$(BOARD).jlink
+	@echo loadfile $^ 0x16000000 >> $(BUILD)/$(BOARD).jlink
 	@echo r >> $(BUILD)/$(BOARD).jlink
 	@echo go >> $(BUILD)/$(BOARD).jlink
 	@echo exit >> $(BUILD)/$(BOARD).jlink
diff --git a/hw/bsp/da14695_dk_usb/gcc_startup_da1469x.S b/hw/bsp/da1469x/gcc_startup_da1469x.S
similarity index 100%
rename from hw/bsp/da14695_dk_usb/gcc_startup_da1469x.S
rename to hw/bsp/da1469x/gcc_startup_da1469x.S
diff --git a/hw/bsp/da14695_dk_usb/da1469x.ld b/hw/bsp/da1469x/linker/da1469x.ld
similarity index 100%
rename from hw/bsp/da14695_dk_usb/da1469x.ld
rename to hw/bsp/da1469x/linker/da1469x.ld
diff --git a/hw/bsp/da14695_dk_usb/product_header.dump b/hw/bsp/da1469x/product_header.dump
similarity index 100%
rename from hw/bsp/da14695_dk_usb/product_header.dump
rename to hw/bsp/da1469x/product_header.dump
diff --git a/hw/bsp/da1469x_dk_pro/board.mk b/hw/bsp/da1469x_dk_pro/board.mk
deleted file mode 100644
index 5282f93a38..0000000000
--- a/hw/bsp/da1469x_dk_pro/board.mk
+++ /dev/null
@@ -1,56 +0,0 @@
-MCU_FAMILY_DIR = hw/mcu/dialog/da1469x
-
-CFLAGS += \
-  -flto \
-  -mthumb \
-  -mthumb-interwork \
-  -mabi=aapcs \
-  -mcpu=cortex-m33+nodsp \
-  -mfloat-abi=hard \
-  -mfpu=fpv5-sp-d16 \
-  -nostdlib \
-  -DCORE_M33 \
-  -DCFG_TUSB_MCU=OPT_MCU_DA1469X \
-  -DCFG_TUD_ENDPOINT0_SIZE=8\
-
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/da1469x.ld
-
-# While this is for da1469x chip, there is chance that da1468x chip family will also work
-SRC_C += \
-	src/portable/dialog/da146xx/dcd_da146xx.c \
-	$(MCU_FAMILY_DIR)/src/system_da1469x.c \
-	$(MCU_FAMILY_DIR)/src/da1469x_clock.c \
-	$(MCU_FAMILY_DIR)/src/hal_gpio.c \
-
-SRC_S += hw/bsp/$(BOARD)/gcc_startup_da1469x.S
-
-INC += \
-	$(TOP)/hw/bsp/$(BOARD) \
-	$(TOP)/$(MCU_FAMILY_DIR)/include \
-	$(TOP)/$(MCU_FAMILY_DIR)/SDK_10.0.8.105/sdk/bsp/include
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
-
-# For flash-jlink target
-JLINK_DEVICE = DA14699
-
-# flash using jlink but with some twists
-flash: flash-dialog
-
-flash-dialog: $(BUILD)/$(PROJECT).bin
-	@echo '#define SW_VERSION "v_1.0.0.1"' >$(BUILD)/version.h
-	@echo '#define SW_VERSION_DATE "'`date +"%Y-%m-%d %H:%M"`'"' >>$(BUILD)/version.h
-	mkimage da1469x $(BUILD)/$(PROJECT).bin $(BUILD)/version.h $^.img
-	cp $(TOP)/hw/bsp/$(BOARD)/product_header.dump $(BUILD)/$(BOARD)-image.bin
-	cat $^.img >> $(BUILD)/$(BOARD)-image.bin
-	@echo r > $(BUILD)/$(BOARD).jlink
-	@echo halt >> $(BUILD)/$(BOARD).jlink
-	@echo loadfile $(BUILD)/$(BOARD)-image.bin 0x16000000 >> $(BUILD)/$(BOARD).jlink
-	@echo r >> $(BUILD)/$(BOARD).jlink
-	@echo go >> $(BUILD)/$(BOARD).jlink
-	@echo exit >> $(BUILD)/$(BOARD).jlink
-	$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $(BUILD)/$(BOARD).jlink
diff --git a/hw/bsp/da1469x_dk_pro/da1469x.ld b/hw/bsp/da1469x_dk_pro/da1469x.ld
deleted file mode 100644
index 8cc1d9d99d..0000000000
--- a/hw/bsp/da1469x_dk_pro/da1469x.ld
+++ /dev/null
@@ -1,244 +0,0 @@
-/*
- * Licensed to the Apache Software Foundation (ASF) under one
- * or more contributor license agreements.  See the NOTICE file
- * distributed with this work for additional information
- * regarding copyright ownership.  The ASF licenses this file
- * to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance
- * with the License.  You may obtain a copy of the License at
- *
- *  http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing,
- * software distributed under the License is distributed on an
- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
- * KIND, either express or implied.  See the License for the
- * specific language governing permissions and limitations
- * under the License.
- */
-
-MEMORY
-{
-    /*
-     * Flash is remapped at 0x0 by 1st stage bootloader, but this is done with
-     * an offset derived from image header thus it is safer to use remapped
-     * address space at 0x0 instead of QSPI_M address space at 0x16000000.
-     * Bootloader partition is 32K, but 9K is currently reserved for product
-     * header (8K) and image header (1K).
-     * First 512 bytes of SYSRAM are remapped at 0x0 and used as ISR vector
-     * (there's no need to reallocate ISR vector) and thus cannot be used by
-     * application.
-     */
-
-    FLASH (r)  : ORIGIN = (0x00000000), LENGTH = (1024 * 1024)
-    RAM (rw)   : ORIGIN = (0x20000000), LENGTH = (512 * 1024)
-}
-
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-
-/* Linker script to place sections and symbol values. Should be used together
- * with other linker script that defines memory regions FLASH and RAM.
- * It references following symbols, which must be defined in code:
- *   Reset_Handler : Entry of reset handler
- *
- * It defines following symbols, which code can use without definition:
- *   __exidx_start
- *   __exidx_end
- *   __etext
- *   __data_start__
- *   __preinit_array_start
- *   __preinit_array_end
- *   __init_array_start
- *   __init_array_end
- *   __fini_array_start
- *   __fini_array_end
- *   __data_end__
- *   __bss_start__
- *   __bss_end__
- *   __HeapBase
- *   __HeapLimit
- *   __StackLimit
- *   __StackTop
- *   __stack
- *   __bssnz_start__
- *   __bssnz_end__
- */
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
-    __text = .;
-
-    .text :
-    {
-        __isr_vector_start = .;
-        KEEP(*(.isr_vector))
-        /* ISR vector shall have exactly 512 bytes */
-        . = __isr_vector_start + 0x200;
-        __isr_vector_end = .;
-
-        *(.text)
-        *(.text.*)
-
-        *(.libcmac.rom)
-
-        KEEP(*(.init))
-        KEEP(*(.fini))
-
-        /* .ctors */
-        *crtbegin.o(.ctors)
-        *crtbegin?.o(.ctors)
-        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
-        *(SORT(.ctors.*))
-        *(.ctors)
-
-        /* .dtors */
-        *crtbegin.o(.dtors)
-        *crtbegin?.o(.dtors)
-        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
-        *(SORT(.dtors.*))
-        *(.dtors)
-
-        *(.rodata*)
-
-        *(.eh_frame*)
-        . = ALIGN(4);
-    } > FLASH
-
-    .ARM.extab :
-    {
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-        . = ALIGN(4);
-    } > FLASH
-
-    __exidx_start = .;
-    .ARM :
-    {
-        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-        . = ALIGN(4);
-    } > FLASH
-    __exidx_end = .;
-
-    .intvect :
-    {
-        . = ALIGN(4);
-        __intvect_start__ = .;
-        . = . + (__isr_vector_end - __isr_vector_start);
-        . = ALIGN(4);
-    } > RAM
-
-    .sleep_state (NOLOAD) :
-    {
-        . = ALIGN(4);
-        *(sleep_state)
-    } > RAM
-
-    /* This section will be zeroed by RTT package init */
-    .rtt (NOLOAD):
-    {
-        . = ALIGN(4);
-        *(.rtt)
-        . = ALIGN(4);
-    } > RAM
-
-    __text_ram_addr = LOADADDR(.text_ram);
-
-    .text_ram :
-    {
-        . = ALIGN(4);
-        __text_ram_start__ = .;
-        *(.text_ram*)
-        . = ALIGN(4);
-        __text_ram_end__ = .;
-    } > RAM AT > FLASH
-
-    __etext = LOADADDR(.data);
-
-    .data :
-    {
-        __data_start__ = .;
-        *(vtable)
-        *(.data*)
-
-        . = ALIGN(4);
-        /* preinit data */
-        PROVIDE_HIDDEN (__preinit_array_start = .);
-        *(.preinit_array)
-        PROVIDE_HIDDEN (__preinit_array_end = .);
-
-        . = ALIGN(4);
-        /* init data */
-        PROVIDE_HIDDEN (__init_array_start = .);
-        *(SORT(.init_array.*))
-        *(.init_array)
-        PROVIDE_HIDDEN (__init_array_end = .);
-
-
-        . = ALIGN(4);
-        /* finit data */
-        PROVIDE_HIDDEN (__fini_array_start = .);
-        *(SORT(.fini_array.*))
-        *(.fini_array)
-        PROVIDE_HIDDEN (__fini_array_end = .);
-
-        *(.jcr)
-        . = ALIGN(4);
-        /* All data end */
-        __data_end__ = .;
-    } > RAM AT > FLASH
-
-    .bssnz :
-    {
-        . = ALIGN(4);
-        __bssnz_start__ = .;
-        *(.bss.core.nz*)
-        . = ALIGN(4);
-        __bssnz_end__ = .;
-    } > RAM
-
-    .bss :
-    {
-        . = ALIGN(4);
-        __bss_start__ = .;
-        *(.bss*)
-        *(COMMON)
-        . = ALIGN(4);
-        __bss_end__ = .;
-    } > RAM
-
-    .cmac (NOLOAD) :
-    {
-        . = ALIGN(0x400);
-        *(.libcmac.ram)
-    } > RAM
-
-    /* Heap starts after BSS */
-    . = ALIGN(8);
-    __HeapBase = .;
-
-    /* .stack_dummy section doesn't contains any symbols. It is only
-     * used for linker to calculate size of stack sections, and assign
-     * values to stack symbols later */
-    .stack_dummy (COPY):
-    {
-        *(.stack*)
-    } > RAM
-
-    _ram_start = ORIGIN(RAM);
-
-    /* Set stack top to end of RAM, and stack limit move down by
-     * size of stack_dummy section */
-    __StackTop = ORIGIN(RAM) + LENGTH(RAM);
-    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
-    PROVIDE(__stack = __StackTop);
-
-    /* Top of head is the bottom of the stack */
-    __HeapLimit = __StackLimit;
-    end = __HeapLimit;
-
-    /* Check if data + heap + stack exceeds RAM limit */
-    ASSERT(__HeapBase <= __HeapLimit, "region RAM overflowed with stack")
-
-    /* Check that intvect is at the beginning of RAM */
-    ASSERT(__intvect_start__ == ORIGIN(RAM), "intvect is not at beginning of RAM")
-}
diff --git a/hw/bsp/da1469x_dk_pro/gcc_startup_da1469x.S b/hw/bsp/da1469x_dk_pro/gcc_startup_da1469x.S
deleted file mode 100644
index d47fbcd976..0000000000
--- a/hw/bsp/da1469x_dk_pro/gcc_startup_da1469x.S
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
- * Licensed to the Apache Software Foundation (ASF) under one
- * or more contributor license agreements.  See the NOTICE file
- * distributed with this work for additional information
- * regarding copyright ownership.  The ASF licenses this file
- * to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance
- * with the License.  You may obtain a copy of the License at
- *
- *  http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing,
- * software distributed under the License is distributed on an
- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
- * KIND, either express or implied.  See the License for the
- * specific language governing permissions and limitations
- * under the License.
- */
-
- #include "syscfg/syscfg.h"
-
-    .syntax unified
-    .arch   armv7-m
-
-    .section .stack
-    .align  3
-#ifdef __STACK_SIZE
-    .equ    Stack_Size, __STACK_SIZE
-#else
-    .equ    Stack_Size, 0xC00
-#endif
-    .equ    SYS_CTRL_REG,       0x50000024
-    .equ    CACHE_FLASH_REG,    0x100C0040
-    .equ    RESET_STAT_REG,     0x500000BC
-
-    .globl  __StackTop
-    .globl  __StackLimit
-__StackLimit:
-    .space  Stack_Size
-    .size   __StackLimit, . - __StackLimit
-__StackTop:
-    .size   __StackTop, . - __StackTop
-
-    .section .heap
-    .align  3
-#ifdef __HEAP_SIZE
-    .equ    Heap_Size, __HEAP_SIZE
-#else
-    .equ    Heap_Size, 0
-#endif
-    .globl  __HeapBase
-    .globl  __HeapLimit
-__HeapBase:
-    .if     Heap_Size
-    .space  Heap_Size
-    .endif
-    .size   __HeapBase, . - __HeapBase
-__HeapLimit:
-    .size   __HeapLimit, . - __HeapLimit
-
-    .section .isr_vector
-    .align 2
-    .globl  __isr_vector
-__isr_vector:
-    .long   __StackTop
-    .long   Reset_Handler
-    /* Cortex-M33 interrupts */
-    .long   NMI_Handler
-    .long   HardFault_Handler
-    .long   MemoryManagement_Handler
-    .long   BusFault_Handler
-    .long   UsageFault_Handler
-    .long   SecureFault_Handler
-    .long   0                       /* Reserved */
-    .long   0                       /* Reserved */
-    .long   0                       /* Reserved */
-    .long   SVC_Handler
-    .long   DebugMonitor_Handler
-    .long   0                       /* Reserved */
-    .long   PendSV_Handler
-    .long   SysTick_Handler
-    /* DA1469x interrupts */
-    .long   SENSOR_NODE_IRQHandler
-    .long   DMA_IRQHandler
-    .long   CHARGER_STATE_IRQHandler
-    .long   CHARGER_ERROR_IRQHandler
-    .long   CMAC2SYS_IRQHandler
-    .long   UART_IRQHandler
-    .long   UART2_IRQHandler
-    .long   UART3_IRQHandler
-    .long   I2C_IRQHandler
-    .long   I2C2_IRQHandler
-    .long   SPI_IRQHandler
-    .long   SPI2_IRQHandler
-    .long   PCM_IRQHandler
-    .long   SRC_IN_IRQHandler
-    .long   SRC_OUT_IRQHandler
-    .long   USB_IRQHandler
-    .long   TIMER_IRQHandler
-    .long   TIMER2_IRQHandler
-    .long   RTC_IRQHandler
-    .long   KEY_WKUP_GPIO_IRQHandler
-    .long   PDC_IRQHandler
-    .long   VBUS_IRQHandler
-    .long   MRM_IRQHandler
-    .long   MOTOR_CONTROLLER_IRQHandler
-    .long   TRNG_IRQHandler
-    .long   DCDC_IRQHandler
-    .long   XTAL32M_RDY_IRQHandler
-    .long   ADC_IRQHandler
-    .long   ADC2_IRQHandler
-    .long   CRYPTO_IRQHandler
-    .long   CAPTIMER1_IRQHandler
-    .long   RFDIAG_IRQHandler
-    .long   LCD_CONTROLLER_IRQHandler
-    .long   PLL_LOCK_IRQHandler
-    .long   TIMER3_IRQHandler
-    .long   TIMER4_IRQHandler
-    .long   LRA_IRQHandler
-    .long   RTC_EVENT_IRQHandler
-    .long   GPIO_P0_IRQHandler
-    .long   GPIO_P1_IRQHandler
-    .long   0                       /* Reserved */
-    .long   0                       /* Reserved */
-    .long   0                       /* Reserved */
-    .long   0                       /* Reserved */
-    .long   0                       /* Reserved */
-    .long   0                       /* Reserved */
-    .long   0                       /* Reserved */
-    .long   0                       /* Reserved */
-    .size   __isr_vector, . - __isr_vector
-
-    .text
-    .thumb
-    .thumb_func
-    .align 2
-    .globl Reset_Handler
-    .type  Reset_Handler, %function
-Reset_Handler:
- /* Make sure interrupt vector is remapped at 0x0 */
-    ldr     r1, =SYS_CTRL_REG
-    ldrh    r2, [r1, #0]
-    orrs    r2, r2, #8
-    strh    r2, [r1, #0]
-
-#if !MYNEWT_VAL(RAM_RESIDENT)
-/*
- * Flash is remapped at 0x0 with an offset, i.e. 0x0 does not correspond to
- * 0x16000000 but to start of an image on flash. This is calculated from product
- * header by 1st state bootloader and configured in CACHE_FLASH_REG. We need to
- * retrieve proper offset value for calculations later.
- */
-    ldr     r1, =CACHE_FLASH_REG
-    ldr     r4, [r1, #0]
-    mov     r2, r4
-    mov     r3, #0xFFFF
-    bic     r4, r4, r3      /* CACHE_FLASH_REG[FLASH_REGION_BASE] */
-    mov     r3, #0xFFF0
-    and     r2, r2, r3      /* CACHE_FLASH_REG[FLASH_REGION_OFFSET] */
-    lsr     r2, r2, #2
-    orr     r4, r4, r2
-
-/* Copy ISR vector from flash to RAM */
-    ldr     r1, =__isr_vector_start     /* src ptr */
-    ldr     r2, =__isr_vector_end       /* src end */
-    ldr     r3, =__intvect_start__      /* dst ptr */
-/* Make sure we copy from QSPIC address range, not from remapped range */
-    cmp     r1, r4
-    itt     lt
-    addlt   r1, r1, r4
-    addlt   r2, r2, r4
-.loop_isr_copy:
-    cmp     r1, r2
-    ittt    lt
-    ldrlt   r0, [r1], #4
-    strlt   r0, [r3], #4
-    blt     .loop_isr_copy
-
-/* Copy QSPI code from flash to RAM */
-    ldr     r1, =__text_ram_addr        /* src ptr */
-    ldr     r2, =__text_ram_start__     /* ptr */
-    ldr     r3, =__text_ram_end__       /* dst end */
-.loop_code_text_ram_copy:
-    cmp     r2, r3
-    ittt    lt
-    ldrlt   r0, [r1], #4
-    strlt   r0, [r2], #4
-    blt     .loop_code_text_ram_copy
-
-/* Copy data from flash to RAM */
-    ldr     r1, =__etext                /* src ptr */
-    ldr     r2, =__data_start__         /* dst ptr */
-    ldr     r3, =__data_end__           /* dst end */
-.loop_data_copy:
-    cmp     r2, r3
-    ittt    lt
-    ldrlt   r0, [r1], #4
-    strlt   r0, [r2], #4
-    blt     .loop_data_copy
-#endif
-
-/* Clear BSS */
-    movs    r0, 0
-    ldr     r1, =__bss_start__
-    ldr     r2, =__bss_end__
-.loop_bss_clear:
-    cmp     r1, r2
-    itt     lt
-    strlt   r0, [r1], #4
-    blt     .loop_bss_clear
-
-    ldr     r0, =__HeapBase
-    ldr     r1, =__HeapLimit
-/* Call static constructors */
-    bl __libc_init_array
-
-    bl      SystemInit
-    bl      main
-
-    .pool
-    .size   Reset_Handler, . - Reset_Handler
-
-/* Default interrupt handler */
-    .type   Default_Handler, %function
-Default_Handler:
-    ldr     r1, =SYS_CTRL_REG
-    ldrh    r2, [r1, #0]
-    orrs    r2, r2, #0x80   /* DEBUGGER_ENABLE */
-    strh    r2, [r1, #0]
-    b       .
-
-    .size   Default_Handler, . - Default_Handler
-
-/* Default handlers for all interrupts */
-    .macro  IRQ handler
-    .weak   \handler
-    .set    \handler, Default_Handler
-    .endm
-
-    /* Cortex-M33 interrupts */
-    IRQ  NMI_Handler
-    IRQ  HardFault_Handler
-    IRQ  MemoryManagement_Handler
-    IRQ  BusFault_Handler
-    IRQ  UsageFault_Handler
-    IRQ  SecureFault_Handler
-    IRQ  SVC_Handler
-    IRQ  DebugMonitor_Handler
-    IRQ  PendSV_Handler
-    IRQ  SysTick_Handler
-    /* DA1469x interrupts */
-    IRQ  SENSOR_NODE_IRQHandler
-    IRQ  DMA_IRQHandler
-    IRQ  CHARGER_STATE_IRQHandler
-    IRQ  CHARGER_ERROR_IRQHandler
-    IRQ  CMAC2SYS_IRQHandler
-    IRQ  UART_IRQHandler
-    IRQ  UART2_IRQHandler
-    IRQ  UART3_IRQHandler
-    IRQ  I2C_IRQHandler
-    IRQ  I2C2_IRQHandler
-    IRQ  SPI_IRQHandler
-    IRQ  SPI2_IRQHandler
-    IRQ  PCM_IRQHandler
-    IRQ  SRC_IN_IRQHandler
-    IRQ  SRC_OUT_IRQHandler
-    IRQ  USB_IRQHandler
-    IRQ  TIMER_IRQHandler
-    IRQ  TIMER2_IRQHandler
-    IRQ  RTC_IRQHandler
-    IRQ  KEY_WKUP_GPIO_IRQHandler
-    IRQ  PDC_IRQHandler
-    IRQ  VBUS_IRQHandler
-    IRQ  MRM_IRQHandler
-    IRQ  MOTOR_CONTROLLER_IRQHandler
-    IRQ  TRNG_IRQHandler
-    IRQ  DCDC_IRQHandler
-    IRQ  XTAL32M_RDY_IRQHandler
-    IRQ  ADC_IRQHandler
-    IRQ  ADC2_IRQHandler
-    IRQ  CRYPTO_IRQHandler
-    IRQ  CAPTIMER1_IRQHandler
-    IRQ  RFDIAG_IRQHandler
-    IRQ  LCD_CONTROLLER_IRQHandler
-    IRQ  PLL_LOCK_IRQHandler
-    IRQ  TIMER3_IRQHandler
-    IRQ  TIMER4_IRQHandler
-    IRQ  LRA_IRQHandler
-    IRQ  RTC_EVENT_IRQHandler
-    IRQ  GPIO_P0_IRQHandler
-    IRQ  GPIO_P1_IRQHandler
-    IRQ  RESERVED40_IRQHandler
-    IRQ  RESERVED41_IRQHandler
-    IRQ  RESERVED42_IRQHandler
-    IRQ  RESERVED43_IRQHandler
-    IRQ  RESERVED44_IRQHandler
-    IRQ  RESERVED45_IRQHandler
-    IRQ  RESERVED46_IRQHandler
-    IRQ  RESERVED47_IRQHandler
-
-.end
diff --git a/hw/bsp/da1469x_dk_pro/product_header.dump b/hw/bsp/da1469x_dk_pro/product_header.dump
deleted file mode 100644
index ea4842242654f6f52e34ed4737c9fc1692869f2d..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 8192
zcmeIuO$mTN0EE#I51zMyQA{AF@Vuo2G0Ao@gg-GB-oOWQep}6){M|Xu{kvBgGb~eE
qA0t43009C72oNAZfB*pk1PBlyK!5-N0t5&UAV7cs0Rja25O@K4jm)P2


From 0004faca83f3fa3128fa69b6f97ac711f30d2d20 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 17 Jul 2024 19:29:21 +0700
Subject: [PATCH 050/204] minor update hid device

---
 src/class/hid/hid_device.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c
index 7168ab3d56..00f6fc4747 100644
--- a/src/class/hid/hid_device.c
+++ b/src/class/hid/hid_device.c
@@ -46,16 +46,16 @@ typedef struct {
   uint8_t itf_protocol; // Boot mouse or keyboard
 
   uint16_t report_desc_len;
-  CFG_TUSB_MEM_ALIGN uint8_t protocol_mode; // Boot (0) or Report protocol (1)
-  CFG_TUSB_MEM_ALIGN uint8_t idle_rate;     // up to application to handle idle rate
-
-  CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_HID_EP_BUFSIZE];
-  CFG_TUSB_MEM_ALIGN uint8_t epout_buf[CFG_TUD_HID_EP_BUFSIZE];
-  CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf[CFG_TUD_HID_EP_BUFSIZE];
+  uint8_t protocol_mode; // Boot (0) or Report protocol (1)
+  uint8_t idle_rate;     // up to application to handle idle rate
 
   // TODO save hid descriptor since host can specifically request this after enumeration
   // Note: HID descriptor may be not available from application after enumeration
   tusb_hid_descriptor_hid_t const *hid_descriptor;
+
+  uint8_t ctrl_buf[CFG_TUD_HID_EP_BUFSIZE];
+  CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_HID_EP_BUFSIZE];
+  CFG_TUSB_MEM_ALIGN uint8_t epout_buf[CFG_TUD_HID_EP_BUFSIZE];
 } hidd_interface_t;
 
 CFG_TUD_MEM_SECTION tu_static hidd_interface_t _hidd_itf[CFG_TUD_HID];

From e1e68cdb9b968d03d39336a02ec0d9df40aea870 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 17 Jul 2024 19:30:08 +0700
Subject: [PATCH 051/204] bump up ch32 v20x and v307 deps

---
 tools/get_deps.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/get_deps.py b/tools/get_deps.py
index 92bfb86a2d..555e2d7070 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -172,10 +172,10 @@
                             '7578cae0b21f86dd053a1f781b2fc6ab99d0ec17',
                             'ch32v10x'],
     'hw/mcu/wch/ch32v20x': ['https://github.com/openwch/ch32v20x.git',
-                            'de6d68c654340d7f27b00cebbfc9aa2740a1abc2',
+                            'c4c38f507e258a4e69b059ccc2dc27dde33cea1b',
                             'ch32v20x'],
     'hw/mcu/wch/ch32v307': ['https://github.com/openwch/ch32v307.git',
-                            '17761f5cf9dbbf2dcf665b7c04934188add20082',
+                            '184f21b852cb95eed58e86e901837bc9fff68775',
                             'ch32v307'],
     'hw/mcu/wch/ch32f20x': ['https://github.com/openwch/ch32f20x.git',
                             '77c4095087e5ed2c548ec9058e655d0b8757663b',

From 0e53b0b8468ab4abadb4539caec0606399c6c1e3 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 17 Jul 2024 19:45:40 +0700
Subject: [PATCH 052/204] update workflow build ci

---
 .github/workflows/ci_set_matrix.py | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py
index 5584b83129..2a00e54131 100644
--- a/.github/workflows/ci_set_matrix.py
+++ b/.github/workflows/ci_set_matrix.py
@@ -16,6 +16,7 @@
     "broadcom_32bit": ["arm-gcc"],
     "broadcom_64bit": ["aarch64-gcc"],
     "ch32v10x ch32v20x ch32v307 fomu gd32vf103": ["riscv-gcc"],
+    "da1469x": ["arm-gcc"],
     "imxrt": ["arm-gcc", "arm-clang"],
     "kinetis_k kinetis_kl kinetis_k32l2": ["arm-gcc", "arm-clang"],
     "lpc11 lpc13 lpc15": ["arm-gcc", "arm-clang"],
@@ -36,7 +37,7 @@
     "stm32f7": ["arm-gcc", "arm-clang", "arm-iar"],
     "stm32g0 stm32g4 stm32h5": ["arm-gcc", "arm-clang", "arm-iar"],
     "stm32h7": ["arm-gcc", "arm-clang", "arm-iar"],
-    "stm32l4 stm32u5 stm32wb": ["arm-gcc", "arm-clang", "arm-iar"],
+    "stm32l0 stm32l4 stm32u5 stm32wb": ["arm-gcc", "arm-clang", "arm-iar"],
     "xmc4000": ["arm-gcc"],
 }
 

From daa7acd585f5217d69afbfe0029c7fc15a956fad Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 17 Jul 2024 20:40:27 +0700
Subject: [PATCH 053/204] add FreeRTOSConfig.h for da1469

---
 .../da1469x/FreeRTOSConfig/FreeRTOSConfig.h   | 150 ++++++++++++++++++
 1 file changed, 150 insertions(+)
 create mode 100644 hw/bsp/da1469x/FreeRTOSConfig/FreeRTOSConfig.h

diff --git a/hw/bsp/da1469x/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/da1469x/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 0000000000..4d4379a6f7
--- /dev/null
+++ b/hw/bsp/da1469x/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "DA1469xAB.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+#define configRUN_FREERTOS_SECURE_ONLY          1
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       4
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif

From 770efd9b46db0f8723beebe4bfa4d6694bac2901 Mon Sep 17 00:00:00 2001
From: Liam Fraser <liam@raspberrypi.com>
Date: Wed, 17 Jul 2024 13:03:09 +0100
Subject: [PATCH 054/204] RP2040: Use our own unaligned memcpy to avoid
 alignment faults with some memcpy implementations

---
 src/portable/raspberrypi/rp2040/rp2040_usb.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c
index 1ca711c778..c5d1ba3ced 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.c
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c
@@ -53,6 +53,14 @@ TU_ATTR_ALWAYS_INLINE static inline bool is_host_mode(void) {
 //--------------------------------------------------------------------+
 // Implementation
 //--------------------------------------------------------------------+
+// Provide own byte by byte memcpy as not all copies are aligned
+static void unaligned_memcpy(void *dst, const void *src, size_t n) {
+  uint8_t *dst_byte = (uint8_t*)dst;
+  const uint8_t *src_byte = (const uint8_t*)src;
+  while (n--) {
+    *dst_byte++ = *src_byte++;
+  }
+}
 
 void rp2040_usb_init(void) {
   // Reset usb controller
@@ -125,7 +133,7 @@ static uint32_t __tusb_irq_path_func(prepare_ep_buffer)(struct hw_endpoint* ep,
 
   if (!ep->rx) {
     // Copy data from user buffer to hw buffer
-    memcpy(ep->hw_data_buf + buf_id * 64, ep->user_buf, buflen);
+    unaligned_memcpy(ep->hw_data_buf + buf_id * 64, ep->user_buf, buflen);
     ep->user_buf += buflen;
 
     // Mark as full
@@ -230,7 +238,7 @@ static uint16_t __tusb_irq_path_func(sync_ep_buffer)(struct hw_endpoint* ep, uin
     // we have received AFTER we have copied it to the user buffer at the appropriate offset
     assert(buf_ctrl & USB_BUF_CTRL_FULL);
 
-    memcpy(ep->user_buf, ep->hw_data_buf + buf_id * 64, xferred_bytes);
+    unaligned_memcpy(ep->user_buf, ep->hw_data_buf + buf_id * 64, xferred_bytes);
     ep->xferred_len = (uint16_t) (ep->xferred_len + xferred_bytes);
     ep->user_buf += xferred_bytes;
   }

From 3804ab9a67737732fe6bcc8e0b016ea00d47ff12 Mon Sep 17 00:00:00 2001
From: Liam Fraser <liam@raspberrypi.com>
Date: Wed, 17 Jul 2024 15:40:34 +0100
Subject: [PATCH 055/204] RP2040: no need to clear usb_hw (usb registers) as
 they are reset to default state by a hardware reset

---
 src/portable/raspberrypi/rp2040/rp2040_usb.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c
index c5d1ba3ced..43f48da396 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.c
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c
@@ -75,7 +75,6 @@ void rp2040_usb_init(void) {
 #pragma GCC diagnostic ignored "-Wstringop-overflow"
 #endif
 #endif
-  memset(usb_hw, 0, sizeof(*usb_hw));
   memset(usb_dpram, 0, sizeof(*usb_dpram));
 #ifdef __GNUC__
 #pragma GCC diagnostic pop

From ea5deb001868afd863ab88433f17520c951970ae Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 Jul 2024 09:24:29 +0700
Subject: [PATCH 056/204] add unique id for imxrt

---
 hw/bsp/board_api.h        |  4 ++--
 hw/bsp/imxrt/family.c     | 24 ++++++++++++++++++++++++
 hw/bsp/imxrt/family.cmake |  2 ++
 3 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/hw/bsp/board_api.h b/hw/bsp/board_api.h
index 774deca24b..a458a3fdcc 100644
--- a/hw/bsp/board_api.h
+++ b/hw/bsp/board_api.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _BOARD_API_H_
-#define _BOARD_API_H_
+#ifndef BOARD_API_H_
+#define BOARD_API_H_
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index c9c4918ef4..2f305aa4d6 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -40,6 +40,7 @@
 #include "fsl_iomuxc.h"
 #include "fsl_clock.h"
 #include "fsl_lpuart.h"
+#include "fsl_ocotp.h"
 
 #ifdef __GNUC__
 #pragma GCC diagnostic pop
@@ -186,6 +187,29 @@ uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_PORT, BUTTON_PIN);
 }
 
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+
+  #if FSL_FEATURE_OCOTP_HAS_TIMING_CTRL
+  OCOTP_Init(OCOTP, CLOCK_GetFreq(kCLOCK_IpgClk));
+  #else
+  OCOTP_Init(OCOTP, 0u);
+  #endif
+
+  // Reads shadow registers 0x01 - 0x04 (Configuration and Manufacturing Info)
+  // into 8 bit wide destination, avoiding punning.
+  for (int i = 0; i < 4; ++i) {
+    uint32_t wr = OCOTP_ReadFuseShadowRegister(OCOTP, i + 1);
+    for (int j = 0; j < 4; j++) {
+      id[i*4+j] = wr & 0xff;
+      wr >>= 8;
+    }
+  }
+  OCOTP_Deinit(OCOTP);
+
+  return 16;
+}
+
 int board_uart_read(uint8_t* buf, int len) {
   int count = 0;
 
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index f4d7378a5f..d917e9777e 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -44,6 +44,7 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/drivers/igpio/fsl_gpio.c
     ${SDK_DIR}/drivers/lpspi/fsl_lpspi.c
     ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
+    ${SDK_DIR}/drivers/ocotp/fsl_ocotp.c
     ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT_WITH_CORE}.c
     ${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
     ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
@@ -75,6 +76,7 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/drivers/igpio
     ${SDK_DIR}/drivers/lpspi
     ${SDK_DIR}/drivers/lpuart
+    ${SDK_DIR}/drivers/ocotp
     )
 
   update_board(${BOARD_TARGET})

From 68518aaa4b352c2879da61083bf72455c019ef36 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 Jul 2024 09:25:52 +0700
Subject: [PATCH 057/204] add metro_m7_1011 to hil rpi

---
 test/hil/rpi.json | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index c9a77936de..338ecae207 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -30,6 +30,13 @@
             "flasher": "esptool",
             "flasher_sn": "3ea619acd1cdeb11a0a0b806e93fd3f1",
             "flasher_args": "-b 1500000"
+        },
+        {
+            "name": "metro_m7_1011",
+            "uid": "9CE8715DD71137363E00005002004200",
+            "flasher": "jlink",
+            "flasher_sn": "000611000000",
+            "flasher_args": "-device MIMXRT1011xxx5A"
         }
     ]
 }

From 8be0d503dab57be6af0cd8aea2df41588b40fc55 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 Jul 2024 09:34:58 +0700
Subject: [PATCH 058/204] fix make build

---
 hw/bsp/imxrt/family.mk | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk
index bde4c4ba6e..f00afb6a43 100644
--- a/hw/bsp/imxrt/family.mk
+++ b/hw/bsp/imxrt/family.mk
@@ -50,7 +50,8 @@ SRC_C += \
 	$(SDK_DIR)/drivers/common/fsl_common.c \
 	$(SDK_DIR)/drivers/common/fsl_common_arm.c \
 	$(SDK_DIR)/drivers/igpio/fsl_gpio.c \
-	$(SDK_DIR)/drivers/lpuart/fsl_lpuart.c
+	$(SDK_DIR)/drivers/lpuart/fsl_lpuart.c \
+	$(SDK_DIR)/drivers/ocotp/fsl_ocotp.c \
 
 # Optional drivers: only available for some mcus: rt1160, rt1170
 ifneq (,$(wildcard ${TOP}/${MCU_DIR}/drivers/fsl_dcdc.c))
@@ -68,7 +69,8 @@ INC += \
 	$(TOP)/$(MCU_DIR)/drivers \
 	$(TOP)/$(SDK_DIR)/drivers/common \
 	$(TOP)/$(SDK_DIR)/drivers/igpio \
-	$(TOP)/$(SDK_DIR)/drivers/lpuart
+	$(TOP)/$(SDK_DIR)/drivers/lpuart \
+	$(TOP)/$(SDK_DIR)/drivers/ocotp \
 
 SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_VARIANT_WITH_CORE).S
 

From 30a48c57bd2f56d38c846e1f3257b2bde9ab4a9c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 Jul 2024 13:21:38 +0700
Subject: [PATCH 059/204] fix hil board_test duplication, add cdc_msc_freertos
 test

---
 .../device/cdc_msc_freertos/src/msc_disk.c    | 24 ++++++++++++++++++-
 test/hil/hil_test.py                          | 13 +++++-----
 2 files changed, 30 insertions(+), 7 deletions(-)

diff --git a/examples/device/cdc_msc_freertos/src/msc_disk.c b/examples/device/cdc_msc_freertos/src/msc_disk.c
index c8a04bb745..d2f8628f13 100644
--- a/examples/device/cdc_msc_freertos/src/msc_disk.c
+++ b/examples/device/cdc_msc_freertos/src/msc_disk.c
@@ -28,6 +28,9 @@
 
 #if CFG_TUD_MSC
 
+// whether host does safe-eject
+static bool ejected = false;
+
 // Some MCU doesn't have enough 8KB SRAM to store the whole disk
 // We will use Flash as read-only disk with board that has
 // CFG_EXAMPLE_MSC_READONLY defined
@@ -137,7 +140,14 @@ bool tud_msc_test_unit_ready_cb(uint8_t lun)
 {
   (void) lun;
 
-  return true; // RAM disk is always ready
+  // RAM disk is ready until ejected
+  if (ejected) {
+    // Additional Sense 3A-00 is NOT_FOUND
+    tud_msc_set_sense(lun, SCSI_SENSE_NOT_READY, 0x3a, 0x00);
+    return false;
+  }
+
+  return true;
 }
 
 // Invoked when received SCSI_CMD_READ_CAPACITY_10 and SCSI_CMD_READ_FORMAT_CAPACITY to determine the disk size
@@ -166,6 +176,7 @@ bool tud_msc_start_stop_cb(uint8_t lun, uint8_t power_condition, bool start, boo
     }else
     {
       // unload disk storage
+      ejected = true;
     }
   }
 
@@ -187,6 +198,17 @@ int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buff
   return (int32_t) bufsize;
 }
 
+bool tud_msc_is_writable_cb (uint8_t lun)
+{
+  (void) lun;
+
+#ifdef CFG_EXAMPLE_MSC_READONLY
+  return false;
+#else
+  return true;
+#endif
+}
+
 // Callback invoked when received WRITE10 command.
 // Process data in buffer to disk's storage and return number of written bytes
 int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize)
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index f571e6e02e..87cf5d0f6a 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -335,9 +335,13 @@ def main():
     with open(config_file) as f:
         config = json.load(f)
 
-    # all possible tests
+    # all possible tests: board_test is added last to disable board's usb
     all_tests = [
-        'cdc_dual_ports', 'cdc_msc', 'dfu', 'dfu_runtime', 'hid_boot_interface',
+        'cdc_dual_ports',
+        'cdc_msc', 'cdc_msc_freertos',
+        'dfu', 'dfu_runtime',
+        'hid_boot_interface',
+        'board_test'
     ]
 
     if len(boards) == 0:
@@ -352,13 +356,10 @@ def main():
 
         # default to all tests
         if 'tests' in item:
-            test_list = item['tests']
+            test_list = item['tests'] + ['board_test']
         else:
             test_list = all_tests
 
-        # board_test is added last to disable board's usb
-        test_list.append('board_test')
-
         # remove skip_tests
         if 'tests_skip' in item:
             for skip in item['tests_skip']:

From eb698f8cc7ec2ca84051c0ce3bb6e845f8f8407d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 Jul 2024 13:54:11 +0700
Subject: [PATCH 060/204] skip hil test if binary not exist

---
 test/hil/hil_test.py | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 87cf5d0f6a..8f0a8c93a5 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -373,6 +373,10 @@ def main():
             fw_name = f'{fw_dir}/{test}'
             print(f'  {test} ...', end='')
 
+            if not os.path.exists(fw_dir):
+                print('Skip')
+                continue
+
             # flash firmware. It may fail randomly, retry a few times
             for i in range(3):
                 ret = globals()[f'flash_{flasher}'](item, fw_name)

From 23c9353cd86bcecd9d1220bbb2277d5ffb834e7c Mon Sep 17 00:00:00 2001
From: Liam Fraser <liam@raspberrypi.com>
Date: Thu, 18 Jul 2024 11:08:23 +0100
Subject: [PATCH 061/204] net_lwip_webserver: allow TINYUSB_LWIP_PATH to be
 defined by parent CMake file

---
 examples/device/net_lwip_webserver/CMakeLists.txt | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/examples/device/net_lwip_webserver/CMakeLists.txt b/examples/device/net_lwip_webserver/CMakeLists.txt
index c39fd32c50..13923b5837 100644
--- a/examples/device/net_lwip_webserver/CMakeLists.txt
+++ b/examples/device/net_lwip_webserver/CMakeLists.txt
@@ -5,7 +5,14 @@ include(${CMAKE_CURRENT_LIST_DIR}/../../../hw/bsp/family_support.cmake)
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
+# Prefer the tinyusb lwip
 set(LWIP ${TOP}/lib/lwip)
+
+# If we can't find one from tinyusb then check cmake var before giving up
+if (NOT EXISTS ${LWIP}/src)
+  set(LWIP ${TINYUSB_LWIP_PATH})
+endif()
+
 if (NOT EXISTS ${LWIP}/src)
   family_example_missing_dependency(${PROJECT} "lib/lwip")
   return()

From 0d72f153cf1614aaff0b5859d00fb5c0e1711f51 Mon Sep 17 00:00:00 2001
From: graham sanderson <graham.sanderson@raspberrypi.com>
Date: Wed, 17 Jul 2024 15:46:35 -0500
Subject: [PATCH 062/204] fix arguable bug caught as warning by LLVM embedded
 toolchain for ARM 14.0.0

---
 src/tusb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/tusb.c b/src/tusb.c
index 0092267a19..860e8ac350 100644
--- a/src/tusb.c
+++ b/src/tusb.c
@@ -398,7 +398,7 @@ static void dump_str_line(uint8_t const* buf, uint16_t count) {
   tu_printf("  |");
   // each line is 16 bytes
   for (uint16_t i = 0; i < count; i++) {
-    const char ch = buf[i];
+    int ch = buf[i];
     tu_printf("%c", isprint(ch) ? ch : '.');
   }
   tu_printf("|\r\n");

From 5f6152a87e2a2fd07ed0cdbf6cf2300cb4fc6342 Mon Sep 17 00:00:00 2001
From: graham sanderson <graham.sanderson@raspberrypi.com>
Date: Wed, 17 Jul 2024 20:03:27 -0500
Subject: [PATCH 063/204] not all GCC compiler builds support
 --no-warn-rwx-segments; check_linker_flag is not available in all supported
 version of CMake, so just allow it to be passed in

---
 hw/bsp/family_support.cmake | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index bc2d481bb6..6a1e966241 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -69,6 +69,10 @@ if (NOT FAMILY STREQUAL rp2040)
   endif()
 endif()
 
+if (NOT NO_WARN_RWX_SEGMENTS_SUPPORTED)
+  set(NO_WARN_RWX_SEGMENTS_SUPPORTED 1)
+endif()
+
 set(WARNING_FLAGS_GNU
   -Wall
   -Wextra
@@ -210,7 +214,7 @@ function(family_configure_common TARGET RTOS)
   # Generate linker map file
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
     target_link_options(${TARGET} PUBLIC "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map")
-    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 12.0)
+    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 12.0 AND NO_WARN_RWX_SEGMENTS_SUPPORTED)
       target_link_options(${TARGET} PUBLIC "LINKER:--no-warn-rwx-segments")
     endif ()
  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
@@ -360,7 +364,7 @@ function(family_add_default_example_warnings TARGET)
     )
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 12.0)
+    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 12.0 AND NO_WARN_RWX_SEGMENTS_SUPPORTED)
       target_link_options(${TARGET} PUBLIC "LINKER:--no-warn-rwx-segments")
     endif()
 

From 31a979a6cccc2d4dc0a86474643710ae3b7f34fe Mon Sep 17 00:00:00 2001
From: graham sanderson <graham.sanderson@raspberrypi.com>
Date: Wed, 17 Jul 2024 21:08:55 -0500
Subject: [PATCH 064/204] fix some clang compiler warnings

---
 examples/host/cdc_msc_hid/src/hid_app.c    | 1 +
 examples/host/hid_controller/src/hid_app.c | 1 +
 src/class/hid/hid_host.c                   | 4 +++-
 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/examples/host/cdc_msc_hid/src/hid_app.c b/examples/host/cdc_msc_hid/src/hid_app.c
index f0d42a08f0..6bb3a2072d 100644
--- a/examples/host/cdc_msc_hid/src/hid_app.c
+++ b/examples/host/cdc_msc_hid/src/hid_app.c
@@ -235,6 +235,7 @@ static void process_mouse_report(hid_mouse_report_t const * report)
 static void process_generic_report(uint8_t dev_addr, uint8_t instance, uint8_t const* report, uint16_t len)
 {
   (void) dev_addr;
+  (void) len;
 
   uint8_t const rpt_count = hid_info[instance].report_count;
   tuh_hid_report_info_t* rpt_info_arr = hid_info[instance].report_info;
diff --git a/examples/host/hid_controller/src/hid_app.c b/examples/host/hid_controller/src/hid_app.c
index bff830ca29..6ffe0b6d40 100644
--- a/examples/host/hid_controller/src/hid_app.c
+++ b/examples/host/hid_controller/src/hid_app.c
@@ -253,6 +253,7 @@ bool diff_report(sony_ds4_report_t const* rpt1, sony_ds4_report_t const* rpt2)
 
 void process_sony_ds4(uint8_t const* report, uint16_t len)
 {
+  (void)len;
   const char* dpad_str[] = { "N", "NE", "E", "SE", "S", "SW", "W", "NW", "none" };
 
   // previous report used to compare for changes
diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c
index 115a8a4df8..7639a8fc6f 100644
--- a/src/class/hid/hid_host.c
+++ b/src/class/hid/hid_host.c
@@ -657,7 +657,9 @@ uint8_t tuh_hid_parse_report_descriptor(tuh_hid_report_info_t* report_info_arr,
     uint8_t const data8 = desc_report[0];
 
     TU_LOG(3, "tag = %d, type = %d, size = %d, data = ", tag, type, size);
-    for (uint32_t i = 0; i < size; i++) TU_LOG(3, "%02X ", desc_report[i]);
+    for (uint32_t i = 0; i < size; i++) {
+      TU_LOG(3, "%02X ", desc_report[i]);
+    }
     TU_LOG(3, "\r\n");
 
     switch (type) {

From ffe1d0664b6abe942c14ca540833e1e86a797184 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Thu, 18 Jul 2024 20:02:57 +0200
Subject: [PATCH 065/204] UAC2: Fix memclr on driver reset.

---
 src/class/audio/audio_device.c | 94 ++++++++++++++++++----------------
 1 file changed, 50 insertions(+), 44 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 65cac2fd50..ed380424fb 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -304,19 +304,6 @@ typedef struct
 
   uint16_t desc_length;         // Length of audio function descriptor
 
-  // Buffer for control requests
-  uint8_t * ctrl_buf;
-  uint8_t ctrl_buf_sz;
-
-  // Current active alternate settings
-  uint8_t * alt_setting;   // We need to save the current alternate setting this way, because it is possible that there are AS interfaces which do not have an EP!
-
-  // EP Transfer buffers and FIFOs
-#if CFG_TUD_AUDIO_ENABLE_EP_OUT
-#if !CFG_TUD_AUDIO_ENABLE_DECODING
-  tu_fifo_t ep_out_ff;
-#endif
-
 #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
   struct {
     CFG_TUSB_MEM_ALIGN uint32_t value;  // Feedback value for asynchronous mode (in 16.16 format).
@@ -346,17 +333,6 @@ typedef struct
   } feedback;
 #endif // CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
 
-#endif // CFG_TUD_AUDIO_ENABLE_EP_OUT
-
-#if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
-  tu_fifo_t ep_in_ff;
-#endif
-
-  // Audio control interrupt buffer - no FIFO - 6 Bytes according to UAC 2 specification (p. 74)
-#if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
-  CFG_TUSB_MEM_ALIGN uint8_t ep_int_buf[6];
-#endif
-
   // Decoding parameters - parameters are set when alternate AS interface is set by host
   // Coding is currently only supported for EP. Software coding corresponding to AS interfaces without EPs are not supported currently.
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
@@ -365,8 +341,7 @@ typedef struct
 
 #if CFG_TUD_AUDIO_ENABLE_TYPE_I_DECODING
   audio_data_format_type_I_t format_type_I_rx;
-  uint8_t n_bytes_per_sampe_rx;
-  uint8_t n_channels_per_ff_rx;
+  uint8_t n_bytes_per_sample_rx;
   uint8_t n_ff_used_rx;
 #endif
 #endif
@@ -382,26 +357,57 @@ typedef struct
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && (CFG_TUD_AUDIO_ENABLE_ENCODING || CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL)
   audio_format_type_t format_type_tx;
   uint8_t n_channels_tx;
-  uint8_t n_bytes_per_sampe_tx;
+  uint8_t n_bytes_per_sample_tx;
 
 #if CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING
   audio_data_format_type_I_t format_type_I_tx;
-  uint8_t n_channels_per_ff_tx;
   uint8_t n_ff_used_tx;
 #endif
 #endif
 
+  // Buffer for control requests
+  uint8_t * ctrl_buf;
+  uint8_t ctrl_buf_sz;
+
+  // Current active alternate settings
+  uint8_t * alt_setting;   // We need to save the current alternate setting this way, because it is possible that there are AS interfaces which do not have an EP!
+
+  // EP Transfer buffers and FIFOs
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+#if !CFG_TUD_AUDIO_ENABLE_DECODING
+  tu_fifo_t ep_out_ff;
+#endif
+
+
+#endif // CFG_TUD_AUDIO_ENABLE_EP_OUT
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
+  tu_fifo_t ep_in_ff;
+#endif
+
+  // Audio control interrupt buffer - no FIFO - 6 Bytes according to UAC 2 specification (p. 74)
+#if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
+  CFG_TUSB_MEM_ALIGN uint8_t ep_int_buf[6];
+#endif
+
+
   // Support FIFOs for software encoding and decoding
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
   tu_fifo_t * rx_supp_ff;
   uint8_t n_rx_supp_ff;
   uint16_t rx_supp_ff_sz_max;
+#if CFG_TUD_AUDIO_ENABLE_TYPE_I_DECODING
+  uint8_t n_channels_per_ff_rx;
+#endif
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
   tu_fifo_t * tx_supp_ff;
   uint8_t n_tx_supp_ff;
   uint16_t tx_supp_ff_sz_max;
+#if CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING
+  uint8_t n_channels_per_ff_tx;
+#endif
 #endif
 
   // Linear buffer in case target MCU is not capable of handling a ring buffer FIFO e.g. no hardware buffer is available or driver is would need to be changed dramatically OR the support FIFOs are used
@@ -707,16 +713,16 @@ static bool audiod_decode_type_I_pcm(uint8_t rhport, audiod_function_t* audio, u
     if (info.len_lin != 0)
     {
       info.len_lin = tu_min16(nBytesPerFFToRead, info.len_lin);
-      src = &audio->lin_buf_out[cnt_ff*audio->n_channels_per_ff_rx * audio->n_bytes_per_sampe_rx];
+      src = &audio->lin_buf_out[cnt_ff*audio->n_channels_per_ff_rx * audio->n_bytes_per_sample_rx];
       dst_end = info.ptr_lin + info.len_lin;
-      src = audiod_interleaved_copy_bytes_fast_decode(audio->n_bytes_per_sampe_rx, info.ptr_lin, dst_end, src, n_ff_used);
+      src = audiod_interleaved_copy_bytes_fast_decode(audio->n_bytes_per_sample_rx, info.ptr_lin, dst_end, src, n_ff_used);
 
       // Handle wrapped part of FIFO
       info.len_wrap = tu_min16(nBytesPerFFToRead - info.len_lin, info.len_wrap);
       if (info.len_wrap != 0)
       {
         dst_end = info.ptr_wrap + info.len_wrap;
-        audiod_interleaved_copy_bytes_fast_decode(audio->n_bytes_per_sampe_rx, info.ptr_wrap, dst_end, src, n_ff_used);
+        audiod_interleaved_copy_bytes_fast_decode(audio->n_bytes_per_sample_rx, info.ptr_wrap, dst_end, src, n_ff_used);
       }
       tu_fifo_advance_write_pointer(&audio->rx_supp_ff[cnt_ff], info.len_lin + info.len_wrap);
     }
@@ -1024,7 +1030,7 @@ static uint16_t audiod_encode_type_I_pcm(uint8_t rhport, audiod_function_t* audi
   // Limit to maximum sample number - THIS IS A POSSIBLE ERROR SOURCE IF TOO MANY SAMPLE WOULD NEED TO BE SENT BUT CAN NOT!
   nBytesPerFFToSend = tu_min16(nBytesPerFFToSend, audio->ep_in_sz / n_ff_used);
   // Round to full number of samples (flooring)
-  uint16_t const nSlotSize = audio->n_channels_per_ff_tx * audio->n_bytes_per_sampe_tx;
+  uint16_t const nSlotSize = audio->n_channels_per_ff_tx * audio->n_bytes_per_sample_tx;
   nBytesPerFFToSend = (nBytesPerFFToSend / nSlotSize) * nSlotSize;
 #endif
 
@@ -1036,7 +1042,7 @@ static uint16_t audiod_encode_type_I_pcm(uint8_t rhport, audiod_function_t* audi
 
   for (cnt_ff = 0; cnt_ff < n_ff_used; cnt_ff++)
   {
-    dst = &audio->lin_buf_in[cnt_ff*audio->n_channels_per_ff_tx*audio->n_bytes_per_sampe_tx];
+    dst = &audio->lin_buf_in[cnt_ff*audio->n_channels_per_ff_tx*audio->n_bytes_per_sample_tx];
 
     tu_fifo_get_read_info(&audio->tx_supp_ff[cnt_ff], &info);
 
@@ -1044,7 +1050,7 @@ static uint16_t audiod_encode_type_I_pcm(uint8_t rhport, audiod_function_t* audi
     {
       info.len_lin = tu_min16(nBytesPerFFToSend, info.len_lin);       // Limit up to desired length
       src_end = (uint8_t *)info.ptr_lin + info.len_lin;
-      dst = audiod_interleaved_copy_bytes_fast_encode(audio->n_bytes_per_sampe_tx, info.ptr_lin, src_end, dst, n_ff_used);
+      dst = audiod_interleaved_copy_bytes_fast_encode(audio->n_bytes_per_sample_tx, info.ptr_lin, src_end, dst, n_ff_used);
 
       // Limit up to desired length
       info.len_wrap = tu_min16(nBytesPerFFToSend - info.len_lin, info.len_wrap);
@@ -1053,7 +1059,7 @@ static uint16_t audiod_encode_type_I_pcm(uint8_t rhport, audiod_function_t* audi
       if (info.len_wrap != 0)
       {
         src_end = (uint8_t *)info.ptr_wrap + info.len_wrap;
-        audiod_interleaved_copy_bytes_fast_encode(audio->n_bytes_per_sampe_tx, info.ptr_wrap, src_end, dst, n_ff_used);
+        audiod_interleaved_copy_bytes_fast_encode(audio->n_bytes_per_sample_tx, info.ptr_wrap, src_end, dst, n_ff_used);
       }
 
       tu_fifo_advance_read_pointer(&audio->tx_supp_ff[cnt_ff], info.len_lin + info.len_wrap);
@@ -1782,8 +1788,8 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
 
             // Reconfigure size of support FIFOs - this is necessary to avoid samples to get split in case of a wrap
     #if CFG_TUD_AUDIO_ENABLE_ENCODING && CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING
-            const uint16_t active_fifo_depth = (uint16_t) ((audio->tx_supp_ff_sz_max / (audio->n_channels_per_ff_tx * audio->n_bytes_per_sampe_tx))
-               * (audio->n_channels_per_ff_tx * audio->n_bytes_per_sampe_tx));
+            const uint16_t active_fifo_depth = (uint16_t) ((audio->tx_supp_ff_sz_max / (audio->n_channels_per_ff_tx * audio->n_bytes_per_sample_tx))
+               * (audio->n_channels_per_ff_tx * audio->n_bytes_per_sample_tx));
             for (uint8_t cnt = 0; cnt < audio->n_tx_supp_ff; cnt++)
             {
               tu_fifo_config(&audio->tx_supp_ff[cnt], audio->tx_supp_ff[cnt].buffer, active_fifo_depth, 1, true);
@@ -1813,7 +1819,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
 
             // Reconfigure size of support FIFOs - this is necessary to avoid samples to get split in case of a wrap
     #if CFG_TUD_AUDIO_ENABLE_TYPE_I_DECODING
-            const uint16_t active_fifo_depth = (audio->rx_supp_ff_sz_max / audio->n_bytes_per_sampe_rx) * audio->n_bytes_per_sampe_rx;
+            const uint16_t active_fifo_depth = (audio->rx_supp_ff_sz_max / audio->n_bytes_per_sample_rx) * audio->n_bytes_per_sample_rx;
             for (uint8_t cnt = 0; cnt < audio->n_rx_supp_ff; cnt++)
             {
               tu_fifo_config(&audio->rx_supp_ff[cnt], audio->rx_supp_ff[cnt].buffer, active_fifo_depth, 1, true);
@@ -2587,14 +2593,14 @@ static void audiod_parse_for_AS_params(audiod_function_t* audio, uint8_t const *
 #if CFG_TUD_AUDIO_ENABLE_EP_IN
       if (as_itf == audio->ep_in_as_intf_num)
       {
-        audio->n_bytes_per_sampe_tx = ((audio_desc_type_I_format_t const * )p_desc)->bSubslotSize;
+        audio->n_bytes_per_sample_tx = ((audio_desc_type_I_format_t const * )p_desc)->bSubslotSize;
       }
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
       if (as_itf == audio->ep_out_as_intf_num)
       {
-        audio->n_bytes_per_sampe_rx = ((audio_desc_type_I_format_t const * )p_desc)->bSubslotSize;
+        audio->n_bytes_per_sample_rx = ((audio_desc_type_I_format_t const * )p_desc)->bSubslotSize;
       }
 #endif
     }
@@ -2613,7 +2619,7 @@ static bool audiod_calc_tx_packet_sz(audiod_function_t* audio)
 {
   TU_VERIFY(audio->format_type_tx == AUDIO_FORMAT_TYPE_I);
   TU_VERIFY(audio->n_channels_tx);
-  TU_VERIFY(audio->n_bytes_per_sampe_tx);
+  TU_VERIFY(audio->n_bytes_per_sample_tx);
   TU_VERIFY(audio->interval_tx);
   TU_VERIFY(audio->sample_rate_tx);
 
@@ -2622,9 +2628,9 @@ static bool audiod_calc_tx_packet_sz(audiod_function_t* audio)
   const uint16_t sample_normimal = (uint16_t)(audio->sample_rate_tx * interval / ((tud_speed_get() == TUSB_SPEED_FULL) ? 1000 : 8000));
   const uint16_t sample_reminder = (uint16_t)(audio->sample_rate_tx * interval % ((tud_speed_get() == TUSB_SPEED_FULL) ? 1000 : 8000));
 
-  const uint16_t packet_sz_tx_min = (uint16_t)((sample_normimal - 1) * audio->n_channels_tx * audio->n_bytes_per_sampe_tx);
-  const uint16_t packet_sz_tx_norm = (uint16_t)(sample_normimal * audio->n_channels_tx * audio->n_bytes_per_sampe_tx);
-  const uint16_t packet_sz_tx_max = (uint16_t)((sample_normimal + 1) * audio->n_channels_tx * audio->n_bytes_per_sampe_tx);
+  const uint16_t packet_sz_tx_min = (uint16_t)((sample_normimal - 1) * audio->n_channels_tx * audio->n_bytes_per_sample_tx);
+  const uint16_t packet_sz_tx_norm = (uint16_t)(sample_normimal * audio->n_channels_tx * audio->n_bytes_per_sample_tx);
+  const uint16_t packet_sz_tx_max = (uint16_t)((sample_normimal + 1) * audio->n_channels_tx * audio->n_bytes_per_sample_tx);
 
   // Endpoint size must larger than packet size
   TU_ASSERT(packet_sz_tx_max <= audio->ep_in_sz);

From 94454684f78a528c343e306d723e6c8d2b05e932 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 Jul 2024 11:29:48 +0700
Subject: [PATCH 066/204] add ra4m1 ek for hil test

---
 .idea/cmake.xml    | 14 +++++++-------
 hw/bsp/ra/family.c |  8 +++++++-
 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index ec900b4a6d..f09e185b1b 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -66,14 +66,14 @@
       <configuration PROFILE_NAME="feather_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_m0_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
       <configuration PROFILE_NAME="metro_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
       <configuration PROFILE_NAME="feather_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
-      <configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
+      <configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express" />
       <configuration PROFILE_NAME="itsybitsy_m4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=itsybitsy_m4" />
       <configuration PROFILE_NAME="same54_xplained" ENABLED="false" GENERATION_OPTIONS="-DBOARD=same54_xplained -DLOG=2 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="feather_nrf52840_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_nrf52840_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
       <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="metro m7 1011 sd" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011_sd -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="metro m7 1011" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="metro_m7_1011" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1060_evk -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="rt1170 evkb" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1170_evkb -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
@@ -106,11 +106,11 @@
       <configuration PROFILE_NAME="stm32u575nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32u575nucleo -DLOG=2 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32u5a5nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32u5a5nucleo -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32wb55nucleo" ENABLED="false" GENERATION_OPTIONS="-DBOARD=stm32wb55nucleo" />
-      <configuration PROFILE_NAME="ra2a1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra2a1_ek -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="ra4m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra4m1_ek -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="ra6m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m1_ek -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="ra6m5" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
+      <configuration PROFILE_NAME="ra2a1_ek" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra2a1_ek -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="ra4m1_ek" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra4m1_ek -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="ra6m1_ek" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m1_ek -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="ra6m5_ek" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="ra6m5_ek PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
       <configuration PROFILE_NAME="uno_r4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=uno_r4 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
       <configuration PROFILE_NAME="msp430f5529" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=msp_exp430f5529lp" />
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index db8988a361..a8b4ebcc7d 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -147,6 +147,13 @@ uint32_t board_button_read(void) {
   return lvl == BUTTON_STATE_ACTIVE;
 }
 
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  max_len = tu_min32(max_len, sizeof(bsp_unique_id_t));
+  bsp_unique_id_t const *uid = R_BSP_UniqueIdGet();
+  memcpy(id, uid->unique_id_bytes, max_len);
+  return max_len;
+}
+
 int board_uart_read(uint8_t *buf, int len) {
   (void) buf;
   (void) len;
@@ -169,7 +176,6 @@ void SysTick_Handler(void) {
 uint32_t board_millis(void) {
   return system_ticks;
 }
-
 #endif
 
 //--------------------------------------------------------------------+

From 7e7a38b97d6f8abbdff029c6bf24c52bf53f5910 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 Jul 2024 11:48:43 +0700
Subject: [PATCH 067/204] update test json

---
 test/hil/rpi.json | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index 338ecae207..44edb7de0a 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -37,6 +37,13 @@
             "flasher": "jlink",
             "flasher_sn": "000611000000",
             "flasher_args": "-device MIMXRT1011xxx5A"
+        },
+        {
+            "name": "ra4m1_ek",
+            "uid": "152E163038303131393346E46F26574B",
+            "flasher": "jlink",
+            "flasher_sn": "000831174392",
+            "flasher_args": "-device R7FA4M1AB"
         }
     ]
 }

From b35173b5b0051e4e2d168918b2e5e14604725888 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 Jul 2024 12:12:26 +0700
Subject: [PATCH 068/204] skip msc tests for ra due to existing bug

---
 test/hil/hil_test.py | 2 +-
 test/hil/rpi.json    | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 8f0a8c93a5..1588416879 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -358,7 +358,7 @@ def main():
         if 'tests' in item:
             test_list = item['tests'] + ['board_test']
         else:
-            test_list = all_tests
+            test_list = list(all_tests)
 
         # remove skip_tests
         if 'tests_skip' in item:
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index 44edb7de0a..98d576db89 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -41,6 +41,8 @@
         {
             "name": "ra4m1_ek",
             "uid": "152E163038303131393346E46F26574B",
+            "tests_skip": ["cdc_msc", "cdc_msc_freertos"],
+            "comment": "MSC is slow to enumerated #2602",
             "flasher": "jlink",
             "flasher_sn": "000831174392",
             "flasher_args": "-device R7FA4M1AB"

From 60b3d14d1979b4a281f999e3a1861b44477f57b1 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Wed, 8 May 2024 14:05:58 +0200
Subject: [PATCH 069/204] Check tud ready check for OUT xfer.

---
 src/class/cdc/cdc_device.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index 681a1b8520..792aedf260 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -81,8 +81,13 @@ typedef struct {
 CFG_TUD_MEM_SECTION static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
 static tud_cdc_configure_fifo_t _cdcd_fifo_cfg;
 
-static bool _prep_out_transaction (cdcd_interface_t* p_cdc) {
+static bool _prep_out_transaction (cdcd_interface_t* p_cdc, bool itf_open)
+{
   uint8_t const rhport = 0;
+
+  // Skip if usb is not ready yet
+  TU_VERIFY(tud_ready() || itf_open);
+
   uint16_t available = tu_fifo_remaining(&p_cdc->rx_ff);
 
   // Prepare for incoming data but only allow what we can store in the ring buffer.
@@ -143,7 +148,7 @@ uint32_t tud_cdc_n_available(uint8_t itf) {
 uint32_t tud_cdc_n_read(uint8_t itf, void* buffer, uint32_t bufsize) {
   cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
   uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
-  _prep_out_transaction(p_cdc);
+  _prep_out_transaction(p_cdc, false);
   return num_read;
 }
 
@@ -154,7 +159,7 @@ bool tud_cdc_n_peek(uint8_t itf, uint8_t* chr) {
 void tud_cdc_n_read_flush(uint8_t itf) {
   cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
   tu_fifo_clear(&p_cdc->rx_ff);
-  _prep_out_transaction(p_cdc);
+  _prep_out_transaction(p_cdc, false);
 }
 
 //--------------------------------------------------------------------+
@@ -336,7 +341,7 @@ uint16_t cdcd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint1
   }
 
   // Prepare for incoming data
-  _prep_out_transaction(p_cdc);
+  _prep_out_transaction(p_cdc, true);
 
   return drv_len;
 }
@@ -445,7 +450,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
     if (tud_cdc_rx_cb && !tu_fifo_empty(&p_cdc->rx_ff)) tud_cdc_rx_cb(itf);
 
     // prepare for OUT transaction
-    _prep_out_transaction(p_cdc);
+    _prep_out_transaction(p_cdc, false);
   }
 
   // Data sent to host, we continue to fetch from tx fifo to send.

From a1fd43ebaf0a36683c0437ea258e2a024341ef6d Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Wed, 8 May 2024 14:07:32 +0200
Subject: [PATCH 070/204] Clear _usbd_dev prior to driver reset.

---
 src/device/usbd.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/src/device/usbd.c b/src/device/usbd.c
index 4105a71a46..b2fd54575f 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -495,15 +495,16 @@ bool tud_deinit(uint8_t rhport) {
 }
 
 static void configuration_reset(uint8_t rhport) {
+  // Clear mounted status first to ensure tud_ready() return false before driver clean up.
+  tu_varclr(&_usbd_dev);
+  memset(_usbd_dev.itf2drv, DRVID_INVALID, sizeof(_usbd_dev.itf2drv)); // invalid mapping
+  memset(_usbd_dev.ep2drv, DRVID_INVALID, sizeof(_usbd_dev.ep2drv)); // invalid mapping
+
   for (uint8_t i = 0; i < TOTAL_DRIVER_COUNT; i++) {
     usbd_class_driver_t const* driver = get_driver(i);
     TU_ASSERT(driver,);
     driver->reset(rhport);
   }
-
-  tu_varclr(&_usbd_dev);
-  memset(_usbd_dev.itf2drv, DRVID_INVALID, sizeof(_usbd_dev.itf2drv)); // invalid mapping
-  memset(_usbd_dev.ep2drv, DRVID_INVALID, sizeof(_usbd_dev.ep2drv)); // invalid mapping
 }
 
 static void usbd_reset(uint8_t rhport) {

From 772398f6ead893e6eb69399e11c725919c2f1e1a Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Wed, 8 May 2024 20:03:45 +0200
Subject: [PATCH 071/204] Save setup_count on bus reset.

---
 src/device/usbd.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/device/usbd.c b/src/device/usbd.c
index b2fd54575f..2735e35fd1 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -495,10 +495,13 @@ bool tud_deinit(uint8_t rhport) {
 }
 
 static void configuration_reset(uint8_t rhport) {
+  // Save setup_count for restore
+  uint8_t setup_count =  _usbd_dev.setup_count;
   // Clear mounted status first to ensure tud_ready() return false before driver clean up.
   tu_varclr(&_usbd_dev);
   memset(_usbd_dev.itf2drv, DRVID_INVALID, sizeof(_usbd_dev.itf2drv)); // invalid mapping
   memset(_usbd_dev.ep2drv, DRVID_INVALID, sizeof(_usbd_dev.ep2drv)); // invalid mapping
+  _usbd_dev.setup_count = setup_count;
 
   for (uint8_t i = 0; i < TOTAL_DRIVER_COUNT; i++) {
     usbd_class_driver_t const* driver = get_driver(i);

From 4b55af17c90acad9c03f5f3b41645d4ed954d42f Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Thu, 9 May 2024 17:10:44 +0200
Subject: [PATCH 072/204] Fix STM32F7 FS port build.

---
 hw/bsp/stm32f7/family.mk | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk
index e261b0467d..bae7d6d5bc 100644
--- a/hw/bsp/stm32f7/family.mk
+++ b/hw/bsp/stm32f7/family.mk
@@ -24,6 +24,7 @@ ifeq ($(PORT), 1)
     $(info "Using OTG_HS in FullSpeed mode")
   endif
 else
+  CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
   $(info "Using OTG_FS")
 endif
 

From be18af823591389a12e246f65784646f93443882 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 Jul 2024 17:10:53 +0700
Subject: [PATCH 073/204] revert changes to usbds configuration_reset() (deal
 with it in separated PR)

---
 src/class/cdc/cdc_device.c |  3 +--
 src/device/usbd.c          | 12 ++++--------
 2 files changed, 5 insertions(+), 10 deletions(-)

diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index 792aedf260..570c825ab0 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -81,8 +81,7 @@ typedef struct {
 CFG_TUD_MEM_SECTION static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
 static tud_cdc_configure_fifo_t _cdcd_fifo_cfg;
 
-static bool _prep_out_transaction (cdcd_interface_t* p_cdc, bool itf_open)
-{
+static bool _prep_out_transaction (cdcd_interface_t* p_cdc, bool itf_open) {
   uint8_t const rhport = 0;
 
   // Skip if usb is not ready yet
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 2735e35fd1..4105a71a46 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -495,19 +495,15 @@ bool tud_deinit(uint8_t rhport) {
 }
 
 static void configuration_reset(uint8_t rhport) {
-  // Save setup_count for restore
-  uint8_t setup_count =  _usbd_dev.setup_count;
-  // Clear mounted status first to ensure tud_ready() return false before driver clean up.
-  tu_varclr(&_usbd_dev);
-  memset(_usbd_dev.itf2drv, DRVID_INVALID, sizeof(_usbd_dev.itf2drv)); // invalid mapping
-  memset(_usbd_dev.ep2drv, DRVID_INVALID, sizeof(_usbd_dev.ep2drv)); // invalid mapping
-  _usbd_dev.setup_count = setup_count;
-
   for (uint8_t i = 0; i < TOTAL_DRIVER_COUNT; i++) {
     usbd_class_driver_t const* driver = get_driver(i);
     TU_ASSERT(driver,);
     driver->reset(rhport);
   }
+
+  tu_varclr(&_usbd_dev);
+  memset(_usbd_dev.itf2drv, DRVID_INVALID, sizeof(_usbd_dev.itf2drv)); // invalid mapping
+  memset(_usbd_dev.ep2drv, DRVID_INVALID, sizeof(_usbd_dev.ep2drv)); // invalid mapping
 }
 
 static void usbd_reset(uint8_t rhport) {

From 6fb6602a097b2d2e026f150d6fde387803606f88 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 Jul 2024 18:08:04 +0700
Subject: [PATCH 074/204] - add tud_cdc_n_ready() though not used - usbd now
 change _usbd_dev.cfg_num before calling driver's open()

---
 src/class/cdc/cdc_device.c | 16 ++++++++++------
 src/class/cdc/cdc_device.h |  8 ++++++++
 src/common/tusb_verify.h   | 10 +++++-----
 src/device/usbd.c          | 10 ++++++++--
 4 files changed, 31 insertions(+), 13 deletions(-)

diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index 570c825ab0..ebc408f5a8 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -81,11 +81,11 @@ typedef struct {
 CFG_TUD_MEM_SECTION static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
 static tud_cdc_configure_fifo_t _cdcd_fifo_cfg;
 
-static bool _prep_out_transaction (cdcd_interface_t* p_cdc, bool itf_open) {
+static bool _prep_out_transaction (cdcd_interface_t* p_cdc) {
   uint8_t const rhport = 0;
 
   // Skip if usb is not ready yet
-  TU_VERIFY(tud_ready() || itf_open);
+  TU_VERIFY(tud_ready() && p_cdc->ep_out);
 
   uint16_t available = tu_fifo_remaining(&p_cdc->rx_ff);
 
@@ -120,6 +120,10 @@ bool tud_cdc_configure_fifo(tud_cdc_configure_fifo_t const* cfg) {
   return true;
 }
 
+bool tud_cdc_n_ready(uint8_t itf) {
+  return tud_ready() && _cdcd_itf[itf].ep_in != 0 && _cdcd_itf[itf].ep_out != 0;
+}
+
 bool tud_cdc_n_connected(uint8_t itf) {
   // DTR (bit 0) active  is considered as connected
   return tud_ready() && tu_bit_test(_cdcd_itf[itf].line_state, 0);
@@ -147,7 +151,7 @@ uint32_t tud_cdc_n_available(uint8_t itf) {
 uint32_t tud_cdc_n_read(uint8_t itf, void* buffer, uint32_t bufsize) {
   cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
   uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
-  _prep_out_transaction(p_cdc, false);
+  _prep_out_transaction(p_cdc);
   return num_read;
 }
 
@@ -158,7 +162,7 @@ bool tud_cdc_n_peek(uint8_t itf, uint8_t* chr) {
 void tud_cdc_n_read_flush(uint8_t itf) {
   cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
   tu_fifo_clear(&p_cdc->rx_ff);
-  _prep_out_transaction(p_cdc, false);
+  _prep_out_transaction(p_cdc);
 }
 
 //--------------------------------------------------------------------+
@@ -340,7 +344,7 @@ uint16_t cdcd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint1
   }
 
   // Prepare for incoming data
-  _prep_out_transaction(p_cdc, true);
+  _prep_out_transaction(p_cdc);
 
   return drv_len;
 }
@@ -449,7 +453,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
     if (tud_cdc_rx_cb && !tu_fifo_empty(&p_cdc->rx_ff)) tud_cdc_rx_cb(itf);
 
     // prepare for OUT transaction
-    _prep_out_transaction(p_cdc, false);
+    _prep_out_transaction(p_cdc);
   }
 
   // Data sent to host, we continue to fetch from tx fifo to send.
diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h
index 34670517a1..3ad7c8baf5 100644
--- a/src/class/cdc/cdc_device.h
+++ b/src/class/cdc/cdc_device.h
@@ -61,6 +61,9 @@ bool tud_cdc_configure_fifo(tud_cdc_configure_fifo_t const* cfg);
 // Application API (Multiple Ports) i.e. CFG_TUD_CDC > 1
 //--------------------------------------------------------------------+
 
+// Check if interface is ready
+bool tud_cdc_n_ready(uint8_t itf);
+
 // Check if terminal is connected to this port
 bool tud_cdc_n_connected(uint8_t itf);
 
@@ -116,6 +119,11 @@ bool tud_cdc_n_write_clear(uint8_t itf);
 //--------------------------------------------------------------------+
 // Application API (Single Port)
 //--------------------------------------------------------------------+
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_ready(void) {
+  return tud_cdc_n_ready(0);
+}
+
 TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_connected(void) {
   return tud_cdc_n_connected(0);
 }
diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h
index dde0550d3c..4344575b70 100644
--- a/src/common/tusb_verify.h
+++ b/src/common/tusb_verify.h
@@ -56,8 +56,8 @@
  *   #define TU_VERIFY(cond)                  if(cond) return false;
  *   #define TU_VERIFY(cond,ret)              if(cond) return ret;
  *
- *   #define TU_ASSERT(cond)                  if(cond) {_MESS_FAILED(); TU_BREAKPOINT(), return false;}
- *   #define TU_ASSERT(cond,ret)              if(cond) {_MESS_FAILED(); TU_BREAKPOINT(), return ret;}
+ *   #define TU_ASSERT(cond)                  if(cond) {TU_MESS_FAILED(); TU_BREAKPOINT(), return false;}
+ *   #define TU_ASSERT(cond,ret)              if(cond) {TU_MESS_FAILED(); TU_BREAKPOINT(), return ret;}
  *------------------------------------------------------------------*/
 
 #ifdef __cplusplus
@@ -70,9 +70,9 @@
 
 #if CFG_TUSB_DEBUG
   #include <stdio.h>
-  #define _MESS_FAILED()    tu_printf("%s %d: ASSERT FAILED\r\n", __func__, __LINE__)
+  #define TU_MESS_FAILED()    tu_printf("%s %d: ASSERT FAILED\r\n", __func__, __LINE__)
 #else
-  #define _MESS_FAILED() do {} while (0)
+  #define TU_MESS_FAILED() do {} while (0)
 #endif
 
 // Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33. M55
@@ -119,7 +119,7 @@
  *------------------------------------------------------------------*/
 #define TU_ASSERT_DEFINE(_cond, _ret)                                 \
   do {                                                                \
-    if ( !(_cond) ) { _MESS_FAILED(); TU_BREAKPOINT(); return _ret; } \
+    if ( !(_cond) ) { TU_MESS_FAILED(); TU_BREAKPOINT(); return _ret; } \
   } while(0)
 
 #define TU_ASSERT_1ARGS(_cond)         TU_ASSERT_DEFINE(_cond, false)
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 4105a71a46..4e723c8b9b 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -747,17 +747,23 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
               _usbd_dev.speed = speed; // restore speed
             }
 
+            _usbd_dev.cfg_num = cfg_num;
+
             // Handle the new configuration and execute the corresponding callback
             if ( cfg_num ) {
               // switch to new configuration if not zero
-              TU_ASSERT( process_set_config(rhport, cfg_num) );
+              if (!process_set_config(rhport, cfg_num)) {
+                TU_MESS_FAILED();
+                TU_BREAKPOINT();
+                _usbd_dev.cfg_num = 0;
+                return false;
+              }
               if ( tud_mount_cb ) tud_mount_cb();
             } else {
               if ( tud_umount_cb ) tud_umount_cb();
             }
           }
 
-          _usbd_dev.cfg_num = cfg_num;
           tud_control_status(rhport, p_request);
         }
         break;

From d040644b6cb055532de7d3da3477e20067f1f15f Mon Sep 17 00:00:00 2001
From: Frank Voorburg <voorburg@feaser.com>
Date: Sat, 29 Jun 2024 14:25:02 +0200
Subject: [PATCH 075/204] Additional fix related to issue #1018. Corrects the
 usage of TU_ATTR_WEAK for the Keil compiler for the callback functions:

* tud_descriptor_bos_cb()
* tud_vendor_control_xfer_cb()
* tud_mount_cb()
* tud_umount_cb()
* tud_suspend_cb()
* tud_resume_cb()

Without the fix for the first two functions, the USB device won't enumerate properly, if
the device makes use of a BOS description. For example when using a Microsoft OS 2.0
platform capability descriptor to set a specific Device Interface GUID for WinUSB.

The fix for the other four functions were added, because it's probably just a matter of
time before someone runs into the same problem with those callback functions.
---
 src/device/usbd.c | 34 +++++++++++++++++++++++++++++-----
 src/device/usbd.h | 12 ++++++------
 2 files changed, 35 insertions(+), 11 deletions(-)

diff --git a/src/device/usbd.c b/src/device/usbd.c
index 4e723c8b9b..719183521a 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -55,6 +55,30 @@ TU_ATTR_WEAK void tud_sof_cb(uint32_t frame_count) {
   (void)frame_count;
 }
 
+TU_ATTR_WEAK uint8_t const * tud_descriptor_bos_cb(void) {
+  return NULL;
+}
+
+TU_ATTR_WEAK void tud_mount_cb(void) {
+}
+
+TU_ATTR_WEAK void tud_umount_cb(void) {
+}
+
+TU_ATTR_WEAK void tud_suspend_cb(bool remote_wakeup_en) {
+  (void)remote_wakeup_en;
+}
+
+TU_ATTR_WEAK void tud_resume_cb(void) {
+}
+
+TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request) {
+  (void)rhport;
+  (void)stage;
+  (void)request;
+  return false;
+}
+
 TU_ATTR_WEAK bool dcd_deinit(uint8_t rhport) {
   (void) rhport;
   return false;
@@ -557,7 +581,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) {
       case DCD_EVENT_UNPLUGGED:
         TU_LOG_USBD("\r\n");
         usbd_reset(event.rhport);
-        if (tud_umount_cb) tud_umount_cb();
+        tud_umount_cb();
         break;
 
       case DCD_EVENT_SETUP_RECEIVED:
@@ -617,7 +641,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) {
         // e.g suspend -> resume -> unplug/plug. Skip suspend/resume if not connected
         if (_usbd_dev.connected) {
           TU_LOG_USBD(": Remote Wakeup = %u\r\n", _usbd_dev.remote_wakeup_en);
-          if (tud_suspend_cb) tud_suspend_cb(_usbd_dev.remote_wakeup_en);
+          tud_suspend_cb(_usbd_dev.remote_wakeup_en);
         } else {
           TU_LOG_USBD(" Skipped\r\n");
         }
@@ -626,7 +650,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) {
       case DCD_EVENT_RESUME:
         if (_usbd_dev.connected) {
           TU_LOG_USBD("\r\n");
-          if (tud_resume_cb) tud_resume_cb();
+          tud_resume_cb();
         } else {
           TU_LOG_USBD(" Skipped\r\n");
         }
@@ -758,9 +782,9 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
                 _usbd_dev.cfg_num = 0;
                 return false;
               }
-              if ( tud_mount_cb ) tud_mount_cb();
+              tud_mount_cb();
             } else {
-              if ( tud_umount_cb ) tud_umount_cb();
+              tud_umount_cb();
             }
           }
 
diff --git a/src/device/usbd.h b/src/device/usbd.h
index e47f674ea0..042f2b089b 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -126,7 +126,7 @@ uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid);
 
 // Invoked when received GET BOS DESCRIPTOR request
 // Application return pointer to descriptor
-TU_ATTR_WEAK uint8_t const * tud_descriptor_bos_cb(void);
+uint8_t const * tud_descriptor_bos_cb(void);
 
 // Invoked when received GET DEVICE QUALIFIER DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete.
@@ -140,17 +140,17 @@ TU_ATTR_WEAK uint8_t const* tud_descriptor_device_qualifier_cb(void);
 TU_ATTR_WEAK uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index);
 
 // Invoked when device is mounted (configured)
-TU_ATTR_WEAK void tud_mount_cb(void);
+void tud_mount_cb(void);
 
 // Invoked when device is unmounted
-TU_ATTR_WEAK void tud_umount_cb(void);
+void tud_umount_cb(void);
 
 // Invoked when usb bus is suspended
 // Within 7ms, device must draw an average of current less than 2.5 mA from bus
-TU_ATTR_WEAK void tud_suspend_cb(bool remote_wakeup_en);
+void tud_suspend_cb(bool remote_wakeup_en);
 
 // Invoked when usb bus is resumed
-TU_ATTR_WEAK void tud_resume_cb(void);
+void tud_resume_cb(void);
 
 // Invoked when there is a new usb event, which need to be processed by tud_task()/tud_task_ext()
 void tud_event_hook_cb(uint8_t rhport, uint32_t eventid, bool in_isr);
@@ -159,7 +159,7 @@ void tud_event_hook_cb(uint8_t rhport, uint32_t eventid, bool in_isr);
 void tud_sof_cb(uint32_t frame_count);
 
 // Invoked when received control request with VENDOR TYPE
-TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
+bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request);
 
 //--------------------------------------------------------------------+
 // Binary Device Object Store (BOS) Descriptor Templates

From e92acf0a91b071a723c408385add083dfe337e8b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 Jul 2024 20:53:23 +0700
Subject: [PATCH 076/204] also migrate tud_descriptor_device_qualifier_cb() /
 tud_descriptor_other_speed_configuration_cb()

---
 src/device/usbd.c | 58 ++++++++++++++++++++++-------------------------
 src/device/usbd.h |  6 ++---
 2 files changed, 30 insertions(+), 34 deletions(-)

diff --git a/src/device/usbd.c b/src/device/usbd.c
index 719183521a..f0d7c45b10 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -46,16 +46,25 @@
 // Weak stubs: invoked if no strong implementation is available
 //--------------------------------------------------------------------+
 TU_ATTR_WEAK void tud_event_hook_cb(uint8_t rhport, uint32_t eventid, bool in_isr) {
-  (void)rhport;
-  (void)eventid;
-  (void)in_isr;
+  (void) rhport;
+  (void) eventid;
+  (void) in_isr;
 }
 
 TU_ATTR_WEAK void tud_sof_cb(uint32_t frame_count) {
-  (void)frame_count;
+  (void) frame_count;
+}
+
+TU_ATTR_WEAK uint8_t const* tud_descriptor_bos_cb(void) {
+  return NULL;
+}
+
+TU_ATTR_WEAK uint8_t const* tud_descriptor_device_qualifier_cb(void) {
+  return NULL;
 }
 
-TU_ATTR_WEAK uint8_t const * tud_descriptor_bos_cb(void) {
+TU_ATTR_WEAK uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index) {
+  (void) index;
   return NULL;
 }
 
@@ -66,16 +75,16 @@ TU_ATTR_WEAK void tud_umount_cb(void) {
 }
 
 TU_ATTR_WEAK void tud_suspend_cb(bool remote_wakeup_en) {
-  (void)remote_wakeup_en;
+  (void) remote_wakeup_en;
 }
 
 TU_ATTR_WEAK void tud_resume_cb(void) {
 }
 
-TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const * request) {
-  (void)rhport;
-  (void)stage;
-  (void)request;
+TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const* request) {
+  (void) rhport;
+  (void) stage;
+  (void) request;
   return false;
 }
 
@@ -1075,15 +1084,12 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
     }
     // break; // unreachable
 
-    case TUSB_DESC_BOS:
-    {
+    case TUSB_DESC_BOS: {
       TU_LOG_USBD(" BOS\r\n");
 
       // requested by host if USB > 2.0 ( i.e 2.1 or 3.x )
-      if (!tud_descriptor_bos_cb) return false;
-
       uintptr_t desc_bos = (uintptr_t) tud_descriptor_bos_cb();
-      TU_ASSERT(desc_bos);
+      TU_VERIFY(desc_bos);
 
       // Use offsetof to avoid pointer to the odd/misaligned address
       uint16_t const total_len = tu_le16toh( tu_unaligned_read16((const void*) (desc_bos + offsetof(tusb_desc_bos_t, wTotalLength))) );
@@ -1093,24 +1099,20 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
     // break; // unreachable
 
     case TUSB_DESC_CONFIGURATION:
-    case TUSB_DESC_OTHER_SPEED_CONFIG:
-    {
+    case TUSB_DESC_OTHER_SPEED_CONFIG: {
       uintptr_t desc_config;
 
-      if ( desc_type == TUSB_DESC_CONFIGURATION )
-      {
+      if ( desc_type == TUSB_DESC_CONFIGURATION ) {
         TU_LOG_USBD(" Configuration[%u]\r\n", desc_index);
         desc_config = (uintptr_t) tud_descriptor_configuration_cb(desc_index);
-      }else
-      {
+        TU_ASSERT(desc_config);
+      }else {
         // Host only request this after getting Device Qualifier descriptor
         TU_LOG_USBD(" Other Speed Configuration\r\n");
-        TU_VERIFY( tud_descriptor_other_speed_configuration_cb );
         desc_config = (uintptr_t) tud_descriptor_other_speed_configuration_cb(desc_index);
+        TU_VERIFY(desc_config);
       }
 
-      TU_ASSERT(desc_config);
-
       // Use offsetof to avoid pointer to the odd/misaligned address
       uint16_t const total_len = tu_le16toh( tu_unaligned_read16((const void*) (desc_config + offsetof(tusb_desc_configuration_t, wTotalLength))) );
 
@@ -1131,16 +1133,10 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
     }
     // break; // unreachable
 
-    case TUSB_DESC_DEVICE_QUALIFIER:
-    {
+    case TUSB_DESC_DEVICE_QUALIFIER: {
       TU_LOG_USBD(" Device Qualifier\r\n");
-
-      TU_VERIFY( tud_descriptor_device_qualifier_cb );
-
       uint8_t const* desc_qualifier = tud_descriptor_device_qualifier_cb();
       TU_VERIFY(desc_qualifier);
-
-      // first byte of descriptor is its size
       return tud_control_xfer(rhport, p_request, (void*) (uintptr_t) desc_qualifier, tu_desc_len(desc_qualifier));
     }
     // break; // unreachable
diff --git a/src/device/usbd.h b/src/device/usbd.h
index 042f2b089b..3d3e83f414 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -109,7 +109,7 @@ bool tud_control_xfer(uint8_t rhport, tusb_control_request_t const * request, vo
 bool tud_control_status(uint8_t rhport, tusb_control_request_t const * request);
 
 //--------------------------------------------------------------------+
-// Application Callbacks (WEAK is optional)
+// Application Callbacks
 //--------------------------------------------------------------------+
 
 // Invoked when received GET DEVICE DESCRIPTOR request
@@ -132,12 +132,12 @@ uint8_t const * tud_descriptor_bos_cb(void);
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete.
 // device_qualifier descriptor describes information about a high-speed capable device that would
 // change if the device were operating at the other speed. If not highspeed capable stall this request.
-TU_ATTR_WEAK uint8_t const* tud_descriptor_device_qualifier_cb(void);
+uint8_t const* tud_descriptor_device_qualifier_cb(void);
 
 // Invoked when received GET OTHER SEED CONFIGURATION DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
 // Configuration descriptor in the other speed e.g if high speed then this is for full speed and vice versa
-TU_ATTR_WEAK uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index);
+uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index);
 
 // Invoked when device is mounted (configured)
 void tud_mount_cb(void);

From 8183433600a675a54964d0a36efb814f77f38a54 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 Jul 2024 21:05:10 +0700
Subject: [PATCH 077/204] fix compile with tud_vendor_control_xfer_cb() and
 check tud_descriptor_device_cb()

---
 src/device/usbd.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/src/device/usbd.c b/src/device/usbd.c
index f0d7c45b10..b932160061 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -708,8 +708,6 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
 
   // Vendor request
   if ( p_request->bmRequestType_bit.type == TUSB_REQ_TYPE_VENDOR ) {
-    TU_VERIFY(tud_vendor_control_xfer_cb);
-
     usbd_control_set_complete_callback(tud_vendor_control_xfer_cb);
     return tud_vendor_control_xfer_cb(rhport, CONTROL_STAGE_SETUP, p_request);
   }
@@ -1060,25 +1058,23 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
 
   switch(desc_type)
   {
-    case TUSB_DESC_DEVICE:
-    {
+    case TUSB_DESC_DEVICE: {
       TU_LOG_USBD(" Device\r\n");
 
       void* desc_device = (void*) (uintptr_t) tud_descriptor_device_cb();
+      TU_ASSERT(desc_device);
 
       // Only response with exactly 1 Packet if: not addressed and host requested more data than device descriptor has.
       // This only happens with the very first get device descriptor and EP0 size = 8 or 16.
       if ((CFG_TUD_ENDPOINT0_SIZE < sizeof(tusb_desc_device_t)) && !_usbd_dev.addressed &&
-          ((tusb_control_request_t const*) p_request)->wLength > sizeof(tusb_desc_device_t))
-      {
+          ((tusb_control_request_t const*) p_request)->wLength > sizeof(tusb_desc_device_t)) {
         // Hack here: we modify the request length to prevent usbd_control response with zlp
         // since we are responding with 1 packet & less data than wLength.
         tusb_control_request_t mod_request = *p_request;
         mod_request.wLength = CFG_TUD_ENDPOINT0_SIZE;
 
         return tud_control_xfer(rhport, &mod_request, desc_device, CFG_TUD_ENDPOINT0_SIZE);
-      }else
-      {
+      }else {
         return tud_control_xfer(rhport, p_request, desc_device, sizeof(tusb_desc_device_t));
       }
     }

From 6bb59eeb3f974f51fbc5c6a5e4c02f83e11567b8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 Jul 2024 22:33:53 +0700
Subject: [PATCH 078/204] add lpc11u37 for hil rpi

---
 .idea/cmake.xml           | 3 ++-
 hw/bsp/lpc11/family.c     | 7 +++++++
 hw/bsp/lpc11/family.cmake | 1 +
 test/hil/rpi.json         | 7 +++++++
 tools/get_deps.py         | 2 +-
 5 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index f09e185b1b..67e7930165 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -69,7 +69,7 @@
       <configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express" />
       <configuration PROFILE_NAME="itsybitsy_m4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=itsybitsy_m4" />
       <configuration PROFILE_NAME="same54_xplained" ENABLED="false" GENERATION_OPTIONS="-DBOARD=same54_xplained -DLOG=2 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="feather_nrf52840_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_nrf52840_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
+      <configuration PROFILE_NAME="feather_nrf52840_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_nrf52840_express -DLOG=1 -DLOGGER=RTT -DMAX3421_HOST=1" />
       <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="metro m7 1011 sd" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011_sd -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
@@ -117,6 +117,7 @@
       <configuration PROFILE_NAME="raspberrypi_zero" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_zero -DLOG=2" />
       <configuration PROFILE_NAME="raspberrypi_cm4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_cm4 -DLOG=2" />
       <configuration PROFILE_NAME="raspberrypi_zero2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_zero2 -DLOG=2" />
+      <configuration PROFILE_NAME="lpcxpresso11u37" ENABLED="false" GENERATION_OPTIONS="-DBOARD=lpcxpresso11u37" />
       <configuration PROFILE_NAME="lpcxpresso11u68" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso11u68 -DLOG=2 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="lpcxpresso1347" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso1347 -DLOG=2 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="lpcxpresso1549" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso1549 -DLOG=2 -DLOGGER=RTT" />
diff --git a/hw/bsp/lpc11/family.c b/hw/bsp/lpc11/family.c
index bff7110b8f..e75bc49190 100644
--- a/hw/bsp/lpc11/family.c
+++ b/hw/bsp/lpc11/family.c
@@ -90,6 +90,13 @@ void board_led_write(bool state) {
   Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
 }
 
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  if ( max_len < 16 ) return 0;
+  uint32_t* id32 = (uint32_t*) (uintptr_t) id;
+  id32[0] = Chip_IAP_ReadUID();
+  return 4;
+}
+
 uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN);
 }
diff --git a/hw/bsp/lpc11/family.cmake b/hw/bsp/lpc11/family.cmake
index f17a48dd70..8186006564 100644
--- a/hw/bsp/lpc11/family.cmake
+++ b/hw/bsp/lpc11/family.cmake
@@ -30,6 +30,7 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/../gcc/cr_startup_lpc${LPC_FAMILY}.c
     ${SDK_DIR}/src/chip_${LPC_FAMILY}.c
     ${SDK_DIR}/src/clock_${LPC_FAMILY}.c
+    ${SDK_DIR}/src/iap.c
     ${SDK_DIR}/src/iocon_${LPC_FAMILY}.c
     ${SDK_DIR}/src/sysinit_${LPC_FAMILY}.c
     )
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index 98d576db89..bd20b3313a 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -46,6 +46,13 @@
             "flasher": "jlink",
             "flasher_sn": "000831174392",
             "flasher_args": "-device R7FA4M1AB"
+        },
+        {
+            "name": "lpcxpresso11u37",
+            "uid": "17121919",
+            "flasher": "jlink",
+            "flasher_sn": "000724441579",
+            "flasher_args": "-device LPC11U37/401"
         }
     ]
 }
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 555e2d7070..7fbde0e027 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -49,7 +49,7 @@
                        '2204191ec76283371419fbcec207da02e1bc22fa',
                        'nuc'],
     'hw/mcu/nxp/lpcopen': ['https://github.com/hathach/nxp_lpcopen.git',
-                           '04bfe7a5f6ee74a89a28ad618d3367dcfcfb7d83',
+                           'b41cf930e65c734d8ec6de04f1d57d46787c76ae',
                            'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'],
     'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git',
                             '144f1eb7ea8c06512e12f12b27383601c0272410',

From 66193cba05dc9205254dcb839bbea3a53fd03eee Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 Jul 2024 22:48:01 +0700
Subject: [PATCH 079/204] fix build with make

---
 hw/bsp/lpc11/family.mk | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/lpc11/family.mk b/hw/bsp/lpc11/family.mk
index 09713fd558..a3ec337683 100644
--- a/hw/bsp/lpc11/family.mk
+++ b/hw/bsp/lpc11/family.mk
@@ -9,13 +9,18 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
   -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+# mcu driver cause following warnings
+CFLAGS += \
+  -Wno-error=incompatible-pointer-types \
+
+LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
 
 SRC_C += \
 	src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
 	$(MCU_DIR)/../gcc/cr_startup_lpc$(MCU_DRV).c \
 	$(MCU_DIR)/src/chip_$(MCU_DRV).c \
 	$(MCU_DIR)/src/clock_$(MCU_DRV).c \
+	$(MCU_DIR)/src/iap.c \
 	$(MCU_DIR)/src/iocon_$(MCU_DRV).c \
 	$(MCU_DIR)/src/sysinit_$(MCU_DRV).c
 

From 4de46fcf975d57983192874feea9d94427f5de50 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 22 Jul 2024 16:01:39 +0700
Subject: [PATCH 080/204] fix a bug in fsdev introduced by #1942

---
 hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.cmake | 1 -
 hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake | 1 -
 hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake     | 1 -
 hw/bsp/ch32v20x/family.cmake                        | 6 ++++++
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c       | 2 +-
 5 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.cmake b/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.cmake
index adb0ea7416..4aae6bdc2f 100644
--- a/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.cmake
+++ b/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.cmake
@@ -10,7 +10,6 @@ set(LD_RAM_SIZE 20K)
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     SYSCLK_FREQ_144MHz_HSE=144000000
-    CH32_FLASH_ENHANCE_READ_MODE=1
     CFG_EXAMPLE_MSC_DUAL_READONLY
     )
 endfunction()
diff --git a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake
index 6fe3e05b22..ecb8b378fb 100644
--- a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake
+++ b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake
@@ -8,7 +8,6 @@ set(LD_RAM_SIZE 10K)
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     SYSCLK_FREQ_144MHz_HSI=144000000
-    CH32_FLASH_ENHANCE_READ_MODE=1
     CFG_EXAMPLE_MSC_DUAL_READONLY
     )
 endfunction()
diff --git a/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake b/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake
index ed73657972..a0bf12b5ca 100644
--- a/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake
+++ b/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake
@@ -8,7 +8,6 @@ set(LD_RAM_SIZE 20K)
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     SYSCLK_FREQ_144MHz_HSE=144000000
-    CH32_FLASH_ENHANCE_READ_MODE=1
     CFG_EXAMPLE_MSC_DUAL_READONLY
     )
 endfunction()
diff --git a/hw/bsp/ch32v20x/family.cmake b/hw/bsp/ch32v20x/family.cmake
index bf929b862d..380ef190d5 100644
--- a/hw/bsp/ch32v20x/family.cmake
+++ b/hw/bsp/ch32v20x/family.cmake
@@ -72,6 +72,12 @@ function(add_board_target BOARD_TARGET)
 
   update_board(${BOARD_TARGET})
 
+  if (LD_FLASH_SIZE STREQUAL 224K)
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      CH32_FLASH_ENHANCE_READ_MODE=1
+      )
+  endif()
+
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
     target_compile_options(${BOARD_TARGET} PUBLIC
       -mcmodel=medany
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 8bfb899ca8..39f33bc344 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -1004,7 +1004,7 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, ui
     srcVal++;
   }
 
-  if (wNBytes) {
+  if (wNBytes & 0x01) {
     temp1 = (uint16_t) *srcVal;
     *pdwVal = temp1;
   }

From ce5fe3cc196df343c96477045868c60ac34516cf Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 22 Jul 2024 22:05:21 +0700
Subject: [PATCH 081/204] change s3 baudrate

---
 test/hil/rpi.json | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index bd20b3313a..dae3094b59 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -29,7 +29,7 @@
             ],
             "flasher": "esptool",
             "flasher_sn": "3ea619acd1cdeb11a0a0b806e93fd3f1",
-            "flasher_args": "-b 1500000"
+            "flasher_args": "-b 921600"
         },
         {
             "name": "metro_m7_1011",

From 5d26f5794e991409addfd9501ee04ad4e68dd1af Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 23 Jul 2024 18:05:44 +0700
Subject: [PATCH 082/204] update fsdev bsp for hil testing

---
 hw/bsp/stm32f3/family.c                        | 13 +++++++++++++
 hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h |  2 +-
 hw/bsp/stm32l0/family.c                        | 13 +++++++++++++
 3 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/stm32f3/family.c b/hw/bsp/stm32f3/family.c
index e7488ba846..f94dd95cff 100644
--- a/hw/bsp/stm32f3/family.c
+++ b/hw/bsp/stm32f3/family.c
@@ -116,6 +116,19 @@ uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
 }
 
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t * stm32_uuid = (volatile uint32_t *) UID_BASE;
+  uint32_t* id32 = (uint32_t*) (uintptr_t) id;
+  uint8_t const len = 12;
+
+  id32[0] = stm32_uuid[0];
+  id32[1] = stm32_uuid[1];
+  id32[2] = stm32_uuid[2];
+
+  return len;
+}
+
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
diff --git a/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h
index fa3f0ac339..891ea4b799 100644
--- a/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h
@@ -58,7 +58,7 @@
 #define configCPU_CLOCK_HZ                      SystemCoreClock
 #define configTICK_RATE_HZ                      ( 1000 )
 #define configMAX_PRIORITIES                    ( 5 )
-#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configMINIMAL_STACK_SIZE                ( 200 )
 #define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
 #define configMAX_TASK_NAME_LEN                 16
 #define configUSE_16_BIT_TICKS                  0
diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c
index ea7f0b73d9..c8c88d687d 100644
--- a/hw/bsp/stm32l0/family.c
+++ b/hw/bsp/stm32l0/family.c
@@ -126,6 +126,19 @@ uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
 }
 
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t * stm32_uuid = (volatile uint32_t *) UID_BASE;
+  uint32_t* id32 = (uint32_t*) (uintptr_t) id;
+  uint8_t const len = 12;
+
+  id32[0] = stm32_uuid[0];
+  id32[1] = stm32_uuid[1];
+  id32[2] = stm32_uuid[2];
+
+  return len;
+}
+
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;

From c0f38ebf8d483da02a9074eaf021e1660a55fd75 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 23 Jul 2024 19:53:41 +0700
Subject: [PATCH 083/204] fsdev read/write packet use unaligned function

---
 hw/bsp/ch32v20x/family.c                      |  11 ++
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 108 +++++++-----------
 src/portable/st/stm32_fsdev/fsdev_common.h    |  13 ++-
 3 files changed, 64 insertions(+), 68 deletions(-)

diff --git a/hw/bsp/ch32v20x/family.c b/hw/bsp/ch32v20x/family.c
index 542d4b5db7..43dd7e0322 100644
--- a/hw/bsp/ch32v20x/family.c
+++ b/hw/bsp/ch32v20x/family.c
@@ -173,6 +173,17 @@ uint32_t board_button_read(void) {
   return false;
 }
 
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t* ch32_uuid = ((volatile uint32_t*) 0x1FFFF7E8UL);
+  uint32_t* serial_32 = (uint32_t*) (uintptr_t) id;
+  serial_32[0] = ch32_uuid[0];
+  serial_32[1] = ch32_uuid[1];
+  serial_32[2] = ch32_uuid[2];
+
+  return 12;
+}
+
 int board_uart_read(uint8_t *buf, int len) {
   (void) buf;
   (void) len;
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 39f33bc344..8c2b106914 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -426,6 +426,8 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
       dcd_read_packet_memory(userMemBuf, pcd_get_ep_rx_address(USB, EPindex), 8);
       dcd_event_setup_received(0, (uint8_t *)userMemBuf, true);
 #endif
+    } else {
+      TU_BREAKPOINT();
     }
   } else {
     // Clear RX CTR interrupt flag
@@ -941,27 +943,26 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 }
 
 #ifdef FSDEV_BUS_32BIT
-static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes)
-{
-  const uint8_t *srcVal = src;
+static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes) {
+  const uint8_t *src8 = src;
   volatile uint32_t *dst32 = (volatile uint32_t *)(USB_PMAADDR + dst);
 
   for (uint32_t n = wNBytes / 4; n > 0; --n) {
-    *dst32++ = tu_unaligned_read32(srcVal);
-    srcVal += 4;
+    *dst32++ = tu_unaligned_read32(src8);
+    src8 += 4;
   }
 
-  wNBytes = wNBytes & 0x03;
-  if (wNBytes) {
-    uint32_t wrVal = *srcVal;
-    wNBytes--;
+  uint16_t odd = wNBytes & 0x03;
+  if (odd) {
+    uint32_t wrVal = *src8;
+    odd--;
 
-    if (wNBytes) {
-      wrVal |= *++srcVal << 8;
-      wNBytes--;
+    if (odd) {
+      wrVal |= *++src8 << 8;
+      odd--;
 
-      if (wNBytes) {
-        wrVal |= *++srcVal << 16;
+      if (odd) {
+        wrVal |= *++src8 << 16;
       }
     }
 
@@ -974,39 +975,26 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, ui
 // Packet buffer access can only be 8- or 16-bit.
 /**
  * @brief Copy a buffer from user memory area to packet memory area (PMA).
- *        This uses byte-access for user memory (so support non-aligned buffers)
- *        and 16-bit access for packet memory.
+ *        This uses un-aligned for user memory and 16-bit access for packet memory.
  * @param   dst, byte address in PMA; must be 16-bit aligned
  * @param   src pointer to user memory area.
  * @param   wPMABufAddr address into PMA.
  * @param   wNBytes no. of bytes to be copied.
  * @retval None
  */
-static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes)
-{
+static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes) {
   uint32_t n = (uint32_t)wNBytes >> 1U;
-  uint16_t temp1, temp2;
-  const uint8_t *srcVal;
-
-  // The GCC optimizer will combine access to 32-bit sizes if we let it. Force
-  // it volatile so that it won't do that.
-  __IO uint16_t *pdwVal;
-
-  srcVal = src;
-  pdwVal = &pma[FSDEV_PMA_STRIDE * (dst >> 1)];
+  const uint8_t *src8 = src;
+  volatile uint16_t *pdw16 = &pma[FSDEV_PMA_STRIDE * (dst >> 1)];
 
   while (n--) {
-    temp1 = (uint16_t)*srcVal;
-    srcVal++;
-    temp2 = temp1 | ((uint16_t)(((uint16_t)(*srcVal)) << 8U));
-    *pdwVal = temp2;
-    pdwVal += FSDEV_PMA_STRIDE;
-    srcVal++;
+    *pdw16 = tu_unaligned_read16(src8);
+    src8 += 2;
+    pdw16 += FSDEV_PMA_STRIDE;
   }
 
   if (wNBytes & 0x01) {
-    temp1 = (uint16_t) *srcVal;
-    *pdwVal = temp1;
+    *pdw16 = (uint16_t) *src8;
   }
 
   return true;
@@ -1091,27 +1079,27 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNB
 #ifdef FSDEV_BUS_32BIT
 static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes)
 {
-  uint8_t *dstVal = dst;
+  uint8_t *dst8 = dst;
   volatile uint32_t *src32 = (volatile uint32_t *)(USB_PMAADDR + src);
 
   for (uint32_t n = wNBytes / 4; n > 0; --n) {
-    tu_unaligned_write32(dstVal, *src32++);
-    dstVal += 4;
+    tu_unaligned_write32(dst8, *src32++);
+    dst8 += 4;
   }
 
-  wNBytes = wNBytes & 0x03;
-  if (wNBytes) {
+  uint16_t odd = wNBytes & 0x03;
+  if (odd) {
     uint32_t rdVal = *src32;
 
-    *dstVal = tu_u32_byte0(rdVal);
-    wNBytes--;
+    *dst8 = tu_u32_byte0(rdVal);
+    odd--;
 
-    if (wNBytes) {
-      *++dstVal = tu_u32_byte1(rdVal);
-      wNBytes--;
+    if (odd) {
+      *++dst8 = tu_u32_byte1(rdVal);
+      odd--;
 
-      if (wNBytes) {
-        *++dstVal = tu_u32_byte2(rdVal);
+      if (odd) {
+        *++dst8 = tu_u32_byte2(rdVal);
       }
     }
   }
@@ -1121,33 +1109,25 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t
 #else
 /**
  * @brief Copy a buffer from packet memory area (PMA) to user memory area.
- *        Uses byte-access of system memory and 16-bit access of packet memory
+ *        Uses unaligned for system memory and 16-bit access of packet memory
  * @param   wNBytes no. of bytes to be copied.
  * @retval None
  */
-static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes)
-{
+static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes) {
   uint32_t n = (uint32_t)wNBytes >> 1U;
-  // The GCC optimizer will combine access to 32-bit sizes if we let it. Force
-  // it volatile so that it won't do that.
-  __IO const uint16_t *pdwVal;
-  uint32_t temp;
-
-  pdwVal = &pma[FSDEV_PMA_STRIDE * (src >> 1)];
-  uint8_t *dstVal = (uint8_t *)dst;
+  volatile const uint16_t *pdw16 = &pma[FSDEV_PMA_STRIDE * (src >> 1)];
+  uint8_t *dst8 = (uint8_t *)dst;
 
   while (n--) {
-    temp = *pdwVal;
-    pdwVal += FSDEV_PMA_STRIDE;
-    *dstVal++ = ((temp >> 0) & 0xFF);
-    *dstVal++ = ((temp >> 8) & 0xFF);
+    tu_unaligned_write16(dst8, *pdw16);
+    dst8 += 2;
+    pdw16 += FSDEV_PMA_STRIDE;
   }
 
   if (wNBytes & 0x01) {
-    temp = *pdwVal;
-    pdwVal += FSDEV_PMA_STRIDE;
-    *dstVal++ = ((temp >> 0) & 0xFF);
+    *dst8++ = tu_u16_low(*pdw16);
   }
+
   return true;
 }
 #endif
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index e8a6af8cb7..920c17a04d 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -35,14 +35,19 @@
 #include "stdint.h"
 
 // FSDEV_PMA_SIZE is PMA buffer size in bytes.
-// On 512-byte devices, access with a stride of two words (use every other 16-bit address)
-// On 1024-byte devices, access with a stride of one word (use every 16-bit address)
+// - 512-byte devices, access with a stride of two words (use every other 16-bit address)
+// - 1024-byte devices, access with a stride of one word (use every 16-bit address)
+// - 2048-byte devices, access with 32-bit address
 
 // For purposes of accessing the packet
-#if ((FSDEV_PMA_SIZE) == 512u)
+#if FSDEV_PMA_SIZE == 512
   #define FSDEV_PMA_STRIDE  (2u)
-#elif ((FSDEV_PMA_SIZE) == 1024u)
+#elif FSDEV_PMA_SIZE == 1024
   #define FSDEV_PMA_STRIDE  (1u)
+#elif FSDEV_PMA_SIZE == 2048
+  #ifndef FSDEV_BUS_32BIT
+    #warning "FSDEV_PMA_SIZE is 2048, but FSDEV_BUS_32BIT is not defined"
+  #endif
 #endif
 
 // The fsdev_bus_t type can be used for both register and PMA access necessities

From 2f8078f5b57568f32e0d4d87c95fb32e00389b3d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 24 Jul 2024 16:59:12 +0700
Subject: [PATCH 084/204] minor changes

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 111 +++++++-----------
 1 file changed, 43 insertions(+), 68 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 8c2b106914..8eb4633513 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -180,7 +180,7 @@ static uint8_t remoteWakeCountdown; // When wake is requested
 //--------------------------------------------------------------------+
 
 // into the stack.
-static void dcd_handle_bus_reset(void);
+static void handle_bus_reset(uint8_t rhport);
 static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix);
 static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr);
 static void dcd_ep_ctr_handler(void);
@@ -212,18 +212,12 @@ TU_ATTR_ALWAYS_INLINE static inline xfer_ctl_t *xfer_ctl_ptr(uint32_t ep_addr)
 //--------------------------------------------------------------------+
 // Controller API
 //--------------------------------------------------------------------+
-
-void dcd_init(uint8_t rhport)
-{
-  /* Clocks should already be enabled */
-  /* Use __HAL_RCC_USB_CLK_ENABLE(); to enable the clocks before calling this function */
-
-  /* The RM mentions to use a special ordering of PDWN and FRES, but this isn't done in HAL.
-   * Here, the RM is followed. */
-
+void dcd_init(uint8_t rhport) {
+  // Follow the RM mentions to use a special ordering of PDWN and FRES
   for (volatile uint32_t i = 0; i < 200; i++) { // should be a few us
     asm("NOP");
   }
+
   // Perform USB peripheral reset
   USB->CNTR = USB_CNTR_FRES | USB_CNTR_PDWN;
   for (volatile uint32_t i = 0; i < 200; i++) { // should be a few us
@@ -238,9 +232,11 @@ void dcd_init(uint8_t rhport)
   }
   USB->CNTR = 0; // Enable USB
 
-#if !defined(STM32G0) && !defined(STM32H5) && !defined(STM32U5) // BTABLE register does not exist any more on STM32G0, it is fixed to USB SRAM base address
+#if !defined(STM32G0) && !defined(STM32H5) && !defined(STM32U5)
+  // BTABLE register does not exist any more on STM32G0, it is fixed to USB SRAM base address
   USB->BTABLE = DCD_STM32_BTABLE_BASE;
 #endif
+
   USB->ISTR = 0; // Clear pending interrupts
 
   // Reset endpoints to disabled
@@ -250,17 +246,14 @@ void dcd_init(uint8_t rhport)
   }
 
   USB->CNTR |= USB_CNTR_RESETM | USB_CNTR_ESOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM;
-  dcd_handle_bus_reset();
+  handle_bus_reset(rhport);
 
   // Enable pull-up if supported
   dcd_connect(rhport);
 }
 
-
-void dcd_sof_enable(uint8_t rhport, bool en)
-{
+void dcd_sof_enable(uint8_t rhport, bool en) {
   (void)rhport;
-  (void)en;
 
   if (en) {
     USB->CNTR |= USB_CNTR_SOFM;
@@ -270,9 +263,7 @@ void dcd_sof_enable(uint8_t rhport, bool en)
 }
 
 // Receive Set Address request, mcu port must also include status IN response
-void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
-{
-  (void)rhport;
+void dcd_set_address(uint8_t rhport, uint8_t dev_addr) {
   (void)dev_addr;
 
   // Respond with status
@@ -282,35 +273,15 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
   // do it at dcd_edpt0_status_complete()
 }
 
-void dcd_remote_wakeup(uint8_t rhport)
-{
+void dcd_remote_wakeup(uint8_t rhport) {
   (void)rhport;
 
   USB->CNTR |= USB_CNTR_RESUME;
   remoteWakeCountdown = 4u; // required to be 1 to 15 ms, ESOF should trigger every 1ms.
 }
 
-static const tusb_desc_endpoint_t ep0OUT_desc = {
-    .bLength = sizeof(tusb_desc_endpoint_t),
-    .bDescriptorType = TUSB_DESC_ENDPOINT,
-    .bEndpointAddress = 0x00,
-    .bmAttributes = {.xfer = TUSB_XFER_CONTROL},
-    .wMaxPacketSize = CFG_TUD_ENDPOINT0_SIZE,
-    .bInterval = 0
-};
-
-static const tusb_desc_endpoint_t ep0IN_desc = {
-    .bLength = sizeof(tusb_desc_endpoint_t),
-    .bDescriptorType = TUSB_DESC_ENDPOINT,
-    .bEndpointAddress = 0x80,
-    .bmAttributes = {.xfer = TUSB_XFER_CONTROL},
-    .wMaxPacketSize = CFG_TUD_ENDPOINT0_SIZE,
-    .bInterval = 0
-};
-
-static void dcd_handle_bus_reset(void)
-{
-  USB->DADDR = 0u; // disable USB peripheral by clearing the EF flag
+static void handle_bus_reset(uint8_t rhport) {
+  USB->DADDR = 0u; // disable USB Function
 
   for (uint32_t i = 0; i < FSDEV_EP_COUNT; i++) {
     // Clear EP allocation status
@@ -323,17 +294,26 @@ static void dcd_handle_bus_reset(void)
   // Reset PMA allocation
   ep_buf_ptr = DCD_STM32_BTABLE_BASE + 8 * CFG_TUD_ENDPPOINT_MAX;
 
-  dcd_edpt_open(0, &ep0OUT_desc);
-  dcd_edpt_open(0, &ep0IN_desc);
+  tusb_desc_endpoint_t ep0_desc = {
+      .bLength = sizeof(tusb_desc_endpoint_t),
+      .bDescriptorType = TUSB_DESC_ENDPOINT,
+      .bEndpointAddress = 0x00,
+      .bmAttributes = {.xfer = TUSB_XFER_CONTROL},
+      .wMaxPacketSize = CFG_TUD_ENDPOINT0_SIZE,
+      .bInterval = 0
+  };
+
+  dcd_edpt_open(rhport, &ep0_desc);
+
+  ep0_desc.bEndpointAddress = 0x80;
+  dcd_edpt_open(rhport, &ep0_desc);
 
-  USB->DADDR = USB_DADDR_EF; // Set enable flag, and leaving the device address as zero.
+  USB->DADDR = USB_DADDR_EF; // Enable USB Function
 }
 
 // Handle CTR interrupt for the TX/IN direction
-//
 // Upon call, (wIstr & USB_ISTR_DIR) == 0U
-static void dcd_ep_ctr_tx_handler(uint32_t wIstr)
-{
+static void dcd_ep_ctr_tx_handler(uint32_t wIstr) {
   uint32_t EPindex = wIstr & USB_ISTR_EP_ID;
   uint32_t wEPRegVal = pcd_get_endpoint(USB, EPindex);
   uint8_t ep_addr = (wEPRegVal & USB_EPADDR_FIELD) | TUSB_DIR_IN_MASK;
@@ -406,6 +386,7 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
   // Verify the CTR_RX bit is set. This was in the ST Micro code,
   // but I'm not sure it's actually necessary?
   if ((wEPRegVal & USB_EP_CTR_RX) == 0U) {
+    // TU_ASSERT(false, );
     return;
   }
 
@@ -504,10 +485,7 @@ static void dcd_ep_ctr_handler(void)
   }
 }
 
-void dcd_int_handler(uint8_t rhport)
-{
-  (void)rhport;
-
+void dcd_int_handler(uint8_t rhport) {
   uint32_t int_status = USB->ISTR;
   // const uint32_t handled_ints = USB_ISTR_CTR | USB_ISTR_RESET | USB_ISTR_WKUP
   //     | USB_ISTR_SUSP | USB_ISTR_SOF | USB_ISTR_ESOF;
@@ -526,7 +504,7 @@ void dcd_int_handler(uint8_t rhport)
   if (int_status & USB_ISTR_RESET) {
     // USBRST is start of reset.
     USB->ISTR = (fsdev_bus_t)~USB_ISTR_RESET;
-    dcd_handle_bus_reset();
+    handle_bus_reset(rhport);
     dcd_event_bus_reset(0, TUSB_SPEED_FULL, true);
     return; // Don't do the rest of the things here; perhaps they've been cleared?
   }
@@ -659,13 +637,12 @@ static uint8_t dcd_ep_alloc(uint8_t ep_addr, uint8_t ep_type)
 // The STM32F0 doesn't seem to like |= or &= to manipulate the EP#R registers,
 // so I'm using the #define from HAL here, instead.
 
-bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoint_desc)
-{
+bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   (void)rhport;
-  uint8_t const ep_addr = p_endpoint_desc->bEndpointAddress;
-  uint8_t const ep_idx = dcd_ep_alloc(ep_addr, p_endpoint_desc->bmAttributes.xfer);
+  uint8_t const ep_addr = desc_ep->bEndpointAddress;
+  uint8_t const ep_idx = dcd_ep_alloc(ep_addr, desc_ep->bmAttributes.xfer);
   uint8_t const dir = tu_edpt_dir(ep_addr);
-  const uint16_t packet_size = tu_edpt_packet_size(p_endpoint_desc);
+  const uint16_t packet_size = tu_edpt_packet_size(desc_ep);
   const uint16_t buffer_size = pcd_aligned_buffer_size(packet_size);
   uint16_t pma_addr;
   uint32_t wType;
@@ -674,7 +651,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoint_desc)
   TU_ASSERT(buffer_size <= 64);
 
   // Set type
-  switch (p_endpoint_desc->bmAttributes.xfer) {
+  switch (desc_ep->bmAttributes.xfer) {
     case TUSB_XFER_CONTROL:
       wType = USB_EP_CONTROL;
       break;
@@ -807,7 +784,6 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoin
 }
 
 // Currently, single-buffered, and only 64 bytes at a time (max)
-
 static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix)
 {
   uint16_t len = (uint16_t)(xfer->total_len - xfer->queued_len);
@@ -1007,8 +983,7 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, ui
  * @param   wNBytes no. of bytes to be copied.
  * @retval None
  */
-static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNBytes)
-{
+static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNBytes) {
   // Since we copy from a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
   tu_fifo_buffer_info_t info;
   tu_fifo_get_read_info(ff, &info);
@@ -1042,8 +1017,9 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNB
     dst += 4;
 
     // Copy rest of wrapped byte
-    if (wCnt)
+    if (wCnt) {
       dcd_write_packet_memory(dst, info.ptr_wrap, wCnt);
+    }
   }
 #else
   if ((cnt_lin & 0x01) && cnt_wrap) {
@@ -1077,8 +1053,7 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNB
 }
 
 #ifdef FSDEV_BUS_32BIT
-static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes)
-{
+static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes) {
   uint8_t *dst8 = dst;
   volatile uint32_t *src32 = (volatile uint32_t *)(USB_PMAADDR + src);
 
@@ -1138,8 +1113,7 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t
  * @param   wNBytes no. of bytes to be copied.
  * @retval None
  */
-static bool dcd_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBytes)
-{
+static bool dcd_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBytes) {
   // Since we copy into a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
   // Check for first linear part
   tu_fifo_buffer_info_t info;
@@ -1173,8 +1147,9 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBy
     }
 
     // Copy rest of wrapped byte
-    if (wCnt)
+    if (wCnt) {
       dcd_read_packet_memory(info.ptr_wrap, src, wCnt);
+    }
   }
 #else
   if ((cnt_lin & 0x01) && cnt_wrap) {

From 0eb0baed190ea671b74528942e4fda87acd259a8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 25 Jul 2024 11:53:42 +0700
Subject: [PATCH 085/204] fsdev: remove unused _setup_packet

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 38 ++++++++-----------
 1 file changed, 16 insertions(+), 22 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 8eb4633513..602b220ab2 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -168,11 +168,8 @@ typedef struct {
 } ep_alloc_t;
 
 static xfer_ctl_t xfer_status[CFG_TUD_ENDPPOINT_MAX][2];
-
 static ep_alloc_t ep_alloc_status[FSDEV_EP_COUNT];
 
-static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[6];
-
 static uint8_t remoteWakeCountdown; // When wake is requested
 
 //--------------------------------------------------------------------+
@@ -386,18 +383,28 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
   // Verify the CTR_RX bit is set. This was in the ST Micro code,
   // but I'm not sure it's actually necessary?
   if ((wEPRegVal & USB_EP_CTR_RX) == 0U) {
-    // TU_ASSERT(false, );
     return;
   }
 
-  if ((ep_addr == 0U) && ((wEPRegVal & USB_EP_SETUP) != 0U)) {
+  if (wEPRegVal & USB_EP_SETUP) {
     /* Setup packet */
     uint32_t count = pcd_get_ep_rx_cnt(USB, EPindex);
     // Setup packet should always be 8 bytes. If not, ignore it, and try again.
     if (count == 8) {
-      // Must reset EP to NAK (in case it had been stalling) (though, maybe too late here)
+      // Must reset EP to NAK (in case it had been stalling)
       pcd_set_ep_rx_status(USB, 0u, USB_EP_RX_NAK);
       pcd_set_ep_tx_status(USB, 0u, USB_EP_TX_NAK);
+
+      // set both data toggle to 1
+      uint32_t regVal = pcd_get_endpoint(USB, 0);
+      if ((regVal & USB_EP_DTOG_TX) == 0) {
+        pcd_tx_dtog(USB, 0);
+      }
+
+      if ((regVal & USB_EP_DTOG_RX) == 0) {
+        pcd_rx_dtog(USB, 0);
+      }
+
 #ifdef FSDEV_BUS_32BIT
       dcd_event_setup_received(0, (uint8_t *)(USB_PMAADDR + pcd_get_ep_rx_address(USB, EPindex)), true);
 #else
@@ -405,17 +412,14 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
       // user memory, to allow for the 32-bit access that memcpy performs.
       uint8_t userMemBuf[8];
       dcd_read_packet_memory(userMemBuf, pcd_get_ep_rx_address(USB, EPindex), 8);
-      dcd_event_setup_received(0, (uint8_t *)userMemBuf, true);
+      dcd_event_setup_received(0, (uint8_t*) userMemBuf, true);
 #endif
-    } else {
-      TU_BREAKPOINT();
     }
   } else {
     // Clear RX CTR interrupt flag
     if (ep_addr != 0u) {
       pcd_clear_rx_ep_ctr(USB, EPindex);
     }
-
     uint32_t count;
     uint16_t addr;
     /* Read from correct register when ISOCHRONOUS (double buffered) */
@@ -553,18 +557,14 @@ void dcd_int_handler(uint8_t rhport) {
 
 // Invoked when a control transfer's status stage is complete.
 // May help DCD to prepare for next control transfer, this API is optional.
-void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const *request)
-{
+void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const *request) {
   (void)rhport;
 
   if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
       request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
       request->bRequest == TUSB_REQ_SET_ADDRESS) {
     uint8_t const dev_addr = (uint8_t)request->wValue;
-
-    // Setting new address after the whole request is complete
-    USB->DADDR &= ~USB_DADDR_ADD;
-    USB->DADDR |= dev_addr; // leave the enable bit set
+    USB->DADDR = (USB_DADDR_EF | dev_addr);
   }
 }
 
@@ -834,12 +834,6 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr)
   if (dir == TUSB_DIR_IN) {
     dcd_transmit_packet(xfer, ep_idx);
   } else {
-    // A setup token can occur immediately after an OUT STATUS packet so make sure we have a valid
-    // buffer for the control endpoint.
-    if (ep_idx == 0 && xfer->buffer == NULL) {
-      xfer->buffer = (uint8_t *)_setup_packet;
-    }
-
     uint32_t cnt = (uint32_t ) tu_min16(xfer->total_len, xfer->max_packet_size);
     uint16_t ep_reg = pcd_get_endpoint(USB, ep_idx);
 

From a5bc0430f75c4e2088690467b369db7e24bba97b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 25 Jul 2024 16:49:01 +0700
Subject: [PATCH 086/204] fix race condition where reset event cleaar setup
 count

---
 src/device/dcd.h  | 22 +++++++++-------------
 src/device/usbd.c | 11 +++++++----
 2 files changed, 16 insertions(+), 17 deletions(-)

diff --git a/src/device/dcd.h b/src/device/dcd.h
index 5356e9be1a..b25b470255 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -40,19 +40,15 @@
 //--------------------------------------------------------------------+
 
 typedef enum {
-  DCD_EVENT_INVALID = 0,
-  DCD_EVENT_BUS_RESET,
-  DCD_EVENT_UNPLUGGED,
-  DCD_EVENT_SOF,
-  DCD_EVENT_SUSPEND, // TODO LPM Sleep L1 support
-  DCD_EVENT_RESUME,
-
-  DCD_EVENT_SETUP_RECEIVED,
-  DCD_EVENT_XFER_COMPLETE,
-
-  // Not an DCD event, just a convenient way to defer ISR function
-  USBD_EVENT_FUNC_CALL,
-
+  DCD_EVENT_INVALID = 0,    // 0
+  DCD_EVENT_BUS_RESET,      // 1
+  DCD_EVENT_UNPLUGGED,      // 2
+  DCD_EVENT_SOF,            // 3
+  DCD_EVENT_SUSPEND,        // 4 TODO LPM Sleep L1 support
+  DCD_EVENT_RESUME,         // 5
+  DCD_EVENT_SETUP_RECEIVED, // 6
+  DCD_EVENT_XFER_COMPLETE,  // 7
+  USBD_EVENT_FUNC_CALL,     // 8 Not an DCD event, just a convenient way to defer ISR function
   DCD_EVENT_COUNT
 } dcd_eventid_t;
 
diff --git a/src/device/usbd.c b/src/device/usbd.c
index b932160061..d9b20d26d8 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -120,7 +120,6 @@ typedef struct {
   };
   volatile uint8_t cfg_num; // current active configuration (0x00 is not configured)
   uint8_t speed;
-  volatile uint8_t setup_count;
   volatile uint8_t sof_consumer;
 
   uint8_t itf2drv[CFG_TUD_INTERFACE_MAX];   // map interface number to driver (0xff is invalid)
@@ -131,6 +130,7 @@ typedef struct {
 }usbd_device_t;
 
 tu_static usbd_device_t _usbd_dev;
+static volatile uint8_t _usbd_queued_setup;
 
 //--------------------------------------------------------------------+
 // Class Driver
@@ -459,6 +459,7 @@ bool tud_init(uint8_t rhport) {
   TU_LOG_INT(CFG_TUD_LOG_LEVEL, sizeof(tu_edpt_stream_t));
 
   tu_varclr(&_usbd_dev);
+  _usbd_queued_setup = 0;
 
 #if OSAL_MUTEX_REQUIRED
   // Init device mutex
@@ -594,9 +595,10 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) {
         break;
 
       case DCD_EVENT_SETUP_RECEIVED:
-        _usbd_dev.setup_count--;
+        TU_ASSERT(_usbd_queued_setup > 0,);
+        _usbd_queued_setup--;
         TU_LOG_BUF(CFG_TUD_LOG_LEVEL, &event.setup_received, 8);
-        if (_usbd_dev.setup_count) {
+        if (_usbd_queued_setup) {
           TU_LOG_USBD("  Skipped since there is other SETUP in queue\r\n");
           break;
         }
@@ -1199,7 +1201,8 @@ TU_ATTR_FAST_FUNC void dcd_event_handler(dcd_event_t const* event, bool in_isr)
       break;
 
     case DCD_EVENT_SETUP_RECEIVED:
-      _usbd_dev.setup_count++;
+      // TU_ASSERT(event->setup_received.bRequest != 0,);
+      _usbd_queued_setup++;
       send = true;
       break;
 

From 02caf007723551f878ab3675c14681801f16354e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 25 Jul 2024 19:00:59 +0700
Subject: [PATCH 087/204] simplify btable rx/tx count/address access

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c |  20 +--
 src/portable/st/stm32_fsdev/fsdev_common.h    | 136 ++++++++++++------
 2 files changed, 98 insertions(+), 58 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 602b220ab2..927ecac857 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -129,21 +129,7 @@
 // Configuration
 //--------------------------------------------------------------------+
 
-// hardware limit endpoint
-#define FSDEV_EP_COUNT 8
 
-// If sharing with CAN, one can set this to be non-zero to give CAN space where it wants it
-// Both of these MUST be a multiple of 2, and are in byte units.
-#ifndef DCD_STM32_BTABLE_BASE
-#define DCD_STM32_BTABLE_BASE 0U
-#endif
-
-#ifndef DCD_STM32_BTABLE_SIZE
-#define DCD_STM32_BTABLE_SIZE (FSDEV_PMA_SIZE - DCD_STM32_BTABLE_BASE)
-#endif
-
-TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) + (DCD_STM32_BTABLE_SIZE)) <= (FSDEV_PMA_SIZE), "BTABLE does not fit in PMA RAM");
-TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) % 8) == 0, "BTABLE base must be aligned to 8 bytes");
 
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
@@ -231,7 +217,7 @@ void dcd_init(uint8_t rhport) {
 
 #if !defined(STM32G0) && !defined(STM32H5) && !defined(STM32U5)
   // BTABLE register does not exist any more on STM32G0, it is fixed to USB SRAM base address
-  USB->BTABLE = DCD_STM32_BTABLE_BASE;
+  USB->BTABLE = FSDEV_BTABLE_BASE;
 #endif
 
   USB->ISTR = 0; // Clear pending interrupts
@@ -289,7 +275,7 @@ static void handle_bus_reset(uint8_t rhport) {
   }
 
   // Reset PMA allocation
-  ep_buf_ptr = DCD_STM32_BTABLE_BASE + 8 * CFG_TUD_ENDPPOINT_MAX;
+  ep_buf_ptr = FSDEV_BTABLE_BASE + 8 * FSDEV_EP_COUNT;
 
   tusb_desc_endpoint_t ep0_desc = {
       .bLength = sizeof(tusb_desc_endpoint_t),
@@ -705,7 +691,7 @@ void dcd_edpt_close_all(uint8_t rhport)
   }
 
   // Reset PMA allocation
-  ep_buf_ptr = DCD_STM32_BTABLE_BASE + 8 * CFG_TUD_ENDPPOINT_MAX + 2 * CFG_TUD_ENDPOINT0_SIZE;
+  ep_buf_ptr = FSDEV_BTABLE_BASE + 8 * CFG_TUD_ENDPPOINT_MAX + 2 * CFG_TUD_ENDPOINT0_SIZE;
 }
 
 /**
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 920c17a04d..d0f928552e 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -34,6 +34,14 @@
 
 #include "stdint.h"
 
+// If sharing with CAN, one can set this to be non-zero to give CAN space where it wants it
+// Both of these MUST be a multiple of 2, and are in byte units.
+#ifndef FSDEV_BTABLE_BASE
+#define FSDEV_BTABLE_BASE 0U
+#endif
+
+TU_VERIFY_STATIC(FSDEV_BTABLE_BASE % 8 == 0, "BTABLE base must be aligned to 8 bytes");
+
 // FSDEV_PMA_SIZE is PMA buffer size in bytes.
 // - 512-byte devices, access with a stride of two words (use every other 16-bit address)
 // - 1024-byte devices, access with a stride of one word (use every 16-bit address)
@@ -41,15 +49,50 @@
 
 // For purposes of accessing the packet
 #if FSDEV_PMA_SIZE == 512
-  #define FSDEV_PMA_STRIDE  (2u)
+  #define FSDEV_PMA_STRIDE  (2u) // 1x16 bit access scheme
+  #define pma_aligned TU_ATTR_ALIGNED(4)
 #elif FSDEV_PMA_SIZE == 1024
-  #define FSDEV_PMA_STRIDE  (1u)
+  #define FSDEV_PMA_STRIDE  (1u) // 2x16 bit access scheme
+  #define pma_aligned
 #elif FSDEV_PMA_SIZE == 2048
   #ifndef FSDEV_BUS_32BIT
     #warning "FSDEV_PMA_SIZE is 2048, but FSDEV_BUS_32BIT is not defined"
   #endif
+  #define FSDEV_PMA_STRIDE  (1u) // 32 bit access scheme
+  #define pma_aligned
 #endif
 
+// hardware limit endpoint
+#define FSDEV_EP_COUNT 8
+
+// Buffer Table is located in Packet Memory Area (PMA) and therefore its address access is forced to either
+// 16-bit or 32-bit depending on FSDEV_BUS_32BIT.
+typedef struct {
+  union {
+    struct {
+      volatile pma_aligned uint16_t tx_addr;
+      volatile pma_aligned uint16_t tx_count;
+      volatile pma_aligned uint16_t rx_addr;
+      volatile pma_aligned uint16_t rx_count;
+    } ep16[FSDEV_EP_COUNT];
+
+    struct {
+      volatile uint32_t tx_count_addr;
+      volatile uint32_t rx_count_addr;
+    } ep32[FSDEV_EP_COUNT];
+  };
+} fsdev_btable_t;
+
+TU_VERIFY_STATIC(sizeof(fsdev_btable_t) == FSDEV_EP_COUNT*8*FSDEV_PMA_STRIDE, "size is not correct");
+TU_VERIFY_STATIC(FSDEV_BTABLE_BASE + FSDEV_EP_COUNT*8 <= FSDEV_PMA_SIZE, "BTABLE does not fit in PMA RAM");
+
+
+#define FSDEV_BTABLE ((volatile fsdev_btable_t*) (USB_PMAADDR+FSDEV_BTABLE_BASE))
+
+//--------------------------------------------------------------------+
+// Helper
+//--------------------------------------------------------------------+
+
 // The fsdev_bus_t type can be used for both register and PMA access necessities
 // For type-safety create a new macro for the volatile address of PMAADDR
 // The compiler should warn us if we cast it to a non-volatile type?
@@ -110,6 +153,21 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_endpoint(USB_TypeDef * USBx
   return *reg;
 }
 
+/**
+  * @brief  Sets address in an endpoint register.
+  * @param  USBx USB peripheral instance register address.
+  * @param  bEpIdx Endpoint Number.
+  * @param  bAddr Address.
+  * @retval None
+  */
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_address(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t bAddr) {
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
+  regVal &= USB_EPREG_MASK;
+  regVal |= bAddr;
+  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
+  pcd_set_endpoint(USBx, bEpIdx,regVal);
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_eptype(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wType) {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   regVal &= (uint32_t)USB_EP_T_MASK;
@@ -153,58 +211,47 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx,
   * @retval Counter value
   */
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx) {
-#ifdef FSDEV_BUS_32BIT
   (void) USBx;
-  return (pma32[2*bEpIdx] & 0x03FF0000) >> 16;
+  uint16_t count;
+#ifdef FSDEV_BUS_32BIT
+  count = (FSDEV_BTABLE->ep32[bEpIdx].tx_count_addr >> 16);
 #else
-  volatile const uint16_t *regPtr = pcd_ep_tx_cnt_ptr(USBx, bEpIdx);
-  return *regPtr & 0x3ffU;
+  count = FSDEV_BTABLE->ep16[bEpIdx].tx_count;
 #endif
+
+  return count & 0x3FFU;
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx) {
-#ifdef FSDEV_BUS_32BIT
   (void) USBx;
-  return (pma32[2*bEpIdx + 1] & 0x03FF0000) >> 16;
+  uint16_t count;
+#ifdef FSDEV_BUS_32BIT
+  count = (FSDEV_BTABLE->ep32[bEpIdx].rx_count_addr >> 16);
 #else
-  volatile const uint16_t *regPtr = pcd_ep_rx_cnt_ptr(USBx, bEpIdx);
-  return *regPtr & 0x3ffU;
+  count = FSDEV_BTABLE->ep16[bEpIdx].rx_count;
 #endif
+
+  return count & 0x3FFU;
 }
 
 #define pcd_get_ep_dbuf0_cnt pcd_get_ep_tx_cnt
 #define pcd_get_ep_dbuf1_cnt pcd_get_ep_rx_cnt
 
-/**
-  * @brief  Sets address in an endpoint register.
-  * @param  USBx USB peripheral instance register address.
-  * @param  bEpIdx Endpoint Number.
-  * @param  bAddr Address.
-  * @retval None
-  */
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_address(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t bAddr) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  regVal &= USB_EPREG_MASK;
-  regVal |= bAddr;
-  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
-  pcd_set_endpoint(USBx, bEpIdx,regVal);
-}
-
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx) {
-#ifdef FSDEV_BUS_32BIT
   (void) USBx;
-  return pma32[2*bEpIdx] & 0x0000FFFFu ;
+#ifdef FSDEV_BUS_32BIT
+  return FSDEV_BTABLE->ep32[bEpIdx].tx_count_addr & 0x0000FFFFu;
 #else
-  return *pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 0u);
+  return FSDEV_BTABLE->ep16[bEpIdx].tx_addr;
 #endif
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_address(USB_TypeDef * USBx, uint32_t bEpIdx) {
-#ifdef FSDEV_BUS_32BIT
   (void) USBx;
-  return pma32[2*bEpIdx + 1] & 0x0000FFFFu;
+#ifdef FSDEV_BUS_32BIT
+  return FSDEV_BTABLE->ep32[bEpIdx].rx_count_addr & 0x0000FFFFu;
 #else
-  return *pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 2u);
+  return FSDEV_BTABLE->ep16[bEpIdx].rx_addr;
 #endif
 }
 
@@ -212,20 +259,24 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_address(USB_TypeDef *
 #define pcd_get_ep_dbuf1_address pcd_get_ep_rx_address
 
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr) {
-#ifdef FSDEV_BUS_32BIT
   (void) USBx;
-  pma32[2*bEpIdx] = (pma32[2*bEpIdx] & 0xFFFF0000u) | (addr & 0x0000FFFCu);
+#ifdef FSDEV_BUS_32BIT
+  uint32_t count_addr = FSDEV_BTABLE->ep32[bEpIdx].tx_count_addr;
+  count_addr = (count_addr & 0xFFFF0000u) | (addr & 0x0000FFFCu);
+  FSDEV_BTABLE->ep32[bEpIdx].tx_count_addr = count_addr;
 #else
-  *pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 0u) = addr;
+  FSDEV_BTABLE->ep16[bEpIdx].tx_addr = addr;
 #endif
 }
 
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr) {
-#ifdef FSDEV_BUS_32BIT
   (void) USBx;
-  pma32[2*bEpIdx + 1] = (pma32[2*bEpIdx + 1] & 0xFFFF0000u) | (addr & 0x0000FFFCu);
+#ifdef FSDEV_BUS_32BIT
+  uint32_t count_addr = FSDEV_BTABLE->ep32[bEpIdx].rx_count_addr;
+  count_addr = (count_addr & 0xFFFF0000u) | (addr & 0x0000FFFCu);
+  FSDEV_BTABLE->ep32[bEpIdx].rx_count_addr = count_addr;
 #else
-  *pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 2u) = addr;
+  FSDEV_BTABLE->ep16[bEpIdx].rx_addr = addr;
 #endif
 }
 
@@ -233,12 +284,15 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_address(USB_TypeDef * USB
 #define pcd_set_ep_dbuf1_address pcd_set_ep_rx_address
 
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount) {
-#ifdef FSDEV_BUS_32BIT
   (void) USBx;
-  pma32[2*bEpIdx] = (pma32[2*bEpIdx] & ~0x03FF0000u) | ((wCount & 0x3FFu) << 16);
+#ifdef FSDEV_BUS_32BIT
+  uint32_t count_addr = FSDEV_BTABLE->ep32[bEpIdx].tx_count_addr;
+  count_addr = (count_addr & ~0x03FF0000u) | ((wCount & 0x3FFu) << 16);
+  FSDEV_BTABLE->ep32[bEpIdx].tx_count_addr = count_addr;
 #else
-  volatile uint16_t * reg = pcd_ep_tx_cnt_ptr(USBx, bEpIdx);
-  *reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
+  uint16_t count = FSDEV_BTABLE->ep16[bEpIdx].tx_count;
+  count = (count & ~0x3FFU) | (wCount & 0x3FFU);
+  FSDEV_BTABLE->ep16[bEpIdx].tx_count = count;
 #endif
 }
 

From 5122d6d109f8c4b31b6cbe29c685fad30a8961fe Mon Sep 17 00:00:00 2001
From: Brent Kowal <brent.kowal@analog.com>
Date: Thu, 25 Jul 2024 09:08:37 -0400
Subject: [PATCH 088/204] Combined DCD MUSB implementations

Combined the new MAX32 MUSB implementation with the existing (TI) implementation to provide generic code base for working the MUSB DCD peripheral.
 - Added abstraction calls for FIFO setup, EP registers, Ctrl registers and interrupt setup.
 - Combined TM4C and MSP432E into a single header file.
 - Created musb_max32.h, and removed the MAX32 specific C implementation.
 - Updated MAX32 build system to use dcd_musb.c.
 - Added MAX32 conditions for cdc_dual_ports example descriptors missed during first testing.
---
 .../cdc_dual_ports/src/usb_descriptors.c      |  12 +
 hw/bsp/max32650/family.cmake                  |   2 +-
 hw/bsp/max32650/family.mk                     |   2 +-
 hw/bsp/max32666/family.cmake                  |   2 +-
 hw/bsp/max32666/family.mk                     |   2 +-
 hw/bsp/max32690/family.cmake                  |   2 +-
 hw/bsp/max32690/family.mk                     |   2 +-
 hw/bsp/max78002/family.cmake                  |   2 +-
 hw/bsp/max78002/family.mk                     |   2 +-
 src/portable/analog/max32/dcd_max32.c         | 811 ------------------
 src/portable/mentor/musb/dcd_musb.c           | 436 ++++------
 src/portable/mentor/musb/hcd_musb.c           |  12 +-
 src/portable/mentor/musb/musb_max32.h         | 221 +++++
 src/portable/mentor/musb/musb_msp432e.h       |  40 -
 src/portable/mentor/musb/musb_ti.h            | 285 ++++++
 src/portable/mentor/musb/musb_tm4c.h          |  45 -
 src/portable/mentor/musb/musb_type.h          |  33 +
 17 files changed, 711 insertions(+), 1200 deletions(-)
 delete mode 100644 src/portable/analog/max32/dcd_max32.c
 create mode 100644 src/portable/mentor/musb/musb_max32.h
 delete mode 100644 src/portable/mentor/musb/musb_msp432e.h
 create mode 100644 src/portable/mentor/musb/musb_ti.h
 delete mode 100644 src/portable/mentor/musb/musb_tm4c.h

diff --git a/examples/device/cdc_dual_ports/src/usb_descriptors.c b/examples/device/cdc_dual_ports/src/usb_descriptors.c
index de2505c07f..808d784111 100644
--- a/examples/device/cdc_dual_ports/src/usb_descriptors.c
+++ b/examples/device/cdc_dual_ports/src/usb_descriptors.c
@@ -120,6 +120,18 @@ enum
   #define EPNUM_CDC_1_OUT     0x05
   #define EPNUM_CDC_1_IN      0x86
 
+#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
+      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
+  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_CDC_0_NOTIF   0x81
+  #define EPNUM_CDC_0_OUT     0x02
+  #define EPNUM_CDC_0_IN      0x83
+
+  #define EPNUM_CDC_1_NOTIF   0x84
+  #define EPNUM_CDC_1_OUT     0x05
+  #define EPNUM_CDC_1_IN      0x86
+
 #else
   #define EPNUM_CDC_0_NOTIF   0x81
   #define EPNUM_CDC_0_OUT     0x02
diff --git a/hw/bsp/max32650/family.cmake b/hw/bsp/max32650/family.cmake
index 129d99af87..92b68a1cd3 100644
--- a/hw/bsp/max32650/family.cmake
+++ b/hw/bsp/max32650/family.cmake
@@ -132,7 +132,7 @@ function(family_configure_example TARGET RTOS)
   # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_MAX32650 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
-    ${TOP}/src/portable/analog/max32/dcd_max32.c
+    ${TOP}/src/portable/mentor/musb/dcd_musb.c
     )
   target_compile_options(${TARGET} PRIVATE
     -Wno-error=strict-prototypes
diff --git a/hw/bsp/max32650/family.mk b/hw/bsp/max32650/family.mk
index 0718523c36..3592612165 100644
--- a/hw/bsp/max32650/family.mk
+++ b/hw/bsp/max32650/family.mk
@@ -62,7 +62,7 @@ flash: $(DEFAULT_FLASH)
 # -----------------
 PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
 SRC_C += \
-	src/portable/analog/max32/dcd_max32.c \
+	src/portable/mentor/musb/dcd_musb.c \
 	$(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/heap.c \
 	$(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/system_max32650.c \
 	$(MAX32_CMSIS)/Device/Maxim/MAX32650/Source/header_MAX32650.c \
diff --git a/hw/bsp/max32666/family.cmake b/hw/bsp/max32666/family.cmake
index ef2a2bb639..eb9d2175fb 100644
--- a/hw/bsp/max32666/family.cmake
+++ b/hw/bsp/max32666/family.cmake
@@ -127,7 +127,7 @@ function(family_configure_example TARGET RTOS)
   # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_MAX32666 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
-    ${TOP}/src/portable/analog/max32/dcd_max32.c
+    ${TOP}/src/portable/mentor/musb/dcd_musb.c
     )
   target_compile_options(${TARGET} PRIVATE
     -Wno-error=strict-prototypes
diff --git a/hw/bsp/max32666/family.mk b/hw/bsp/max32666/family.mk
index 31f81f014e..720d994efc 100644
--- a/hw/bsp/max32666/family.mk
+++ b/hw/bsp/max32666/family.mk
@@ -57,7 +57,7 @@ flash-msdk: $(BUILD)/$(PROJECT).elf
 # -----------------
 PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
 SRC_C += \
-	src/portable/analog/max32/dcd_max32.c \
+	src/portable/mentor/musb/dcd_musb.c \
 	$(MAX32_CMSIS)/Device/Maxim/MAX32665/Source/heap.c \
 	$(MAX32_CMSIS)/Device/Maxim/MAX32665/Source/system_max32665.c \
 	$(PERIPH_SRC)/SYS/mxc_assert.c \
diff --git a/hw/bsp/max32690/family.cmake b/hw/bsp/max32690/family.cmake
index d7a5629566..2a9422dbe4 100644
--- a/hw/bsp/max32690/family.cmake
+++ b/hw/bsp/max32690/family.cmake
@@ -132,7 +132,7 @@ function(family_configure_example TARGET RTOS)
   # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_MAX32690 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
-    ${TOP}/src/portable/analog/max32/dcd_max32.c
+    ${TOP}/src/portable/mentor/musb/dcd_musb.c
     )
   target_compile_options(${TARGET} PRIVATE
     -Wno-error=strict-prototypes
diff --git a/hw/bsp/max32690/family.mk b/hw/bsp/max32690/family.mk
index 9360a07c62..c533cf4a46 100644
--- a/hw/bsp/max32690/family.mk
+++ b/hw/bsp/max32690/family.mk
@@ -64,7 +64,7 @@ flash-msdk: $(BUILD)/$(PROJECT).elf
 # -----------------
 PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
 SRC_C += \
-	src/portable/analog/max32/dcd_max32.c \
+	src/portable/mentor/musb/dcd_musb.c \
 	$(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/heap.c \
 	$(MAX32_CMSIS)/Device/Maxim/MAX32690/Source/system_max32690.c \
 	$(PERIPH_SRC)/SYS/mxc_assert.c \
diff --git a/hw/bsp/max78002/family.cmake b/hw/bsp/max78002/family.cmake
index 83fd3007ff..090f1da43d 100644
--- a/hw/bsp/max78002/family.cmake
+++ b/hw/bsp/max78002/family.cmake
@@ -137,7 +137,7 @@ function(family_configure_example TARGET RTOS)
   # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_MAX78002 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
-    ${TOP}/src/portable/analog/max32/dcd_max32.c
+    ${TOP}/src/portable/mentor/musb/dcd_musb.c
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
   target_compile_options(${TARGET}-tinyusb PRIVATE
diff --git a/hw/bsp/max78002/family.mk b/hw/bsp/max78002/family.mk
index 8df8517da5..5297815de3 100644
--- a/hw/bsp/max78002/family.mk
+++ b/hw/bsp/max78002/family.mk
@@ -60,7 +60,7 @@ flash-msdk: $(BUILD)/$(PROJECT).elf
 # -----------------
 PERIPH_SRC = $(TOP)/$(MAX32_PERIPH)/Source
 SRC_C += \
-	src/portable/analog/max32/dcd_max32.c \
+	src/portable/mentor/musb/dcd_musb.c \
 	$(MAX32_CMSIS)/Device/Maxim/MAX78002/Source/heap.c \
 	$(MAX32_CMSIS)/Device/Maxim/MAX78002/Source/system_max78002.c \
 	$(PERIPH_SRC)/SYS/mxc_assert.c \
diff --git a/src/portable/analog/max32/dcd_max32.c b/src/portable/analog/max32/dcd_max32.c
deleted file mode 100644
index df616120ab..0000000000
--- a/src/portable/analog/max32/dcd_max32.c
+++ /dev/null
@@ -1,811 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2021 Koji KITAYAMA
- * Copyright (c) 2024 Brent Kowal (Analog Devices, Inc)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "tusb_option.h"
-
-#if CFG_TUD_ENABLED && \
-    TU_CHECK_MCU(OPT_MCU_MAX32690, OPT_MCU_MAX32650, OPT_MCU_MAX32666, OPT_MCU_MAX78002)
-
-  #if __GNUC__ > 8 && defined(__ARM_FEATURE_UNALIGNED)
-/* GCC warns that an address may be unaligned, even though
- * the target CPU has the capability for unaligned memory access. */
-_Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
-  #endif
-
-  #include "device/dcd.h"
-
-  #include "mxc_delay.h"
-  #include "mxc_device.h"
-  #include "mxc_sys.h"
-  #include "nvic_table.h"
-  #include "usbhs_regs.h"
-
-  #define USBHS_M31_CLOCK_RECOVERY
-
-  /*------------------------------------------------------------------
- * MACRO TYPEDEF CONSTANT ENUM DECLARATION
- *------------------------------------------------------------------*/
-  #define REQUEST_TYPE_INVALID (0xFFu)
-
-
-typedef union {
-  uint8_t u8;
-  uint16_t u16;
-  uint32_t u32;
-} hw_fifo_t;
-
-typedef struct TU_ATTR_PACKED {
-  void *buf;          /* the start address of a transfer data buffer */
-  uint16_t length;    /* the number of bytes in the buffer */
-  uint16_t remaining; /* the number of bytes remaining in the buffer */
-} pipe_state_t;
-
-typedef struct
-{
-  tusb_control_request_t setup_packet;
-  uint16_t remaining_ctrl; /* The number of bytes remaining in data stage of control transfer. */
-  int8_t status_out;
-  pipe_state_t pipe0;
-  pipe_state_t pipe[2][TUP_DCD_ENDPOINT_MAX - 1]; /* pipe[direction][endpoint number - 1] */
-  uint16_t pipe_buf_is_fifo[2];                   /* Bitmap. Each bit means whether 1:TU_FIFO or 0:POD. */
-} dcd_data_t;
-
-/*------------------------------------------------------------------
- * INTERNAL OBJECT & FUNCTION DECLARATION
- *------------------------------------------------------------------*/
-static dcd_data_t _dcd;
-
-
-static volatile void *edpt_get_fifo_ptr(unsigned epnum) {
-  volatile uint32_t *ptr;
-
-  ptr = &MXC_USBHS->fifo0;
-  ptr += epnum; /* Pointer math: multiplies ep by sizeof(uint32_t) */
-
-  return (volatile void *) ptr;
-}
-
-static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len) {
-  volatile hw_fifo_t *reg = (volatile hw_fifo_t *) fifo;
-  uintptr_t addr = (uintptr_t) buf;
-  while (len >= 4) {
-    reg->u32 = *(uint32_t const *) addr;
-    addr += 4;
-    len -= 4;
-  }
-  if (len >= 2) {
-    reg->u16 = *(uint16_t const *) addr;
-    addr += 2;
-    len -= 2;
-  }
-  if (len) {
-    reg->u8 = *(uint8_t const *) addr;
-  }
-}
-
-static void pipe_read_packet(void *buf, volatile void *fifo, unsigned len) {
-  volatile hw_fifo_t *reg = (volatile hw_fifo_t *) fifo;
-  uintptr_t addr = (uintptr_t) buf;
-  while (len >= 4) {
-    *(uint32_t *) addr = reg->u32;
-    addr += 4;
-    len -= 4;
-  }
-  if (len >= 2) {
-    *(uint16_t *) addr = reg->u16;
-    addr += 2;
-    len -= 2;
-  }
-  if (len) {
-    *(uint8_t *) addr = reg->u8;
-  }
-}
-
-static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigned len, unsigned dir) {
-  static const struct {
-    void (*tu_fifo_get_info)(tu_fifo_t *f, tu_fifo_buffer_info_t *info);
-    void (*tu_fifo_advance)(tu_fifo_t *f, uint16_t n);
-    void (*pipe_read_write)(void *buf, volatile void *fifo, unsigned len);
-  } ops[] = {
-      /* OUT */ {tu_fifo_get_write_info, tu_fifo_advance_write_pointer, pipe_read_packet},
-      /* IN  */ {tu_fifo_get_read_info, tu_fifo_advance_read_pointer, pipe_write_packet},
-  };
-  tu_fifo_buffer_info_t info;
-  ops[dir].tu_fifo_get_info(f, &info);
-  unsigned total_len = len;
-  len = TU_MIN(total_len, info.len_lin);
-  ops[dir].pipe_read_write(info.ptr_lin, fifo, len);
-  unsigned rem = total_len - len;
-  if (rem) {
-    len = TU_MIN(rem, info.len_wrap);
-    ops[dir].pipe_read_write(info.ptr_wrap, fifo, len);
-    rem -= len;
-  }
-  ops[dir].tu_fifo_advance(f, total_len - rem);
-}
-
-static void process_setup_packet(uint8_t rhport) {
-  uint32_t *p = (void *) &_dcd.setup_packet;
-  p[0] = MXC_USBHS->fifo0;
-  p[1] = MXC_USBHS->fifo0;
-
-  _dcd.pipe0.buf = NULL;
-  _dcd.pipe0.length = 0;
-  _dcd.pipe0.remaining = 0;
-  dcd_event_setup_received(rhport, (const uint8_t *) (uintptr_t) &_dcd.setup_packet, true);
-
-  const unsigned len = _dcd.setup_packet.wLength;
-  _dcd.remaining_ctrl = len;
-  const unsigned dir_in = tu_edpt_dir(_dcd.setup_packet.bmRequestType);
-  /* Clear RX FIFO and reverse the transaction direction */
-  if (len && dir_in) {
-    MXC_USBHS->index = 0;
-    MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_SERV_OUTPKTRDY;
-  }
-}
-
-static bool handle_xfer_in(uint_fast8_t ep_addr) {
-  unsigned epnum = tu_edpt_number(ep_addr);
-  unsigned epnum_minus1 = epnum - 1;
-  pipe_state_t *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
-  const unsigned rem = pipe->remaining;
-
-  //This function should not be for ep0
-  TU_ASSERT(epnum);
-
-  if (!rem) {
-    pipe->buf = NULL;
-    return true;
-  }
-
-  MXC_USBHS->index = epnum;
-  const unsigned mps = MXC_USBHS->inmaxp;
-  const unsigned len = TU_MIN(mps, rem);
-  void *buf = pipe->buf;
-  volatile void *fifo_ptr = edpt_get_fifo_ptr(epnum);
-  if (len) {
-    if (_dcd.pipe_buf_is_fifo[TUSB_DIR_IN] & TU_BIT(epnum_minus1)) {
-      pipe_read_write_packet_ff(buf, fifo_ptr, len, TUSB_DIR_IN);
-    } else {
-      pipe_write_packet(buf, fifo_ptr, len);
-      pipe->buf = buf + len;
-    }
-    pipe->remaining = rem - len;
-  }
-  MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_INPKTRDY;//TODO: Verify a | isn't needed
-
-  return false;
-}
-
-static bool handle_xfer_out(uint_fast8_t ep_addr) {
-  unsigned epnum = tu_edpt_number(ep_addr);
-  unsigned epnum_minus1 = epnum - 1;
-  pipe_state_t *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
-
-  //This function should not be for ep0
-  TU_ASSERT(epnum);
-
-  MXC_USBHS->index = epnum;
-
-  TU_ASSERT(MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY);
-
-  const unsigned mps = MXC_USBHS->outmaxp;
-  const unsigned rem = pipe->remaining;
-  const unsigned vld = MXC_USBHS->outcount;
-  const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
-  void *buf = pipe->buf;
-  volatile void *fifo_ptr = edpt_get_fifo_ptr(epnum);
-  if (len) {
-    if (_dcd.pipe_buf_is_fifo[TUSB_DIR_OUT] & TU_BIT(epnum_minus1)) {
-      pipe_read_write_packet_ff(buf, fifo_ptr, len, TUSB_DIR_OUT);
-    } else {
-      pipe_read_packet(buf, fifo_ptr, len);
-      pipe->buf = buf + len;
-    }
-    pipe->remaining = rem - len;
-  }
-  if ((len < mps) || (rem == len)) {
-    pipe->buf = NULL;
-    return NULL != buf;
-  }
-  MXC_USBHS->outcsrl = 0; /* Clear RXRDY bit *///TODO: Verify just setting to 0 is ok
-  return false;
-}
-
-static bool edpt_n_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes) {
-  (void) rhport;
-
-  unsigned epnum = tu_edpt_number(ep_addr);
-  unsigned epnum_minus1 = epnum - 1;
-  unsigned dir_in = tu_edpt_dir(ep_addr);
-
-  pipe_state_t *pipe = &_dcd.pipe[dir_in][epnum_minus1];
-  pipe->buf = buffer;
-  pipe->length = total_bytes;
-  pipe->remaining = total_bytes;
-
-  if (dir_in) {
-    handle_xfer_in(ep_addr);
-  } else {
-    MXC_USBHS->index = epnum;
-    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
-      MXC_USBHS->outcsrl = 0;//TODO: Verify just setting to 0 is ok
-    }
-  }
-  return true;
-}
-
-static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes) {
-  (void) rhport;
-  TU_ASSERT(total_bytes <= 64); /* Current implementation supports for only up to 64 bytes. */
-
-  const unsigned req = _dcd.setup_packet.bmRequestType;
-  TU_ASSERT(req != REQUEST_TYPE_INVALID || total_bytes == 0);
-
-  if (req == REQUEST_TYPE_INVALID || _dcd.status_out) {
-    /* STATUS OUT stage.
-     * MUSB controller automatically handles STATUS OUT packets without
-     * software helps. We do not have to do anything. And STATUS stage
-     * may have already finished and received the next setup packet
-     * without calling this function, so we have no choice but to
-     * invoke the callback function of status packet here. */
-    _dcd.status_out = 0;
-    if (req == REQUEST_TYPE_INVALID) {
-      dcd_event_xfer_complete(rhport, ep_addr, total_bytes, XFER_RESULT_SUCCESS, false);
-    } else {
-      /* The next setup packet has already been received, it aborts
-       * invoking callback function to avoid confusing TUSB stack. */
-      TU_LOG1("Drop CONTROL_STAGE_ACK\r\n");
-    }
-    return true;
-  }
-  const unsigned dir_in = tu_edpt_dir(ep_addr);
-  MXC_USBHS->index = 0;
-  if (tu_edpt_dir(req) == dir_in) { /* DATA stage */
-    TU_ASSERT(total_bytes <= _dcd.remaining_ctrl);
-    const unsigned rem = _dcd.remaining_ctrl;
-    const unsigned len = TU_MIN(TU_MIN(rem, 64), total_bytes);
-    volatile void *fifo_ptr = edpt_get_fifo_ptr(0);
-    if (dir_in) {
-      pipe_write_packet(buffer, fifo_ptr, len);
-
-      _dcd.pipe0.buf = buffer + len;
-      _dcd.pipe0.length = len;
-      _dcd.pipe0.remaining = 0;
-
-      _dcd.remaining_ctrl = rem - len;
-      if ((len < 64) || (rem == len)) {
-        _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID; /* Change to STATUS/SETUP stage */
-        _dcd.status_out = 1;
-        /* Flush TX FIFO and reverse the transaction direction. */
-        MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_INPKTRDY | MXC_F_USBHS_CSR0_DATA_END;
-      } else {
-        MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_INPKTRDY; /* Flush TX FIFO to return ACK. */
-      }
-    } else {
-      _dcd.pipe0.buf = buffer;
-      _dcd.pipe0.length = len;
-      _dcd.pipe0.remaining = len;
-      MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_SERV_OUTPKTRDY; /* Clear RX FIFO to return ACK. */
-    }
-  } else if (dir_in) {
-    _dcd.pipe0.buf = NULL;
-    _dcd.pipe0.length = 0;
-    _dcd.pipe0.remaining = 0;
-    /* Clear RX FIFO and reverse the transaction direction */
-    MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_SERV_OUTPKTRDY | MXC_F_USBHS_CSR0_DATA_END;
-  }
-  return true;
-}
-
-static void process_ep0(uint8_t rhport) {
-  MXC_USBHS->index = 0;
-  uint_fast8_t csrl = MXC_USBHS->csr0;
-
-  if (csrl & MXC_F_USBHS_CSR0_SENT_STALL) {
-    /* Returned STALL packet to HOST. */
-    MXC_USBHS->csr0 = 0; /* Clear STALL */
-    return;
-  }
-
-  unsigned req = _dcd.setup_packet.bmRequestType;
-  if (csrl & MXC_F_USBHS_CSR0_SETUP_END) {
-    TU_LOG1("   ABORT by the next packets\r\n");
-    MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_SERV_SETUP_END;
-    if (req != REQUEST_TYPE_INVALID && _dcd.pipe0.buf) {
-      /* DATA stage was aborted by receiving STATUS or SETUP packet. */
-      _dcd.pipe0.buf = NULL;
-      _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
-      dcd_event_xfer_complete(rhport,
-                              req & TUSB_DIR_IN_MASK,
-                              _dcd.pipe0.length - _dcd.pipe0.remaining,
-                              XFER_RESULT_SUCCESS, true);
-    }
-    req = REQUEST_TYPE_INVALID;
-    if (!(csrl & MXC_F_USBHS_CSR0_OUTPKTRDY)) return; /* Received SETUP packet */
-  }
-
-  if (csrl & MXC_F_USBHS_CSR0_OUTPKTRDY) {
-    /* Received SETUP or DATA OUT packet */
-    if (req == REQUEST_TYPE_INVALID) {
-      /* SETUP */
-      TU_ASSERT(sizeof(tusb_control_request_t) == MXC_USBHS->count0, );
-      process_setup_packet(rhport);
-      return;
-    }
-    if (_dcd.pipe0.buf) {
-      /* DATA OUT */
-      const unsigned vld = MXC_USBHS->count0;
-      const unsigned rem = _dcd.pipe0.remaining;
-      const unsigned len = TU_MIN(TU_MIN(rem, 64), vld);
-      volatile void *fifo_ptr = edpt_get_fifo_ptr(0);
-      pipe_read_packet(_dcd.pipe0.buf, fifo_ptr, len);
-
-      _dcd.pipe0.remaining = rem - len;
-      _dcd.remaining_ctrl -= len;
-
-      _dcd.pipe0.buf = NULL;
-      dcd_event_xfer_complete(rhport,
-                              tu_edpt_addr(0, TUSB_DIR_OUT),
-                              _dcd.pipe0.length - _dcd.pipe0.remaining,
-                              XFER_RESULT_SUCCESS, true);
-    }
-    return;
-  }
-
-  /* When CSRL0 is zero, it means that completion of sending a any length packet
-   * or receiving a zero length packet. */
-  if (req != REQUEST_TYPE_INVALID && !tu_edpt_dir(req)) {
-    /* STATUS IN */
-    if (*(const uint16_t *) (uintptr_t) &_dcd.setup_packet == 0x0500) {
-      /* The address must be changed on completion of the control transfer. */
-      MXC_USBHS->faddr = (uint8_t) _dcd.setup_packet.wValue;
-    }
-    _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
-    dcd_event_xfer_complete(rhport,
-                            tu_edpt_addr(0, TUSB_DIR_IN),
-                            _dcd.pipe0.length - _dcd.pipe0.remaining,
-                            XFER_RESULT_SUCCESS, true);
-    return;
-  }
-  if (_dcd.pipe0.buf) {
-    /* DATA IN */
-    _dcd.pipe0.buf = NULL;
-    dcd_event_xfer_complete(rhport,
-                            tu_edpt_addr(0, TUSB_DIR_IN),
-                            _dcd.pipe0.length - _dcd.pipe0.remaining,
-                            XFER_RESULT_SUCCESS, true);
-  }
-}
-
-static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr) {
-  bool completed;
-  const unsigned dir_in = tu_edpt_dir(ep_addr);
-  const unsigned epnum = tu_edpt_number(ep_addr);
-
-  MXC_USBHS->index = epnum;
-
-  if (dir_in) {
-    if (MXC_USBHS->incsrl & MXC_F_USBHS_INCSRL_SENTSTALL) {
-      MXC_USBHS->incsrl &= ~(MXC_F_USBHS_INCSRL_SENTSTALL | MXC_F_USBHS_INCSRL_UNDERRUN);
-      return;
-    }
-    completed = handle_xfer_in(ep_addr);
-  } else {
-    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_SENTSTALL) {
-      MXC_USBHS->outcsrl &= ~(MXC_F_USBHS_OUTCSRL_SENTSTALL | MXC_F_USBHS_OUTCSRL_OVERRUN);
-      return;
-    }
-    completed = handle_xfer_out(ep_addr);
-  }
-
-  if (completed) {
-    pipe_state_t *pipe = &_dcd.pipe[dir_in][tu_edpt_number(ep_addr) - 1];
-    dcd_event_xfer_complete(rhport, ep_addr,
-                            pipe->length - pipe->remaining,
-                            XFER_RESULT_SUCCESS, true);
-  }
-}
-
-static void process_bus_reset(uint8_t rhport) {
-  (void) rhport;
-  /* When bmRequestType is REQUEST_TYPE_INVALID(0xFF),
-   * a control transfer state is SETUP or STATUS stage. */
-  _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
-  _dcd.status_out = 0;
-  /* When pipe0.buf has not NULL, DATA stage works in progress. */
-  _dcd.pipe0.buf = NULL;
-
-  MXC_USBHS->intrinen = 1; /* Enable only EP0 */
-  MXC_USBHS->introuten = 0;
-
-
-  /* Clear FIFO settings */
-  for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
-    MXC_USBHS->index = i;
-    if (MXC_USBHS->incsrl & MXC_F_USBHS_INCSRL_INPKTRDY) {
-      /* Per musbhsfc_pg, only flush FIFO if IN packet loaded */
-      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_FLUSHFIFO;
-    }
-
-    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
-      /* Per musbhsfc_pg, only flush FIFO if OUT packet is ready */
-      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_FLUSHFIFO;
-    }
-  }
-  dcd_event_bus_reset(0, (MXC_USBHS->power & MXC_F_USBHS_POWER_HS_MODE) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL, true);
-}
-
-/*------------------------------------------------------------------
- * Device API
- *------------------------------------------------------------------*/
-
-void dcd_init(uint8_t rhport) {
-  (void) rhport;
-  MXC_USBHS->intrusben |= MXC_F_USBHS_INTRUSBEN_SUSPEND_INT_EN;
-
-  //Interrupt for VBUS disconnect
-  MXC_USBHS->mxm_int_en |= MXC_F_USBHS_MXM_INT_EN_NOVBUS;
-
-  NVIC_ClearPendingIRQ(USB_IRQn);
-  dcd_edpt_close_all(rhport);
-
-  //Unsuspend the MAC
-  MXC_USBHS->mxm_suspend = 0;
-
-  /* Configure PHY */
-  MXC_USBHS->m31_phy_xcfgi_31_0 = (0x1 << 3) | (0x1 << 11);
-  MXC_USBHS->m31_phy_xcfgi_63_32 = 0;
-  MXC_USBHS->m31_phy_xcfgi_95_64 = 0x1 << (72 - 64);
-  MXC_USBHS->m31_phy_xcfgi_127_96 = 0;
-
-
-  #ifdef USBHS_M31_CLOCK_RECOVERY
-  MXC_USBHS->m31_phy_noncry_rstb = 1;
-  MXC_USBHS->m31_phy_noncry_en = 1;
-  MXC_USBHS->m31_phy_outclksel = 0;
-  MXC_USBHS->m31_phy_coreclkin = 0;
-  MXC_USBHS->m31_phy_xtlsel = 2; /* Select 25 MHz clock */
-  #else
-  /* Use this option to feed the PHY a 30 MHz clock, which is them used as a PLL reference */
-  /* As it depends on the system core clock, this should probably be done at the SYS level */
-  MXC_USBHS->m31_phy_noncry_rstb = 0;
-  MXC_USBHS->m31_phy_noncry_en = 0;
-  MXC_USBHS->m31_phy_outclksel = 1;
-  MXC_USBHS->m31_phy_coreclkin = 1;
-  MXC_USBHS->m31_phy_xtlsel = 3; /* Select 30 MHz clock */
-  #endif
-  MXC_USBHS->m31_phy_pll_en = 1;
-  MXC_USBHS->m31_phy_oscouten = 1;
-
-  /* Reset PHY */
-  MXC_USBHS->m31_phy_ponrst = 0;
-  MXC_USBHS->m31_phy_ponrst = 1;
-
-  dcd_connect(rhport);
-}
-
-void dcd_int_enable(uint8_t rhport) {
-  (void) rhport;
-  NVIC_EnableIRQ(USB_IRQn);
-}
-
-void dcd_int_disable(uint8_t rhport) {
-  (void) rhport;
-  NVIC_DisableIRQ(USB_IRQn);
-}
-
-// Receive Set Address request, mcu port must also include status IN response
-void dcd_set_address(uint8_t rhport, uint8_t dev_addr) {
-  (void) rhport;
-  (void) dev_addr;
-  _dcd.pipe0.buf = NULL;
-  _dcd.pipe0.length = 0;
-  _dcd.pipe0.remaining = 0;
-  /* Clear RX FIFO to return ACK. */
-  MXC_USBHS->index = 0;
-  MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_SERV_OUTPKTRDY | MXC_F_USBHS_CSR0_DATA_END;
-}
-
-// Wake up host
-void dcd_remote_wakeup(uint8_t rhport) {
-  (void) rhport;
-  MXC_USBHS->power |= MXC_F_USBHS_POWER_RESUME;
-
-  #if CFG_TUSB_OS != OPT_OS_NONE
-  osal_task_delay(10);
-  #else
-  MXC_Delay(MXC_DELAY_MSEC(10));
-  #endif
-
-  MXC_USBHS->power &= ~MXC_F_USBHS_POWER_RESUME;
-}
-
-// Connect by enabling internal pull-up resistor on D+/D-
-void dcd_connect(uint8_t rhport) {
-  (void) rhport;
-  MXC_USBHS->power |= TUD_OPT_HIGH_SPEED ? MXC_F_USBHS_POWER_HS_ENABLE : 0;
-  MXC_USBHS->power |= MXC_F_USBHS_POWER_SOFTCONN;
-}
-
-// Disconnect by disabling internal pull-up resistor on D+/D-
-void dcd_disconnect(uint8_t rhport) {
-  (void) rhport;
-  MXC_USBHS->power &= ~MXC_F_USBHS_POWER_SOFTCONN;
-}
-
-void dcd_sof_enable(uint8_t rhport, bool en) {
-  (void) rhport;
-  (void) en;
-
-  // TODO implement later
-}
-
-//--------------------------------------------------------------------+
-// Endpoint API
-//--------------------------------------------------------------------+
-
-// Configure endpoint's registers according to descriptor
-bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc) {
-  (void) rhport;
-
-  const unsigned ep_addr = ep_desc->bEndpointAddress;
-  const unsigned epn = tu_edpt_number(ep_addr);
-  const unsigned dir_in = tu_edpt_dir(ep_addr);
-  const unsigned xfer = ep_desc->bmAttributes.xfer;
-  const unsigned mps = tu_edpt_packet_size(ep_desc);
-
-  TU_ASSERT(epn < TUP_DCD_ENDPOINT_MAX);
-
-  pipe_state_t *pipe = &_dcd.pipe[dir_in][epn - 1];
-  pipe->buf = NULL;
-  pipe->length = 0;
-  pipe->remaining = 0;
-
-  MXC_USBHS->index = epn;
-
-  if (dir_in) {
-    MXC_USBHS->inmaxp = mps;
-    MXC_USBHS->incsru = (MXC_F_USBHS_INCSRU_DPKTBUFDIS | MXC_F_USBHS_INCSRU_MODE) | ((xfer == TUSB_XFER_ISOCHRONOUS) ? MXC_F_USBHS_INCSRU_ISO : 0);
-    if (MXC_USBHS->incsrl & MXC_F_USBHS_INCSRL_INPKTRDY) {
-      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG | MXC_F_USBHS_INCSRL_FLUSHFIFO;
-    } else {
-      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG;
-    }
-    MXC_USBHS->intrinen |= TU_BIT(epn);
-  } else {
-    MXC_USBHS->outmaxp = mps;
-    MXC_USBHS->outcsru = (MXC_F_USBHS_OUTCSRU_DPKTBUFDIS) | ((xfer == TUSB_XFER_ISOCHRONOUS) ? MXC_F_USBHS_OUTCSRU_ISO : 0);
-    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
-      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG | MXC_F_USBHS_OUTCSRL_FLUSHFIFO;
-    } else {
-      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG;
-    }
-    MXC_USBHS->introuten |= TU_BIT(epn);
-  }
-
-  return true;
-}
-
-void dcd_edpt_close_all(uint8_t rhport) {
-  (void) rhport;
-
-  MXC_SYS_Crit_Enter();
-  MXC_USBHS->intrinen = 1; /* Enable only EP0 */
-  MXC_USBHS->introuten = 0;
-
-  for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
-    MXC_USBHS->index = i;
-    MXC_USBHS->inmaxp = 0;
-    MXC_USBHS->incsru = MXC_F_USBHS_INCSRU_DPKTBUFDIS;
-
-    if (MXC_USBHS->incsrl & MXC_F_USBHS_INCSRL_INPKTRDY) {
-      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG | MXC_F_USBHS_INCSRL_FLUSHFIFO;
-    } else {
-      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG;
-    }
-
-    MXC_USBHS->outmaxp = 0;
-    MXC_USBHS->outcsru = MXC_F_USBHS_OUTCSRU_DPKTBUFDIS;
-
-    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
-      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG | MXC_F_USBHS_OUTCSRL_FLUSHFIFO;
-    } else {
-      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG;
-    }
-  }
-  MXC_SYS_Crit_Exit();
-}
-
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
-  (void) rhport;
-  unsigned const epn = tu_edpt_number(ep_addr);
-  unsigned const dir_in = tu_edpt_dir(ep_addr);
-
-  MXC_SYS_Crit_Enter();
-  MXC_USBHS->index = epn;
-  if (dir_in) {
-    MXC_USBHS->intrinen &= ~TU_BIT(epn);
-    MXC_USBHS->inmaxp = 0;
-    MXC_USBHS->incsru = MXC_F_USBHS_INCSRU_DPKTBUFDIS;
-    if (MXC_USBHS->incsrl & MXC_F_USBHS_INCSRL_INPKTRDY) {
-      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG | MXC_F_USBHS_INCSRL_FLUSHFIFO;
-    } else {
-      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG;
-    }
-  } else {
-    MXC_USBHS->introuten &= ~TU_BIT(epn);
-    MXC_USBHS->outmaxp = 0;
-    MXC_USBHS->outcsru = MXC_F_USBHS_OUTCSRU_DPKTBUFDIS;
-    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
-      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG | MXC_F_USBHS_OUTCSRL_FLUSHFIFO;
-    } else {
-      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG;
-    }
-  }
-  MXC_SYS_Crit_Exit();
-}
-
-// Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack
-bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes) {
-  (void) rhport;
-  bool ret;
-  unsigned const epnum = tu_edpt_number(ep_addr);
-  MXC_SYS_Crit_Enter();
-  if (epnum) {
-    _dcd.pipe_buf_is_fifo[tu_edpt_dir(ep_addr)] &= ~TU_BIT(epnum - 1);
-    ret = edpt_n_xfer(rhport, ep_addr, buffer, total_bytes);
-  } else
-    ret = edpt0_xfer(rhport, ep_addr, buffer, total_bytes);
-  MXC_SYS_Crit_Exit();
-  return ret;
-}
-
-// Submit a transfer where is managed by FIFO, When complete dcd_event_xfer_complete() is invoked to notify the stack - optional, however, must be listed in usbd.c
-bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t *ff, uint16_t total_bytes) {
-  (void) rhport;
-  bool ret;
-  unsigned const epnum = tu_edpt_number(ep_addr);
-  TU_ASSERT(epnum);
-  MXC_SYS_Crit_Enter();
-  _dcd.pipe_buf_is_fifo[tu_edpt_dir(ep_addr)] |= TU_BIT(epnum - 1);
-  ret = edpt_n_xfer(rhport, ep_addr, (uint8_t *) ff, total_bytes);
-  MXC_SYS_Crit_Exit();
-  return ret;
-}
-
-// Stall endpoint
-void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
-  (void) rhport;
-  unsigned const epn = tu_edpt_number(ep_addr);
-  MXC_SYS_Crit_Enter();
-  MXC_USBHS->index = epn;
-  if (0 == epn) {
-    if (!ep_addr) { /* Ignore EP80 */
-      _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
-      _dcd.pipe0.buf = NULL;
-      MXC_USBHS->csr0 = MXC_F_USBHS_CSR0_SEND_STALL;
-    }
-  } else {
-    if (tu_edpt_dir(ep_addr)) { /* IN */
-      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_SENDSTALL;
-    } else { /* OUT */
-      TU_ASSERT(!(MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY), );
-      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_SENDSTALL;
-    }
-  }
-  MXC_SYS_Crit_Exit();
-}
-
-// clear stall, data toggle is also reset to DATA0
-void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
-  (void) rhport;
-  unsigned const epn = tu_edpt_number(ep_addr);
-  MXC_SYS_Crit_Enter();
-  MXC_USBHS->index = epn;
-  if (tu_edpt_dir(ep_addr)) { /* IN */
-    /* IN endpoint */
-    if (MXC_USBHS->incsrl & MXC_F_USBHS_INCSRL_INPKTRDY) {
-      /* Per musbhsfc_pg, only flush FIFO if IN packet loaded */
-      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG | MXC_F_USBHS_INCSRL_FLUSHFIFO;
-    } else {
-      MXC_USBHS->incsrl = MXC_F_USBHS_INCSRL_CLRDATATOG;
-    }
-  } else { /* OUT */
-    /* Otherwise, must be OUT endpoint */
-    if (MXC_USBHS->outcsrl & MXC_F_USBHS_OUTCSRL_OUTPKTRDY) {
-      /* Per musbhsfc_pg, only flush FIFO if OUT packet is ready */
-      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG | MXC_F_USBHS_OUTCSRL_FLUSHFIFO;
-    } else {
-      MXC_USBHS->outcsrl = MXC_F_USBHS_OUTCSRL_CLRDATATOG;
-    }
-  }
-  MXC_SYS_Crit_Exit();
-}
-
-/*-------------------------------------------------------------------
- * ISR
- *-------------------------------------------------------------------*/
-void dcd_int_handler(uint8_t rhport) {
-  uint_fast8_t is, txis, rxis;
-  uint32_t mxm_int, mxm_int_en, mxm_is;
-  uint32_t saved_index;
-
-  /* Save current index register */
-  saved_index = MXC_USBHS->index;
-
-  is = MXC_USBHS->intrusb;   /* read and clear interrupt status */
-  txis = MXC_USBHS->intrin;  /* read and clear interrupt status */
-  rxis = MXC_USBHS->introut; /* read and clear interrupt status */
-
-  /* These USB interrupt flags are W1C. */
-  /* Order of volatile accesses must be separated for IAR */
-  mxm_int = MXC_USBHS->mxm_int;
-  mxm_int_en = MXC_USBHS->mxm_int_en;
-  mxm_is = mxm_int & mxm_int_en;
-  MXC_USBHS->mxm_int = mxm_is;
-
-  is &= MXC_USBHS->intrusben; /* Clear disabled interrupts */
-
-  if (mxm_is & MXC_F_USBHS_MXM_INT_NOVBUS) {
-    dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true);
-  }
-  if (is & MXC_F_USBHS_INTRUSB_SOF_INT) {
-    dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
-  }
-  if (is & MXC_F_USBHS_INTRUSB_RESET_INT) {
-    process_bus_reset(rhport);
-  }
-  if (is & MXC_F_USBHS_INTRUSB_RESUME_INT) {
-    dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
-  }
-  if (is & MXC_F_USBHS_INTRUSB_SUSPEND_INT) {
-    dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
-  }
-
-  txis &= MXC_USBHS->intrinen; /* Clear disabled interrupts */
-  if (txis & MXC_F_USBHS_INTRIN_EP0_IN_INT) {
-    process_ep0(rhport);
-    txis &= ~TU_BIT(0);
-  }
-  while (txis) {
-    unsigned const num = __builtin_ctz(txis);
-    process_edpt_n(rhport, tu_edpt_addr(num, TUSB_DIR_IN));
-    txis &= ~TU_BIT(num);
-  }
-  rxis &= MXC_USBHS->introuten; /* Clear disabled interrupts */
-  while (rxis) {
-    unsigned const num = __builtin_ctz(rxis);
-    process_edpt_n(rhport, tu_edpt_addr(num, TUSB_DIR_OUT));
-    rxis &= ~TU_BIT(num);
-  }
-
-  /* Restore register index before exiting ISR */
-  MXC_USBHS->index = saved_index;
-}
-
-#endif
diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index a817c5d6e8..ee36656fd6 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -2,6 +2,7 @@
  * The MIT License (MIT)
  *
  * Copyright (c) 2021 Koji KITAYAMA
+ * Copyright (c) 2024, Brent Kowal (Analog Devices, Inc)
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -26,8 +27,7 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUD_ENABLED && \
-  TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
+#if CFG_TUD_ENABLED
 
 #if __GNUC__ > 8 && defined(__ARM_FEATURE_UNALIGNED)
 /* GCC warns that an address may be unaligned, even though
@@ -35,43 +35,30 @@
 _Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
 #endif
 
+#include "musb_type.h"
 #include "device/dcd.h"
 
-#if TU_CHECK_MCU(OPT_MCU_MSP432E4)
-  #include "musb_msp432e.h"
-
-#elif TU_CHECK_MCU(OPT_MCU_TM4C123, OPT_MCU_TM4C129)
-  #include "musb_tm4c.h"
-
-  // HACK generalize later
-  #include "musb_type.h"
-  #define FIFO0_WORD FIFO0
-  #define FIFO1_WORD FIFO1
-
+// Following symbols must be defined by port header
+// - musb_dcd_int_enable/disable/clear/get_enable
+// - musb_dcd_int_handler_enter/exit
+// - musb_dcd_epn_regs: Get memory mapped struct of end point registers
+// - musb_dcd_ep0_regs: Get memory mapped struct of EP0 registers
+// - musb_dcd_ctl_regs: Get memory mapped struct of control registers
+// - musb_dcd_ep_get_fifo_ptr: Gets the address of the provided EP's FIFO
+// - musb_dcd_setup_fifo/reset_fifo: Configuration of the EP's FIFO
+#if TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
+  #include "musb_ti.h"
+#elif TU_CHECK_MCU(OPT_MCU_MAX32690, OPT_MCU_MAX32650, OPT_MCU_MAX32666, OPT_MCU_MAX78002)
+  #include "musb_max32.h"
 #else
-  #error "Unsupported MCUs"
+  #error "Unsupported MCU"
 #endif
 
 /*------------------------------------------------------------------
  * MACRO TYPEDEF CONSTANT ENUM DECLARATION
  *------------------------------------------------------------------*/
-#define REQUEST_TYPE_INVALID  (0xFFu)
 
-typedef struct {
-  uint_fast16_t beg; /* offset of including first element */
-  uint_fast16_t end; /* offset of excluding the last element */
-} free_block_t;
-
-typedef struct TU_ATTR_PACKED {
-  uint16_t TXMAXP;
-  uint8_t  TXCSRL;
-  uint8_t  TXCSRH;
-  uint16_t RXMAXP;
-  uint8_t  RXCSRL;
-  uint8_t  RXCSRH;
-  uint16_t RXCOUNT;
-  uint16_t RESERVED[3];
-} hw_endpoint_t;
+#define REQUEST_TYPE_INVALID  (0xFFu)
 
 typedef union {
   uint8_t   u8;
@@ -92,7 +79,7 @@ typedef struct
   uint16_t     remaining_ctrl; /* The number of bytes remaining in data stage of control transfer. */
   int8_t       status_out;
   pipe_state_t pipe0;
-  pipe_state_t pipe[2][7];   /* pipe[direction][endpoint number - 1] */
+  pipe_state_t pipe[2][TUP_DCD_ENDPOINT_MAX-1];   /* pipe[direction][endpoint number - 1] */
   uint16_t     pipe_buf_is_fifo[2]; /* Bitmap. Each bit means whether 1:TU_FIFO or 0:POD. */
 } dcd_data_t;
 
@@ -102,126 +89,6 @@ typedef struct
 static dcd_data_t _dcd;
 
 
-static inline free_block_t *find_containing_block(free_block_t *beg, free_block_t *end, uint_fast16_t addr)
-{
-  free_block_t *cur = beg;
-  for (; cur < end && ((addr < cur->beg) || (cur->end <= addr)); ++cur) ;
-  return cur;
-}
-
-static inline int update_free_block_list(free_block_t *blks, unsigned num, uint_fast16_t addr, uint_fast16_t size)
-{
-  free_block_t *p = find_containing_block(blks, blks + num, addr);
-  TU_ASSERT(p != blks + num, -2);
-  if (p->beg == addr) {
-    /* Shrink block */
-    p->beg = addr + size;
-    if (p->beg != p->end) return 0;
-    /* remove block */
-    free_block_t *end = blks + num;
-    while (p + 1 < end) {
-      *p = *(p + 1);
-      ++p;
-    }
-    return -1;
-  } else {
-    /* Split into 2 blocks */
-    free_block_t tmp = {
-      .beg = addr + size,
-      .end = p->end
-    };
-    p->end = addr;
-    if (p->beg == p->end) {
-      if (tmp.beg != tmp.end) {
-        *p = tmp;
-        return 0;
-      }
-      /* remove block */
-      free_block_t *end = blks + num;
-      while (p + 1 < end) {
-        *p = *(p + 1);
-        ++p;
-      }
-      return -1;
-    }
-    if (tmp.beg == tmp.end) return 0;
-    blks[num] = tmp;
-    return 1;
-  }
-}
-
-static inline unsigned free_block_size(free_block_t const *blk)
-{
-  return blk->end - blk->beg;
-}
-
-#if 0
-static inline void print_block_list(free_block_t const *blk, unsigned num)
-{
-  TU_LOG1("*************\r\n");
-  for (unsigned i = 0; i < num; ++i) {
-    TU_LOG1(" Blk%u %u %u\r\n", i, blk->beg, blk->end);
-    ++blk;
-  }
-}
-#else
-#define print_block_list(a,b)
-#endif
-
-static unsigned find_free_memory(uint_fast16_t size_in_log2_minus3)
-{
-  free_block_t free_blocks[2 * (TUP_DCD_ENDPOINT_MAX - 1)];
-  unsigned num_blocks = 1;
-
-  /* Initialize free memory block list */
-  free_blocks[0].beg = 64 / 8;
-  free_blocks[0].end = (4 << 10) / 8; /* 4KiB / 8 bytes */
-  for (int i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
-    uint_fast16_t addr;
-    int num;
-    USB0->EPIDX = i;
-    addr = USB0->TXFIFOADD;
-    if (addr) {
-      unsigned sz  = USB0->TXFIFOSZ;
-      unsigned sft = (sz & USB_TXFIFOSZ_SIZE_M) + ((sz & USB_TXFIFOSZ_DPB) ? 1: 0);
-      num = update_free_block_list(free_blocks, num_blocks, addr, 1 << sft);
-      TU_ASSERT(-2 < num, 0);
-      num_blocks += num;
-      print_block_list(free_blocks, num_blocks);
-    }
-    addr = USB0->RXFIFOADD;
-    if (addr) {
-      unsigned sz  = USB0->RXFIFOSZ;
-      unsigned sft = (sz & USB_RXFIFOSZ_SIZE_M) + ((sz & USB_RXFIFOSZ_DPB) ? 1: 0);
-      num = update_free_block_list(free_blocks, num_blocks, addr, 1 << sft);
-      TU_ASSERT(-2 < num, 0);
-      num_blocks += num;
-      print_block_list(free_blocks, num_blocks);
-    }
-  }
-  print_block_list(free_blocks, num_blocks);
-
-  /* Find the best fit memory block */
-  uint_fast16_t size_in_8byte_unit = 1 << size_in_log2_minus3;
-  free_block_t const *min = NULL;
-  uint_fast16_t    min_sz = 0xFFFFu;
-  free_block_t const *end = &free_blocks[num_blocks];
-  for (free_block_t const *cur = &free_blocks[0]; cur < end; ++cur) {
-    uint_fast16_t sz = free_block_size(cur);
-    if (sz < size_in_8byte_unit) continue;
-    if (size_in_8byte_unit == sz) return cur->beg;
-    if (sz < min_sz) min = cur;
-  }
-  TU_ASSERT(min, 0);
-  return min->beg;
-}
-
-static inline volatile hw_endpoint_t* edpt_regs(unsigned epnum_minus1)
-{
-  volatile hw_endpoint_t *regs = (volatile hw_endpoint_t*)((uintptr_t)&USB0->TXMAXP1);
-  return regs + epnum_minus1;
-}
-
 static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
 {
   volatile hw_fifo_t *reg = (volatile hw_fifo_t*)fifo;
@@ -287,8 +154,10 @@ static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigne
 static void process_setup_packet(uint8_t rhport)
 {
   uint32_t *p = (void*)&_dcd.setup_packet;
-  p[0]        = USB0->FIFO0_WORD;
-  p[1]        = USB0->FIFO0_WORD;
+  volatile uint32_t *fifo_ptr = musb_dcd_ep_get_fifo_ptr(rhport, 0);
+  volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
+  p[0]        = *fifo_ptr;
+  p[1]        = *fifo_ptr;
 
   _dcd.pipe0.buf       = NULL;
   _dcd.pipe0.length    = 0;
@@ -299,12 +168,13 @@ static void process_setup_packet(uint8_t rhport)
   _dcd.remaining_ctrl   = len;
   const unsigned dir_in = tu_edpt_dir(_dcd.setup_packet.bmRequestType);
   /* Clear RX FIFO and reverse the transaction direction */
-  if (len && dir_in) USB0->CSRL0 = USB_CSRL0_RXRDYC;
+  if (len && dir_in) ep0_regs->CSRL0 = USB_CSRL0_RXRDYC;
 }
 
-static bool handle_xfer_in(uint_fast8_t ep_addr)
+static bool handle_xfer_in(uint8_t rhport, uint_fast8_t ep_addr)
 {
-  unsigned epnum_minus1 = tu_edpt_number(ep_addr) - 1;
+  unsigned epnum = tu_edpt_number(ep_addr);
+  unsigned epnum_minus1 = epnum - 1;
   pipe_state_t  *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
   const unsigned rem  = pipe->remaining;
 
@@ -313,30 +183,32 @@ static bool handle_xfer_in(uint_fast8_t ep_addr)
     return true;
   }
 
-  volatile hw_endpoint_t *regs = edpt_regs(epnum_minus1);
+  volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
   const unsigned mps = regs->TXMAXP;
   const unsigned len = TU_MIN(mps, rem);
   void          *buf = pipe->buf;
+  volatile void *fifo_ptr = musb_dcd_ep_get_fifo_ptr(rhport, epnum);
   // TU_LOG1("   %p mps %d len %d rem %d\r\n", buf, mps, len, rem);
   if (len) {
     if (_dcd.pipe_buf_is_fifo[TUSB_DIR_IN] & TU_BIT(epnum_minus1)) {
-      pipe_read_write_packet_ff(buf, &USB0->FIFO1_WORD + epnum_minus1, len, TUSB_DIR_IN);
+      pipe_read_write_packet_ff(buf, fifo_ptr, len, TUSB_DIR_IN);
     } else {
-      pipe_write_packet(buf, &USB0->FIFO1_WORD + epnum_minus1, len);
+      pipe_write_packet(buf, fifo_ptr, len);
       pipe->buf       = buf + len;
     }
     pipe->remaining = rem - len;
   }
   regs->TXCSRL = USB_TXCSRL1_TXRDY;
-  // TU_LOG1(" TXCSRL%d = %x %d\r\n", epnum_minus1 + 1, regs->TXCSRL, rem - len);
+  // TU_LOG1(" TXCSRL%d = %x %d\r\n", epnum, regs->TXCSRL, rem - len);
   return false;
 }
 
-static bool handle_xfer_out(uint_fast8_t ep_addr)
+static bool handle_xfer_out(uint8_t rhport, uint_fast8_t ep_addr)
 {
-  unsigned epnum_minus1 = tu_edpt_number(ep_addr) - 1;
+  unsigned epnum = tu_edpt_number(ep_addr);
+  unsigned epnum_minus1 = epnum - 1;
   pipe_state_t  *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
-  volatile hw_endpoint_t *regs = edpt_regs(epnum_minus1);
+  volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
   // TU_LOG1(" RXCSRL%d = %x\r\n", epnum_minus1 + 1, regs->RXCSRL);
 
   TU_ASSERT(regs->RXCSRL & USB_RXCSRL1_RXRDY);
@@ -346,11 +218,12 @@ static bool handle_xfer_out(uint_fast8_t ep_addr)
   const unsigned vld = regs->RXCOUNT;
   const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf = pipe->buf;
+  volatile void *fifo_ptr = musb_dcd_ep_get_fifo_ptr(rhport, epnum);
   if (len) {
     if (_dcd.pipe_buf_is_fifo[TUSB_DIR_OUT] & TU_BIT(epnum_minus1)) {
-      pipe_read_write_packet_ff(buf, &USB0->FIFO1_WORD + epnum_minus1, len, TUSB_DIR_OUT);
+      pipe_read_write_packet_ff(buf, fifo_ptr, len, TUSB_DIR_OUT);
     } else {
-      pipe_read_packet(buf, &USB0->FIFO1_WORD + epnum_minus1, len);
+      pipe_read_packet(buf, fifo_ptr, len);
       pipe->buf       = buf + len;
     }
     pipe->remaining = rem - len;
@@ -365,9 +238,8 @@ static bool handle_xfer_out(uint_fast8_t ep_addr)
 
 static bool edpt_n_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
 {
-  (void)rhport;
-
-  unsigned epnum_minus1 = tu_edpt_number(ep_addr) - 1;
+  unsigned epnum = tu_edpt_number(ep_addr);
+  unsigned epnum_minus1 = epnum - 1;
   unsigned dir_in       = tu_edpt_dir(ep_addr);
 
   pipe_state_t *pipe = &_dcd.pipe[dir_in][epnum_minus1];
@@ -376,9 +248,9 @@ static bool edpt_n_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16
   pipe->remaining    = total_bytes;
 
   if (dir_in) {
-    handle_xfer_in(ep_addr);
+    handle_xfer_in(rhport, ep_addr);
   } else {
-    volatile hw_endpoint_t *regs = edpt_regs(epnum_minus1);
+    volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
     if (regs->RXCSRL & USB_RXCSRL1_RXRDY) regs->RXCSRL = 0;
   }
   return true;
@@ -388,7 +260,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
 {
   (void)rhport;
   TU_ASSERT(total_bytes <= 64); /* Current implementation supports for only up to 64 bytes. */
-
+  volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
   const unsigned req = _dcd.setup_packet.bmRequestType;
   TU_ASSERT(req != REQUEST_TYPE_INVALID || total_bytes == 0);
 
@@ -399,7 +271,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
      * may have already finished and received the next setup packet
      * without calling this function, so we have no choice but to
      * invoke the callback function of status packet here. */
-    // TU_LOG1(" STATUS OUT USB0->CSRL0 = %x\r\n", USB0->CSRL0);
+    // TU_LOG1(" STATUS OUT ep0_regs->CSRL0 = %x\r\n", ep0_regs->CSRL0);
     _dcd.status_out = 0;
     if (req == REQUEST_TYPE_INVALID) {
       dcd_event_xfer_complete(rhport, ep_addr, total_bytes, XFER_RESULT_SUCCESS, false);
@@ -415,8 +287,9 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
     TU_ASSERT(total_bytes <= _dcd.remaining_ctrl);
     const unsigned rem = _dcd.remaining_ctrl;
     const unsigned len = TU_MIN(TU_MIN(rem, 64), total_bytes);
+    volatile void *fifo_ptr = musb_dcd_ep_get_fifo_ptr(rhport, 0);
     if (dir_in) {
-      pipe_write_packet(buffer, &USB0->FIFO0_WORD, len);
+      pipe_write_packet(buffer, fifo_ptr, len);
 
       _dcd.pipe0.buf       = buffer + len;
       _dcd.pipe0.length    = len;
@@ -427,45 +300,46 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
         _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID; /* Change to STATUS/SETUP stage */
         _dcd.status_out = 1;
         /* Flush TX FIFO and reverse the transaction direction. */
-        USB0->CSRL0 = USB_CSRL0_TXRDY | USB_CSRL0_DATAEND;
+        ep0_regs->CSRL0 = USB_CSRL0_TXRDY | USB_CSRL0_DATAEND;
       } else {
-        USB0->CSRL0 = USB_CSRL0_TXRDY; /* Flush TX FIFO to return ACK. */
+        ep0_regs->CSRL0 = USB_CSRL0_TXRDY; /* Flush TX FIFO to return ACK. */
       }
-      // TU_LOG1(" IN USB0->CSRL0 = %x\r\n", USB0->CSRL0);
+      // TU_LOG1(" IN ep0_regs->CSRL0 = %x\r\n", ep0_regs->CSRL0);
     } else {
-      // TU_LOG1(" OUT USB0->CSRL0 = %x\r\n", USB0->CSRL0);
+      // TU_LOG1(" OUT ep0_regs->CSRL0 = %x\r\n", ep0_regs->CSRL0);
       _dcd.pipe0.buf       = buffer;
       _dcd.pipe0.length    = len;
       _dcd.pipe0.remaining = len;
-      USB0->CSRL0 = USB_CSRL0_RXRDYC; /* Clear RX FIFO to return ACK. */
+      ep0_regs->CSRL0 = USB_CSRL0_RXRDYC; /* Clear RX FIFO to return ACK. */
     }
   } else if (dir_in) {
-    // TU_LOG1(" STATUS IN USB0->CSRL0 = %x\r\n", USB0->CSRL0);
+    // TU_LOG1(" STATUS IN ep0_regs->CSRL0  = %x\r\n", ep0_regs->CSRL0);
     _dcd.pipe0.buf = NULL;
     _dcd.pipe0.length    = 0;
     _dcd.pipe0.remaining = 0;
     /* Clear RX FIFO and reverse the transaction direction */
-    USB0->CSRL0 = USB_CSRL0_RXRDYC | USB_CSRL0_DATAEND;
+    ep0_regs->CSRL0 = USB_CSRL0_RXRDYC | USB_CSRL0_DATAEND;
   }
   return true;
 }
 
 static void process_ep0(uint8_t rhport)
 {
-  uint_fast8_t csrl = USB0->CSRL0;
+  volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
+  uint_fast8_t csrl = ep0_regs->CSRL0;
 
-  // TU_LOG1(" EP0 USB0->CSRL0 = %x\r\n", csrl);
+  // TU_LOG1(" EP0 ep0_regs->CSRL0 = %x\r\n", csrl);
 
   if (csrl & USB_CSRL0_STALLED) {
     /* Returned STALL packet to HOST. */
-    USB0->CSRL0 = 0; /* Clear STALL */
+    ep0_regs->CSRL0 = 0; /* Clear STALL */
     return;
   }
 
   unsigned req = _dcd.setup_packet.bmRequestType;
   if (csrl & USB_CSRL0_SETEND) {
     TU_LOG1("   ABORT by the next packets\r\n");
-    USB0->CSRL0 = USB_CSRL0_SETENDC;
+    ep0_regs->CSRL0 = USB_CSRL0_SETENDC;
     if (req != REQUEST_TYPE_INVALID && _dcd.pipe0.buf) {
       /* DATA stage was aborted by receiving STATUS or SETUP packet. */
       _dcd.pipe0.buf = NULL;
@@ -483,16 +357,17 @@ static void process_ep0(uint8_t rhport)
     /* Received SETUP or DATA OUT packet */
     if (req == REQUEST_TYPE_INVALID) {
       /* SETUP */
-      TU_ASSERT(sizeof(tusb_control_request_t) == USB0->COUNT0,);
+      TU_ASSERT(sizeof(tusb_control_request_t) == ep0_regs->COUNT0,);
       process_setup_packet(rhport);
       return;
     }
     if (_dcd.pipe0.buf) {
       /* DATA OUT */
-      const unsigned vld = USB0->COUNT0;
+      const unsigned vld = ep0_regs->COUNT0;
       const unsigned rem = _dcd.pipe0.remaining;
       const unsigned len = TU_MIN(TU_MIN(rem, 64), vld);
-      pipe_read_packet(_dcd.pipe0.buf, &USB0->FIFO0_WORD, len);
+      volatile void *fifo_ptr = musb_dcd_ep_get_fifo_ptr(rhport, 0);
+      pipe_read_packet(_dcd.pipe0.buf, fifo_ptr, len);
 
       _dcd.pipe0.remaining = rem - len;
       _dcd.remaining_ctrl -= len;
@@ -506,13 +381,15 @@ static void process_ep0(uint8_t rhport)
     return;
   }
 
+  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+
   /* When CSRL0 is zero, it means that completion of sending a any length packet
    * or receiving a zero length packet. */
   if (req != REQUEST_TYPE_INVALID && !tu_edpt_dir(req)) {
     /* STATUS IN */
     if (*(const uint16_t*)(uintptr_t)&_dcd.setup_packet == 0x0500) {
       /* The address must be changed on completion of the control transfer. */
-      USB0->FADDR = (uint8_t)_dcd.setup_packet.wValue;
+      ctrl_regs->FADDR = (uint8_t)_dcd.setup_packet.wValue;
     }
     _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
     dcd_event_xfer_complete(rhport,
@@ -535,27 +412,28 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
 {
   bool completed;
   const unsigned dir_in     = tu_edpt_dir(ep_addr);
-  const unsigned epn_minus1 = tu_edpt_number(ep_addr) - 1;
+  const unsigned epn = tu_edpt_number(ep_addr);
+  const unsigned epn_minus1 = epn - 1;
 
-  volatile hw_endpoint_t *regs = edpt_regs(epn_minus1);
+  volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
   if (dir_in) {
-    // TU_LOG1(" TXCSRL%d = %x\r\n", epn_minus1 + 1, regs->TXCSRL);
+    // TU_LOG1(" TXCSRL%d = %x\r\n", epn, regs->TXCSRL);
     if (regs->TXCSRL & USB_TXCSRL1_STALLED) {
       regs->TXCSRL &= ~(USB_TXCSRL1_STALLED | USB_TXCSRL1_UNDRN);
       return;
     }
-    completed = handle_xfer_in(ep_addr);
+    completed = handle_xfer_in(rhport, ep_addr);
   } else {
-    // TU_LOG1(" RXCSRL%d = %x\r\n", epn_minus1 + 1, regs->RXCSRL);
+    // TU_LOG1(" RXCSRL%d = %x\r\n", epn, regs->RXCSRL);
     if (regs->RXCSRL & USB_RXCSRL1_STALLED) {
       regs->RXCSRL &= ~(USB_RXCSRL1_STALLED | USB_RXCSRL1_OVER);
       return;
     }
-    completed = handle_xfer_out(ep_addr);
+    completed = handle_xfer_out(rhport, ep_addr);
   }
 
   if (completed) {
-    pipe_state_t *pipe = &_dcd.pipe[dir_in][tu_edpt_number(ep_addr) - 1];
+    pipe_state_t *pipe = &_dcd.pipe[dir_in][epn_minus1];
     dcd_event_xfer_complete(rhport, ep_addr,
                             pipe->length - pipe->remaining,
                             XFER_RESULT_SUCCESS, true);
@@ -564,6 +442,7 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
 
 static void process_bus_reset(uint8_t rhport)
 {
+  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
   /* When bmRequestType is REQUEST_TYPE_INVALID(0xFF),
    * a control transfer state is SETUP or STATUS stage. */
   _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
@@ -571,18 +450,15 @@ static void process_bus_reset(uint8_t rhport)
   /* When pipe0.buf has not NULL, DATA stage works in progress. */
   _dcd.pipe0.buf = NULL;
 
-  USB0->TXIE = 1; /* Enable only EP0 */
-  USB0->RXIE = 0;
+  ctrl_regs->TXIE = 1; /* Enable only EP0 */
+  ctrl_regs->RXIE = 0;
 
   /* Clear FIFO settings */
   for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
-    USB0->EPIDX     = i;
-    USB0->TXFIFOSZ  = 0;
-    USB0->TXFIFOADD = 0;
-    USB0->RXFIFOSZ  = 0;
-    USB0->RXFIFOADD = 0;
+    musb_dcd_reset_fifo(rhport, i, 0);
+    musb_dcd_reset_fifo(rhport, i, 1);
   }
-  dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true);
+  dcd_event_bus_reset(rhport, (ctrl_regs->POWER & USB_POWER_HSMODE) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL, true);
 }
 
 /*------------------------------------------------------------------
@@ -591,61 +467,60 @@ static void process_bus_reset(uint8_t rhport)
 
 void dcd_init(uint8_t rhport)
 {
-  (void)rhport;
-  USB0->IE |= USB_IE_SUSPND;
-  NVIC_ClearPendingIRQ(USB0_IRQn);
-
+  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  ctrl_regs->IE |= USB_IE_SUSPND;
+  musb_dcd_int_clear(rhport);
+  musb_dcd_phy_init(rhport);
   dcd_connect(rhport);
 }
 
 void dcd_int_enable(uint8_t rhport)
 {
-  (void)rhport;
-  NVIC_EnableIRQ(USB0_IRQn);
+  musb_dcd_int_enable(rhport);
 }
 
 void dcd_int_disable(uint8_t rhport)
 {
-  (void)rhport;
-  NVIC_DisableIRQ(USB0_IRQn);
+  musb_dcd_int_disable(rhport);
 }
 
 // Receive Set Address request, mcu port must also include status IN response
 void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
 {
-  (void)rhport;
   (void)dev_addr;
+  volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
   _dcd.pipe0.buf       = NULL;
   _dcd.pipe0.length    = 0;
   _dcd.pipe0.remaining = 0;
   /* Clear RX FIFO to return ACK. */
-  USB0->CSRL0 = USB_CSRL0_RXRDYC | USB_CSRL0_DATAEND;
+  ep0_regs->CSRL0 = USB_CSRL0_RXRDYC | USB_CSRL0_DATAEND;
 }
 
 // Wake up host
 void dcd_remote_wakeup(uint8_t rhport)
 {
-  (void)rhport;
-  USB0->POWER |= USB_POWER_RESUME;
+  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  ctrl_regs->POWER |= USB_POWER_RESUME;
 
   unsigned cnt = SystemCoreClock / 1000;
   while (cnt--) __NOP();
 
-  USB0->POWER &= ~USB_POWER_RESUME;
+  ctrl_regs->POWER &= ~USB_POWER_RESUME;
 }
 
 // Connect by enabling internal pull-up resistor on D+/D-
 void dcd_connect(uint8_t rhport)
 {
-  (void)rhport;
-  USB0->POWER |= USB_POWER_SOFTCONN;
+  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  ctrl_regs->POWER |= TUD_OPT_HIGH_SPEED ? USB_POWER_HSENAB : 0;
+  ctrl_regs->POWER |= USB_POWER_SOFTCONN;
 }
 
 // Disconnect by disabling internal pull-up resistor on D+/D-
 void dcd_disconnect(uint8_t rhport)
 {
-  (void)rhport;
-  USB0->POWER &= ~USB_POWER_SOFTCONN;
+  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  ctrl_regs->POWER &= ~USB_POWER_SOFTCONN;
 }
 
 void dcd_sof_enable(uint8_t rhport, bool en)
@@ -663,8 +538,6 @@ void dcd_sof_enable(uint8_t rhport, bool en)
 // Configure endpoint's registers according to descriptor
 bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
 {
-  (void) rhport;
-
   const unsigned ep_addr = ep_desc->bEndpointAddress;
   const unsigned epn     = tu_edpt_number(ep_addr);
   const unsigned dir_in  = tu_edpt_dir(ep_addr);
@@ -678,7 +551,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   pipe->length    = 0;
   pipe->remaining = 0;
 
-  volatile hw_endpoint_t *regs = edpt_regs(epn - 1);
+  volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
+  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
   if (dir_in) {
     regs->TXMAXP = mps;
     regs->TXCSRH = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_TXCSRH1_ISO : 0;
@@ -686,7 +560,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
       regs->TXCSRL = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
     else
       regs->TXCSRL = USB_TXCSRL1_CLRDT;
-    USB0->TXIE |= TU_BIT(epn);
+    ctrl_regs->TXIE |= TU_BIT(epn);
   } else {
     regs->RXMAXP = mps;
     regs->RXCSRH = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_RXCSRH1_ISO : 0;
@@ -694,36 +568,25 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
       regs->RXCSRL = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
     else
       regs->RXCSRL = USB_RXCSRL1_CLRDT;
-    USB0->RXIE |= TU_BIT(epn);
+    ctrl_regs->RXIE |= TU_BIT(epn);
   }
 
   /* Setup FIFO */
-  int size_in_log2_minus3 = 28 - TU_MIN(28, __CLZ((uint32_t)mps));
-  if ((8u << size_in_log2_minus3) < mps) ++size_in_log2_minus3;
-  unsigned addr = find_free_memory(size_in_log2_minus3);
-  TU_ASSERT(addr);
-
-  USB0->EPIDX = epn;
-  if (dir_in) {
-    USB0->TXFIFOADD = addr;
-    USB0->TXFIFOSZ  = size_in_log2_minus3;
-  } else {
-    USB0->RXFIFOADD = addr;
-    USB0->RXFIFOSZ  = size_in_log2_minus3;
-  }
+  musb_dcd_setup_fifo(rhport, epn, dir_in, mps);
 
   return true;
 }
 
 void dcd_edpt_close_all(uint8_t rhport)
 {
-  (void) rhport;
-  volatile hw_endpoint_t *regs = (volatile hw_endpoint_t *)(uintptr_t)&USB0->TXMAXP1;
-  unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
-  NVIC_DisableIRQ(USB0_IRQn);
-  USB0->TXIE = 1; /* Enable only EP0 */
-  USB0->RXIE = 0;
+  volatile musb_dcd_epn_regs_t *regs;
+  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  unsigned const ie = musb_dcd_get_int_enable(rhport);
+  musb_dcd_int_disable(rhport);
+  ctrl_regs->TXIE = 1; /* Enable only EP0 */
+  ctrl_regs->RXIE = 0;
   for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
+    regs = musb_dcd_epn_regs(rhport, i);
     regs->TXMAXP = 0;
     regs->TXCSRH = 0;
     if (regs->TXCSRL & USB_TXCSRL1_TXRDY)
@@ -738,50 +601,41 @@ void dcd_edpt_close_all(uint8_t rhport)
     else
       regs->RXCSRL = USB_RXCSRL1_CLRDT;
 
-    USB0->EPIDX     = i;
-    USB0->TXFIFOSZ  = 0;
-    USB0->TXFIFOADD = 0;
-    USB0->RXFIFOSZ  = 0;
-    USB0->RXFIFOADD = 0;
+    musb_dcd_reset_fifo(rhport, i, 0);
+    musb_dcd_reset_fifo(rhport, i, 1);
+
   }
-  if (ie) NVIC_EnableIRQ(USB0_IRQn);
+  if (ie) musb_dcd_int_enable(rhport);
 }
 
 void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
 {
-  (void)rhport;
   unsigned const epn    = tu_edpt_number(ep_addr);
   unsigned const dir_in = tu_edpt_dir(ep_addr);
 
-  hw_endpoint_t volatile *regs = edpt_regs(epn - 1);
-  unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
-  NVIC_DisableIRQ(USB0_IRQn);
+  volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
+  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  unsigned const ie = musb_dcd_get_int_enable(rhport);
+  musb_dcd_int_disable(rhport);
   if (dir_in) {
-    USB0->TXIE  &= ~TU_BIT(epn);
+    ctrl_regs->TXIE  &= ~TU_BIT(epn);
     regs->TXMAXP = 0;
     regs->TXCSRH = 0;
     if (regs->TXCSRL & USB_TXCSRL1_TXRDY)
       regs->TXCSRL = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
     else
       regs->TXCSRL = USB_TXCSRL1_CLRDT;
-
-    USB0->EPIDX     = epn;
-    USB0->TXFIFOSZ  = 0;
-    USB0->TXFIFOADD = 0;
   } else {
-    USB0->RXIE  &= ~TU_BIT(epn);
+    ctrl_regs->RXIE  &= ~TU_BIT(epn);
     regs->RXMAXP = 0;
     regs->RXCSRH = 0;
     if (regs->RXCSRL & USB_RXCSRL1_RXRDY)
       regs->RXCSRL = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
     else
       regs->RXCSRL = USB_RXCSRL1_CLRDT;
-
-    USB0->EPIDX     = epn;
-    USB0->RXFIFOSZ  = 0;
-    USB0->RXFIFOADD = 0;
   }
-  if (ie) NVIC_EnableIRQ(USB0_IRQn);
+  musb_dcd_reset_fifo(rhport, epn, dir_in);
+  if (ie) musb_dcd_int_enable(rhport);
 }
 
 // Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack
@@ -791,14 +645,14 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
   bool ret;
   // TU_LOG1("X %x %d\r\n", ep_addr, total_bytes);
   unsigned const epnum = tu_edpt_number(ep_addr);
-  unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
-  NVIC_DisableIRQ(USB0_IRQn);
+  unsigned const ie = musb_dcd_get_int_enable(rhport);
+  musb_dcd_int_disable(rhport);
   if (epnum) {
     _dcd.pipe_buf_is_fifo[tu_edpt_dir(ep_addr)] &= ~TU_BIT(epnum - 1);
     ret = edpt_n_xfer(rhport, ep_addr, buffer, total_bytes);
   } else
     ret = edpt0_xfer(rhport, ep_addr, buffer, total_bytes);
-  if (ie) NVIC_EnableIRQ(USB0_IRQn);
+  if (ie) musb_dcd_int_enable(rhport);
   return ret;
 }
 
@@ -810,29 +664,29 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_
   // TU_LOG1("X %x %d\r\n", ep_addr, total_bytes);
   unsigned const epnum = tu_edpt_number(ep_addr);
   TU_ASSERT(epnum);
-  unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
-  NVIC_DisableIRQ(USB0_IRQn);
+  unsigned const ie = musb_dcd_get_int_enable(rhport);
+  musb_dcd_int_disable(rhport);
   _dcd.pipe_buf_is_fifo[tu_edpt_dir(ep_addr)] |= TU_BIT(epnum - 1);
   ret = edpt_n_xfer(rhport, ep_addr, (uint8_t*)ff, total_bytes);
-  if (ie) NVIC_EnableIRQ(USB0_IRQn);
+  if (ie) musb_dcd_int_enable(rhport);
   return ret;
 }
 
 // Stall endpoint
 void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
 {
-  (void)rhport;
   unsigned const epn = tu_edpt_number(ep_addr);
-  unsigned const ie  = NVIC_GetEnableIRQ(USB0_IRQn);
-  NVIC_DisableIRQ(USB0_IRQn);
+  unsigned const ie = musb_dcd_get_int_enable(rhport);
+  musb_dcd_int_disable(rhport);
   if (0 == epn) {
+    volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
     if (!ep_addr) { /* Ignore EP80 */
       _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
       _dcd.pipe0.buf = NULL;
-      USB0->CSRL0 = USB_CSRL0_STALL;
+      ep0_regs->CSRL0 = USB_CSRL0_STALL;
     }
   } else {
-    volatile hw_endpoint_t *regs = edpt_regs(epn - 1);
+    volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
     if (tu_edpt_dir(ep_addr)) { /* IN */
       regs->TXCSRL = USB_TXCSRL1_STALL;
     } else { /* OUT */
@@ -840,7 +694,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
       regs->RXCSRL = USB_RXCSRL1_STALL;
     }
   }
-  if (ie) NVIC_EnableIRQ(USB0_IRQn);
+  if (ie) musb_dcd_int_enable(rhport);
 }
 
 // clear stall, data toggle is also reset to DATA0
@@ -848,15 +702,15 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 {
   (void)rhport;
   unsigned const epn = tu_edpt_number(ep_addr);
-  hw_endpoint_t volatile *regs = edpt_regs(epn - 1);
-  unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
-  NVIC_DisableIRQ(USB0_IRQn);
+  musb_dcd_epn_regs_t volatile *regs = musb_dcd_epn_regs(rhport, epn);
+  unsigned const ie = musb_dcd_get_int_enable(rhport);
+  musb_dcd_int_disable(rhport);
   if (tu_edpt_dir(ep_addr)) { /* IN */
     regs->TXCSRL = USB_TXCSRL1_CLRDT;
   } else { /* OUT */
     regs->RXCSRL = USB_RXCSRL1_CLRDT;
   }
-  if (ie) NVIC_EnableIRQ(USB0_IRQn);
+  if (ie) musb_dcd_int_enable(rhport);
 }
 
 /*-------------------------------------------------------------------
@@ -865,13 +719,18 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 void dcd_int_handler(uint8_t rhport)
 {
   uint_fast8_t is, txis, rxis;
+  volatile musb_dcd_ctl_regs_t *ctrl_regs;
+
+  //Part specific ISR setup/entry
+  musb_dcd_int_handler_enter(rhport);
 
-  is   = USB0->IS;   /* read and clear interrupt status */
-  txis = USB0->TXIS; /* read and clear interrupt status */
-  rxis = USB0->RXIS; /* read and clear interrupt status */
+  ctrl_regs = musb_dcd_ctl_regs(rhport);
+  is   = ctrl_regs->IS;   /* read and clear interrupt status */
+  txis = ctrl_regs->TXIS; /* read and clear interrupt status */
+  rxis = ctrl_regs->RXIS; /* read and clear interrupt status */
   // TU_LOG1("D%2x T%2x R%2x\r\n", is, txis, rxis);
 
-  is &= USB0->IE; /* Clear disabled interrupts */
+  is &= ctrl_regs->IE; /* Clear disabled interrupts */
   if (is & USB_IS_DISCON) {
   }
   if (is & USB_IS_SOF) {
@@ -887,7 +746,7 @@ void dcd_int_handler(uint8_t rhport)
     dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
   }
 
-  txis &= USB0->TXIE; /* Clear disabled interrupts */
+  txis &= ctrl_regs->TXIE; /* Clear disabled interrupts */
   if (txis & USB_TXIE_EP0) {
     process_ep0(rhport);
     txis &= ~TU_BIT(0);
@@ -897,12 +756,15 @@ void dcd_int_handler(uint8_t rhport)
     process_edpt_n(rhport, tu_edpt_addr(num, TUSB_DIR_IN));
     txis &= ~TU_BIT(num);
   }
-  rxis &= USB0->RXIE; /* Clear disabled interrupts */
+  rxis &= ctrl_regs->RXIE; /* Clear disabled interrupts */
   while (rxis) {
     unsigned const num = __builtin_ctz(rxis);
     process_edpt_n(rhport, tu_edpt_addr(num, TUSB_DIR_OUT));
     rxis &= ~TU_BIT(num);
   }
+
+  //Part specific ISR exit
+  musb_dcd_int_handler_exit(rhport);
 }
 
 #endif
diff --git a/src/portable/mentor/musb/hcd_musb.c b/src/portable/mentor/musb/hcd_musb.c
index 5312c2812c..8fc2256768 100644
--- a/src/portable/mentor/musb/hcd_musb.c
+++ b/src/portable/mentor/musb/hcd_musb.c
@@ -37,16 +37,10 @@ _Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
 
 #include "host/hcd.h"
 
-#if TU_CHECK_MCU(OPT_MCU_MSP432E4)
-  #include "musb_msp432e.h"
-
-#elif TU_CHECK_MCU(OPT_MCU_TM4C123, OPT_MCU_TM4C129)
-  #include "musb_tm4c.h"
-
-  // HACK generalize later
-  #include "musb_type.h"
-  #define FIFO0_WORD FIFO0
+#include "musb_type.h"
 
+#if TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
+  #include "musb_ti.h"
 #else
   #error "Unsupported MCUs"
 #endif
diff --git a/src/portable/mentor/musb/musb_max32.h b/src/portable/mentor/musb/musb_max32.h
new file mode 100644
index 0000000000..297a695f89
--- /dev/null
+++ b/src/portable/mentor/musb/musb_max32.h
@@ -0,0 +1,221 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024, Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_MUSB_MAX32_H_
+#define _TUSB_MUSB_MAX32_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if TU_CHECK_MCU(OPT_MCU_MAX32690, OPT_MCU_MAX32650, OPT_MCU_MAX32666, OPT_MCU_MAX78002)
+  #include "mxc_device.h"
+  #include "usbhs_regs.h"
+#else
+  #error "Unsupported MCUs"
+#endif
+
+
+#if CFG_TUD_ENABLED
+#define USBHS_M31_CLOCK_RECOVERY
+
+// Mapping of peripheral instances to port. Currently just 1.
+static mxc_usbhs_regs_t* const musb_periph_inst[] = {
+    MXC_USBHS
+};
+
+// Mapping of IRQ numbers to port. Currently just 1.
+static const IRQn_Type  musb_irqs[] = {
+    USB_IRQn
+};
+
+TU_ATTR_ALWAYS_INLINE
+static inline void musb_dcd_int_enable(uint8_t rhport)
+{
+  NVIC_EnableIRQ(musb_irqs[rhport]);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void musb_dcd_int_disable(uint8_t rhport)
+{
+  NVIC_DisableIRQ(musb_irqs[rhport]);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline unsigned musb_dcd_get_int_enable(uint8_t rhport)
+{
+  return NVIC_GetEnableIRQ(musb_irqs[rhport]);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void musb_dcd_int_clear(uint8_t rhport)
+{
+    NVIC_ClearPendingIRQ(musb_irqs[rhport]);
+}
+
+//Used to save and restore user's register map when interrupt occurs
+static volatile unsigned isr_saved_index = 0;
+
+static inline void musb_dcd_int_handler_enter(uint8_t rhport)
+{
+  uint32_t mxm_int, mxm_int_en, mxm_is;
+
+  //save current register index
+  isr_saved_index = musb_periph_inst[rhport]->index;
+
+  //Handle PHY specific events
+  mxm_int = musb_periph_inst[rhport]->mxm_int;
+  mxm_int_en = musb_periph_inst[rhport]->mxm_int_en;
+  mxm_is = mxm_int & mxm_int_en;
+  musb_periph_inst[rhport]->mxm_int = mxm_is;
+
+  if (mxm_is & MXC_F_USBHS_MXM_INT_NOVBUS) {
+    dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true);
+  }
+}
+
+static inline void musb_dcd_int_handler_exit(uint8_t rhport)
+{
+  //restore register index
+  musb_periph_inst[rhport]->index = isr_saved_index;
+}
+
+static inline void musb_dcd_phy_init(uint8_t rhport)
+{
+  //Interrupt for VBUS disconnect
+  musb_periph_inst[rhport]->mxm_int_en |= MXC_F_USBHS_MXM_INT_EN_NOVBUS;
+
+  musb_dcd_int_clear(rhport);
+
+  //Unsuspend the MAC
+  musb_periph_inst[rhport]->mxm_suspend = 0;
+
+  // Configure PHY
+  musb_periph_inst[rhport]->m31_phy_xcfgi_31_0 = (0x1 << 3) | (0x1 << 11);
+  musb_periph_inst[rhport]->m31_phy_xcfgi_63_32 = 0;
+  musb_periph_inst[rhport]->m31_phy_xcfgi_95_64 = 0x1 << (72 - 64);
+  musb_periph_inst[rhport]->m31_phy_xcfgi_127_96 = 0;
+
+
+  #ifdef USBHS_M31_CLOCK_RECOVERY
+  musb_periph_inst[rhport]->m31_phy_noncry_rstb = 1;
+  musb_periph_inst[rhport]->m31_phy_noncry_en = 1;
+  musb_periph_inst[rhport]->m31_phy_outclksel = 0;
+  musb_periph_inst[rhport]->m31_phy_coreclkin = 0;
+  musb_periph_inst[rhport]->m31_phy_xtlsel = 2; /* Select 25 MHz clock */
+  #else
+  musb_periph_inst[rhport]->m31_phy_noncry_rstb = 0;
+  musb_periph_inst[rhport]->m31_phy_noncry_en = 0;
+  musb_periph_inst[rhport]->m31_phy_outclksel = 1;
+  musb_periph_inst[rhport]->m31_phy_coreclkin = 1;
+  musb_periph_inst[rhport]->m31_phy_xtlsel = 3; /* Select 30 MHz clock */
+  #endif
+  musb_periph_inst[rhport]->m31_phy_pll_en = 1;
+  musb_periph_inst[rhport]->m31_phy_oscouten = 1;
+
+  /* Reset PHY */
+  musb_periph_inst[rhport]->m31_phy_ponrst = 0;
+  musb_periph_inst[rhport]->m31_phy_ponrst = 1;
+}
+
+static inline volatile musb_dcd_ctl_regs_t* musb_dcd_ctl_regs(uint8_t rhport)
+{
+  volatile musb_dcd_ctl_regs_t *regs = (volatile musb_dcd_ctl_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->faddr));
+  return regs;
+}
+
+static inline volatile musb_dcd_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum)
+{
+  //Need to set index to map EP registers
+  musb_periph_inst[rhport]->index = epnum;
+  volatile musb_dcd_epn_regs_t *regs = (volatile musb_dcd_epn_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->inmaxp));
+  return regs;
+}
+
+static inline volatile musb_dcd_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport)
+{
+  //Need to set index to map EP0 registers
+  musb_periph_inst[rhport]->index = 0;
+  volatile musb_dcd_ep0_regs_t *regs = (volatile musb_dcd_ep0_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->csr0));
+  return regs;
+}
+
+static volatile void *musb_dcd_ep_get_fifo_ptr(uint8_t rhport, unsigned epnum)
+{
+  volatile uint32_t *ptr;
+
+  ptr = &(musb_periph_inst[rhport]->fifo0);
+  ptr += epnum;
+
+  return (volatile void *) ptr;
+}
+
+
+static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in, unsigned mps)
+{
+  (void)mps;
+
+  //Most likely the caller has already grabbed the right register block. But
+  //as a precaution save and restore the register bank anyways
+  unsigned saved_index = musb_periph_inst[rhport]->index;
+
+  musb_periph_inst[rhport]->index = epnum;
+
+  //Disable double buffering
+  if(dir_in) {
+    musb_periph_inst[rhport]->incsru |= (MXC_F_USBHS_INCSRU_DPKTBUFDIS | MXC_F_USBHS_INCSRU_MODE);
+  } else {
+    musb_periph_inst[rhport]->outcsru |= (MXC_F_USBHS_OUTCSRU_DPKTBUFDIS);
+  }
+
+  musb_periph_inst[rhport]->index = saved_index;
+}
+
+static inline void musb_dcd_reset_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in)
+{
+  //Most likely the caller has already grabbed the right register block. But
+  //as a precaution save and restore the register bank anyways
+  unsigned saved_index = musb_periph_inst[rhport]->index;
+
+  musb_periph_inst[rhport]->index = epnum;
+
+  //Disable double buffering
+  if(dir_in) {
+    musb_periph_inst[rhport]->incsru |= (MXC_F_USBHS_INCSRU_DPKTBUFDIS);
+  } else {
+    musb_periph_inst[rhport]->outcsru |= (MXC_F_USBHS_OUTCSRU_DPKTBUFDIS);
+  }
+
+  musb_periph_inst[rhport]->index = saved_index;
+}
+
+#endif // CFG_TUD_ENABLED
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif // _TUSB_MUSB_MAX32_H_
diff --git a/src/portable/mentor/musb/musb_msp432e.h b/src/portable/mentor/musb/musb_msp432e.h
deleted file mode 100644
index fce21de889..0000000000
--- a/src/portable/mentor/musb/musb_msp432e.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2021, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#ifndef _TUSB_MUSB_MSP432E_H_
-#define _TUSB_MUSB_MSP432E_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#include "msp.h"
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif
diff --git a/src/portable/mentor/musb/musb_ti.h b/src/portable/mentor/musb/musb_ti.h
new file mode 100644
index 0000000000..dbf82f3911
--- /dev/null
+++ b/src/portable/mentor/musb/musb_ti.h
@@ -0,0 +1,285 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024, Brent Kowal (Analog Devices, Inc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_MUSB_TI_H_
+#define _TUSB_MUSB_TI_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#if CFG_TUSB_MCU == OPT_MCU_TM4C123
+  #include "TM4C123.h"
+  #define FIFO0_WORD FIFO0
+  #define FIFO1_WORD FIFO1
+//#elif CFG_TUSB_MCU == OPT_MCU_TM4C129
+#elif CFG_TUSB_MCU == OPT_MCU_MSP432E4
+  #include "msp.h"
+#else
+  #error "Unsupported MCUs"
+#endif
+
+
+// Header supports both device and host modes. Only include whats necessary
+#if CFG_TUD_ENABLED
+
+// Mapping of peripheral instances to port. Currently just 1.
+static USB0_Type* const musb_periph_inst[] = {
+    USB0
+};
+
+// Mapping of IRQ numbers to port. Currently just 1.
+static const IRQn_Type  musb_irqs[] = {
+    USB0_IRQn
+};
+
+static inline void musb_dcd_phy_init(uint8_t rhport){
+  (void)rhport;
+  //Nothing to do for this part
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void musb_dcd_int_enable(uint8_t rhport)
+{
+  NVIC_EnableIRQ(musb_irqs[rhport]);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void musb_dcd_int_disable(uint8_t rhport)
+{
+  NVIC_DisableIRQ(musb_irqs[rhport]);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline unsigned musb_dcd_get_int_enable(uint8_t rhport)
+{
+  return NVIC_GetEnableIRQ(musb_irqs[rhport]);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void musb_dcd_int_clear(uint8_t rhport)
+{
+    NVIC_ClearPendingIRQ(musb_irqs[rhport]);
+}
+
+static inline void musb_dcd_int_handler_enter(uint8_t rhport){
+  (void)rhport;
+  //Nothing to do for this part
+}
+
+static inline void musb_dcd_int_handler_exit(uint8_t rhport){
+  (void)rhport;
+  //Nothing to do for this part
+}
+
+static inline volatile musb_dcd_ctl_regs_t* musb_dcd_ctl_regs(uint8_t rhport)
+{
+  volatile musb_dcd_ctl_regs_t *regs = (volatile musb_dcd_ctl_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->FADDR));
+  return regs;
+}
+
+static inline volatile musb_dcd_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum)
+{
+  uintptr_t baseptr = (uintptr_t)&(musb_periph_inst[rhport]->TXMAXP1);
+
+  //On the TI parts, the epn registers are 16-bytes apart. The core regs defined
+  //by musb_dcd_epn_regs and 6 reserved/other use bytes
+  volatile musb_dcd_epn_regs_t *regs = (volatile musb_dcd_epn_regs_t*)(baseptr + ((epnum - 1)*16));
+  return regs;
+}
+
+static inline volatile musb_dcd_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport)
+{
+  volatile musb_dcd_ep0_regs_t *regs = (volatile musb_dcd_ep0_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->CSRL0));
+  return regs;
+}
+
+static volatile void *musb_dcd_ep_get_fifo_ptr(uint8_t rhport, unsigned epnum)
+{
+  if(epnum){
+    return (volatile void *)(&(musb_periph_inst[rhport]->FIFO1_WORD) + (epnum - 1));
+  } else {
+    return (volatile void *)&(musb_periph_inst[rhport]->FIFO0_WORD);
+  }
+}
+
+
+typedef struct {
+  uint_fast16_t beg; /* offset of including first element */
+  uint_fast16_t end; /* offset of excluding the last element */
+} free_block_t;
+
+static inline free_block_t *find_containing_block(free_block_t *beg, free_block_t *end, uint_fast16_t addr)
+{
+  free_block_t *cur = beg;
+  for (; cur < end && ((addr < cur->beg) || (cur->end <= addr)); ++cur) ;
+  return cur;
+}
+
+static inline int update_free_block_list(free_block_t *blks, unsigned num, uint_fast16_t addr, uint_fast16_t size)
+{
+  free_block_t *p = find_containing_block(blks, blks + num, addr);
+  TU_ASSERT(p != blks + num, -2);
+  if (p->beg == addr) {
+    /* Shrink block */
+    p->beg = addr + size;
+    if (p->beg != p->end) return 0;
+    /* remove block */
+    free_block_t *end = blks + num;
+    while (p + 1 < end) {
+      *p = *(p + 1);
+      ++p;
+    }
+    return -1;
+  } else {
+    /* Split into 2 blocks */
+    free_block_t tmp = {
+      .beg = addr + size,
+      .end = p->end
+    };
+    p->end = addr;
+    if (p->beg == p->end) {
+      if (tmp.beg != tmp.end) {
+        *p = tmp;
+        return 0;
+      }
+      /* remove block */
+      free_block_t *end = blks + num;
+      while (p + 1 < end) {
+        *p = *(p + 1);
+        ++p;
+      }
+      return -1;
+    }
+    if (tmp.beg == tmp.end) return 0;
+    blks[num] = tmp;
+    return 1;
+  }
+}
+
+static inline unsigned free_block_size(free_block_t const *blk)
+{
+  return blk->end - blk->beg;
+}
+
+#if 0
+static inline void print_block_list(free_block_t const *blk, unsigned num)
+{
+  TU_LOG1("*************\r\n");
+  for (unsigned i = 0; i < num; ++i) {
+    TU_LOG1(" Blk%u %u %u\r\n", i, blk->beg, blk->end);
+    ++blk;
+  }
+}
+#else
+#define print_block_list(a,b)
+#endif
+
+static unsigned find_free_memory(uint8_t rhport, uint_fast16_t size_in_log2_minus3)
+{
+  free_block_t free_blocks[2 * (TUP_DCD_ENDPOINT_MAX - 1)];
+  unsigned num_blocks = 1;
+
+  /* Initialize free memory block list */
+  free_blocks[0].beg = 64 / 8;
+  free_blocks[0].end = (4 << 10) / 8; /* 4KiB / 8 bytes */
+  for (int i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
+    uint_fast16_t addr;
+    int num;
+    musb_periph_inst[rhport]->EPIDX = i;
+    addr = musb_periph_inst[rhport]->TXFIFOADD;
+    if (addr) {
+      unsigned sz  = musb_periph_inst[rhport]->TXFIFOSZ;
+      unsigned sft = (sz & USB_TXFIFOSZ_SIZE_M) + ((sz & USB_TXFIFOSZ_DPB) ? 1: 0);
+      num = update_free_block_list(free_blocks, num_blocks, addr, 1 << sft);
+      TU_ASSERT(-2 < num, 0);
+      num_blocks += num;
+      print_block_list(free_blocks, num_blocks);
+    }
+    addr = musb_periph_inst[rhport]->RXFIFOADD;
+    if (addr) {
+      unsigned sz  = musb_periph_inst[rhport]->RXFIFOSZ;
+      unsigned sft = (sz & USB_RXFIFOSZ_SIZE_M) + ((sz & USB_RXFIFOSZ_DPB) ? 1: 0);
+      num = update_free_block_list(free_blocks, num_blocks, addr, 1 << sft);
+      TU_ASSERT(-2 < num, 0);
+      num_blocks += num;
+      print_block_list(free_blocks, num_blocks);
+    }
+  }
+  print_block_list(free_blocks, num_blocks);
+
+  /* Find the best fit memory block */
+  uint_fast16_t size_in_8byte_unit = 1 << size_in_log2_minus3;
+  free_block_t const *min = NULL;
+  uint_fast16_t    min_sz = 0xFFFFu;
+  free_block_t const *end = &free_blocks[num_blocks];
+  for (free_block_t const *cur = &free_blocks[0]; cur < end; ++cur) {
+    uint_fast16_t sz = free_block_size(cur);
+    if (sz < size_in_8byte_unit) continue;
+    if (size_in_8byte_unit == sz) return cur->beg;
+    if (sz < min_sz) min = cur;
+  }
+  TU_ASSERT(min, 0);
+  return min->beg;
+}
+
+
+static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in, unsigned mps)
+{
+  int size_in_log2_minus3 = 28 - TU_MIN(28, __CLZ((uint32_t)mps));
+  if ((8u << size_in_log2_minus3) < mps) ++size_in_log2_minus3;
+  unsigned addr = find_free_memory(rhport, size_in_log2_minus3);
+  TU_ASSERT(addr,);
+
+  musb_periph_inst[rhport]->EPIDX = epnum;
+  if (dir_in) {
+    musb_periph_inst[rhport]->TXFIFOADD = addr;
+    musb_periph_inst[rhport]->TXFIFOSZ  = size_in_log2_minus3;
+  } else {
+    musb_periph_inst[rhport]->RXFIFOADD = addr;
+    musb_periph_inst[rhport]->RXFIFOSZ  = size_in_log2_minus3;
+  }
+}
+
+static inline void musb_dcd_reset_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in)
+{
+  musb_periph_inst[rhport]->EPIDX = epnum;
+  if (dir_in) {
+    musb_periph_inst[rhport]->TXFIFOADD = 0;
+    musb_periph_inst[rhport]->TXFIFOSZ  = 0;
+  } else {
+    musb_periph_inst[rhport]->RXFIFOADD = 0;
+    musb_periph_inst[rhport]->RXFIFOSZ  = 0;
+  }
+}
+
+#endif // CFG_TUD_ENABLED
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif // _TUSB_MUSB_TI_H_
diff --git a/src/portable/mentor/musb/musb_tm4c.h b/src/portable/mentor/musb/musb_tm4c.h
deleted file mode 100644
index 65a1751b0f..0000000000
--- a/src/portable/mentor/musb/musb_tm4c.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2021, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#ifndef _TUSB_MUSB_TM4C_H_
-#define _TUSB_MUSB_TM4C_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#if CFG_TUSB_MCU == OPT_MCU_TM4C123
-  #include "TM4C123.h"
-//#elif CFG_TUSB_MCU == OPT_MCU_TM4C129
-#else
-  #error "Unsupported MCUs"
-#endif
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif
diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index 8f83305a52..e8af8f19b0 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -35,10 +35,43 @@
 #ifndef _TUSB_MUSB_TYPE_H_
 #define _TUSB_MUSB_TYPE_H_
 
+#include "stdint.h"
+
 #ifdef __cplusplus
  extern "C" {
 #endif
 
+// Endpoint register mapping. Non-zero end points.
+typedef struct TU_ATTR_PACKED {
+  uint16_t TXMAXP;
+  uint8_t  TXCSRL;
+  uint8_t  TXCSRH;
+  uint16_t RXMAXP;
+  uint8_t  RXCSRL;
+  uint8_t  RXCSRH;
+  uint16_t RXCOUNT;
+} musb_dcd_epn_regs_t;
+
+// Endpoint 0 register mapping.
+typedef struct TU_ATTR_PACKED {
+  uint8_t   CSRL0;
+  uint8_t   CSRH0;
+  uint32_t  RESERVED;
+  uint8_t   COUNT0;
+} musb_dcd_ep0_regs_t;
+
+// Control register mapping
+typedef struct TU_ATTR_PACKED {
+  uint8_t   FADDR;
+  uint8_t   POWER;
+  uint16_t  TXIS;
+  uint16_t  RXIS;
+  uint16_t  TXIE;
+  uint16_t  RXIE;
+  uint8_t   IS;
+  uint8_t   IE;
+} musb_dcd_ctl_regs_t;
+
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_FADDR register.

From ef4285c00c1561a106b99dd0572cef11f5448919 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 25 Jul 2024 22:38:23 +0700
Subject: [PATCH 089/204] add flash stlink

---
 test/hil/hil_test.py | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 1588416879..e2a2f01a0c 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -137,6 +137,11 @@ def flash_jlink(board, firmware):
     return ret
 
 
+def flash_stlink(board, firmware):
+    #ret = run_cmd(f'st-flash --serial {board["flasher_sn"]} write {firmware}.bin 0x08000000')
+    ret = run_cmd(f'STM32_Programmer_CLI --connect port=swd sn={board["flasher_sn"]} --write {firmware}.elf --go')
+    return ret
+
 def flash_openocd(board, firmware):
     ret = run_cmd(f'openocd -c "adapter serial {board["flasher_sn"]}" {board["flasher_args"]} -c "program {firmware}.elf reset exit"')
     return ret
@@ -338,8 +343,10 @@ def main():
     # all possible tests: board_test is added last to disable board's usb
     all_tests = [
         'cdc_dual_ports',
-        'cdc_msc', 'cdc_msc_freertos',
-        'dfu', 'dfu_runtime',
+        'cdc_msc',
+        'cdc_msc_freertos',
+        'dfu',
+        'dfu_runtime',
         'hid_boot_interface',
         'board_test'
     ]

From 3b8f9a2b1f43a8353c1556e30a61dd0c2416c57f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 25 Jul 2024 23:51:20 +0700
Subject: [PATCH 090/204] refactor btable tx/rx into arr[2]

---
 src/portable/st/stm32_fsdev/fsdev_common.h | 95 ++++++++++++----------
 1 file changed, 51 insertions(+), 44 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index d0f928552e..7d1f7fd90a 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -69,17 +69,18 @@ TU_VERIFY_STATIC(FSDEV_BTABLE_BASE % 8 == 0, "BTABLE base must be aligned to 8 b
 // 16-bit or 32-bit depending on FSDEV_BUS_32BIT.
 typedef struct {
   union {
+    // 0: tx, 1: rx
+
+    // strictly 16-bit access (could be 32-bit aligned)
     struct {
-      volatile pma_aligned uint16_t tx_addr;
-      volatile pma_aligned uint16_t tx_count;
-      volatile pma_aligned uint16_t rx_addr;
-      volatile pma_aligned uint16_t rx_count;
-    } ep16[FSDEV_EP_COUNT];
+      volatile pma_aligned uint16_t addr;
+      volatile pma_aligned uint16_t count;
+    } ep16[FSDEV_EP_COUNT][2];
 
+    // strictly 32-bit access
     struct {
-      volatile uint32_t tx_count_addr;
-      volatile uint32_t rx_count_addr;
-    } ep32[FSDEV_EP_COUNT];
+      volatile uint32_t count_addr;
+    } ep32[FSDEV_EP_COUNT][2];
   };
 } fsdev_btable_t;
 
@@ -204,6 +205,24 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx,
   pcd_set_endpoint(USBx, bEpIdx,regVal);
 }
 
+TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_count(uint32_t ep_id, uint8_t is_rx) {
+  uint16_t count;
+#ifdef FSDEV_BUS_32BIT
+  count = (FSDEV_BTABLE->ep32[ep_id][is_rx].count_addr >> 16);
+#else
+  count = FSDEV_BTABLE->ep16[ep_id][is_rx].count;
+#endif
+  return count & 0x3FFU;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_addr(uint32_t ep_id, uint8_t is_rx) {
+#ifdef FSDEV_BUS_32BIT
+  return FSDEV_BTABLE->ep32[ep_id][is_rx].count_addr & 0x0000FFFFu;
+#else
+  return FSDEV_BTABLE->ep16[ep_id][is_rx].addr;
+#endif
+}
+
 /**
   * @brief  gets counter of the tx buffer.
   * @param  USBx USB peripheral instance register address.
@@ -212,26 +231,12 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx,
   */
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx) {
   (void) USBx;
-  uint16_t count;
-#ifdef FSDEV_BUS_32BIT
-  count = (FSDEV_BTABLE->ep32[bEpIdx].tx_count_addr >> 16);
-#else
-  count = FSDEV_BTABLE->ep16[bEpIdx].tx_count;
-#endif
-
-  return count & 0x3FFU;
+  return btable_get_count(bEpIdx, 0);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx) {
   (void) USBx;
-  uint16_t count;
-#ifdef FSDEV_BUS_32BIT
-  count = (FSDEV_BTABLE->ep32[bEpIdx].rx_count_addr >> 16);
-#else
-  count = FSDEV_BTABLE->ep16[bEpIdx].rx_count;
-#endif
-
-  return count & 0x3FFU;
+  return btable_get_count(bEpIdx, 1);
 }
 
 #define pcd_get_ep_dbuf0_cnt pcd_get_ep_tx_cnt
@@ -239,44 +244,46 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USB
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx) {
   (void) USBx;
-#ifdef FSDEV_BUS_32BIT
-  return FSDEV_BTABLE->ep32[bEpIdx].tx_count_addr & 0x0000FFFFu;
-#else
-  return FSDEV_BTABLE->ep16[bEpIdx].tx_addr;
-#endif
+  return btable_get_addr(bEpIdx, 0);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_address(USB_TypeDef * USBx, uint32_t bEpIdx) {
   (void) USBx;
-#ifdef FSDEV_BUS_32BIT
-  return FSDEV_BTABLE->ep32[bEpIdx].rx_count_addr & 0x0000FFFFu;
-#else
-  return FSDEV_BTABLE->ep16[bEpIdx].rx_addr;
-#endif
+  return btable_get_addr(bEpIdx, 1);
 }
 
 #define pcd_get_ep_dbuf0_address pcd_get_ep_tx_address
 #define pcd_get_ep_dbuf1_address pcd_get_ep_rx_address
 
+
+//TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_set_addr(uint32_t ep_id, uint8_t is_rx, uint16_t addr) {
+//
+//}
+//
+//TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_set_count(uint32_t ep_id, uint8_t is_rx, uint16_t count) {
+//
+//}
+
+
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr) {
   (void) USBx;
 #ifdef FSDEV_BUS_32BIT
-  uint32_t count_addr = FSDEV_BTABLE->ep32[bEpIdx].tx_count_addr;
+  uint32_t count_addr = FSDEV_BTABLE->ep32[bEpIdx][0].count_addr;
   count_addr = (count_addr & 0xFFFF0000u) | (addr & 0x0000FFFCu);
-  FSDEV_BTABLE->ep32[bEpIdx].tx_count_addr = count_addr;
+  FSDEV_BTABLE->ep32[bEpIdx][0].count_addr = count_addr;
 #else
-  FSDEV_BTABLE->ep16[bEpIdx].tx_addr = addr;
+  FSDEV_BTABLE->ep16[bEpIdx][0].addr = addr;
 #endif
 }
 
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr) {
   (void) USBx;
 #ifdef FSDEV_BUS_32BIT
-  uint32_t count_addr = FSDEV_BTABLE->ep32[bEpIdx].rx_count_addr;
+  uint32_t count_addr = FSDEV_BTABLE->ep32[bEpIdx][1].count_addr;
   count_addr = (count_addr & 0xFFFF0000u) | (addr & 0x0000FFFCu);
-  FSDEV_BTABLE->ep32[bEpIdx].rx_count_addr = count_addr;
+  FSDEV_BTABLE->ep32[bEpIdx][1].count_addr = count_addr;
 #else
-  FSDEV_BTABLE->ep16[bEpIdx].rx_addr = addr;
+  FSDEV_BTABLE->ep16[bEpIdx][1].addr = addr;
 #endif
 }
 
@@ -286,13 +293,13 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_address(USB_TypeDef * USB
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount) {
   (void) USBx;
 #ifdef FSDEV_BUS_32BIT
-  uint32_t count_addr = FSDEV_BTABLE->ep32[bEpIdx].tx_count_addr;
+  uint32_t count_addr = FSDEV_BTABLE->ep32[bEpIdx][0].count_addr;
   count_addr = (count_addr & ~0x03FF0000u) | ((wCount & 0x3FFu) << 16);
-  FSDEV_BTABLE->ep32[bEpIdx].tx_count_addr = count_addr;
+  FSDEV_BTABLE->ep32[bEpIdx][0].count_addr = count_addr;
 #else
-  uint16_t count = FSDEV_BTABLE->ep16[bEpIdx].tx_count;
+  uint16_t count = FSDEV_BTABLE->ep16[bEpIdx][0].count;
   count = (count & ~0x3FFU) | (wCount & 0x3FFU);
-  FSDEV_BTABLE->ep16[bEpIdx].tx_count = count;
+  FSDEV_BTABLE->ep16[bEpIdx][0].count = count;
 #endif
 }
 

From 75d3a3be84fa50abd5519e1879aa5dafc4a5c37d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 26 Jul 2024 00:02:06 +0700
Subject: [PATCH 091/204] implement btable_set_addr/count

---
 src/portable/st/stm32_fsdev/fsdev_common.h | 51 ++++++++++------------
 1 file changed, 22 insertions(+), 29 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 7d1f7fd90a..58a9ed96d0 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -256,51 +256,44 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_address(USB_TypeDef *
 #define pcd_get_ep_dbuf1_address pcd_get_ep_rx_address
 
 
-//TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_set_addr(uint32_t ep_id, uint8_t is_rx, uint16_t addr) {
-//
-//}
-//
-//TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_set_count(uint32_t ep_id, uint8_t is_rx, uint16_t count) {
-//
-//}
-
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr) {
-  (void) USBx;
+TU_ATTR_ALWAYS_INLINE static inline void btable_set_addr(uint32_t ep_id, uint8_t is_rx, uint16_t addr) {
 #ifdef FSDEV_BUS_32BIT
-  uint32_t count_addr = FSDEV_BTABLE->ep32[bEpIdx][0].count_addr;
+  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][is_rx].count_addr;
   count_addr = (count_addr & 0xFFFF0000u) | (addr & 0x0000FFFCu);
-  FSDEV_BTABLE->ep32[bEpIdx][0].count_addr = count_addr;
+  FSDEV_BTABLE->ep32[ep_id][is_rx].count_addr = count_addr;
 #else
-  FSDEV_BTABLE->ep16[bEpIdx][0].addr = addr;
+  FSDEV_BTABLE->ep16[ep_id][is_rx].addr = addr;
 #endif
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr) {
-  (void) USBx;
+TU_ATTR_ALWAYS_INLINE static inline void btable_set_count(uint32_t ep_id, uint8_t is_rx, uint16_t byte_count) {
 #ifdef FSDEV_BUS_32BIT
-  uint32_t count_addr = FSDEV_BTABLE->ep32[bEpIdx][1].count_addr;
-  count_addr = (count_addr & 0xFFFF0000u) | (addr & 0x0000FFFCu);
-  FSDEV_BTABLE->ep32[bEpIdx][1].count_addr = count_addr;
+  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][is_rx].count_addr;
+  count_addr = (count_addr & ~0x03FF0000u) | ((byte_count & 0x3FFu) << 16);
+  FSDEV_BTABLE->ep32[ep_id][is_rx].count_addr = count_addr;
 #else
-  FSDEV_BTABLE->ep16[bEpIdx][1].addr = addr;
+  uint16_t cnt = FSDEV_BTABLE->ep16[ep_id][is_rx].count;
+  cnt = (cnt & ~0x3FFU) | (byte_count & 0x3FFU);
+  FSDEV_BTABLE->ep16[ep_id][is_rx].count = cnt;
 #endif
 }
 
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr) {
+  (void) USBx;
+  btable_set_addr(bEpIdx, 0, addr);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr) {
+  (void) USBx;
+  btable_set_addr(bEpIdx, 1, addr);
+}
+
 #define pcd_set_ep_dbuf0_address pcd_set_ep_tx_address
 #define pcd_set_ep_dbuf1_address pcd_set_ep_rx_address
 
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount) {
   (void) USBx;
-#ifdef FSDEV_BUS_32BIT
-  uint32_t count_addr = FSDEV_BTABLE->ep32[bEpIdx][0].count_addr;
-  count_addr = (count_addr & ~0x03FF0000u) | ((wCount & 0x3FFu) << 16);
-  FSDEV_BTABLE->ep32[bEpIdx][0].count_addr = count_addr;
-#else
-  uint16_t count = FSDEV_BTABLE->ep16[bEpIdx][0].count;
-  count = (count & ~0x3FFU) | (wCount & 0x3FFU);
-  FSDEV_BTABLE->ep16[bEpIdx][0].count = count;
-#endif
+  btable_set_count(bEpIdx, 0, wCount);
 }
 
 #define pcd_set_ep_tx_dbuf0_cnt pcd_set_ep_tx_cnt

From 4a48544aebf362e77095c52ddcfcde6a65876acf Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 28 Jul 2024 12:04:25 +0200
Subject: [PATCH 092/204] audiod_function_t clean up.

---
 src/class/audio/audio_device.c | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 75bb0b8835..8c86de4337 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -303,8 +303,6 @@ typedef struct
 
   bool mounted;                 // Device opened
 
-  /*------------- From this point, data is not cleared by bus reset -------------*/
-
   uint16_t desc_length;         // Length of audio function descriptor
 
 #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
@@ -369,6 +367,8 @@ typedef struct
 #endif
 #endif
 
+  /*------------- From this point, data is not cleared by bus reset -------------*/
+
   // Buffer for control requests
   uint8_t * ctrl_buf;
   uint8_t ctrl_buf_sz;
@@ -377,14 +377,10 @@ typedef struct
   uint8_t * alt_setting;   // We need to save the current alternate setting this way, because it is possible that there are AS interfaces which do not have an EP!
 
   // EP Transfer buffers and FIFOs
-#if CFG_TUD_AUDIO_ENABLE_EP_OUT
-#if !CFG_TUD_AUDIO_ENABLE_DECODING
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
   tu_fifo_t ep_out_ff;
 #endif
 
-
-#endif // CFG_TUD_AUDIO_ENABLE_EP_OUT
-
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
   tu_fifo_t ep_in_ff;
 #endif
@@ -394,7 +390,6 @@ typedef struct
   CFG_TUSB_MEM_ALIGN uint8_t ep_int_buf[6];
 #endif
 
-
   // Support FIFOs for software encoding and decoding
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
   tu_fifo_t * rx_supp_ff;

From 6a67bac47c0f83eebd63ca99654ed26e51b21145 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 28 Jul 2024 13:23:48 +0200
Subject: [PATCH 093/204] Integrate OS guessing quirk into uac2_speaker_fb
 example.

---
 examples/device/uac2_speaker_fb/src/main.c    | 16 ++++
 .../uac2_speaker_fb/src/quirk_os_guessing.c   | 90 +++++++++++++++++++
 .../uac2_speaker_fb/src/quirk_os_guessing.h   | 75 ++++++++++++++++
 .../device/uac2_speaker_fb/src/tusb_config.h  |  8 ++
 .../uac2_speaker_fb/src/usb_descriptors.c     | 67 +++++++++++++-
 5 files changed, 253 insertions(+), 3 deletions(-)
 create mode 100644 examples/device/uac2_speaker_fb/src/quirk_os_guessing.c
 create mode 100644 examples/device/uac2_speaker_fb/src/quirk_os_guessing.h

diff --git a/examples/device/uac2_speaker_fb/src/main.c b/examples/device/uac2_speaker_fb/src/main.c
index 8573dfa4c5..0a8529a612 100644
--- a/examples/device/uac2_speaker_fb/src/main.c
+++ b/examples/device/uac2_speaker_fb/src/main.c
@@ -31,6 +31,10 @@
 #include "usb_descriptors.h"
 #include "common_types.h"
 
+#ifdef CFG_QUIRK_OS_GUESSING
+#include "quirk_os_guessing.h"
+#endif
+
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF PROTOTYPES
 //--------------------------------------------------------------------+
@@ -385,6 +389,18 @@ bool tud_audio_rx_done_post_read_cb(uint8_t rhport, uint16_t n_bytes_received, u
   return true;
 }
 #endif
+
+#if CFG_QUIRK_OS_GUESSING
+bool tud_audio_feedback_format_correction_cb(uint8_t func_id)
+{
+  (void)func_id;
+  if(tud_speed_get() == TUSB_SPEED_FULL && quirk_os_guessing_get() == QUIRK_OS_GUESSING_OSX) {
+    return true;
+  } else {
+    return false;
+  }
+}
+#endif
 //--------------------------------------------------------------------+
 // AUDIO Task
 //--------------------------------------------------------------------+
diff --git a/examples/device/uac2_speaker_fb/src/quirk_os_guessing.c b/examples/device/uac2_speaker_fb/src/quirk_os_guessing.c
new file mode 100644
index 0000000000..965bbd6cf0
--- /dev/null
+++ b/examples/device/uac2_speaker_fb/src/quirk_os_guessing.c
@@ -0,0 +1,90 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 HiFiPhile
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#include "quirk_os_guessing.h"
+
+static tusb_desc_type_t desc_req_buf[2];
+static int desc_req_idx = 0;
+
+// Place at the start of tud_descriptor_device_cb()
+void quirk_os_guessing_desc_device_cb() {
+  desc_req_idx = 0;
+}
+
+// Place at the start of tud_descriptor_configuration_cb()
+void quirk_os_guessing_desc_configuration_cb() {
+  // Skip redundant request
+  if (desc_req_idx == 0 || (desc_req_idx == 1 && desc_req_buf[0] != TUSB_DESC_CONFIGURATION)) {
+    desc_req_buf[desc_req_idx++] = TUSB_DESC_CONFIGURATION;
+  }
+}
+
+// Place at the start of tud_descriptor_bos_cb()
+void quirk_os_guessing_desc_bos_cb() {
+  // Skip redundant request
+  if (desc_req_idx == 0 || (desc_req_idx == 1 && desc_req_buf[0] != TUSB_DESC_BOS)) {
+    desc_req_buf[desc_req_idx++] = TUSB_DESC_BOS;
+  }
+}
+
+// Place at the start of tud_descriptor_string_cb()
+void quirk_os_guessing_desc_string_cb() {
+  // Skip redundant request
+  if (desc_req_idx == 0 || (desc_req_idx == 1 && desc_req_buf[0] != TUSB_DESC_STRING)) {
+    desc_req_buf[desc_req_idx++] = TUSB_DESC_STRING;
+  }
+}
+
+// Each OS request descriptors differently:
+// Windows 10 - 11
+//    Device Desc
+//    Config Desc
+//    BOS    Desc
+//    String Desc
+// Linux 3.16 - 6.8
+//    Device Desc
+//    BOS    Desc
+//    Config Desc
+//    String Desc
+// OS X Ventura - Sonoma
+//    Device Desc
+//    String Desc
+//    Config Desc || BOS    Desc
+//    BOS    Desc || Config Desc
+quirk_os_guessing_t quirk_os_guessing_get(void) {
+  if (desc_req_idx < 2) {
+    return QUIRK_OS_GUESSING_UNKNOWN;
+  }
+
+  if (desc_req_buf[0] == TUSB_DESC_BOS && desc_req_buf[1] == TUSB_DESC_CONFIGURATION) {
+    return QUIRK_OS_GUESSING_LINUX;
+  } else if (desc_req_buf[0] == TUSB_DESC_CONFIGURATION && desc_req_buf[1] == TUSB_DESC_BOS) {
+    return QUIRK_OS_GUESSING_WINDOWS;
+  } else if (desc_req_buf[0] == TUSB_DESC_STRING && (desc_req_buf[1] == TUSB_DESC_BOS || desc_req_buf[1] == TUSB_DESC_CONFIGURATION)) {
+    return QUIRK_OS_GUESSING_OSX;
+  }
+
+  return QUIRK_OS_GUESSING_UNKNOWN;
+}
diff --git a/examples/device/uac2_speaker_fb/src/quirk_os_guessing.h b/examples/device/uac2_speaker_fb/src/quirk_os_guessing.h
new file mode 100644
index 0000000000..1120355c9e
--- /dev/null
+++ b/examples/device/uac2_speaker_fb/src/quirk_os_guessing.h
@@ -0,0 +1,75 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 HiFiPhile
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#ifndef _QUIRK_OS_GUESSING_H_
+#define _QUIRK_OS_GUESSING_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "tusb.h"
+
+//================================== !!! WARNING !!! ====================================
+// This quirk operate out of USB specification in order to workaround specific issues.
+// It may not work on your platform.
+//=======================================================================================
+//
+// Prerequisites:
+// - Set USB version to at least 2.01 in Device Descriptor
+// - Has a valid BOS Descriptor, refer to webusb_serial example
+//
+// Attention:
+//   Windows detection result comes out after Configuration Descriptor request,
+//   meaning it will be too late to do descriptor adjustment. It's advised to make
+//   Windows as default configuration and adjust to other OS accordingly.
+
+typedef enum {
+  QUIRK_OS_GUESSING_UNKNOWN,
+  QUIRK_OS_GUESSING_LINUX,
+  QUIRK_OS_GUESSING_OSX,
+  QUIRK_OS_GUESSING_WINDOWS,
+} quirk_os_guessing_t;
+
+// Get Host OS type
+quirk_os_guessing_t quirk_os_guessing_get(void);
+
+// Place at the start of tud_descriptor_device_cb()
+void quirk_os_guessing_desc_device_cb(void);
+
+// Place at the start of tud_descriptor_configuration_cb()
+void quirk_os_guessing_desc_configuration_cb(void);
+
+// Place at the start of tud_descriptor_bos_cb()
+void quirk_os_guessing_desc_bos_cb(void);
+
+// Place at the start of tud_descriptor_string_cb()
+void quirk_os_guessing_desc_string_cb(void);
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _QUIRK_OS_GUESSING_H_ */
diff --git a/examples/device/uac2_speaker_fb/src/tusb_config.h b/examples/device/uac2_speaker_fb/src/tusb_config.h
index 1cc1031c1d..fd4925c7f3 100644
--- a/examples/device/uac2_speaker_fb/src/tusb_config.h
+++ b/examples/device/uac2_speaker_fb/src/tusb_config.h
@@ -87,6 +87,14 @@ extern "C" {
 #define CFG_TUSB_MEM_ALIGN        __attribute__ ((aligned(4)))
 #endif
 
+/* (Needed for Full-Speed only)
+ * Enable host OS guessing to workaround UAC2 compatibility issues between Windows and OS X
+ * The default configuration only support Windows and Linux, enable this option for OS X
+ * support. Otherwise if you don't need Windows support you can make OS X's configuration as
+ * default.
+ */
+#define CFG_QUIRK_OS_GUESSING   1
+
 //--------------------------------------------------------------------
 // DEVICE CONFIGURATION
 //--------------------------------------------------------------------
diff --git a/examples/device/uac2_speaker_fb/src/usb_descriptors.c b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
index fa307674d8..31c5e116d2 100644
--- a/examples/device/uac2_speaker_fb/src/usb_descriptors.c
+++ b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
@@ -28,6 +28,10 @@
 #include "usb_descriptors.h"
 #include "common_types.h"
 
+#ifdef CFG_QUIRK_OS_GUESSING
+#include "quirk_os_guessing.h"
+#endif
+
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
  * Same VID/PID with different interface e.g MSC (first), then CDC (later) will possibly cause system error on PC.
  *
@@ -45,7 +49,7 @@ tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
-    .bcdUSB             = 0x0200,
+    .bcdUSB             = 0x0201,
 
     // Use Interface Association Descriptor (IAD) for Audio
     // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1)
@@ -69,6 +73,9 @@ tusb_desc_device_t const desc_device =
 // Application return pointer to descriptor
 uint8_t const * tud_descriptor_device_cb(void)
 {
+#if CFG_QUIRK_OS_GUESSING
+  quirk_os_guessing_desc_device_cb();
+#endif
   return (uint8_t const *)&desc_device;
 }
 
@@ -144,7 +151,7 @@ uint8_t const * tud_hid_descriptor_report_cb(uint8_t itf)
   #define EPNUM_DEBUG       0x02
 #endif
 
-uint8_t const desc_configuration[] =
+uint8_t const desc_configuration_default[] =
 {
     // Config number, interface count, string index, total length, attribute, power in mA
     TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
@@ -158,13 +165,63 @@ uint8_t const desc_configuration[] =
 #endif
 };
 
+#if CFG_QUIRK_OS_GUESSING
+// OS X needs 3 bytes feedback endpoint on FS
+uint8_t const desc_configuration_osx_fs[] =
+{
+    // Config number, interface count, string index, total length, attribute, power in mA
+    TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
+
+    // Interface number, string index, byte per sample, bit per sample, EP Out, EP size, EP feedback, feedback EP size,
+    TUD_AUDIO_SPEAKER_STEREO_FB_DESCRIPTOR(0, 4, CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_RESOLUTION_RX, EPNUM_AUDIO_OUT, CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX, EPNUM_AUDIO_FB | 0x80, 3),
+
+#if CFG_AUDIO_DEBUG
+    // Interface number, string index, protocol, report descriptor len, EP In address, size & polling interval
+    TUD_HID_DESCRIPTOR(ITF_NUM_DEBUG, 0, HID_ITF_PROTOCOL_NONE, sizeof(desc_hid_report), EPNUM_DEBUG | 0x80, CFG_TUD_HID_EP_BUFSIZE, 7)
+#endif
+};
+#endif
+
 // Invoked when received GET CONFIGURATION DESCRIPTOR
 // Application return pointer to descriptor
 // Descriptor contents must exist long enough for transfer to complete
 uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 {
   (void)index; // for multiple configurations
-  return desc_configuration;
+
+#if CFG_QUIRK_OS_GUESSING
+  quirk_os_guessing_desc_configuration_cb();
+  if(tud_speed_get() == TUSB_SPEED_FULL && quirk_os_guessing_get() == QUIRK_OS_GUESSING_OSX) {
+    return desc_configuration_osx_fs;
+  }
+#endif
+  return desc_configuration_default;
+}
+
+//--------------------------------------------------------------------+
+// BOS Descriptor, required for OS guessing quirk
+//--------------------------------------------------------------------+
+
+#define TUD_BOS_USB20_EXT_DESC_LEN  7
+
+#define BOS_TOTAL_LEN      (TUD_BOS_DESC_LEN + TUD_BOS_USB20_EXT_DESC_LEN)
+
+// BOS Descriptor is required for webUSB
+uint8_t const desc_bos[] =
+{
+  // total length, number of device caps
+  TUD_BOS_DESCRIPTOR(BOS_TOTAL_LEN, 1),
+
+  // USB 2.0 Extension Descriptor
+  0x07, TUSB_DESC_DEVICE_CAPABILITY, DEVICE_CAPABILITY_USB20_EXTENSION, 0x00, 0x00, 0x00,0x00
+};
+
+uint8_t const * tud_descriptor_bos_cb(void)
+{
+#if CFG_QUIRK_OS_GUESSING
+  quirk_os_guessing_desc_bos_cb();
+#endif
+  return desc_bos;
 }
 
 //--------------------------------------------------------------------+
@@ -197,6 +254,10 @@ uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
   size_t chr_count;
 
+#if CFG_QUIRK_OS_GUESSING
+  quirk_os_guessing_desc_string_cb();
+#endif
+
   switch ( index ) {
     case STRID_LANGID:
       memcpy(&_desc_str[1], string_desc_arr[0], 2);

From cfb44a38926ec2e406dc6b91e90d601324b719d7 Mon Sep 17 00:00:00 2001
From: graham sanderson <graham.sanderson@raspberrypi.com>
Date: Mon, 29 Jul 2024 12:28:58 -0500
Subject: [PATCH 094/204] add clocks.h as set_sys_clock_khz is moving there
 from stdlib.h

---
 hw/bsp/rp2040/family.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index cffb632f34..9360f7f57d 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -31,6 +31,7 @@
 #include "hardware/gpio.h"
 #include "hardware/sync.h"
 #include "hardware/resets.h"
+#include "hardware/clocks.h"
 #include "hardware/structs/ioqspi.h"
 #include "hardware/structs/sio.h"
 

From 0ebe81f4c3a6b38aef82b9f3a7d7f74fbf99c831 Mon Sep 17 00:00:00 2001
From: graham sanderson <graham.sanderson@raspberrypi.com>
Date: Mon, 29 Jul 2024 12:34:25 -0500
Subject: [PATCH 095/204] add explcit dependency

---
 hw/bsp/rp2040/family.cmake | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index c81390b284..d91821ffae 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -133,7 +133,10 @@ target_sources(tinyusb_bsp INTERFACE
 target_include_directories(tinyusb_bsp INTERFACE
 	${TOP}/hw
 	)
-target_link_libraries(tinyusb_bsp	INTERFACE pico_unique_id)
+target_link_libraries(tinyusb_bsp INTERFACE
+	pico_unique_id
+	hardware_clocks
+	)
 
 # tinyusb_additions will hold our extra settings for examples
 add_library(tinyusb_additions INTERFACE)

From 6771ef35d9fd61bcddb305dedef7d9f4addf86a5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 30 Jul 2024 11:17:55 +0700
Subject: [PATCH 096/204] more btable set/get clean up

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 54 +++++++------------
 src/portable/st/stm32_fsdev/fsdev_common.h    | 24 +--------
 2 files changed, 19 insertions(+), 59 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 927ecac857..fc1627a1c2 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -320,12 +320,8 @@ static void dcd_ep_ctr_tx_handler(uint32_t wIstr) {
       return;
     }
     xfer->iso_in_sending = false;
-
-    if (wEPRegVal & USB_EP_DTOG_TX) {
-      pcd_set_ep_tx_dbuf0_cnt(USB, EPindex, 0);
-    } else {
-      pcd_set_ep_tx_dbuf1_cnt(USB, EPindex, 0);
-    }
+    uint8_t buf_id = (wEPRegVal & USB_EP_DTOG_TX) ? 0 : 1;
+    btable_set_count(EPindex, buf_id, 0);
   }
 
   if ((xfer->total_len != xfer->queued_len)) {
@@ -406,21 +402,16 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
     if (ep_addr != 0u) {
       pcd_clear_rx_ep_ctr(USB, EPindex);
     }
-    uint32_t count;
-    uint16_t addr;
-    /* Read from correct register when ISOCHRONOUS (double buffered) */
+
+    uint8_t buf_id;
     if ((wEPRegVal & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS) {
-      if (wEPRegVal & USB_EP_DTOG_RX) {
-        count = pcd_get_ep_dbuf0_cnt(USB, EPindex);
-        addr = pcd_get_ep_dbuf0_address(USB, EPindex);
-      } else {
-        count = pcd_get_ep_dbuf1_cnt(USB, EPindex);
-        addr = pcd_get_ep_dbuf1_address(USB, EPindex);
-      }
+      // ISO endpoints are double buffered
+      buf_id = (wEPRegVal & USB_EP_DTOG_RX) ? 0 : 1;
     } else {
-      count = pcd_get_ep_rx_cnt(USB, EPindex);
-      addr = pcd_get_ep_rx_address(USB, EPindex);
+      buf_id = 1;
     }
+    uint32_t count = btable_get_count(EPindex, buf_id);
+    uint16_t addr = (uint16_t) btable_get_addr(EPindex, buf_id);
 
     TU_ASSERT(count <= xfer->max_packet_size, /**/);
 
@@ -630,7 +621,6 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   uint8_t const dir = tu_edpt_dir(ep_addr);
   const uint16_t packet_size = tu_edpt_packet_size(desc_ep);
   const uint16_t buffer_size = pcd_aligned_buffer_size(packet_size);
-  uint16_t pma_addr;
   uint32_t wType;
 
   TU_ASSERT(ep_idx < FSDEV_EP_COUNT);
@@ -658,7 +648,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   pcd_set_ep_address(USB, ep_idx, tu_edpt_number(ep_addr));
 
   /* Create a packet memory buffer area. */
-  pma_addr = dcd_pma_alloc(buffer_size, false);
+  uint16_t pma_addr = dcd_pma_alloc(buffer_size, false);
 
   if (dir == TUSB_DIR_IN) {
     pcd_set_ep_tx_address(USB, ep_idx, pma_addr);
@@ -732,11 +722,9 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
   uint32_t pma_addr = dcd_pma_alloc(buffer_size, true);
   uint16_t pma_addr2 = pma_addr;
 #endif
-  pcd_set_ep_tx_address(USB, ep_idx, pma_addr);
-  pcd_set_ep_rx_address(USB, ep_idx, pma_addr2);
-
+  btable_set_addr(ep_idx, 0, pma_addr);
+  btable_set_addr(ep_idx, 1, pma_addr2);
   pcd_set_eptype(USB, ep_idx, USB_EP_ISOCHRONOUS);
-
   xfer_ctl_ptr(ep_addr)->ep_idx = ep_idx;
 
   return true;
@@ -770,8 +758,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoin
 }
 
 // Currently, single-buffered, and only 64 bytes at a time (max)
-static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix)
-{
+static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   uint16_t len = (uint16_t)(xfer->total_len - xfer->queued_len);
   if (len > xfer->max_packet_size) {
     len = xfer->max_packet_size;
@@ -779,20 +766,15 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix)
 
   uint16_t ep_reg = pcd_get_endpoint(USB, ep_ix);
   bool const is_iso = (ep_reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS;
-  uint16_t addr_ptr;
 
+  uint8_t buf_id;
   if (is_iso) {
-    if (ep_reg & USB_EP_DTOG_TX) {
-      addr_ptr = pcd_get_ep_dbuf1_address(USB, ep_ix);
-      pcd_set_ep_tx_dbuf1_cnt(USB, ep_ix, len);
-    } else {
-      addr_ptr = pcd_get_ep_dbuf0_address(USB, ep_ix);
-      pcd_set_ep_tx_dbuf0_cnt(USB, ep_ix, len);
-    }
+    buf_id = (ep_reg & USB_EP_DTOG_TX) ? 1 : 0;
   } else {
-    addr_ptr = pcd_get_ep_tx_address(USB, ep_ix);
-    pcd_set_ep_tx_cnt(USB, ep_ix, len);
+    buf_id = 0;
   }
+  uint16_t addr_ptr = (uint16_t) btable_get_addr(ep_ix, buf_id);
+  btable_set_count(ep_ix, buf_id, len);
 
   if (xfer->ff) {
     dcd_write_packet_memory_ff(xfer->ff, addr_ptr, len);
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 58a9ed96d0..72db609cbd 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -69,7 +69,7 @@ TU_VERIFY_STATIC(FSDEV_BTABLE_BASE % 8 == 0, "BTABLE base must be aligned to 8 b
 // 16-bit or 32-bit depending on FSDEV_BUS_32BIT.
 typedef struct {
   union {
-    // 0: tx, 1: rx
+    // 0: TX (IN), 1: RX (OUT)
 
     // strictly 16-bit access (could be 32-bit aligned)
     struct {
@@ -239,9 +239,6 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USB
   return btable_get_count(bEpIdx, 1);
 }
 
-#define pcd_get_ep_dbuf0_cnt pcd_get_ep_tx_cnt
-#define pcd_get_ep_dbuf1_cnt pcd_get_ep_rx_cnt
-
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx) {
   (void) USBx;
   return btable_get_addr(bEpIdx, 0);
@@ -252,10 +249,6 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_address(USB_TypeDef *
   return btable_get_addr(bEpIdx, 1);
 }
 
-#define pcd_get_ep_dbuf0_address pcd_get_ep_tx_address
-#define pcd_get_ep_dbuf1_address pcd_get_ep_rx_address
-
-
 TU_ATTR_ALWAYS_INLINE static inline void btable_set_addr(uint32_t ep_id, uint8_t is_rx, uint16_t addr) {
 #ifdef FSDEV_BUS_32BIT
   uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][is_rx].count_addr;
@@ -288,26 +281,11 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_address(USB_TypeDef * USB
   btable_set_addr(bEpIdx, 1, addr);
 }
 
-#define pcd_set_ep_dbuf0_address pcd_set_ep_tx_address
-#define pcd_set_ep_dbuf1_address pcd_set_ep_rx_address
-
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount) {
   (void) USBx;
   btable_set_count(bEpIdx, 0, wCount);
 }
 
-#define pcd_set_ep_tx_dbuf0_cnt pcd_set_ep_tx_cnt
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_dbuf1_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount) {
-#ifdef FSDEV_BUS_32BIT
-  (void) USBx;
-  pma32[2*bEpIdx + 1] = (pma32[2*bEpIdx + 1] & ~0x03FF0000u) | ((wCount & 0x3FFu) << 16);
-#else
-  volatile uint16_t * reg = pcd_ep_rx_cnt_ptr(USBx, bEpIdx);
-  *reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
-#endif
-}
-
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_blsize_num_blocks(USB_TypeDef * USBx, uint32_t rxtx_idx,
                                                                       uint32_t blocksize, uint32_t numblocks) {
   /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */

From 749f0921745ffe3647e6955b41b15e9643f3f3c4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 30 Jul 2024 12:46:09 +0700
Subject: [PATCH 097/204] refactor btable_set_rx_bufsize()

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c |  23 ++--
 src/portable/st/stm32_fsdev/fsdev_common.h    | 122 +++++-------------
 2 files changed, 41 insertions(+), 104 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index fc1627a1c2..cd00e63954 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -370,7 +370,7 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
 
   if (wEPRegVal & USB_EP_SETUP) {
     /* Setup packet */
-    uint32_t count = pcd_get_ep_rx_cnt(USB, EPindex);
+    uint32_t count = btable_get_count(EPindex, BTABLE_BUF_RX);
     // Setup packet should always be 8 bytes. If not, ignore it, and try again.
     if (count == 8) {
       // Must reset EP to NAK (in case it had been stalling)
@@ -387,13 +387,14 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
         pcd_rx_dtog(USB, 0);
       }
 
+      uint16_t rx_addr = btable_get_addr(EPindex, BTABLE_BUF_RX);
 #ifdef FSDEV_BUS_32BIT
-      dcd_event_setup_received(0, (uint8_t *)(USB_PMAADDR + pcd_get_ep_rx_address(USB, EPindex)), true);
+      dcd_event_setup_received(0, (uint8_t *)(USB_PMAADDR + rx_addr), true);
 #else
       // The setup_received function uses memcpy, so this must first copy the setup data into
       // user memory, to allow for the 32-bit access that memcpy performs.
       uint8_t userMemBuf[8];
-      dcd_read_packet_memory(userMemBuf, pcd_get_ep_rx_address(USB, EPindex), 8);
+      dcd_read_packet_memory(userMemBuf, rx_addr, 8);
       dcd_event_setup_received(0, (uint8_t*) userMemBuf, true);
 #endif
     }
@@ -434,7 +435,7 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
       if ((wEPRegVal & USB_EP_TYPE_MASK) != USB_EP_ISOCHRONOUS) {
         uint16_t remaining = xfer->total_len - xfer->queued_len;
         uint16_t cnt = tu_min16(remaining, xfer->max_packet_size);
-        pcd_set_ep_rx_cnt(USB, EPindex, cnt);
+        btable_set_rx_bufsize(EPindex, BTABLE_BUF_RX, cnt);
       }
       pcd_set_ep_rx_status(USB, EPindex, USB_EP_RX_VALID);
     }
@@ -445,7 +446,7 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
   // (Based on the docs, it seems SETUP will always be accepted after CTR is cleared)
   if (ep_addr == 0u) {
     // Always be prepared for a status packet...
-    pcd_set_ep_rx_cnt(USB, EPindex, CFG_TUD_ENDPOINT0_SIZE);
+    btable_set_rx_bufsize(EPindex, BTABLE_BUF_RX, CFG_TUD_ENDPOINT0_SIZE);
     pcd_clear_rx_ep_ctr(USB, EPindex);
   }
 }
@@ -651,11 +652,11 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   uint16_t pma_addr = dcd_pma_alloc(buffer_size, false);
 
   if (dir == TUSB_DIR_IN) {
-    pcd_set_ep_tx_address(USB, ep_idx, pma_addr);
+    btable_set_addr(ep_idx, BTABLE_BUF_TX, pma_addr);
     pcd_set_ep_tx_status(USB, ep_idx, USB_EP_TX_NAK);
     pcd_clear_tx_dtog(USB, ep_idx);
   } else {
-    pcd_set_ep_rx_address(USB, ep_idx, pma_addr);
+    btable_set_addr(ep_idx, BTABLE_BUF_RX, pma_addr);
     pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_NAK);
     pcd_clear_rx_dtog(USB, ep_idx);
   }
@@ -771,7 +772,7 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   if (is_iso) {
     buf_id = (ep_reg & USB_EP_DTOG_TX) ? 1 : 0;
   } else {
-    buf_id = 0;
+    buf_id = BTABLE_BUF_TX;
   }
   uint16_t addr_ptr = (uint16_t) btable_get_addr(ep_ix, buf_id);
   btable_set_count(ep_ix, buf_id, len);
@@ -806,10 +807,10 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr)
     uint16_t ep_reg = pcd_get_endpoint(USB, ep_idx);
 
     if ((ep_reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS) {
-      pcd_set_ep_rx_dbuf0_cnt(USB, ep_idx, cnt);
-      pcd_set_ep_rx_dbuf1_cnt(USB, ep_idx, cnt);
+      btable_set_rx_bufsize(ep_idx, 0, cnt);
+      btable_set_rx_bufsize(ep_idx, 1, cnt);
     } else {
-      pcd_set_ep_rx_cnt(USB, ep_idx, cnt);
+      btable_set_rx_bufsize(ep_idx, BTABLE_BUF_RX, cnt);
     }
 
     pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_VALID);
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 72db609cbd..05354d7055 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -62,6 +62,11 @@ TU_VERIFY_STATIC(FSDEV_BTABLE_BASE % 8 == 0, "BTABLE base must be aligned to 8 b
   #define pma_aligned
 #endif
 
+enum {
+  BTABLE_BUF_TX = 0,
+  BTABLE_BUF_RX = 1
+};
+
 // hardware limit endpoint
 #define FSDEV_EP_COUNT 8
 
@@ -105,20 +110,6 @@ static volatile uint32_t * const pma32 = (volatile uint32_t*)USB_PMAADDR;
 typedef uint16_t fsdev_bus_t;
 // Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden)
 static volatile uint16_t * const pma = (volatile uint16_t*)USB_PMAADDR;
-
-TU_ATTR_ALWAYS_INLINE static inline volatile uint16_t * pcd_btable_word_ptr(USB_TypeDef * USBx, size_t x) {
-  size_t total_word_offset = (((USBx)->BTABLE)>>1) + x;
-  total_word_offset *= FSDEV_PMA_STRIDE;
-  return &(pma[total_word_offset]);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline volatile uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx) {
-  return pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 1u);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline volatile uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx) {
-  return pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 3u);
-}
 #endif
 
 /* Aligned buffer size according to hardware */
@@ -205,100 +196,47 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx,
   pcd_set_endpoint(USBx, bEpIdx,regVal);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_count(uint32_t ep_id, uint8_t is_rx) {
+TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_count(uint32_t ep_id, uint8_t buf_id) {
   uint16_t count;
 #ifdef FSDEV_BUS_32BIT
-  count = (FSDEV_BTABLE->ep32[ep_id][is_rx].count_addr >> 16);
+  count = (FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr >> 16);
 #else
-  count = FSDEV_BTABLE->ep16[ep_id][is_rx].count;
+  count = FSDEV_BTABLE->ep16[ep_id][buf_id].count;
 #endif
   return count & 0x3FFU;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_addr(uint32_t ep_id, uint8_t is_rx) {
+TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_addr(uint32_t ep_id, uint8_t buf_id) {
 #ifdef FSDEV_BUS_32BIT
-  return FSDEV_BTABLE->ep32[ep_id][is_rx].count_addr & 0x0000FFFFu;
+  return FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr & 0x0000FFFFu;
 #else
-  return FSDEV_BTABLE->ep16[ep_id][is_rx].addr;
+  return FSDEV_BTABLE->ep16[ep_id][buf_id].addr;
 #endif
 }
 
-/**
-  * @brief  gets counter of the tx buffer.
-  * @param  USBx USB peripheral instance register address.
-  * @param  bEpIdx Endpoint Number.
-  * @retval Counter value
-  */
-TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx) {
-  (void) USBx;
-  return btable_get_count(bEpIdx, 0);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx) {
-  (void) USBx;
-  return btable_get_count(bEpIdx, 1);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx) {
-  (void) USBx;
-  return btable_get_addr(bEpIdx, 0);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_address(USB_TypeDef * USBx, uint32_t bEpIdx) {
-  (void) USBx;
-  return btable_get_addr(bEpIdx, 1);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void btable_set_addr(uint32_t ep_id, uint8_t is_rx, uint16_t addr) {
+TU_ATTR_ALWAYS_INLINE static inline void btable_set_addr(uint32_t ep_id, uint8_t buf_id, uint16_t addr) {
 #ifdef FSDEV_BUS_32BIT
-  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][is_rx].count_addr;
+  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
   count_addr = (count_addr & 0xFFFF0000u) | (addr & 0x0000FFFCu);
-  FSDEV_BTABLE->ep32[ep_id][is_rx].count_addr = count_addr;
+  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
 #else
-  FSDEV_BTABLE->ep16[ep_id][is_rx].addr = addr;
+  FSDEV_BTABLE->ep16[ep_id][buf_id].addr = addr;
 #endif
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void btable_set_count(uint32_t ep_id, uint8_t is_rx, uint16_t byte_count) {
+TU_ATTR_ALWAYS_INLINE static inline void btable_set_count(uint32_t ep_id, uint8_t buf_id, uint16_t byte_count) {
 #ifdef FSDEV_BUS_32BIT
-  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][is_rx].count_addr;
+  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
   count_addr = (count_addr & ~0x03FF0000u) | ((byte_count & 0x3FFu) << 16);
-  FSDEV_BTABLE->ep32[ep_id][is_rx].count_addr = count_addr;
+  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
 #else
-  uint16_t cnt = FSDEV_BTABLE->ep16[ep_id][is_rx].count;
+  uint16_t cnt = FSDEV_BTABLE->ep16[ep_id][buf_id].count;
   cnt = (cnt & ~0x3FFU) | (byte_count & 0x3FFU);
-  FSDEV_BTABLE->ep16[ep_id][is_rx].count = cnt;
+  FSDEV_BTABLE->ep16[ep_id][buf_id].count = cnt;
 #endif
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr) {
-  (void) USBx;
-  btable_set_addr(bEpIdx, 0, addr);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr) {
-  (void) USBx;
-  btable_set_addr(bEpIdx, 1, addr);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount) {
-  (void) USBx;
-  btable_set_count(bEpIdx, 0, wCount);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_blsize_num_blocks(USB_TypeDef * USBx, uint32_t rxtx_idx,
-                                                                      uint32_t blocksize, uint32_t numblocks) {
-  /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
-#ifdef FSDEV_BUS_32BIT
-  (void) USBx;
-  pma32[rxtx_idx] = (pma32[rxtx_idx] & 0x0000FFFFu) | (blocksize << 31) | ((numblocks - blocksize) << 26);
-#else
-  volatile uint16_t *pdwReg = pcd_btable_word_ptr(USBx, rxtx_idx*2u + 1u);
-  *pdwReg = (blocksize << 15) | ((numblocks - blocksize) << 10);
-#endif
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_bufsize(USB_TypeDef * USBx, uint32_t rxtx_idx, uint32_t wCount) {
+TU_ATTR_ALWAYS_INLINE static inline void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint32_t wCount) {
   wCount = pcd_aligned_buffer_size(wCount);
 
   /* We assume that the buffer size is already aligned to hardware requirements. */
@@ -309,19 +247,17 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_bufsize(USB_TypeDef * USBx,
   TU_ASSERT((wCount - (numblocks * (blocksize ? 32 : 2))) == 0, /**/);
 
   /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
-  pcd_set_ep_blsize_num_blocks(USBx, rxtx_idx, blocksize, numblocks);
-}
+  uint16_t bl_nb = (blocksize << 15) | ((numblocks - blocksize) << 10);
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_dbuf0_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount) {
-  pcd_set_ep_bufsize(USBx, 2*bEpIdx, wCount);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount) {
-  pcd_set_ep_bufsize(USBx, 2*bEpIdx + 1, wCount);
+#ifdef FSDEV_BUS_32BIT
+  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
+  count_addr = (bl_nb << 16) | (count_addr & 0x0000FFFFu);
+  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
+#else
+  FSDEV_BTABLE->ep16[ep_id][buf_id].count = bl_nb;
+#endif
 }
 
-#define pcd_set_ep_rx_dbuf1_cnt pcd_set_ep_rx_cnt
-
 /**
   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
   * @param  USBx USB peripheral instance register address.

From b15814b2f9579ef126b2ad30b6fff0e338ead3ef Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 30 Jul 2024 16:29:54 +0700
Subject: [PATCH 098/204] move align buffer to pma_alloc()

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c |  32 ++--
 src/portable/st/stm32_fsdev/fsdev_common.h    | 140 +++++++++---------
 2 files changed, 85 insertions(+), 87 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index cd00e63954..2be6ef031c 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -170,7 +170,7 @@ static void dcd_ep_ctr_handler(void);
 
 // PMA allocation/access
 static uint16_t ep_buf_ptr; ///< Points to first free memory location
-static uint32_t dcd_pma_alloc(uint16_t length, bool dbuf);
+static uint32_t dcd_pma_alloc(uint16_t len, bool dbuf);
 static uint8_t dcd_ep_alloc(uint8_t ep_addr, uint8_t ep_type);
 static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes);
 static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes);
@@ -551,21 +551,19 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const *req
  * In case of double buffering, high 16bit is the address of 2nd buffer
  * During failure, TU_ASSERT is used. If this happens, rework/reallocate memory manually.
  */
-static uint32_t dcd_pma_alloc(uint16_t length, bool dbuf)
+static uint32_t dcd_pma_alloc(uint16_t len, bool dbuf)
 {
-  // Ensure allocated buffer is aligned
-#ifdef FSDEV_BUS_32BIT
-  length = (length + 3) & ~0x03;
-#else
-  length = (length + 1) & ~0x01;
-#endif
+  uint8_t blsize, num_block;
+  uint16_t aligned_len = pma_align_buffer_size(len, &blsize, &num_block);
+  (void) blsize;
+  (void) num_block;
 
   uint32_t addr = ep_buf_ptr;
-  ep_buf_ptr = (uint16_t)(ep_buf_ptr + length); // increment buffer pointer
+  ep_buf_ptr = (uint16_t)(ep_buf_ptr + aligned_len); // increment buffer pointer
 
   if (dbuf) {
     addr |= ((uint32_t)ep_buf_ptr) << 16;
-    ep_buf_ptr = (uint16_t)(ep_buf_ptr + length); // increment buffer pointer
+    ep_buf_ptr = (uint16_t)(ep_buf_ptr + aligned_len); // increment buffer pointer
   }
 
   // Verify packet buffer is not overflowed
@@ -621,11 +619,9 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   uint8_t const ep_idx = dcd_ep_alloc(ep_addr, desc_ep->bmAttributes.xfer);
   uint8_t const dir = tu_edpt_dir(ep_addr);
   const uint16_t packet_size = tu_edpt_packet_size(desc_ep);
-  const uint16_t buffer_size = pcd_aligned_buffer_size(packet_size);
   uint32_t wType;
 
   TU_ASSERT(ep_idx < FSDEV_EP_COUNT);
-  TU_ASSERT(buffer_size <= 64);
 
   // Set type
   switch (desc_ep->bmAttributes.xfer) {
@@ -649,7 +645,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   pcd_set_ep_address(USB, ep_idx, tu_edpt_number(ep_addr));
 
   /* Create a packet memory buffer area. */
-  uint16_t pma_addr = dcd_pma_alloc(buffer_size, false);
+  uint16_t pma_addr = dcd_pma_alloc(packet_size, false);
 
   if (dir == TUSB_DIR_IN) {
     btable_set_addr(ep_idx, BTABLE_BUF_TX, pma_addr);
@@ -707,22 +703,20 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   }
 }
 
-bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size)
-{
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
   (void)rhport;
 
   uint8_t const ep_idx = dcd_ep_alloc(ep_addr, TUSB_XFER_ISOCHRONOUS);
-  const uint16_t buffer_size = pcd_aligned_buffer_size(largest_packet_size);
 
   /* Create a packet memory buffer area. Enable double buffering for devices with 2048 bytes PMA,
      for smaller devices double buffering occupy too much space. */
+  uint32_t pma_addr = dcd_pma_alloc(largest_packet_size, true);
 #if FSDEV_PMA_SIZE > 1024u
-  uint32_t pma_addr = dcd_pma_alloc(buffer_size, true);
   uint16_t pma_addr2 = pma_addr >> 16;
 #else
-  uint32_t pma_addr = dcd_pma_alloc(buffer_size, true);
   uint16_t pma_addr2 = pma_addr;
 #endif
+
   btable_set_addr(ep_idx, 0, pma_addr);
   btable_set_addr(ep_idx, 1, pma_addr2);
   pcd_set_eptype(USB, ep_idx, USB_EP_ISOCHRONOUS);
@@ -803,7 +797,7 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr)
   if (dir == TUSB_DIR_IN) {
     dcd_transmit_packet(xfer, ep_idx);
   } else {
-    uint32_t cnt = (uint32_t ) tu_min16(xfer->total_len, xfer->max_packet_size);
+    uint32_t cnt = (uint32_t) tu_min16(xfer->total_len, xfer->max_packet_size);
     uint16_t ep_reg = pcd_get_endpoint(USB, ep_idx);
 
     if ((ep_reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS) {
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 05354d7055..c8d259cfa1 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -96,7 +96,7 @@ TU_VERIFY_STATIC(FSDEV_BTABLE_BASE + FSDEV_EP_COUNT*8 <= FSDEV_PMA_SIZE, "BTABLE
 #define FSDEV_BTABLE ((volatile fsdev_btable_t*) (USB_PMAADDR+FSDEV_BTABLE_BASE))
 
 //--------------------------------------------------------------------+
-// Helper
+// BTable
 //--------------------------------------------------------------------+
 
 // The fsdev_bus_t type can be used for both register and PMA access necessities
@@ -112,18 +112,84 @@ typedef uint16_t fsdev_bus_t;
 static volatile uint16_t * const pma = (volatile uint16_t*)USB_PMAADDR;
 #endif
 
+TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_addr(uint32_t ep_id, uint8_t buf_id) {
+#ifdef FSDEV_BUS_32BIT
+  return FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr & 0x0000FFFFu;
+#else
+  return FSDEV_BTABLE->ep16[ep_id][buf_id].addr;
+#endif
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void btable_set_addr(uint32_t ep_id, uint8_t buf_id, uint16_t addr) {
+#ifdef FSDEV_BUS_32BIT
+  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
+  count_addr = (count_addr & 0xFFFF0000u) | (addr & 0x0000FFFCu);
+  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
+#else
+  FSDEV_BTABLE->ep16[ep_id][buf_id].addr = addr;
+#endif
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_count(uint32_t ep_id, uint8_t buf_id) {
+  uint16_t count;
+#ifdef FSDEV_BUS_32BIT
+  count = (FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr >> 16);
+#else
+  count = FSDEV_BTABLE->ep16[ep_id][buf_id].count;
+#endif
+  return count & 0x3FFU;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void btable_set_count(uint32_t ep_id, uint8_t buf_id, uint16_t byte_count) {
+#ifdef FSDEV_BUS_32BIT
+  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
+  count_addr = (count_addr & ~0x03FF0000u) | ((byte_count & 0x3FFu) << 16);
+  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
+#else
+  uint16_t cnt = FSDEV_BTABLE->ep16[ep_id][buf_id].count;
+  cnt = (cnt & ~0x3FFU) | (byte_count & 0x3FFU);
+  FSDEV_BTABLE->ep16[ep_id][buf_id].count = cnt;
+#endif
+}
+
 /* Aligned buffer size according to hardware */
-TU_ATTR_ALWAYS_INLINE static inline uint16_t pcd_aligned_buffer_size(uint16_t size) {
+TU_ATTR_ALWAYS_INLINE static inline uint16_t pma_align_buffer_size(uint16_t size, uint8_t* blsize, uint8_t* num_block) {
   /* The STM32 full speed USB peripheral supports only a limited set of
    * buffer sizes given by the RX buffer entry format in the USB_BTABLE. */
-  uint16_t blocksize = (size > 62) ? 32 : 2;
+  uint16_t block_in_bytes;
+  if (size > 62) {
+    block_in_bytes = 32;
+    *blsize = 1;
+  } else {
+    block_in_bytes = 2;
+    *blsize = 0;
+  }
+
+  *num_block = tu_div_ceil(size, block_in_bytes);
 
-  // Round up while dividing requested size by blocksize
-  uint16_t numblocks = (size + blocksize - 1) / blocksize ;
+  return (*num_block) * block_in_bytes;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint32_t wCount) {
+  uint8_t blsize, num_block;
+  (void) pma_align_buffer_size(wCount, &blsize, &num_block);
 
-  return numblocks * blocksize;
+  /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
+  uint16_t bl_nb = (blsize << 15) | ((num_block - blsize) << 10);
+
+#ifdef FSDEV_BUS_32BIT
+  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
+  count_addr = (bl_nb << 16) | (count_addr & 0x0000FFFFu);
+  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
+#else
+  FSDEV_BTABLE->ep16[ep_id][buf_id].count = bl_nb;
+#endif
 }
 
+//--------------------------------------------------------------------+
+// Endpoint
+//--------------------------------------------------------------------+
+
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wRegValue) {
 #ifdef FSDEV_BUS_32BIT
   (void) USBx;
@@ -196,68 +262,6 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx,
   pcd_set_endpoint(USBx, bEpIdx,regVal);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_count(uint32_t ep_id, uint8_t buf_id) {
-  uint16_t count;
-#ifdef FSDEV_BUS_32BIT
-  count = (FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr >> 16);
-#else
-  count = FSDEV_BTABLE->ep16[ep_id][buf_id].count;
-#endif
-  return count & 0x3FFU;
-}
-
-TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_addr(uint32_t ep_id, uint8_t buf_id) {
-#ifdef FSDEV_BUS_32BIT
-  return FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr & 0x0000FFFFu;
-#else
-  return FSDEV_BTABLE->ep16[ep_id][buf_id].addr;
-#endif
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void btable_set_addr(uint32_t ep_id, uint8_t buf_id, uint16_t addr) {
-#ifdef FSDEV_BUS_32BIT
-  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
-  count_addr = (count_addr & 0xFFFF0000u) | (addr & 0x0000FFFCu);
-  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
-#else
-  FSDEV_BTABLE->ep16[ep_id][buf_id].addr = addr;
-#endif
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void btable_set_count(uint32_t ep_id, uint8_t buf_id, uint16_t byte_count) {
-#ifdef FSDEV_BUS_32BIT
-  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
-  count_addr = (count_addr & ~0x03FF0000u) | ((byte_count & 0x3FFu) << 16);
-  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
-#else
-  uint16_t cnt = FSDEV_BTABLE->ep16[ep_id][buf_id].count;
-  cnt = (cnt & ~0x3FFU) | (byte_count & 0x3FFU);
-  FSDEV_BTABLE->ep16[ep_id][buf_id].count = cnt;
-#endif
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint32_t wCount) {
-  wCount = pcd_aligned_buffer_size(wCount);
-
-  /* We assume that the buffer size is already aligned to hardware requirements. */
-  uint16_t blocksize = (wCount > 62) ? 1 : 0;
-  uint16_t numblocks = wCount / (blocksize ? 32 : 2);
-
-  /* There should be no remainder in the above calculation */
-  TU_ASSERT((wCount - (numblocks * (blocksize ? 32 : 2))) == 0, /**/);
-
-  /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
-  uint16_t bl_nb = (blocksize << 15) | ((numblocks - blocksize) << 10);
-
-#ifdef FSDEV_BUS_32BIT
-  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
-  count_addr = (bl_nb << 16) | (count_addr & 0x0000FFFFu);
-  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
-#else
-  FSDEV_BTABLE->ep16[ep_id][buf_id].count = bl_nb;
-#endif
-}
-
 /**
   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
   * @param  USBx USB peripheral instance register address.

From 1cf8e34ae5fc6466d07ac438691391c7a5a809ff Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 30 Jul 2024 20:32:26 +0700
Subject: [PATCH 099/204] improve set endpoint

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c |  41 ++++---
 src/portable/st/stm32_fsdev/fsdev_ch32.h      |  35 +++---
 src/portable/st/stm32_fsdev/fsdev_common.h    | 104 ++++++++++++------
 src/portable/st/stm32_fsdev/fsdev_stm32.h     |  17 +++
 4 files changed, 125 insertions(+), 72 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 2be6ef031c..6007b4a02c 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -616,24 +616,24 @@ static uint8_t dcd_ep_alloc(uint8_t ep_addr, uint8_t ep_type)
 bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   (void)rhport;
   uint8_t const ep_addr = desc_ep->bEndpointAddress;
-  uint8_t const ep_idx = dcd_ep_alloc(ep_addr, desc_ep->bmAttributes.xfer);
   uint8_t const dir = tu_edpt_dir(ep_addr);
   const uint16_t packet_size = tu_edpt_packet_size(desc_ep);
-  uint32_t wType;
-
+  uint8_t const ep_idx = dcd_ep_alloc(ep_addr, desc_ep->bmAttributes.xfer);
   TU_ASSERT(ep_idx < FSDEV_EP_COUNT);
 
+  uint32_t ep_reg = FSDEV_REG->ep[ep_idx].reg & ~USB_EPREG_MASK;
+  ep_reg |= tu_edpt_number(ep_addr) | USB_EP_CTR_RX | USB_EP_CTR_TX;
+
   // Set type
   switch (desc_ep->bmAttributes.xfer) {
     case TUSB_XFER_CONTROL:
-      wType = USB_EP_CONTROL;
+      ep_reg |= USB_EP_CONTROL;
       break;
     case TUSB_XFER_BULK:
-      wType = USB_EP_CONTROL;
+      ep_reg |= USB_EP_CONTROL; // FIXME should it be bulk?
       break;
-
     case TUSB_XFER_INTERRUPT:
-      wType = USB_EP_INTERRUPT;
+      ep_reg |= USB_EP_INTERRUPT;
       break;
 
     default:
@@ -641,24 +641,23 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
       TU_ASSERT(false);
   }
 
-  pcd_set_eptype(USB, ep_idx, wType);
-  pcd_set_ep_address(USB, ep_idx, tu_edpt_number(ep_addr));
-
   /* Create a packet memory buffer area. */
   uint16_t pma_addr = dcd_pma_alloc(packet_size, false);
+  btable_set_addr(ep_idx, dir == TUSB_DIR_IN ? BTABLE_BUF_TX : BTABLE_BUF_RX, pma_addr);
+
+  xfer_ctl_ptr(ep_addr)->max_packet_size = packet_size;
+  xfer_ctl_ptr(ep_addr)->ep_idx = ep_idx;
 
   if (dir == TUSB_DIR_IN) {
-    btable_set_addr(ep_idx, BTABLE_BUF_TX, pma_addr);
-    pcd_set_ep_tx_status(USB, ep_idx, USB_EP_TX_NAK);
-    pcd_clear_tx_dtog(USB, ep_idx);
+    ep_reg = ep_add_tx_status(ep_reg, USB_EP_TX_NAK);
+    ep_reg = ep_add_tx_dtog(ep_reg, 0);
+    ep_reg &= ~(USB_EPRX_STAT | USB_EP_DTOG_RX);
   } else {
-    btable_set_addr(ep_idx, BTABLE_BUF_RX, pma_addr);
-    pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_NAK);
-    pcd_clear_rx_dtog(USB, ep_idx);
+    ep_reg = ep_add_rx_status(ep_reg, USB_EP_RX_NAK);
+    ep_reg = ep_add_rx_dtog(ep_reg, 0);
+    ep_reg &= ~(USB_EPTX_STAT | USB_EP_DTOG_TX);
   }
-
-  xfer_ctl_ptr(ep_addr)->max_packet_size = packet_size;
-  xfer_ctl_ptr(ep_addr)->ep_idx = ep_idx;
+  pcd_set_endpoint(USB, ep_idx, ep_reg);
 
   return true;
 }
@@ -731,7 +730,8 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoin
   uint8_t const ep_addr = p_endpoint_desc->bEndpointAddress;
   uint8_t const ep_idx = xfer_ctl_ptr(ep_addr)->ep_idx;
   uint8_t const dir = tu_edpt_dir(ep_addr);
-  const uint16_t packet_size = tu_edpt_packet_size(p_endpoint_desc);
+
+  xfer_ctl_ptr(ep_addr)->max_packet_size = tu_edpt_packet_size(p_endpoint_desc);
 
   pcd_set_ep_tx_status(USB, ep_idx, USB_EP_TX_DIS);
   pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_DIS);
@@ -747,7 +747,6 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoin
     pcd_tx_dtog(USB, ep_idx);
   }
 
-  xfer_ctl_ptr(ep_addr)->max_packet_size = packet_size;
 
   return true;
 }
diff --git a/src/portable/st/stm32_fsdev/fsdev_ch32.h b/src/portable/st/stm32_fsdev/fsdev_ch32.h
index f63a80d567..81ef08b8a6 100644
--- a/src/portable/st/stm32_fsdev/fsdev_ch32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_ch32.h
@@ -55,28 +55,29 @@
 
 #define FSDEV_PMA_SIZE (512u)
 
+#if 1
 // volatile 32-bit aligned
-#define _va32     volatile TU_ATTR_ALIGNED(4)
+#define _vaa32     volatile TU_ATTR_ALIGNED(4)
 
 typedef struct {
-  _va32 uint16_t EP0R;            // 00: USB Endpoint 0 register
-  _va32 uint16_t EP1R;            // 04: USB Endpoint 1 register
-  _va32 uint16_t EP2R;            // 08: USB Endpoint 2 register
-  _va32 uint16_t EP3R;            // 0C: USB Endpoint 3 register
-  _va32 uint16_t EP4R;            // 10: USB Endpoint 4 register
-  _va32 uint16_t EP5R;            // 14: USB Endpoint 5 register
-  _va32 uint16_t EP6R;            // 18: USB Endpoint 6 register
-  _va32 uint16_t EP7R;            // 1C: USB Endpoint 7 register
-  _va32 uint16_t RESERVED7[16];   // Reserved
-  _va32 uint16_t CNTR;            // 40: Control register
-  _va32 uint16_t ISTR;            // 44: Interrupt status register
-  _va32 uint16_t FNR;             // 48: Frame number register
-  _va32 uint16_t DADDR;           // 4C: Device address register
-  _va32 uint16_t BTABLE;          // 50: Buffer Table address register
+  _vaa32 uint16_t EP0R;            // 00: USB Endpoint 0 register
+  _vaa32 uint16_t EP1R;            // 04: USB Endpoint 1 register
+  _vaa32 uint16_t EP2R;            // 08: USB Endpoint 2 register
+  _vaa32 uint16_t EP3R;            // 0C: USB Endpoint 3 register
+  _vaa32 uint16_t EP4R;            // 10: USB Endpoint 4 register
+  _vaa32 uint16_t EP5R;            // 14: USB Endpoint 5 register
+  _vaa32 uint16_t EP6R;            // 18: USB Endpoint 6 register
+  _vaa32 uint16_t EP7R;            // 1C: USB Endpoint 7 register
+  _vaa32 uint16_t RESERVED7[16];   // Reserved
+  _vaa32 uint16_t CNTR;            // 40: Control register
+  _vaa32 uint16_t ISTR;            // 44: Interrupt status register
+  _vaa32 uint16_t FNR;             // 48: Frame number register
+  _vaa32 uint16_t DADDR;           // 4C: Device address register
+  _vaa32 uint16_t BTABLE;          // 50: Buffer Table address register
 } USB_TypeDef;
+#endif
 
-TU_VERIFY_STATIC(sizeof(USB_TypeDef) == 0x54, "Size is not correct");
-TU_VERIFY_STATIC(offsetof(USB_TypeDef, CNTR) == 0x40, "Wrong offset");
+#define FSDEV_REG_BASE  0x40005C00UL
 
 #define USB_BASE            (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers base address */
 #define USB_PMAADDR         (APB1PERIPH_BASE + 0x00006000UL) /*!< USB_IP Packet Memory Area base address */
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index c8d259cfa1..3d1e1fe4ab 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -95,9 +95,8 @@ TU_VERIFY_STATIC(FSDEV_BTABLE_BASE + FSDEV_EP_COUNT*8 <= FSDEV_PMA_SIZE, "BTABLE
 
 #define FSDEV_BTABLE ((volatile fsdev_btable_t*) (USB_PMAADDR+FSDEV_BTABLE_BASE))
 
-//--------------------------------------------------------------------+
-// BTable
-//--------------------------------------------------------------------+
+// volatile 32-bit aligned
+#define _va32     volatile TU_ATTR_ALIGNED(4)
 
 // The fsdev_bus_t type can be used for both register and PMA access necessities
 // For type-safety create a new macro for the volatile address of PMAADDR
@@ -112,6 +111,39 @@ typedef uint16_t fsdev_bus_t;
 static volatile uint16_t * const pma = (volatile uint16_t*)USB_PMAADDR;
 #endif
 
+typedef struct {
+//  _va32 fsdev_bus_t EP0R;            // 00: USB Endpoint 0 register
+//  _va32 fsdev_bus_t EP1R;            // 04: USB Endpoint 1 register
+//  _va32 fsdev_bus_t EP2R;            // 08: USB Endpoint 2 register
+//  _va32 fsdev_bus_t EP3R;            // 0C: USB Endpoint 3 register
+//  _va32 fsdev_bus_t EP4R;            // 10: USB Endpoint 4 register
+//  _va32 fsdev_bus_t EP5R;            // 14: USB Endpoint 5 register
+//  _va32 fsdev_bus_t EP6R;            // 18: USB Endpoint 6 register
+//  _va32 fsdev_bus_t EP7R;            // 1C: USB Endpoint 7 register
+  struct {
+    _va32 fsdev_bus_t reg;
+  }ep[FSDEV_EP_COUNT];
+
+  _va32 uint32_t RESERVED7[8];       // Reserved
+  _va32 fsdev_bus_t CNTR;            // 40: Control register
+  _va32 fsdev_bus_t ISTR;            // 44: Interrupt status register
+  _va32 fsdev_bus_t FNR;             // 48: Frame number register
+  _va32 fsdev_bus_t DADDR;           // 4C: Device address register
+  _va32 fsdev_bus_t BTABLE;          // 50: Buffer Table address register (16-bit only)
+  _va32 fsdev_bus_t LPMCSR;          // 54: LPM Control and Status Register (32-bit only)
+  _va32 fsdev_bus_t BCDR;            // 58: Battery Charging Detector Register (32-bit only)
+} fsdev_regs_t;
+
+TU_VERIFY_STATIC(offsetof(fsdev_regs_t, CNTR) == 0x40, "Wrong offset");
+TU_VERIFY_STATIC(sizeof(fsdev_regs_t) == 0x5C, "Size is not correct");
+
+#define FSDEV_REG ((fsdev_regs_t*) FSDEV_REG_BASE)
+
+
+//--------------------------------------------------------------------+
+// BTable
+//--------------------------------------------------------------------+
+
 TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_addr(uint32_t ep_id, uint8_t buf_id) {
 #ifdef FSDEV_BUS_32BIT
   return FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr & 0x0000FFFFu;
@@ -191,24 +223,13 @@ TU_ATTR_ALWAYS_INLINE static inline void btable_set_rx_bufsize(uint32_t ep_id, u
 //--------------------------------------------------------------------+
 
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wRegValue) {
-#ifdef FSDEV_BUS_32BIT
   (void) USBx;
-  volatile uint32_t *reg = (volatile uint32_t *)(USB_DRD_BASE + bEpIdx*4);
-  *reg = wRegValue;
-#else
-  volatile uint16_t *reg = (volatile uint16_t *)((&USBx->EP0R) + bEpIdx*2u);
-  *reg = (uint16_t)wRegValue;
-#endif
+  FSDEV_REG->ep[bEpIdx].reg = (fsdev_bus_t) wRegValue;
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx) {
-#ifdef FSDEV_BUS_32BIT
   (void) USBx;
-  volatile const uint32_t *reg = (volatile const uint32_t *)(USB_DRD_BASE + bEpIdx*4);
-#else
-  volatile const uint16_t *reg = (volatile const uint16_t *)((&USBx->EP0R) + bEpIdx*2u);
-#endif
-  return *reg;
+  return FSDEV_REG->ep[bEpIdx].reg;
 }
 
 /**
@@ -262,6 +283,21 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx,
   pcd_set_endpoint(USBx, bEpIdx,regVal);
 }
 
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_tx_status(uint32_t reg, uint32_t state) {
+  return reg | ((reg ^ state) & USB_EPTX_STAT);
+}
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_rx_status(uint32_t reg, uint32_t state) {
+  return reg | ((reg ^ state) & USB_EPRX_STAT);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_tx_dtog(uint32_t reg, uint32_t state) {
+  return reg | ((reg ^ state) & USB_EP_DTOG_TX);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_rx_dtog(uint32_t reg, uint32_t state) {
+  return reg | ((reg ^ state) & USB_EP_DTOG_RX);
+}
+
 /**
   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
   * @param  USBx USB peripheral instance register address.
@@ -293,10 +329,10 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_status(USB_TypeDef * USBx
   pcd_set_endpoint(USBx, bEpIdx, regVal);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpIdx) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  return (regVal & USB_EPRX_STAT) >> (12u);
-}
+//TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpIdx) {
+//  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
+//  return (regVal & USB_EPRX_STAT) >> (12u);
+//}
 
 TU_ATTR_ALWAYS_INLINE static inline void pcd_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpIdx) {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
@@ -326,20 +362,20 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_dtog(USB_TypeDef * USBx,
   }
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_kind(USB_TypeDef * USBx,  uint32_t bEpIdx) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  regVal |= USB_EP_KIND;
-  regVal &= USB_EPREG_MASK;
-  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
-  pcd_set_endpoint(USBx, bEpIdx, regVal);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_ep_kind(USB_TypeDef * USBx, uint32_t bEpIdx) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  regVal &= USB_EPKIND_MASK;
-  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
-  pcd_set_endpoint(USBx, bEpIdx, regVal);
-}
+//TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_kind(USB_TypeDef * USBx,  uint32_t bEpIdx) {
+//  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
+//  regVal |= USB_EP_KIND;
+//  regVal &= USB_EPREG_MASK;
+//  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
+//  pcd_set_endpoint(USBx, bEpIdx, regVal);
+//}
+//
+//TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_ep_kind(USB_TypeDef * USBx, uint32_t bEpIdx) {
+//  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
+//  regVal &= USB_EPKIND_MASK;
+//  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
+//  pcd_set_endpoint(USBx, bEpIdx, regVal);
+//}
 
 #ifdef __cplusplus
  }
diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index a8f61a35fb..f89882e0d2 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -35,6 +35,7 @@
 #if CFG_TUSB_MCU == OPT_MCU_STM32F0
   #include "stm32f0xx.h"
   #define FSDEV_PMA_SIZE (1024u)
+  #define FSDEV_REG_BASE USB_BASE
   // F0x2 models are crystal-less
   // All have internal D+ pull-up
   // 070RB:    2 x 16 bits/word memory     LPM Support, BCD Support
@@ -193,6 +194,22 @@
   // This includes U0
 #endif
 
+#if defined(USB_BASE)
+  #define FSDEV_REG_BASE USB_BASE
+#elif defined(USB_DRD_BASE)
+  #define FSDEV_REG_BASE USB_DRD_BASE
+#else
+  #error "FSDEV_REG_BASE not defined"
+#endif
+
+#ifndef USB_EPTX_STAT
+#define USB_EPTX_STAT 0x0030U
+#endif
+
+#ifndef USB_EPRX_STAT
+#define USB_EPRX_STAT 0x3000U
+#endif
+
 // This checks if the device has "LPM"
 #if defined(USB_ISTR_L1REQ)
 #define USB_ISTR_L1REQ_FORCED (USB_ISTR_L1REQ)

From f4aaad6869db74a4fba6eeb716d20be85978a311 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 30 Jul 2024 21:35:24 +0700
Subject: [PATCH 100/204] add edpt0_open(), slightly update dtog

---
 src/device/dcd.h                              |  2 +-
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 74 +++++++++++--------
 src/portable/st/stm32_fsdev/fsdev_common.h    | 30 +++++---
 src/portable/st/stm32_fsdev/fsdev_stm32.h     |  8 --
 4 files changed, 62 insertions(+), 52 deletions(-)

diff --git a/src/device/dcd.h b/src/device/dcd.h
index b25b470255..41e0fbee32 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -180,7 +180,7 @@ void dcd_edpt_clear_stall     (uint8_t rhport, uint8_t ep_addr);
 TU_ATTR_WEAK bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size);
 
 // Configure and enable an ISO endpoint according to descriptor
-TU_ATTR_WEAK bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc);
+TU_ATTR_WEAK bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep);
 
 //--------------------------------------------------------------------+
 // Event API (implemented by stack)
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 6007b4a02c..834de69989 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -178,6 +178,8 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t
 static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNBytes);
 static bool dcd_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBytes);
 
+TU_ATTR_UNUSED static void edpt0_open(uint8_t rhport);
+
 //--------------------------------------------------------------------+
 // Inline helper
 //--------------------------------------------------------------------+
@@ -277,19 +279,7 @@ static void handle_bus_reset(uint8_t rhport) {
   // Reset PMA allocation
   ep_buf_ptr = FSDEV_BTABLE_BASE + 8 * FSDEV_EP_COUNT;
 
-  tusb_desc_endpoint_t ep0_desc = {
-      .bLength = sizeof(tusb_desc_endpoint_t),
-      .bDescriptorType = TUSB_DESC_ENDPOINT,
-      .bEndpointAddress = 0x00,
-      .bmAttributes = {.xfer = TUSB_XFER_CONTROL},
-      .wMaxPacketSize = CFG_TUD_ENDPOINT0_SIZE,
-      .bInterval = 0
-  };
-
-  dcd_edpt_open(rhport, &ep0_desc);
-
-  ep0_desc.bEndpointAddress = 0x80;
-  dcd_edpt_open(rhport, &ep0_desc);
+  edpt0_open(rhport); // open control endpoint (both IN & OUT)
 
   USB->DADDR = USB_DADDR_EF; // Enable USB Function
 }
@@ -610,8 +600,32 @@ static uint8_t dcd_ep_alloc(uint8_t ep_addr, uint8_t ep_type)
   TU_ASSERT(0);
 }
 
-// The STM32F0 doesn't seem to like |= or &= to manipulate the EP#R registers,
-// so I'm using the #define from HAL here, instead.
+void edpt0_open(uint8_t rhport) {
+  (void) rhport;
+
+  dcd_ep_alloc(0x0, TUSB_XFER_CONTROL);
+  dcd_ep_alloc(0x80, TUSB_XFER_CONTROL);
+
+  xfer_status[0][0].max_packet_size = CFG_TUD_ENDPOINT0_SIZE;
+  xfer_status[0][0].ep_idx = 0;
+
+  xfer_status[0][1].max_packet_size = CFG_TUD_ENDPOINT0_SIZE;
+  xfer_status[0][1].ep_idx = 0;
+
+  uint16_t pma_addr0 = dcd_pma_alloc(CFG_TUD_ENDPOINT0_SIZE, false);
+  uint16_t pma_addr1 = dcd_pma_alloc(CFG_TUD_ENDPOINT0_SIZE, false);
+
+  btable_set_addr(0, BTABLE_BUF_RX, pma_addr0);
+  btable_set_addr(0, BTABLE_BUF_TX, pma_addr1);
+
+  uint32_t ep_reg = FSDEV_REG->ep[0].reg & ~USB_EPREG_MASK;
+  ep_reg |= USB_EP_CONTROL | USB_EP_CTR_RX | USB_EP_CTR_TX;
+  ep_reg = ep_add_tx_status(ep_reg, USB_EP_TX_NAK);
+  ep_reg = ep_add_rx_status(ep_reg, USB_EP_RX_NAK);
+  // no need to explicitly set DTOG bits since we aren't masked DTOG bit
+
+  pcd_set_endpoint(USB, 0, ep_reg);
+}
 
 bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   (void)rhport;
@@ -626,9 +640,6 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
 
   // Set type
   switch (desc_ep->bmAttributes.xfer) {
-    case TUSB_XFER_CONTROL:
-      ep_reg |= USB_EP_CONTROL;
-      break;
     case TUSB_XFER_BULK:
       ep_reg |= USB_EP_CONTROL; // FIXME should it be bulk?
       break;
@@ -718,35 +729,34 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
 
   btable_set_addr(ep_idx, 0, pma_addr);
   btable_set_addr(ep_idx, 1, pma_addr2);
-  pcd_set_eptype(USB, ep_idx, USB_EP_ISOCHRONOUS);
   xfer_ctl_ptr(ep_addr)->ep_idx = ep_idx;
 
+  pcd_set_eptype(USB, ep_idx, USB_EP_ISOCHRONOUS);
+
   return true;
 }
 
-bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoint_desc)
-{
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   (void)rhport;
-  uint8_t const ep_addr = p_endpoint_desc->bEndpointAddress;
+  uint8_t const ep_addr = desc_ep->bEndpointAddress;
   uint8_t const ep_idx = xfer_ctl_ptr(ep_addr)->ep_idx;
   uint8_t const dir = tu_edpt_dir(ep_addr);
 
-  xfer_ctl_ptr(ep_addr)->max_packet_size = tu_edpt_packet_size(p_endpoint_desc);
-
-  pcd_set_ep_tx_status(USB, ep_idx, USB_EP_TX_DIS);
-  pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_DIS);
+  xfer_ctl_ptr(ep_addr)->max_packet_size = tu_edpt_packet_size(desc_ep);
 
-  pcd_set_ep_address(USB, ep_idx, tu_edpt_number(ep_addr));
-
-  pcd_clear_tx_dtog(USB, ep_idx);
-  pcd_clear_rx_dtog(USB, ep_idx);
+  uint32_t ep_reg = FSDEV_REG->ep[0].reg & ~USB_EPREG_MASK;
+  ep_reg |= tu_edpt_number(ep_addr) | USB_EP_ISOCHRONOUS | USB_EP_CTR_RX | USB_EP_CTR_TX;
+  ep_reg = ep_add_tx_status(ep_reg, USB_EP_TX_DIS);
+  ep_reg = ep_add_rx_status(ep_reg, USB_EP_RX_DIS);
 
+  // no need to explicitly set DTOG bits since we aren't masked DTOG bit
   if (dir == TUSB_DIR_IN) {
-    pcd_rx_dtog(USB, ep_idx);
+    ep_reg = ep_add_rx_dtog(ep_reg, 1);
   } else {
-    pcd_tx_dtog(USB, ep_idx);
+    ep_reg = ep_add_tx_dtog(ep_reg, 1);
   }
 
+  pcd_set_endpoint(USB, ep_idx, ep_reg);
 
   return true;
 }
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 3d1e1fe4ab..53b2af0a28 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -112,14 +112,6 @@ static volatile uint16_t * const pma = (volatile uint16_t*)USB_PMAADDR;
 #endif
 
 typedef struct {
-//  _va32 fsdev_bus_t EP0R;            // 00: USB Endpoint 0 register
-//  _va32 fsdev_bus_t EP1R;            // 04: USB Endpoint 1 register
-//  _va32 fsdev_bus_t EP2R;            // 08: USB Endpoint 2 register
-//  _va32 fsdev_bus_t EP3R;            // 0C: USB Endpoint 3 register
-//  _va32 fsdev_bus_t EP4R;            // 10: USB Endpoint 4 register
-//  _va32 fsdev_bus_t EP5R;            // 14: USB Endpoint 5 register
-//  _va32 fsdev_bus_t EP6R;            // 18: USB Endpoint 6 register
-//  _va32 fsdev_bus_t EP7R;            // 1C: USB Endpoint 7 register
   struct {
     _va32 fsdev_bus_t reg;
   }ep[FSDEV_EP_COUNT];
@@ -140,6 +132,22 @@ TU_VERIFY_STATIC(sizeof(fsdev_regs_t) == 0x5C, "Size is not correct");
 #define FSDEV_REG ((fsdev_regs_t*) FSDEV_REG_BASE)
 
 
+#ifndef USB_EPTX_STAT
+#define USB_EPTX_STAT 0x0030U
+#endif
+
+#ifndef USB_EPRX_STAT
+#define USB_EPRX_STAT 0x3000U
+#endif
+
+#ifndef USB_EP_DTOG_TX_Pos
+#define USB_EP_DTOG_TX_Pos                      (6U)
+#endif
+
+#ifndef USB_EP_DTOG_RX_Pos
+#define USB_EP_DTOG_RX_Pos                      (14U)
+#endif
+
 //--------------------------------------------------------------------+
 // BTable
 //--------------------------------------------------------------------+
@@ -244,7 +252,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_address(USB_TypeDef * USBx,
   regVal &= USB_EPREG_MASK;
   regVal |= bAddr;
   regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
-  pcd_set_endpoint(USBx, bEpIdx,regVal);
+  pcd_set_endpoint(USBx, bEpIdx, regVal);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_eptype(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wType) {
@@ -291,11 +299,11 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_rx_status(uint32_t reg, uint
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_tx_dtog(uint32_t reg, uint32_t state) {
-  return reg | ((reg ^ state) & USB_EP_DTOG_TX);
+  return reg | ((reg ^ (state << USB_EP_DTOG_TX_Pos)) & USB_EP_DTOG_TX);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_rx_dtog(uint32_t reg, uint32_t state) {
-  return reg | ((reg ^ state) & USB_EP_DTOG_RX);
+  return reg | ((reg ^ (state << USB_EP_DTOG_RX_Pos)) & USB_EP_DTOG_RX);
 }
 
 /**
diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index f89882e0d2..f20505f28a 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -202,14 +202,6 @@
   #error "FSDEV_REG_BASE not defined"
 #endif
 
-#ifndef USB_EPTX_STAT
-#define USB_EPTX_STAT 0x0030U
-#endif
-
-#ifndef USB_EPRX_STAT
-#define USB_EPRX_STAT 0x3000U
-#endif
-
 // This checks if the device has "LPM"
 #if defined(USB_ISTR_L1REQ)
 #define USB_ISTR_L1REQ_FORCED (USB_ISTR_L1REQ)

From 0c8d41e25ec3f691f3125f634659f52d084e8995 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 31 Jul 2024 09:46:31 +0700
Subject: [PATCH 101/204] correct ep toggle bit

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 32 +++++++------------
 src/portable/st/stm32_fsdev/fsdev_common.h    |  8 ++---
 2 files changed, 15 insertions(+), 25 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 834de69989..5cba9ca40c 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -350,8 +350,6 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
   uint32_t wEPRegVal = pcd_get_endpoint(USB, EPindex);
   uint8_t ep_addr = wEPRegVal & USB_EPADDR_FIELD;
 
-  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
-
   // Verify the CTR_RX bit is set. This was in the ST Micro code,
   // but I'm not sure it's actually necessary?
   if ((wEPRegVal & USB_EP_CTR_RX) == 0U) {
@@ -359,34 +357,26 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
   }
 
   if (wEPRegVal & USB_EP_SETUP) {
-    /* Setup packet */
     uint32_t count = btable_get_count(EPindex, BTABLE_BUF_RX);
     // Setup packet should always be 8 bytes. If not, ignore it, and try again.
     if (count == 8) {
-      // Must reset EP to NAK (in case it had been stalling)
-      pcd_set_ep_rx_status(USB, 0u, USB_EP_RX_NAK);
-      pcd_set_ep_tx_status(USB, 0u, USB_EP_TX_NAK);
-
-      // set both data toggle to 1
-      uint32_t regVal = pcd_get_endpoint(USB, 0);
-      if ((regVal & USB_EP_DTOG_TX) == 0) {
-        pcd_tx_dtog(USB, 0);
-      }
-
-      if ((regVal & USB_EP_DTOG_RX) == 0) {
-        pcd_rx_dtog(USB, 0);
-      }
-
       uint16_t rx_addr = btable_get_addr(EPindex, BTABLE_BUF_RX);
 #ifdef FSDEV_BUS_32BIT
       dcd_event_setup_received(0, (uint8_t *)(USB_PMAADDR + rx_addr), true);
 #else
       // The setup_received function uses memcpy, so this must first copy the setup data into
       // user memory, to allow for the 32-bit access that memcpy performs.
-      uint8_t userMemBuf[8];
+      uint32_t userMemBuf[2];
       dcd_read_packet_memory(userMemBuf, rx_addr, 8);
       dcd_event_setup_received(0, (uint8_t*) userMemBuf, true);
 #endif
+
+      // Reset EP to NAK (in case it had been stalling)
+      wEPRegVal = ep_add_tx_status(wEPRegVal, USB_EP_TX_NAK);
+      wEPRegVal = ep_add_rx_status(wEPRegVal, USB_EP_RX_NAK);
+      wEPRegVal = ep_add_tx_dtog(wEPRegVal, 1);
+      wEPRegVal = ep_add_rx_dtog(wEPRegVal, 1);
+      pcd_set_endpoint(USB, 0, wEPRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX);
     }
   } else {
     // Clear RX CTR interrupt flag
@@ -394,6 +384,8 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
       pcd_clear_rx_ep_ctr(USB, EPindex);
     }
 
+    xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
+
     uint8_t buf_id;
     if ((wEPRegVal & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS) {
       // ISO endpoints are double buffered
@@ -404,13 +396,11 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
     uint32_t count = btable_get_count(EPindex, buf_id);
     uint16_t addr = (uint16_t) btable_get_addr(EPindex, buf_id);
 
-    TU_ASSERT(count <= xfer->max_packet_size, /**/);
-
     if (count != 0U) {
       if (xfer->ff) {
         dcd_read_packet_memory_ff(xfer->ff, addr, count);
       } else {
-        dcd_read_packet_memory(&(xfer->buffer[xfer->queued_len]), addr, count);
+        dcd_read_packet_memory(xfer->buffer + xfer->queued_len, addr, count);
       }
 
       xfer->queued_len = (uint16_t)(xfer->queued_len + count);
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 53b2af0a28..09bf4c2ca5 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -292,18 +292,18 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx,
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_tx_status(uint32_t reg, uint32_t state) {
-  return reg | ((reg ^ state) & USB_EPTX_STAT);
+  return reg ^ state;
 }
 TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_rx_status(uint32_t reg, uint32_t state) {
-  return reg | ((reg ^ state) & USB_EPRX_STAT);
+  return reg ^ state;
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_tx_dtog(uint32_t reg, uint32_t state) {
-  return reg | ((reg ^ (state << USB_EP_DTOG_TX_Pos)) & USB_EP_DTOG_TX);
+  return reg ^ (state << USB_EP_DTOG_TX_Pos);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_rx_dtog(uint32_t reg, uint32_t state) {
-  return reg | ((reg ^ (state << USB_EP_DTOG_RX_Pos)) & USB_EP_DTOG_RX);
+  return reg ^ (state << USB_EP_DTOG_RX_Pos);
 }
 
 /**

From 126778298e6ab23f2117b60d479d31e4de7d276f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 31 Jul 2024 11:35:09 +0700
Subject: [PATCH 102/204] enhance dcd_ep_ctr_rx_handler()

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 128 ++++++++----------
 1 file changed, 58 insertions(+), 70 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 5cba9ca40c..c7a25ba5ec 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -178,7 +178,7 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t
 static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNBytes);
 static bool dcd_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBytes);
 
-TU_ATTR_UNUSED static void edpt0_open(uint8_t rhport);
+static void edpt0_open(uint8_t rhport);
 
 //--------------------------------------------------------------------+
 // Inline helper
@@ -285,10 +285,8 @@ static void handle_bus_reset(uint8_t rhport) {
 }
 
 // Handle CTR interrupt for the TX/IN direction
-// Upon call, (wIstr & USB_ISTR_DIR) == 0U
-static void dcd_ep_ctr_tx_handler(uint32_t wIstr) {
-  uint32_t EPindex = wIstr & USB_ISTR_EP_ID;
-  uint32_t wEPRegVal = pcd_get_endpoint(USB, EPindex);
+static void dcd_ep_ctr_tx_handler(uint32_t ep_id) {
+  uint32_t wEPRegVal = pcd_get_endpoint(USB, ep_id);
   uint8_t ep_addr = (wEPRegVal & USB_EPADDR_FIELD) | TUSB_DIR_IN_MASK;
 
   // Verify the CTR_TX bit is set. This was in the ST Micro code,
@@ -298,7 +296,7 @@ static void dcd_ep_ctr_tx_handler(uint32_t wIstr) {
   }
 
   /* clear int flag */
-  pcd_clear_tx_ep_ctr(USB, EPindex);
+  pcd_clear_tx_ep_ctr(USB, ep_id);
 
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
 
@@ -311,20 +309,18 @@ static void dcd_ep_ctr_tx_handler(uint32_t wIstr) {
     }
     xfer->iso_in_sending = false;
     uint8_t buf_id = (wEPRegVal & USB_EP_DTOG_TX) ? 0 : 1;
-    btable_set_count(EPindex, buf_id, 0);
+    btable_set_count(ep_id, buf_id, 0);
   }
 
   if ((xfer->total_len != xfer->queued_len)) {
-    dcd_transmit_packet(xfer, EPindex);
+    dcd_transmit_packet(xfer, ep_id);
   } else {
     dcd_event_xfer_complete(0, ep_addr, xfer->total_len, XFER_RESULT_SUCCESS, true);
   }
 }
 
 // Handle CTR interrupt for the RX/OUT direction
-// Upon call, (wIstr & USB_ISTR_DIR) == 0U
-static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
-{
+static void dcd_ep_ctr_rx_handler(uint32_t ep_id) {
 #ifdef FSDEV_BUS_32BIT
   /* https://www.st.com/resource/en/errata_sheet/es0561-stm32h503cbebkbrb-device-errata-stmicroelectronics.pdf
    * From STM32H503 errata 2.15.1: Buffer description table update completes after CTR interrupt triggers
@@ -346,103 +342,92 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
   }
 #endif
 
-  uint32_t EPindex = wIstr & USB_ISTR_EP_ID;
-  uint32_t wEPRegVal = pcd_get_endpoint(USB, EPindex);
-  uint8_t ep_addr = wEPRegVal & USB_EPADDR_FIELD;
+  uint32_t ep_reg = pcd_get_endpoint(USB, ep_id);
+  uint8_t ep_addr = ep_reg & USB_EPADDR_FIELD;
 
   // Verify the CTR_RX bit is set. This was in the ST Micro code,
   // but I'm not sure it's actually necessary?
-  if ((wEPRegVal & USB_EP_CTR_RX) == 0U) {
+  if ((ep_reg & USB_EP_CTR_RX) == 0U) {
     return;
   }
 
-  if (wEPRegVal & USB_EP_SETUP) {
-    uint32_t count = btable_get_count(EPindex, BTABLE_BUF_RX);
+  // Clear RX CTR and reserved TX CTR
+  ep_reg = (ep_reg & ~USB_EP_CTR_RX) | USB_EP_CTR_TX;
+
+  if (ep_reg & USB_EP_SETUP) {
+    uint32_t count = btable_get_count(ep_id, BTABLE_BUF_RX);
     // Setup packet should always be 8 bytes. If not, ignore it, and try again.
     if (count == 8) {
-      uint16_t rx_addr = btable_get_addr(EPindex, BTABLE_BUF_RX);
-#ifdef FSDEV_BUS_32BIT
-      dcd_event_setup_received(0, (uint8_t *)(USB_PMAADDR + rx_addr), true);
-#else
-      // The setup_received function uses memcpy, so this must first copy the setup data into
-      // user memory, to allow for the 32-bit access that memcpy performs.
-      uint32_t userMemBuf[2];
-      dcd_read_packet_memory(userMemBuf, rx_addr, 8);
-      dcd_event_setup_received(0, (uint8_t*) userMemBuf, true);
-#endif
+      uint16_t rx_addr = btable_get_addr(ep_id, BTABLE_BUF_RX);
+      uint32_t setup_packet[2];
+      dcd_read_packet_memory(setup_packet, rx_addr, 8);
+      dcd_event_setup_received(0, (uint8_t*) setup_packet, true);
 
       // Reset EP to NAK (in case it had been stalling)
-      wEPRegVal = ep_add_tx_status(wEPRegVal, USB_EP_TX_NAK);
-      wEPRegVal = ep_add_rx_status(wEPRegVal, USB_EP_RX_NAK);
-      wEPRegVal = ep_add_tx_dtog(wEPRegVal, 1);
-      wEPRegVal = ep_add_rx_dtog(wEPRegVal, 1);
-      pcd_set_endpoint(USB, 0, wEPRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX);
+      ep_reg = ep_add_tx_status(ep_reg, USB_EP_TX_NAK);
+      ep_reg = ep_add_rx_status(ep_reg, USB_EP_RX_NAK);
+      ep_reg = ep_add_tx_dtog(ep_reg, 1);
+      ep_reg = ep_add_rx_dtog(ep_reg, 1);
+    } else {
+      ep_reg &= USB_EPREG_MASK; // reversed all toggle
     }
   } else {
-    // Clear RX CTR interrupt flag
-    if (ep_addr != 0u) {
-      pcd_clear_rx_ep_ctr(USB, EPindex);
-    }
+    ep_reg &= USB_EPRX_STAT | USB_EPREG_MASK; // reversed all toggle except RX Status
 
+    bool const is_iso = (ep_reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS;
     xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
 
     uint8_t buf_id;
-    if ((wEPRegVal & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS) {
-      // ISO endpoints are double buffered
-      buf_id = (wEPRegVal & USB_EP_DTOG_RX) ? 0 : 1;
+    if (is_iso) {
+      buf_id = (ep_reg & USB_EP_DTOG_RX) ? 0 : 1; // ISO are double buffered
     } else {
-      buf_id = 1;
+      buf_id = BTABLE_BUF_RX;
     }
-    uint32_t count = btable_get_count(EPindex, buf_id);
-    uint16_t addr = (uint16_t) btable_get_addr(EPindex, buf_id);
+    uint32_t rx_count = btable_get_count(ep_id, buf_id);
+    uint16_t pma_addr = (uint16_t) btable_get_addr(ep_id, buf_id);
 
-    if (count != 0U) {
+    if (rx_count != 0) {
       if (xfer->ff) {
-        dcd_read_packet_memory_ff(xfer->ff, addr, count);
+        dcd_read_packet_memory_ff(xfer->ff, pma_addr, rx_count);
       } else {
-        dcd_read_packet_memory(xfer->buffer + xfer->queued_len, addr, count);
+        dcd_read_packet_memory(xfer->buffer + xfer->queued_len, pma_addr, rx_count);
       }
 
-      xfer->queued_len = (uint16_t)(xfer->queued_len + count);
+      xfer->queued_len = (uint16_t)(xfer->queued_len + rx_count);
     }
 
-    if ((count < xfer->max_packet_size) || (xfer->queued_len == xfer->total_len)) {
+    if ((rx_count < xfer->max_packet_size) || (xfer->queued_len == xfer->total_len)) {
       // all bytes received or short packet
       dcd_event_xfer_complete(0, ep_addr, xfer->queued_len, XFER_RESULT_SUCCESS, true);
+
+      if (ep_addr == 0u) {
+        // prepared for status packet
+        btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, CFG_TUD_ENDPOINT0_SIZE);
+      }
+
+      ep_reg = ep_add_rx_status(ep_reg, USB_EP_RX_NAK);
     } else {
-      /* Set endpoint active again for receiving more data.
-       * Note that isochronous endpoints stay active always */
-      if ((wEPRegVal & USB_EP_TYPE_MASK) != USB_EP_ISOCHRONOUS) {
-        uint16_t remaining = xfer->total_len - xfer->queued_len;
-        uint16_t cnt = tu_min16(remaining, xfer->max_packet_size);
-        btable_set_rx_bufsize(EPindex, BTABLE_BUF_RX, cnt);
+      // Set endpoint active again for receiving more data. Note that isochronous endpoints stay active always
+      if (!is_iso) {
+        uint16_t const cnt = tu_min16(xfer->total_len - xfer->queued_len, xfer->max_packet_size);
+        btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, cnt);
       }
-      pcd_set_ep_rx_status(USB, EPindex, USB_EP_RX_VALID);
+      ep_reg = ep_add_rx_status(ep_reg, USB_EP_RX_VALID);
     }
   }
 
-  // For EP0, prepare to receive another SETUP packet.
-  // Clear CTR last so that a new packet does not overwrite the packing being read.
-  // (Based on the docs, it seems SETUP will always be accepted after CTR is cleared)
-  if (ep_addr == 0u) {
-    // Always be prepared for a status packet...
-    btable_set_rx_bufsize(EPindex, BTABLE_BUF_RX, CFG_TUD_ENDPOINT0_SIZE);
-    pcd_clear_rx_ep_ctr(USB, EPindex);
-  }
+  pcd_set_endpoint(USB, ep_id, ep_reg);
 }
 
-static void dcd_ep_ctr_handler(void)
-{
+static void dcd_ep_ctr_handler(void) {
   uint32_t wIstr;
-
   /* stay in loop while pending interrupts */
   while (((wIstr = USB->ISTR) & USB_ISTR_CTR) != 0U) {
+    uint32_t ep_id = wIstr & USB_ISTR_EP_ID;
     if ((wIstr & USB_ISTR_DIR) == 0U) {
-      /* TX/IN */
-      dcd_ep_ctr_tx_handler(wIstr);
+      dcd_ep_ctr_tx_handler(ep_id); // TX/IN
     } else {
-      /* RX/OUT*/
-      dcd_ep_ctr_rx_handler(wIstr);
+      dcd_ep_ctr_rx_handler(ep_id); // RX/OUT
     }
   }
 }
@@ -609,11 +594,14 @@ void edpt0_open(uint8_t rhport) {
   btable_set_addr(0, BTABLE_BUF_TX, pma_addr1);
 
   uint32_t ep_reg = FSDEV_REG->ep[0].reg & ~USB_EPREG_MASK;
-  ep_reg |= USB_EP_CONTROL | USB_EP_CTR_RX | USB_EP_CTR_TX;
+  ep_reg |= USB_EP_CONTROL; // | USB_EP_CTR_RX | USB_EP_CTR_TX;
   ep_reg = ep_add_tx_status(ep_reg, USB_EP_TX_NAK);
   ep_reg = ep_add_rx_status(ep_reg, USB_EP_RX_NAK);
   // no need to explicitly set DTOG bits since we aren't masked DTOG bit
 
+  // prepare for setup packet
+  btable_set_rx_bufsize(0, BTABLE_BUF_RX, CFG_TUD_ENDPOINT0_SIZE);
+
   pcd_set_endpoint(USB, 0, ep_reg);
 }
 

From e60efec6b71701946677440629437bedbd5bef9b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 31 Jul 2024 12:09:50 +0700
Subject: [PATCH 103/204] improve using ep_add_status/ep_add_dtog

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 68 ++++++-------------
 src/portable/st/stm32_fsdev/fsdev_common.h    | 26 ++++---
 2 files changed, 37 insertions(+), 57 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index c7a25ba5ec..c1d550ea8b 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -364,10 +364,11 @@ static void dcd_ep_ctr_rx_handler(uint32_t ep_id) {
       dcd_event_setup_received(0, (uint8_t*) setup_packet, true);
 
       // Reset EP to NAK (in case it had been stalling)
-      ep_reg = ep_add_tx_status(ep_reg, USB_EP_TX_NAK);
-      ep_reg = ep_add_rx_status(ep_reg, USB_EP_RX_NAK);
-      ep_reg = ep_add_tx_dtog(ep_reg, 1);
-      ep_reg = ep_add_rx_dtog(ep_reg, 1);
+      ep_reg = ep_add_status(ep_reg, TUSB_DIR_IN, EP_STAT_NAK);
+      ep_reg = ep_add_status(ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
+
+      ep_reg = ep_add_dtog(ep_reg, TUSB_DIR_IN, 1);
+      ep_reg = ep_add_dtog(ep_reg, TUSB_DIR_OUT, 1);
     } else {
       ep_reg &= USB_EPREG_MASK; // reversed all toggle
     }
@@ -404,15 +405,14 @@ static void dcd_ep_ctr_rx_handler(uint32_t ep_id) {
         // prepared for status packet
         btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, CFG_TUD_ENDPOINT0_SIZE);
       }
-
-      ep_reg = ep_add_rx_status(ep_reg, USB_EP_RX_NAK);
+      ep_reg = ep_add_status(ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
     } else {
       // Set endpoint active again for receiving more data. Note that isochronous endpoints stay active always
       if (!is_iso) {
         uint16_t const cnt = tu_min16(xfer->total_len - xfer->queued_len, xfer->max_packet_size);
         btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, cnt);
       }
-      ep_reg = ep_add_rx_status(ep_reg, USB_EP_RX_VALID);
+      ep_reg = ep_add_status(ep_reg, TUSB_DIR_OUT, EP_STAT_VALID);
     }
   }
 
@@ -594,9 +594,9 @@ void edpt0_open(uint8_t rhport) {
   btable_set_addr(0, BTABLE_BUF_TX, pma_addr1);
 
   uint32_t ep_reg = FSDEV_REG->ep[0].reg & ~USB_EPREG_MASK;
-  ep_reg |= USB_EP_CONTROL; // | USB_EP_CTR_RX | USB_EP_CTR_TX;
-  ep_reg = ep_add_tx_status(ep_reg, USB_EP_TX_NAK);
-  ep_reg = ep_add_rx_status(ep_reg, USB_EP_RX_NAK);
+  ep_reg |= USB_EP_CONTROL;
+  ep_reg = ep_add_status(ep_reg, TUSB_DIR_IN, EP_STAT_NAK);
+  ep_reg = ep_add_status(ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
   // no need to explicitly set DTOG bits since we aren't masked DTOG bit
 
   // prepare for setup packet
@@ -637,15 +637,16 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   xfer_ctl_ptr(ep_addr)->max_packet_size = packet_size;
   xfer_ctl_ptr(ep_addr)->ep_idx = ep_idx;
 
+  ep_reg = ep_add_status(ep_reg, dir, EP_STAT_NAK);
+  ep_reg = ep_add_dtog(ep_reg, dir, 0);
+
+  // reserve other direction toggle bits
   if (dir == TUSB_DIR_IN) {
-    ep_reg = ep_add_tx_status(ep_reg, USB_EP_TX_NAK);
-    ep_reg = ep_add_tx_dtog(ep_reg, 0);
     ep_reg &= ~(USB_EPRX_STAT | USB_EP_DTOG_RX);
   } else {
-    ep_reg = ep_add_rx_status(ep_reg, USB_EP_RX_NAK);
-    ep_reg = ep_add_rx_dtog(ep_reg, 0);
     ep_reg &= ~(USB_EPTX_STAT | USB_EP_DTOG_TX);
   }
+
   pcd_set_endpoint(USB, ep_idx, ep_reg);
 
   return true;
@@ -669,28 +670,6 @@ void dcd_edpt_close_all(uint8_t rhport)
   ep_buf_ptr = FSDEV_BTABLE_BASE + 8 * CFG_TUD_ENDPPOINT_MAX + 2 * CFG_TUD_ENDPOINT0_SIZE;
 }
 
-/**
- * Close an endpoint.
- *
- * This function may be called with interrupts enabled or disabled.
- *
- * This also clears transfers in progress, should there be any.
- */
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
-{
-  (void)rhport;
-
-  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
-  uint8_t const ep_idx = xfer->ep_idx;
-  uint8_t const dir = tu_edpt_dir(ep_addr);
-
-  if (dir == TUSB_DIR_IN) {
-    pcd_set_ep_tx_status(USB, ep_idx, USB_EP_TX_DIS);
-  } else {
-    pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_DIS);
-  }
-}
-
 bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
   (void)rhport;
 
@@ -724,15 +703,11 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
 
   uint32_t ep_reg = FSDEV_REG->ep[0].reg & ~USB_EPREG_MASK;
   ep_reg |= tu_edpt_number(ep_addr) | USB_EP_ISOCHRONOUS | USB_EP_CTR_RX | USB_EP_CTR_TX;
-  ep_reg = ep_add_tx_status(ep_reg, USB_EP_TX_DIS);
-  ep_reg = ep_add_rx_status(ep_reg, USB_EP_RX_DIS);
+  ep_reg = ep_add_status(ep_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
+  ep_reg = ep_add_status(ep_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
 
-  // no need to explicitly set DTOG bits since we aren't masked DTOG bit
-  if (dir == TUSB_DIR_IN) {
-    ep_reg = ep_add_rx_dtog(ep_reg, 1);
-  } else {
-    ep_reg = ep_add_tx_dtog(ep_reg, 1);
-  }
+  ep_add_dtog(ep_reg, dir, 0);
+  ep_add_dtog(ep_reg, 1-dir, 1);
 
   pcd_set_endpoint(USB, ep_idx, ep_reg);
 
@@ -838,14 +813,15 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
   }
 }
 
-void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
-{
+void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
   (void)rhport;
 
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
   uint8_t const ep_idx = xfer->ep_idx;
   uint8_t const dir = tu_edpt_dir(ep_addr);
 
+//  uint32_t ep_reg = pcd_get_endpoint(USB, ep_idx);
+
   if (dir == TUSB_DIR_IN) { // IN
     if (pcd_get_eptype(USB, ep_idx) != USB_EP_ISOCHRONOUS) {
       pcd_set_ep_tx_status(USB, ep_idx, USB_EP_TX_NAK);
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 09bf4c2ca5..676596c73e 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -140,6 +140,10 @@ TU_VERIFY_STATIC(sizeof(fsdev_regs_t) == 0x5C, "Size is not correct");
 #define USB_EPRX_STAT 0x3000U
 #endif
 
+#ifndef USB_EPTX_STAT_Pos
+#define USB_EPTX_STAT_Pos                       (4U)
+#endif
+
 #ifndef USB_EP_DTOG_TX_Pos
 #define USB_EP_DTOG_TX_Pos                      (6U)
 #endif
@@ -148,6 +152,13 @@ TU_VERIFY_STATIC(sizeof(fsdev_regs_t) == 0x5C, "Size is not correct");
 #define USB_EP_DTOG_RX_Pos                      (14U)
 #endif
 
+typedef enum {
+  EP_STAT_DISABLED = 0,
+  EP_STAT_STALL = 1,
+  EP_STAT_NAK = 2,
+  EP_STAT_VALID = 3
+}ep_stat_t;
+
 //--------------------------------------------------------------------+
 // BTable
 //--------------------------------------------------------------------+
@@ -291,19 +302,12 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx,
   pcd_set_endpoint(USBx, bEpIdx,regVal);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_tx_status(uint32_t reg, uint32_t state) {
-  return reg ^ state;
-}
-TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_rx_status(uint32_t reg, uint32_t state) {
-  return reg ^ state;
-}
-
-TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_tx_dtog(uint32_t reg, uint32_t state) {
-  return reg ^ (state << USB_EP_DTOG_TX_Pos);
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_status(uint32_t reg, tusb_dir_t dir, ep_stat_t state) {
+  return reg ^ (state << (USB_EPTX_STAT_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_rx_dtog(uint32_t reg, uint32_t state) {
-  return reg ^ (state << USB_EP_DTOG_RX_Pos);
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_dtog(uint32_t reg, tusb_dir_t dir, uint8_t state) {
+  return reg ^ (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
 }
 
 /**

From 76cc721e8f508a02f6d4f5a1f27b24ffb9a63b7b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 31 Jul 2024 12:44:02 +0700
Subject: [PATCH 104/204] clean up dcd_edpt_stall/clear_statll

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 53 ++++++-------
 src/portable/st/stm32_fsdev/fsdev_common.h    | 75 ++-----------------
 2 files changed, 28 insertions(+), 100 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index c1d550ea8b..1d3d8cd96d 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -375,7 +375,7 @@ static void dcd_ep_ctr_rx_handler(uint32_t ep_id) {
   } else {
     ep_reg &= USB_EPRX_STAT | USB_EPREG_MASK; // reversed all toggle except RX Status
 
-    bool const is_iso = (ep_reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS;
+    bool const is_iso = ep_is_iso(ep_reg);
     xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
 
     uint8_t buf_id;
@@ -748,9 +748,8 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   dcd_int_enable(0);
 }
 
-static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr)
-{
-  (void)rhport;
+static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr) {
+  (void) rhport;
 
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
   uint8_t const ep_idx = xfer->ep_idx;
@@ -762,7 +761,7 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr)
     uint32_t cnt = (uint32_t) tu_min16(xfer->total_len, xfer->max_packet_size);
     uint16_t ep_reg = pcd_get_endpoint(USB, ep_idx);
 
-    if ((ep_reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS) {
+    if (ep_is_iso(ep_reg)) {
       btable_set_rx_bufsize(ep_idx, 0, cnt);
       btable_set_rx_bufsize(ep_idx, 1, cnt);
     } else {
@@ -775,10 +774,8 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr)
   return true;
 }
 
-bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
-{
+bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes) {
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
-
   xfer->buffer = buffer;
   xfer->ff = NULL;
   xfer->total_len = total_bytes;
@@ -787,8 +784,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to
   return edpt_xfer(rhport, ep_addr);
 }
 
-bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t *ff, uint16_t total_bytes)
-{
+bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t *ff, uint16_t total_bytes) {
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
   xfer->buffer = NULL;
   xfer->ff = ff;
@@ -798,19 +794,19 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t *ff, uint16_t
   return edpt_xfer(rhport, ep_addr);
 }
 
-void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
-{
+void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
   (void)rhport;
 
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
   uint8_t const ep_idx = xfer->ep_idx;
   uint8_t const dir = tu_edpt_dir(ep_addr);
 
-  if (dir == TUSB_DIR_IN) {
-    pcd_set_ep_tx_status(USB, ep_idx, USB_EP_TX_STALL);
-  } else {
-    pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_STALL);
-  }
+  uint32_t ep_reg = pcd_get_endpoint(USB, ep_idx);
+  ep_reg |= USB_EP_CTR_RX | USB_EP_CTR_TX; // reserve CTR bits
+  ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir);
+  ep_reg = ep_add_status(ep_reg, dir, EP_STAT_STALL);
+
+  pcd_set_endpoint(USB, ep_idx, ep_reg);
 }
 
 void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
@@ -819,23 +815,16 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
   uint8_t const ep_idx = xfer->ep_idx;
   uint8_t const dir = tu_edpt_dir(ep_addr);
+  uint32_t ep_reg = pcd_get_endpoint(USB, ep_idx);
+  ep_reg |= USB_EP_CTR_RX | USB_EP_CTR_TX; // reserve CTR bits
+  ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir) | EP_DTOG_MASK(dir);
 
-//  uint32_t ep_reg = pcd_get_endpoint(USB, ep_idx);
-
-  if (dir == TUSB_DIR_IN) { // IN
-    if (pcd_get_eptype(USB, ep_idx) != USB_EP_ISOCHRONOUS) {
-      pcd_set_ep_tx_status(USB, ep_idx, USB_EP_TX_NAK);
-    }
-
-    /* Reset to DATA0 if clearing stall condition. */
-    pcd_clear_tx_dtog(USB, ep_idx);
-  } else { // OUT
-    if (pcd_get_eptype(USB, ep_idx) != USB_EP_ISOCHRONOUS) {
-      pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_NAK);
-    }
-    /* Reset to DATA0 if clearing stall condition. */
-    pcd_clear_rx_dtog(USB, ep_idx);
+  if (!ep_is_iso(ep_reg)) {
+    ep_reg = ep_add_status(ep_reg, dir, EP_STAT_NAK);
   }
+  ep_reg = ep_add_dtog(ep_reg, dir, 0); // Reset to DATA0
+
+  pcd_set_endpoint(USB, ep_idx, ep_reg);
 }
 
 #ifdef FSDEV_BUS_32BIT
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 676596c73e..3b14c0334a 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -159,6 +159,9 @@ typedef enum {
   EP_STAT_VALID = 3
 }ep_stat_t;
 
+#define EP_STAT_MASK(_dir)  (3u << (USB_EPTX_STAT_Pos + ((_dir) == TUSB_DIR_IN ? 0 : 8)))
+#define EP_DTOG_MASK(_dir)  (1u << (USB_EP_DTOG_TX_Pos + ((_dir) == TUSB_DIR_IN ? 0 : 8)))
+
 //--------------------------------------------------------------------+
 // BTable
 //--------------------------------------------------------------------+
@@ -274,26 +277,6 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_eptype(USB_TypeDef * USBx, uint
   pcd_set_endpoint(USBx, bEpIdx, regVal);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_eptype(USB_TypeDef * USBx, uint32_t bEpIdx) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  regVal &= USB_EP_T_FIELD;
-  return regVal;
-}
-
-/**
-  * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
-  * @param  USBx USB peripheral instance register address.
-  * @param  bEpIdx Endpoint Number.
-  * @retval None
-  */
-TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_rx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpIdx) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  regVal &= USB_EPREG_MASK;
-  regVal &= ~USB_EP_CTR_RX;
-  regVal |= USB_EP_CTR_TX; // preserve CTR_TX (clears on writing 0)
-  pcd_set_endpoint(USBx, bEpIdx, regVal);
-}
-
 TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpIdx) {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   regVal &= USB_EPREG_MASK;
@@ -310,6 +293,10 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_dtog(uint32_t reg, tusb_dir_
   return reg ^ (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
 }
 
+TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(uint32_t reg) {
+  return (reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS;
+}
+
 /**
   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
   * @param  USBx USB peripheral instance register address.
@@ -341,54 +328,6 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_status(USB_TypeDef * USBx
   pcd_set_endpoint(USBx, bEpIdx, regVal);
 }
 
-//TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpIdx) {
-//  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-//  return (regVal & USB_EPRX_STAT) >> (12u);
-//}
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpIdx) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  regVal &= USB_EPREG_MASK;
-  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX;
-  pcd_set_endpoint(USBx, bEpIdx, regVal);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_tx_dtog(USB_TypeDef * USBx,  uint32_t bEpIdx) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  regVal &= USB_EPREG_MASK;
-  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX;
-  pcd_set_endpoint(USBx, bEpIdx, regVal);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpIdx) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  if((regVal & USB_EP_DTOG_RX) != 0) {
-    pcd_rx_dtog(USBx,bEpIdx);
-  }
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_dtog(USB_TypeDef * USBx,  uint32_t bEpIdx) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  if((regVal & USB_EP_DTOG_TX) != 0) {
-    pcd_tx_dtog(USBx,bEpIdx);
-  }
-}
-
-//TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_kind(USB_TypeDef * USBx,  uint32_t bEpIdx) {
-//  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-//  regVal |= USB_EP_KIND;
-//  regVal &= USB_EPREG_MASK;
-//  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
-//  pcd_set_endpoint(USBx, bEpIdx, regVal);
-//}
-//
-//TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_ep_kind(USB_TypeDef * USBx, uint32_t bEpIdx) {
-//  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-//  regVal &= USB_EPKIND_MASK;
-//  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
-//  pcd_set_endpoint(USBx, bEpIdx, regVal);
-//}
-
 #ifdef __cplusplus
  }
 #endif

From 8139840d7ace72be6829eb1b879747ac5352cc31 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 31 Jul 2024 15:32:37 +0700
Subject: [PATCH 105/204] fix ep_add_dtog()

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c |  5 ++---
 src/portable/st/stm32_fsdev/fsdev_common.h    | 17 +++--------------
 2 files changed, 5 insertions(+), 17 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 1d3d8cd96d..6d185ced1e 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -705,9 +705,8 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
   ep_reg |= tu_edpt_number(ep_addr) | USB_EP_ISOCHRONOUS | USB_EP_CTR_RX | USB_EP_CTR_TX;
   ep_reg = ep_add_status(ep_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
   ep_reg = ep_add_status(ep_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
-
-  ep_add_dtog(ep_reg, dir, 0);
-  ep_add_dtog(ep_reg, 1-dir, 1);
+  ep_reg = ep_add_dtog(ep_reg, dir, 0);
+  ep_reg = ep_add_dtog(ep_reg, 1-dir, 1);
 
   pcd_set_endpoint(USB, ep_idx, ep_reg);
 
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 3b14c0334a..73dc070eda 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -254,20 +254,9 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_endpoint(USB_TypeDef * USBx
   return FSDEV_REG->ep[bEpIdx].reg;
 }
 
-/**
-  * @brief  Sets address in an endpoint register.
-  * @param  USBx USB peripheral instance register address.
-  * @param  bEpIdx Endpoint Number.
-  * @param  bAddr Address.
-  * @retval None
-  */
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_address(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t bAddr) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  regVal &= USB_EPREG_MASK;
-  regVal |= bAddr;
-  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
-  pcd_set_endpoint(USBx, bEpIdx, regVal);
-}
+//TU_ATTR_ALWAYS_INLINE static inline void ep_write(uint32_t ep_id, uint32_t value) {
+//  FSDEV_REG->ep[ep_id].reg = (fsdev_bus_t) value;
+//}
 
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_eptype(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wType) {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);

From 3156f1c4a75e0aa7d506631a50da41ea7f38280d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 31 Jul 2024 16:52:00 +0700
Subject: [PATCH 106/204] remove all pcd ep read, modify write

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 63 +++++++--------
 src/portable/st/stm32_fsdev/fsdev_common.h    | 79 ++++++-------------
 2 files changed, 52 insertions(+), 90 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 6d185ced1e..58de125d9e 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -286,21 +286,15 @@ static void handle_bus_reset(uint8_t rhport) {
 
 // Handle CTR interrupt for the TX/IN direction
 static void dcd_ep_ctr_tx_handler(uint32_t ep_id) {
-  uint32_t wEPRegVal = pcd_get_endpoint(USB, ep_id);
-  uint8_t ep_addr = (wEPRegVal & USB_EPADDR_FIELD) | TUSB_DIR_IN_MASK;
+  uint32_t ep_reg = pcd_get_endpoint(USB, ep_id) & USB_EPREG_MASK;
 
-  // Verify the CTR_TX bit is set. This was in the ST Micro code,
-  // but I'm not sure it's actually necessary?
-  if ((wEPRegVal & USB_EP_CTR_TX) == 0U) {
-    return;
-  }
-
-  /* clear int flag */
-  pcd_clear_tx_ep_ctr(USB, ep_id);
+  // Verify the CTR bit is set. This was in the ST Micro code, but I'm not sure it's actually necessary?
+  TU_VERIFY(ep_reg & USB_EP_CTR_TX, );
 
+  uint8_t ep_addr = (ep_reg & USB_EPADDR_FIELD) | TUSB_DIR_IN_MASK;
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
 
-  if ((wEPRegVal & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS) {
+  if (ep_is_iso(ep_reg)) {
     // Ignore spurious interrupts that we don't schedule
     // host can send IN token while there is no data to send, since ISO does not have NAK
     // this will result to zero length packet --> trigger interrupt (which cannot be masked)
@@ -308,14 +302,19 @@ static void dcd_ep_ctr_tx_handler(uint32_t ep_id) {
       return;
     }
     xfer->iso_in_sending = false;
-    uint8_t buf_id = (wEPRegVal & USB_EP_DTOG_TX) ? 0 : 1;
+    uint8_t buf_id = (ep_reg & USB_EP_DTOG_TX) ? 0 : 1;
     btable_set_count(ep_id, buf_id, 0);
   }
 
-  if ((xfer->total_len != xfer->queued_len)) {
-    dcd_transmit_packet(xfer, ep_id);
+  if (xfer->total_len != xfer->queued_len) {
+    dcd_transmit_packet(xfer, ep_id); // also clear CTR bit
   } else {
     dcd_event_xfer_complete(0, ep_addr, xfer->total_len, XFER_RESULT_SUCCESS, true);
+
+    // Clear CTR TX and reserved CTR RX
+    ep_reg = (ep_reg & ~USB_EP_CTR_TX) | USB_EP_CTR_RX;
+
+    pcd_set_endpoint(USB, ep_id, ep_reg);
   }
 }
 
@@ -343,15 +342,13 @@ static void dcd_ep_ctr_rx_handler(uint32_t ep_id) {
 #endif
 
   uint32_t ep_reg = pcd_get_endpoint(USB, ep_id);
-  uint8_t ep_addr = ep_reg & USB_EPADDR_FIELD;
 
-  // Verify the CTR_RX bit is set. This was in the ST Micro code,
-  // but I'm not sure it's actually necessary?
-  if ((ep_reg & USB_EP_CTR_RX) == 0U) {
-    return;
-  }
+  // Verify the CTR bit is set. This was in the ST Micro code, but I'm not sure it's actually necessary?
+  TU_VERIFY(ep_reg & USB_EP_CTR_RX, );
 
-  // Clear RX CTR and reserved TX CTR
+  uint8_t const ep_addr = ep_reg & USB_EPADDR_FIELD;
+
+  // Clear CTR RX and reserved CTR TX
   ep_reg = (ep_reg & ~USB_EP_CTR_RX) | USB_EP_CTR_TX;
 
   if (ep_reg & USB_EP_SETUP) {
@@ -688,8 +685,6 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
   btable_set_addr(ep_idx, 1, pma_addr2);
   xfer_ctl_ptr(ep_addr)->ep_idx = ep_idx;
 
-  pcd_set_eptype(USB, ep_idx, USB_EP_ISOCHRONOUS);
-
   return true;
 }
 
@@ -715,13 +710,9 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
 
 // Currently, single-buffered, and only 64 bytes at a time (max)
 static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
-  uint16_t len = (uint16_t)(xfer->total_len - xfer->queued_len);
-  if (len > xfer->max_packet_size) {
-    len = xfer->max_packet_size;
-  }
-
-  uint16_t ep_reg = pcd_get_endpoint(USB, ep_ix);
-  bool const is_iso = (ep_reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS;
+  uint16_t len = tu_min16(xfer->total_len - xfer->queued_len, xfer->max_packet_size);
+  uint16_t ep_reg = pcd_get_endpoint(USB, ep_ix) | EP_CTR_TXRX;
+  bool const is_iso = ep_is_iso(ep_reg);
 
   uint8_t buf_id;
   if (is_iso) {
@@ -739,8 +730,12 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   }
   xfer->queued_len = (uint16_t)(xfer->queued_len + len);
 
+  ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(TUSB_DIR_IN);
+  ep_reg = ep_add_status(ep_reg, TUSB_DIR_IN, EP_STAT_VALID);
+  ep_reg = ep_clear_ctr(ep_reg, TUSB_DIR_IN);
+
   dcd_int_disable(0);
-  pcd_set_ep_tx_status(USB, ep_ix, USB_EP_TX_VALID);
+  pcd_set_endpoint(USB, ep_ix, ep_reg);
   if (is_iso) {
     xfer->iso_in_sending = true;
   }
@@ -758,7 +753,9 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr) {
     dcd_transmit_packet(xfer, ep_idx);
   } else {
     uint32_t cnt = (uint32_t) tu_min16(xfer->total_len, xfer->max_packet_size);
-    uint16_t ep_reg = pcd_get_endpoint(USB, ep_idx);
+    uint16_t ep_reg = pcd_get_endpoint(USB, ep_idx) | USB_EP_CTR_TX;
+    ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir); // keep CTR TX, clear CTR RX
+    ep_reg = ep_add_status(ep_reg, dir, EP_STAT_VALID);
 
     if (ep_is_iso(ep_reg)) {
       btable_set_rx_bufsize(ep_idx, 0, cnt);
@@ -767,7 +764,7 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr) {
       btable_set_rx_bufsize(ep_idx, BTABLE_BUF_RX, cnt);
     }
 
-    pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_VALID);
+    pcd_set_endpoint(USB, ep_idx, ep_reg);
   }
 
   return true;
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 73dc070eda..67ee72d0e9 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -141,17 +141,20 @@ TU_VERIFY_STATIC(sizeof(fsdev_regs_t) == 0x5C, "Size is not correct");
 #endif
 
 #ifndef USB_EPTX_STAT_Pos
-#define USB_EPTX_STAT_Pos                       (4U)
+#define USB_EPTX_STAT_Pos    4u
 #endif
 
 #ifndef USB_EP_DTOG_TX_Pos
-#define USB_EP_DTOG_TX_Pos                      (6U)
+#define USB_EP_DTOG_TX_Pos   6u
 #endif
 
-#ifndef USB_EP_DTOG_RX_Pos
-#define USB_EP_DTOG_RX_Pos                      (14U)
+#ifndef USB_EP_CTR_TX_Pos
+#define USB_EP_CTR_TX_Pos    7u
 #endif
 
+
+#define EP_CTR_TXRX (USB_EP_CTR_TX | USB_EP_CTR_RX)
+
 typedef enum {
   EP_STAT_DISABLED = 0,
   EP_STAT_STALL = 1,
@@ -244,34 +247,23 @@ TU_ATTR_ALWAYS_INLINE static inline void btable_set_rx_bufsize(uint32_t ep_id, u
 // Endpoint
 //--------------------------------------------------------------------+
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wRegValue) {
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t ep_id, uint32_t value) {
   (void) USBx;
-  FSDEV_REG->ep[bEpIdx].reg = (fsdev_bus_t) wRegValue;
+  FSDEV_REG->ep[ep_id].reg = (fsdev_bus_t) value;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx) {
-  (void) USBx;
-  return FSDEV_REG->ep[bEpIdx].reg;
-}
-
-//TU_ATTR_ALWAYS_INLINE static inline void ep_write(uint32_t ep_id, uint32_t value) {
+// write ep register with clear CTR_RX and CTR_TX mask (0 is no clear)
+//TU_ATTR_ALWAYS_INLINE static inline void ep_write_with_clear_ctr(uint32_t ep_id, uint32_t value, uint32_t clear_ctr_mask) {
+//  value |= USB_EP_CTR_RX | USB_EP_CTR_TX;
+//  if (clear_ctr_mask) {
+//    value &= ~clear_ctr_mask;
+//  }
 //  FSDEV_REG->ep[ep_id].reg = (fsdev_bus_t) value;
 //}
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_eptype(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wType) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  regVal &= (uint32_t)USB_EP_T_MASK;
-  regVal |= wType;
-  regVal |= USB_EP_CTR_RX | USB_EP_CTR_TX; // These clear on write0, so must set high
-  pcd_set_endpoint(USBx, bEpIdx, regVal);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpIdx) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  regVal &= USB_EPREG_MASK;
-  regVal &= ~USB_EP_CTR_TX;
-  regVal |= USB_EP_CTR_RX; // preserve CTR_RX (clears on writing 0)
-  pcd_set_endpoint(USBx, bEpIdx,regVal);
+TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_endpoint(USB_TypeDef * USBx, uint32_t ep_id) {
+  (void) USBx;
+  return FSDEV_REG->ep[ep_id].reg;
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_status(uint32_t reg, tusb_dir_t dir, ep_stat_t state) {
@@ -282,39 +274,12 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_dtog(uint32_t reg, tusb_dir_
   return reg ^ (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
 }
 
-TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(uint32_t reg) {
-  return (reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS;
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_clear_ctr(uint32_t reg, tusb_dir_t dir) {
+  return reg & ~(1 << (USB_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
 }
 
-/**
-  * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
-  * @param  USBx USB peripheral instance register address.
-  * @param  bEpIdx Endpoint Number.
-  * @param  wState new state
-  * @retval None
-  */
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_status(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t wState) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  regVal &= USB_EPTX_DTOGMASK;
-  regVal ^= wState;
-  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
-  pcd_set_endpoint(USBx, bEpIdx, regVal);
-}
-
-/**
-  * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
-  * @param  USBx USB peripheral instance register address.
-  * @param  bEpIdx Endpoint Number.
-  * @param  wState new state
-  * @retval None
-  */
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t wState) {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
-  regVal &= USB_EPRX_DTOGMASK;
-  regVal ^= wState;
-  regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
-  pcd_set_endpoint(USBx, bEpIdx, regVal);
+TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(uint32_t reg) {
+  return (reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS;
 }
 
 #ifdef __cplusplus

From ee831d27ac692d33ea6240b8bce24dc98f3bf74b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 31 Jul 2024 16:53:16 +0700
Subject: [PATCH 107/204] rename to ep_read/write(), drop USBx argument

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 34 ++++-----
 src/portable/st/stm32_fsdev/fsdev_common.h    | 76 +++++++++----------
 2 files changed, 54 insertions(+), 56 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 58de125d9e..47b3264b1d 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -227,7 +227,7 @@ void dcd_init(uint8_t rhport) {
   // Reset endpoints to disabled
   for (uint32_t i = 0; i < FSDEV_EP_COUNT; i++) {
     // This doesn't clear all bits since some bits are "toggle", but does set the type to DISABLED.
-    pcd_set_endpoint(USB, i, 0u);
+    ep_write(i, 0u);
   }
 
   USB->CNTR |= USB_CNTR_RESETM | USB_CNTR_ESOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM;
@@ -286,7 +286,7 @@ static void handle_bus_reset(uint8_t rhport) {
 
 // Handle CTR interrupt for the TX/IN direction
 static void dcd_ep_ctr_tx_handler(uint32_t ep_id) {
-  uint32_t ep_reg = pcd_get_endpoint(USB, ep_id) & USB_EPREG_MASK;
+  uint32_t ep_reg = ep_read(ep_id) & USB_EPREG_MASK;
 
   // Verify the CTR bit is set. This was in the ST Micro code, but I'm not sure it's actually necessary?
   TU_VERIFY(ep_reg & USB_EP_CTR_TX, );
@@ -314,7 +314,7 @@ static void dcd_ep_ctr_tx_handler(uint32_t ep_id) {
     // Clear CTR TX and reserved CTR RX
     ep_reg = (ep_reg & ~USB_EP_CTR_TX) | USB_EP_CTR_RX;
 
-    pcd_set_endpoint(USB, ep_id, ep_reg);
+    ep_write(ep_id, ep_reg);
   }
 }
 
@@ -341,7 +341,7 @@ static void dcd_ep_ctr_rx_handler(uint32_t ep_id) {
   }
 #endif
 
-  uint32_t ep_reg = pcd_get_endpoint(USB, ep_id);
+  uint32_t ep_reg = ep_read(ep_id);
 
   // Verify the CTR bit is set. This was in the ST Micro code, but I'm not sure it's actually necessary?
   TU_VERIFY(ep_reg & USB_EP_CTR_RX, );
@@ -413,7 +413,7 @@ static void dcd_ep_ctr_rx_handler(uint32_t ep_id) {
     }
   }
 
-  pcd_set_endpoint(USB, ep_id, ep_reg);
+  ep_write(ep_id, ep_reg);
 }
 
 static void dcd_ep_ctr_handler(void) {
@@ -599,7 +599,7 @@ void edpt0_open(uint8_t rhport) {
   // prepare for setup packet
   btable_set_rx_bufsize(0, BTABLE_BUF_RX, CFG_TUD_ENDPOINT0_SIZE);
 
-  pcd_set_endpoint(USB, 0, ep_reg);
+  ep_write(0, ep_reg);
 }
 
 bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
@@ -644,7 +644,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
     ep_reg &= ~(USB_EPTX_STAT | USB_EP_DTOG_TX);
   }
 
-  pcd_set_endpoint(USB, ep_idx, ep_reg);
+  ep_write(ep_idx, ep_reg);
 
   return true;
 }
@@ -655,7 +655,7 @@ void dcd_edpt_close_all(uint8_t rhport)
 
   for (uint32_t i = 1; i < FSDEV_EP_COUNT; i++) {
     // Reset endpoint
-    pcd_set_endpoint(USB, i, 0);
+    ep_write(i, 0);
     // Clear EP allocation status
     ep_alloc_status[i].ep_num = 0xFF;
     ep_alloc_status[i].ep_type = 0xFF;
@@ -703,7 +703,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
   ep_reg = ep_add_dtog(ep_reg, dir, 0);
   ep_reg = ep_add_dtog(ep_reg, 1-dir, 1);
 
-  pcd_set_endpoint(USB, ep_idx, ep_reg);
+  ep_write(ep_idx, ep_reg);
 
   return true;
 }
@@ -711,7 +711,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
 // Currently, single-buffered, and only 64 bytes at a time (max)
 static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   uint16_t len = tu_min16(xfer->total_len - xfer->queued_len, xfer->max_packet_size);
-  uint16_t ep_reg = pcd_get_endpoint(USB, ep_ix) | EP_CTR_TXRX;
+  uint16_t ep_reg = ep_read(ep_ix) | EP_CTR_TXRX;
   bool const is_iso = ep_is_iso(ep_reg);
 
   uint8_t buf_id;
@@ -735,7 +735,7 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   ep_reg = ep_clear_ctr(ep_reg, TUSB_DIR_IN);
 
   dcd_int_disable(0);
-  pcd_set_endpoint(USB, ep_ix, ep_reg);
+  ep_write(ep_ix, ep_reg);
   if (is_iso) {
     xfer->iso_in_sending = true;
   }
@@ -753,7 +753,7 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr) {
     dcd_transmit_packet(xfer, ep_idx);
   } else {
     uint32_t cnt = (uint32_t) tu_min16(xfer->total_len, xfer->max_packet_size);
-    uint16_t ep_reg = pcd_get_endpoint(USB, ep_idx) | USB_EP_CTR_TX;
+    uint16_t ep_reg = ep_read(ep_idx) | USB_EP_CTR_TX;
     ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir); // keep CTR TX, clear CTR RX
     ep_reg = ep_add_status(ep_reg, dir, EP_STAT_VALID);
 
@@ -764,7 +764,7 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr) {
       btable_set_rx_bufsize(ep_idx, BTABLE_BUF_RX, cnt);
     }
 
-    pcd_set_endpoint(USB, ep_idx, ep_reg);
+    ep_write(ep_idx, ep_reg);
   }
 
   return true;
@@ -797,12 +797,12 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
   uint8_t const ep_idx = xfer->ep_idx;
   uint8_t const dir = tu_edpt_dir(ep_addr);
 
-  uint32_t ep_reg = pcd_get_endpoint(USB, ep_idx);
+  uint32_t ep_reg = ep_read(ep_idx);
   ep_reg |= USB_EP_CTR_RX | USB_EP_CTR_TX; // reserve CTR bits
   ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir);
   ep_reg = ep_add_status(ep_reg, dir, EP_STAT_STALL);
 
-  pcd_set_endpoint(USB, ep_idx, ep_reg);
+  ep_write(ep_idx, ep_reg);
 }
 
 void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
@@ -811,7 +811,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
   uint8_t const ep_idx = xfer->ep_idx;
   uint8_t const dir = tu_edpt_dir(ep_addr);
-  uint32_t ep_reg = pcd_get_endpoint(USB, ep_idx);
+  uint32_t ep_reg = ep_read(ep_idx);
   ep_reg |= USB_EP_CTR_RX | USB_EP_CTR_TX; // reserve CTR bits
   ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir) | EP_DTOG_MASK(dir);
 
@@ -820,7 +820,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
   }
   ep_reg = ep_add_dtog(ep_reg, dir, 0); // Reset to DATA0
 
-  pcd_set_endpoint(USB, ep_idx, ep_reg);
+  ep_write(ep_idx, ep_reg);
 }
 
 #ifdef FSDEV_BUS_32BIT
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 67ee72d0e9..4ada268950 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -165,6 +165,43 @@ typedef enum {
 #define EP_STAT_MASK(_dir)  (3u << (USB_EPTX_STAT_Pos + ((_dir) == TUSB_DIR_IN ? 0 : 8)))
 #define EP_DTOG_MASK(_dir)  (1u << (USB_EP_DTOG_TX_Pos + ((_dir) == TUSB_DIR_IN ? 0 : 8)))
 
+//--------------------------------------------------------------------+
+// Endpoint
+//--------------------------------------------------------------------+
+
+TU_ATTR_ALWAYS_INLINE static inline void ep_write(uint32_t ep_id, uint32_t value) {
+  FSDEV_REG->ep[ep_id].reg = (fsdev_bus_t) value;
+}
+
+// write ep register with clear CTR_RX and CTR_TX mask (0 is no clear)
+//TU_ATTR_ALWAYS_INLINE static inline void ep_write_with_clear_ctr(uint32_t ep_id, uint32_t value, uint32_t clear_ctr_mask) {
+//  value |= USB_EP_CTR_RX | USB_EP_CTR_TX;
+//  if (clear_ctr_mask) {
+//    value &= ~clear_ctr_mask;
+//  }
+//  FSDEV_REG->ep[ep_id].reg = (fsdev_bus_t) value;
+//}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_read(uint32_t ep_id) {
+  return FSDEV_REG->ep[ep_id].reg;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_status(uint32_t reg, tusb_dir_t dir, ep_stat_t state) {
+  return reg ^ (state << (USB_EPTX_STAT_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_dtog(uint32_t reg, tusb_dir_t dir, uint8_t state) {
+  return reg ^ (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_clear_ctr(uint32_t reg, tusb_dir_t dir) {
+  return reg & ~(1 << (USB_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(uint32_t reg) {
+  return (reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS;
+}
+
 //--------------------------------------------------------------------+
 // BTable
 //--------------------------------------------------------------------+
@@ -243,45 +280,6 @@ TU_ATTR_ALWAYS_INLINE static inline void btable_set_rx_bufsize(uint32_t ep_id, u
 #endif
 }
 
-//--------------------------------------------------------------------+
-// Endpoint
-//--------------------------------------------------------------------+
-
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t ep_id, uint32_t value) {
-  (void) USBx;
-  FSDEV_REG->ep[ep_id].reg = (fsdev_bus_t) value;
-}
-
-// write ep register with clear CTR_RX and CTR_TX mask (0 is no clear)
-//TU_ATTR_ALWAYS_INLINE static inline void ep_write_with_clear_ctr(uint32_t ep_id, uint32_t value, uint32_t clear_ctr_mask) {
-//  value |= USB_EP_CTR_RX | USB_EP_CTR_TX;
-//  if (clear_ctr_mask) {
-//    value &= ~clear_ctr_mask;
-//  }
-//  FSDEV_REG->ep[ep_id].reg = (fsdev_bus_t) value;
-//}
-
-TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_endpoint(USB_TypeDef * USBx, uint32_t ep_id) {
-  (void) USBx;
-  return FSDEV_REG->ep[ep_id].reg;
-}
-
-TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_status(uint32_t reg, tusb_dir_t dir, ep_stat_t state) {
-  return reg ^ (state << (USB_EPTX_STAT_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
-}
-
-TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_dtog(uint32_t reg, tusb_dir_t dir, uint8_t state) {
-  return reg ^ (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
-}
-
-TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_clear_ctr(uint32_t reg, tusb_dir_t dir) {
-  return reg & ~(1 << (USB_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
-}
-
-TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(uint32_t reg) {
-  return (reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS;
-}
-
 #ifdef __cplusplus
  }
 #endif

From ce0fdc56097efda926c2c3776eec345c920b6cc6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 31 Jul 2024 17:10:43 +0700
Subject: [PATCH 108/204] refactor dcd_ep_ctr_handler

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 37 ++++++++-----------
 src/portable/st/stm32_fsdev/fsdev_common.h    |  2 +
 2 files changed, 17 insertions(+), 22 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 47b3264b1d..381dfdd945 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -166,7 +166,6 @@ static uint8_t remoteWakeCountdown; // When wake is requested
 static void handle_bus_reset(uint8_t rhport);
 static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix);
 static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr);
-static void dcd_ep_ctr_handler(void);
 
 // PMA allocation/access
 static uint16_t ep_buf_ptr; ///< Points to first free memory location
@@ -285,7 +284,7 @@ static void handle_bus_reset(uint8_t rhport) {
 }
 
 // Handle CTR interrupt for the TX/IN direction
-static void dcd_ep_ctr_tx_handler(uint32_t ep_id) {
+static void handle_ctr_tx(uint32_t ep_id) {
   uint32_t ep_reg = ep_read(ep_id) & USB_EPREG_MASK;
 
   // Verify the CTR bit is set. This was in the ST Micro code, but I'm not sure it's actually necessary?
@@ -319,7 +318,7 @@ static void dcd_ep_ctr_tx_handler(uint32_t ep_id) {
 }
 
 // Handle CTR interrupt for the RX/OUT direction
-static void dcd_ep_ctr_rx_handler(uint32_t ep_id) {
+static void handle_ctr_rx(uint32_t ep_id) {
 #ifdef FSDEV_BUS_32BIT
   /* https://www.st.com/resource/en/errata_sheet/es0561-stm32h503cbebkbrb-device-errata-stmicroelectronics.pdf
    * From STM32H503 errata 2.15.1: Buffer description table update completes after CTR interrupt triggers
@@ -416,19 +415,6 @@ static void dcd_ep_ctr_rx_handler(uint32_t ep_id) {
   ep_write(ep_id, ep_reg);
 }
 
-static void dcd_ep_ctr_handler(void) {
-  uint32_t wIstr;
-  /* stay in loop while pending interrupts */
-  while (((wIstr = USB->ISTR) & USB_ISTR_CTR) != 0U) {
-    uint32_t ep_id = wIstr & USB_ISTR_EP_ID;
-    if ((wIstr & USB_ISTR_DIR) == 0U) {
-      dcd_ep_ctr_tx_handler(ep_id); // TX/IN
-    } else {
-      dcd_ep_ctr_rx_handler(ep_id); // RX/OUT
-    }
-  }
-}
-
 void dcd_int_handler(uint8_t rhport) {
   uint32_t int_status = USB->ISTR;
   // const uint32_t handled_ints = USB_ISTR_CTR | USB_ISTR_RESET | USB_ISTR_WKUP
@@ -453,12 +439,6 @@ void dcd_int_handler(uint8_t rhport) {
     return; // Don't do the rest of the things here; perhaps they've been cleared?
   }
 
-  if (int_status & USB_ISTR_CTR) {
-    /* servicing of the endpoint correct transfer interrupt */
-    /* clear of the CTR flag into the sub */
-    dcd_ep_ctr_handler();
-  }
-
   if (int_status & USB_ISTR_WKUP) {
     USB->CNTR &= ~USB_CNTR_LPMODE;
     USB->CNTR &= ~USB_CNTR_FSUSP;
@@ -489,6 +469,19 @@ void dcd_int_handler(uint8_t rhport) {
     }
     USB->ISTR = (fsdev_bus_t)~USB_ISTR_ESOF;
   }
+
+  // loop to handle all pending CTR interrupts
+  while (int_status & USB_ISTR_CTR) {
+    uint32_t const ep_id = int_status & USB_ISTR_EP_ID;
+
+    if ((int_status & USB_ISTR_DIR) == 0U) {
+      handle_ctr_tx(ep_id); // TX/IN
+    } else {
+      handle_ctr_rx(ep_id); // RX/OUT or both (RX/TX !!)
+    }
+
+    int_status = USB->ISTR;
+  }
 }
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 4ada268950..dd030652b1 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -167,6 +167,8 @@ typedef enum {
 
 //--------------------------------------------------------------------+
 // Endpoint
+// - CTR is write 0 to clear
+// - DTOG and STAT are write 1 to toggle
 //--------------------------------------------------------------------+
 
 TU_ATTR_ALWAYS_INLINE static inline void ep_write(uint32_t ep_id, uint32_t value) {

From 26b0df2c26d31eef1a0d4012d42534f9c434f4eb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 31 Jul 2024 17:24:41 +0700
Subject: [PATCH 109/204] refactor xfer_ctl_ptr() to take epnum/dir to reduce
 computation

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 77 +++++++++++--------
 1 file changed, 43 insertions(+), 34 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 381dfdd945..d0a51d48ea 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -165,7 +165,7 @@ static uint8_t remoteWakeCountdown; // When wake is requested
 // into the stack.
 static void handle_bus_reset(uint8_t rhport);
 static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix);
-static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr);
+static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir);
 
 // PMA allocation/access
 static uint16_t ep_buf_ptr; ///< Points to first free memory location
@@ -183,13 +183,7 @@ static void edpt0_open(uint8_t rhport);
 // Inline helper
 //--------------------------------------------------------------------+
 
-TU_ATTR_ALWAYS_INLINE static inline xfer_ctl_t *xfer_ctl_ptr(uint32_t ep_addr)
-{
-  uint8_t epnum = tu_edpt_number(ep_addr);
-  uint8_t dir = tu_edpt_dir(ep_addr);
-  // Fix -Werror=null-dereference
-  TU_ASSERT(epnum < CFG_TUD_ENDPPOINT_MAX, &xfer_status[0][0]);
-
+TU_ATTR_ALWAYS_INLINE static inline xfer_ctl_t *xfer_ctl_ptr(uint8_t epnum, uint8_t dir) {
   return &xfer_status[epnum][dir];
 }
 
@@ -290,8 +284,9 @@ static void handle_ctr_tx(uint32_t ep_id) {
   // Verify the CTR bit is set. This was in the ST Micro code, but I'm not sure it's actually necessary?
   TU_VERIFY(ep_reg & USB_EP_CTR_TX, );
 
+  uint8_t const ep_num = ep_reg & USB_EPADDR_FIELD;
   uint8_t ep_addr = (ep_reg & USB_EPADDR_FIELD) | TUSB_DIR_IN_MASK;
-  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
+  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, TUSB_DIR_IN);
 
   if (ep_is_iso(ep_reg)) {
     // Ignore spurious interrupts that we don't schedule
@@ -344,11 +339,9 @@ static void handle_ctr_rx(uint32_t ep_id) {
 
   // Verify the CTR bit is set. This was in the ST Micro code, but I'm not sure it's actually necessary?
   TU_VERIFY(ep_reg & USB_EP_CTR_RX, );
+  ep_reg = (ep_reg & ~USB_EP_CTR_RX) | USB_EP_CTR_TX; // Clear CTR RX and reserved CTR TX
 
-  uint8_t const ep_addr = ep_reg & USB_EPADDR_FIELD;
-
-  // Clear CTR RX and reserved CTR TX
-  ep_reg = (ep_reg & ~USB_EP_CTR_RX) | USB_EP_CTR_TX;
+  uint8_t const ep_num = ep_reg & USB_EPADDR_FIELD;
 
   if (ep_reg & USB_EP_SETUP) {
     uint32_t count = btable_get_count(ep_id, BTABLE_BUF_RX);
@@ -372,7 +365,7 @@ static void handle_ctr_rx(uint32_t ep_id) {
     ep_reg &= USB_EPRX_STAT | USB_EPREG_MASK; // reversed all toggle except RX Status
 
     bool const is_iso = ep_is_iso(ep_reg);
-    xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
+    xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, TUSB_DIR_OUT);
 
     uint8_t buf_id;
     if (is_iso) {
@@ -394,10 +387,11 @@ static void handle_ctr_rx(uint32_t ep_id) {
     }
 
     if ((rx_count < xfer->max_packet_size) || (xfer->queued_len == xfer->total_len)) {
+      uint8_t const ep_addr = ep_num;
       // all bytes received or short packet
       dcd_event_xfer_complete(0, ep_addr, xfer->queued_len, XFER_RESULT_SUCCESS, true);
 
-      if (ep_addr == 0u) {
+      if (ep_num == 0) {
         // prepared for status packet
         btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, CFG_TUD_ENDPOINT0_SIZE);
       }
@@ -598,6 +592,7 @@ void edpt0_open(uint8_t rhport) {
 bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   (void)rhport;
   uint8_t const ep_addr = desc_ep->bEndpointAddress;
+  uint8_t const ep_num = tu_edpt_number(ep_addr);
   uint8_t const dir = tu_edpt_dir(ep_addr);
   const uint16_t packet_size = tu_edpt_packet_size(desc_ep);
   uint8_t const ep_idx = dcd_ep_alloc(ep_addr, desc_ep->bmAttributes.xfer);
@@ -624,8 +619,9 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   uint16_t pma_addr = dcd_pma_alloc(packet_size, false);
   btable_set_addr(ep_idx, dir == TUSB_DIR_IN ? BTABLE_BUF_TX : BTABLE_BUF_RX, pma_addr);
 
-  xfer_ctl_ptr(ep_addr)->max_packet_size = packet_size;
-  xfer_ctl_ptr(ep_addr)->ep_idx = ep_idx;
+  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, dir);
+  xfer->max_packet_size = packet_size;
+  xfer->ep_idx = ep_idx;
 
   ep_reg = ep_add_status(ep_reg, dir, EP_STAT_NAK);
   ep_reg = ep_add_dtog(ep_reg, dir, 0);
@@ -663,6 +659,8 @@ void dcd_edpt_close_all(uint8_t rhport)
 bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
   (void)rhport;
 
+  uint8_t const ep_num = tu_edpt_number(ep_addr);
+  uint8_t const dir = tu_edpt_dir(ep_addr);
   uint8_t const ep_idx = dcd_ep_alloc(ep_addr, TUSB_XFER_ISOCHRONOUS);
 
   /* Create a packet memory buffer area. Enable double buffering for devices with 2048 bytes PMA,
@@ -676,7 +674,9 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
 
   btable_set_addr(ep_idx, 0, pma_addr);
   btable_set_addr(ep_idx, 1, pma_addr2);
-  xfer_ctl_ptr(ep_addr)->ep_idx = ep_idx;
+
+  xfer_ctl_t* xfer = xfer_ctl_ptr(ep_num, dir);
+  xfer->ep_idx = ep_idx;
 
   return true;
 }
@@ -684,10 +684,13 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
 bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   (void)rhport;
   uint8_t const ep_addr = desc_ep->bEndpointAddress;
-  uint8_t const ep_idx = xfer_ctl_ptr(ep_addr)->ep_idx;
+  uint8_t const ep_num = tu_edpt_number(ep_addr);
   uint8_t const dir = tu_edpt_dir(ep_addr);
+  xfer_ctl_t* xfer = xfer_ctl_ptr(ep_num, dir);
 
-  xfer_ctl_ptr(ep_addr)->max_packet_size = tu_edpt_packet_size(desc_ep);
+  uint8_t const ep_idx = xfer->ep_idx;
+
+  xfer->max_packet_size = tu_edpt_packet_size(desc_ep);
 
   uint32_t ep_reg = FSDEV_REG->ep[0].reg & ~USB_EPREG_MASK;
   ep_reg |= tu_edpt_number(ep_addr) | USB_EP_ISOCHRONOUS | USB_EP_CTR_RX | USB_EP_CTR_TX;
@@ -735,12 +738,11 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   dcd_int_enable(0);
 }
 
-static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr) {
+static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir) {
   (void) rhport;
 
-  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
+  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, dir);
   uint8_t const ep_idx = xfer->ep_idx;
-  uint8_t const dir = tu_edpt_dir(ep_addr);
 
   if (dir == TUSB_DIR_IN) {
     dcd_transmit_packet(xfer, ep_idx);
@@ -764,31 +766,37 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_addr) {
 }
 
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes) {
-  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
+  uint8_t const ep_num = tu_edpt_number(ep_addr);
+  uint8_t const dir = tu_edpt_dir(ep_addr);
+  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, dir);
+
   xfer->buffer = buffer;
   xfer->ff = NULL;
   xfer->total_len = total_bytes;
   xfer->queued_len = 0;
 
-  return edpt_xfer(rhport, ep_addr);
+  return edpt_xfer(rhport, ep_num, dir);
 }
 
 bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t *ff, uint16_t total_bytes) {
-  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
+  uint8_t const ep_num = tu_edpt_number(ep_addr);
+  uint8_t const dir = tu_edpt_dir(ep_addr);
+  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, dir);
+
   xfer->buffer = NULL;
   xfer->ff = ff;
   xfer->total_len = total_bytes;
   xfer->queued_len = 0;
 
-  return edpt_xfer(rhport, ep_addr);
+  return edpt_xfer(rhport, ep_num, dir);
 }
 
 void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
   (void)rhport;
-
-  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
-  uint8_t const ep_idx = xfer->ep_idx;
+  uint8_t const ep_num = tu_edpt_number(ep_addr);
   uint8_t const dir = tu_edpt_dir(ep_addr);
+  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, dir);
+  uint8_t const ep_idx = xfer->ep_idx;
 
   uint32_t ep_reg = ep_read(ep_idx);
   ep_reg |= USB_EP_CTR_RX | USB_EP_CTR_TX; // reserve CTR bits
@@ -801,11 +809,12 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
 void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
   (void)rhport;
 
-  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
-  uint8_t const ep_idx = xfer->ep_idx;
+  uint8_t const ep_num = tu_edpt_number(ep_addr);
   uint8_t const dir = tu_edpt_dir(ep_addr);
-  uint32_t ep_reg = ep_read(ep_idx);
-  ep_reg |= USB_EP_CTR_RX | USB_EP_CTR_TX; // reserve CTR bits
+  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, dir);
+  uint8_t const ep_idx = xfer->ep_idx;
+
+  uint32_t ep_reg = ep_read(ep_idx) | EP_CTR_TXRX;
   ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir) | EP_DTOG_MASK(dir);
 
   if (!ep_is_iso(ep_reg)) {

From 7954d9cb4c486b263bed8984b7dd7553092150f9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 31 Jul 2024 18:15:22 +0700
Subject: [PATCH 110/204] rename to fsdev_type.h, use FSDDEV_REG instead of USB

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 57 ++++++++++---------
 src/portable/st/stm32_fsdev/fsdev_stm32.h     |  2 +
 .../{fsdev_common.h => fsdev_type.h}          | 25 ++++----
 3 files changed, 42 insertions(+), 42 deletions(-)
 rename src/portable/st/stm32_fsdev/{fsdev_common.h => fsdev_type.h} (95%)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index d0a51d48ea..29e1ca1119 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -123,7 +123,7 @@
   #error "Unknown USB IP"
 #endif
 
-#include "fsdev_common.h"
+#include "fsdev_type.h"
 
 //--------------------------------------------------------------------+
 // Configuration
@@ -197,25 +197,25 @@ void dcd_init(uint8_t rhport) {
   }
 
   // Perform USB peripheral reset
-  USB->CNTR = USB_CNTR_FRES | USB_CNTR_PDWN;
+  FSDEV_REG->CNTR = USB_CNTR_FRES | USB_CNTR_PDWN;
   for (volatile uint32_t i = 0; i < 200; i++) { // should be a few us
     asm("NOP");
   }
 
-  USB->CNTR &= ~USB_CNTR_PDWN;
+  FSDEV_REG->CNTR &= ~USB_CNTR_PDWN;
 
   // Wait startup time, for F042 and F070, this is <= 1 us.
   for (volatile uint32_t i = 0; i < 200; i++) { // should be a few us
     asm("NOP");
   }
-  USB->CNTR = 0; // Enable USB
+  FSDEV_REG->CNTR = 0; // Enable USB
 
-#if !defined(STM32G0) && !defined(STM32H5) && !defined(STM32U5)
-  // BTABLE register does not exist any more on STM32G0, it is fixed to USB SRAM base address
-  USB->BTABLE = FSDEV_BTABLE_BASE;
+#if !defined(FSDEV_BUS_32BIT)
+  // BTABLE register does not exist any more on 32-bit bus devices
+  FSDEV_REG->BTABLE = FSDEV_BTABLE_BASE;
 #endif
 
-  USB->ISTR = 0; // Clear pending interrupts
+  FSDEV_REG->ISTR = 0; // Clear pending interrupts
 
   // Reset endpoints to disabled
   for (uint32_t i = 0; i < FSDEV_EP_COUNT; i++) {
@@ -223,7 +223,7 @@ void dcd_init(uint8_t rhport) {
     ep_write(i, 0u);
   }
 
-  USB->CNTR |= USB_CNTR_RESETM | USB_CNTR_ESOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM;
+  FSDEV_REG->CNTR |= USB_CNTR_RESETM | USB_CNTR_ESOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM;
   handle_bus_reset(rhport);
 
   // Enable pull-up if supported
@@ -234,9 +234,9 @@ void dcd_sof_enable(uint8_t rhport, bool en) {
   (void)rhport;
 
   if (en) {
-    USB->CNTR |= USB_CNTR_SOFM;
+    FSDEV_REG->CNTR |= USB_CNTR_SOFM;
   } else {
-    USB->CNTR &= ~USB_CNTR_SOFM;
+    FSDEV_REG->CNTR &= ~USB_CNTR_SOFM;
   }
 }
 
@@ -254,12 +254,12 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr) {
 void dcd_remote_wakeup(uint8_t rhport) {
   (void)rhport;
 
-  USB->CNTR |= USB_CNTR_RESUME;
+  FSDEV_REG->CNTR |= USB_CNTR_RESUME;
   remoteWakeCountdown = 4u; // required to be 1 to 15 ms, ESOF should trigger every 1ms.
 }
 
 static void handle_bus_reset(uint8_t rhport) {
-  USB->DADDR = 0u; // disable USB Function
+  FSDEV_REG->DADDR = 0u; // disable USB Function
 
   for (uint32_t i = 0; i < FSDEV_EP_COUNT; i++) {
     // Clear EP allocation status
@@ -274,7 +274,7 @@ static void handle_bus_reset(uint8_t rhport) {
 
   edpt0_open(rhport); // open control endpoint (both IN & OUT)
 
-  USB->DADDR = USB_DADDR_EF; // Enable USB Function
+  FSDEV_REG->DADDR = USB_DADDR_EF; // Enable USB Function
 }
 
 // Handle CTR interrupt for the TX/IN direction
@@ -410,7 +410,7 @@ static void handle_ctr_rx(uint32_t ep_id) {
 }
 
 void dcd_int_handler(uint8_t rhport) {
-  uint32_t int_status = USB->ISTR;
+  uint32_t int_status = FSDEV_REG->ISTR;
   // const uint32_t handled_ints = USB_ISTR_CTR | USB_ISTR_RESET | USB_ISTR_WKUP
   //     | USB_ISTR_SUSP | USB_ISTR_SOF | USB_ISTR_ESOF;
   //  unused IRQs: (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_L1REQ )
@@ -421,23 +421,23 @@ void dcd_int_handler(uint8_t rhport) {
 
   /* Put SOF flag at the beginning of ISR in case to get least amount of jitter if it is used for timing purposes */
   if (int_status & USB_ISTR_SOF) {
-    USB->ISTR = (fsdev_bus_t)~USB_ISTR_SOF;
-    dcd_event_sof(0, USB->FNR & USB_FNR_FN, true);
+    FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_SOF;
+    dcd_event_sof(0, FSDEV_REG->FNR & USB_FNR_FN, true);
   }
 
   if (int_status & USB_ISTR_RESET) {
     // USBRST is start of reset.
-    USB->ISTR = (fsdev_bus_t)~USB_ISTR_RESET;
+    FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_RESET;
     handle_bus_reset(rhport);
     dcd_event_bus_reset(0, TUSB_SPEED_FULL, true);
     return; // Don't do the rest of the things here; perhaps they've been cleared?
   }
 
   if (int_status & USB_ISTR_WKUP) {
-    USB->CNTR &= ~USB_CNTR_LPMODE;
-    USB->CNTR &= ~USB_CNTR_FSUSP;
+    FSDEV_REG->CNTR &= ~USB_CNTR_LPMODE;
+    FSDEV_REG->CNTR &= ~USB_CNTR_FSUSP;
 
-    USB->ISTR = (fsdev_bus_t)~USB_ISTR_WKUP;
+    FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_WKUP;
     dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
   }
 
@@ -446,22 +446,22 @@ void dcd_int_handler(uint8_t rhport) {
      * these events cannot be differentiated, so we only trigger suspend. */
 
     /* Force low-power mode in the macrocell */
-    USB->CNTR |= USB_CNTR_FSUSP;
-    USB->CNTR |= USB_CNTR_LPMODE;
+    FSDEV_REG->CNTR |= USB_CNTR_FSUSP;
+    FSDEV_REG->CNTR |= USB_CNTR_LPMODE;
 
     /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
-    USB->ISTR = (fsdev_bus_t)~USB_ISTR_SUSP;
+    FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_SUSP;
     dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
   }
 
   if (int_status & USB_ISTR_ESOF) {
     if (remoteWakeCountdown == 1u) {
-      USB->CNTR &= ~USB_CNTR_RESUME;
+      FSDEV_REG->CNTR &= ~USB_CNTR_RESUME;
     }
     if (remoteWakeCountdown > 0u) {
       remoteWakeCountdown--;
     }
-    USB->ISTR = (fsdev_bus_t)~USB_ISTR_ESOF;
+    FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_ESOF;
   }
 
   // loop to handle all pending CTR interrupts
@@ -474,7 +474,7 @@ void dcd_int_handler(uint8_t rhport) {
       handle_ctr_rx(ep_id); // RX/OUT or both (RX/TX !!)
     }
 
-    int_status = USB->ISTR;
+    int_status = FSDEV_REG->ISTR;
   }
 }
 
@@ -488,10 +488,11 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const *req
   (void)rhport;
 
   if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
+
       request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
       request->bRequest == TUSB_REQ_SET_ADDRESS) {
     uint8_t const dev_addr = (uint8_t)request->wValue;
-    USB->DADDR = (USB_DADDR_EF | dev_addr);
+    FSDEV_REG->DADDR = (USB_DADDR_EF | dev_addr);
   }
 }
 
diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index f20505f28a..bb2c72fd1b 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -198,6 +198,8 @@
   #define FSDEV_REG_BASE USB_BASE
 #elif defined(USB_DRD_BASE)
   #define FSDEV_REG_BASE USB_DRD_BASE
+#elif defined(USB_DRD_FS_BASE)
+  #define FSDEV_REG_BASE USB_DRD_FS_BASE
 #else
   #error "FSDEV_REG_BASE not defined"
 #endif
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_type.h
similarity index 95%
rename from src/portable/st/stm32_fsdev/fsdev_common.h
rename to src/portable/st/stm32_fsdev/fsdev_type.h
index dd030652b1..116017f63b 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_type.h
@@ -25,8 +25,8 @@
  *
  */
 
-#ifndef TUSB_FSDEV_COMMON_H
-#define TUSB_FSDEV_COMMON_H
+#ifndef TUSB_FSDEV_TYPE_H
+#define TUSB_FSDEV_TYPE_H
 
 #ifdef __cplusplus
  extern "C" {
@@ -62,6 +62,9 @@ TU_VERIFY_STATIC(FSDEV_BTABLE_BASE % 8 == 0, "BTABLE base must be aligned to 8 b
   #define pma_aligned
 #endif
 
+//--------------------------------------------------------------------+
+// BTable Typedef
+//--------------------------------------------------------------------+
 enum {
   BTABLE_BUF_TX = 0,
   BTABLE_BUF_RX = 1
@@ -92,9 +95,12 @@ typedef struct {
 TU_VERIFY_STATIC(sizeof(fsdev_btable_t) == FSDEV_EP_COUNT*8*FSDEV_PMA_STRIDE, "size is not correct");
 TU_VERIFY_STATIC(FSDEV_BTABLE_BASE + FSDEV_EP_COUNT*8 <= FSDEV_PMA_SIZE, "BTABLE does not fit in PMA RAM");
 
-
 #define FSDEV_BTABLE ((volatile fsdev_btable_t*) (USB_PMAADDR+FSDEV_BTABLE_BASE))
 
+//--------------------------------------------------------------------+
+// Registers Typedef
+//--------------------------------------------------------------------+
+
 // volatile 32-bit aligned
 #define _va32     volatile TU_ATTR_ALIGNED(4)
 
@@ -166,7 +172,7 @@ typedef enum {
 #define EP_DTOG_MASK(_dir)  (1u << (USB_EP_DTOG_TX_Pos + ((_dir) == TUSB_DIR_IN ? 0 : 8)))
 
 //--------------------------------------------------------------------+
-// Endpoint
+// Endpoint Helper
 // - CTR is write 0 to clear
 // - DTOG and STAT are write 1 to toggle
 //--------------------------------------------------------------------+
@@ -175,15 +181,6 @@ TU_ATTR_ALWAYS_INLINE static inline void ep_write(uint32_t ep_id, uint32_t value
   FSDEV_REG->ep[ep_id].reg = (fsdev_bus_t) value;
 }
 
-// write ep register with clear CTR_RX and CTR_TX mask (0 is no clear)
-//TU_ATTR_ALWAYS_INLINE static inline void ep_write_with_clear_ctr(uint32_t ep_id, uint32_t value, uint32_t clear_ctr_mask) {
-//  value |= USB_EP_CTR_RX | USB_EP_CTR_TX;
-//  if (clear_ctr_mask) {
-//    value &= ~clear_ctr_mask;
-//  }
-//  FSDEV_REG->ep[ep_id].reg = (fsdev_bus_t) value;
-//}
-
 TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_read(uint32_t ep_id) {
   return FSDEV_REG->ep[ep_id].reg;
 }
@@ -205,7 +202,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(uint32_t reg) {
 }
 
 //--------------------------------------------------------------------+
-// BTable
+// BTable Helper
 //--------------------------------------------------------------------+
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_addr(uint32_t ep_id, uint8_t buf_id) {

From 7d9b39946601e1c7cd393d09db40892bca5cf477 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 31 Jul 2024 18:28:17 +0700
Subject: [PATCH 111/204] fix ep type bulk typo

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 29e1ca1119..346cf8164d 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -488,7 +488,6 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const *req
   (void)rhport;
 
   if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
-
       request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
       request->bRequest == TUSB_REQ_SET_ADDRESS) {
     uint8_t const dev_addr = (uint8_t)request->wValue;
@@ -605,7 +604,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   // Set type
   switch (desc_ep->bmAttributes.xfer) {
     case TUSB_XFER_BULK:
-      ep_reg |= USB_EP_CONTROL; // FIXME should it be bulk?
+      ep_reg |= USB_EP_BULK;
       break;
     case TUSB_XFER_INTERRUPT:
       ep_reg |= USB_EP_INTERRUPT;

From 332f75cd44b58d340d36f30dbeb64742767a521c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 31 Jul 2024 20:53:42 +0700
Subject: [PATCH 112/204] simplify read/write 16-bit packet

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 139 +++++++++---------
 src/portable/st/stm32_fsdev/fsdev_ch32.h      |  23 ---
 src/portable/st/stm32_fsdev/fsdev_type.h      |  38 +++--
 3 files changed, 87 insertions(+), 113 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 346cf8164d..cff3284181 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -171,8 +171,8 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir);
 static uint16_t ep_buf_ptr; ///< Points to first free memory location
 static uint32_t dcd_pma_alloc(uint16_t len, bool dbuf);
 static uint8_t dcd_ep_alloc(uint8_t ep_addr, uint8_t ep_type);
-static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes);
-static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes);
+static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes);
+static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes);
 
 static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNBytes);
 static bool dcd_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBytes);
@@ -828,10 +828,10 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
 #ifdef FSDEV_BUS_32BIT
 static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes) {
   const uint8_t *src8 = src;
-  volatile uint32_t *dst32 = (volatile uint32_t *)(USB_PMAADDR + dst);
+  volatile uint32_t *pma32 = (volatile uint32_t *)(USB_PMAADDR + dst);
 
   for (uint32_t n = wNBytes / 4; n > 0; --n) {
-    *dst32++ = tu_unaligned_read32(src8);
+    *pma32++ = tu_unaligned_read32(src8);
     src8 += 4;
   }
 
@@ -849,11 +849,41 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, ui
       }
     }
 
-    *dst32 = wrVal;
+    *pma32 = wrVal;
   }
 
   return true;
 }
+
+static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes) {
+  uint8_t *dst8 = dst;
+  volatile uint32_t *src32 = (volatile uint32_t *)(USB_PMAADDR + src);
+
+  for (uint32_t n = wNBytes / 4; n > 0; --n) {
+    tu_unaligned_write32(dst8, *src32++);
+    dst8 += 4;
+  }
+
+  uint16_t odd = wNBytes & 0x03;
+  if (odd) {
+    uint32_t rdVal = *src32;
+
+    *dst8 = tu_u32_byte0(rdVal);
+    odd--;
+
+    if (odd) {
+      *++dst8 = tu_u32_byte1(rdVal);
+      odd--;
+
+      if (odd) {
+        *++dst8 = tu_u32_byte2(rdVal);
+      }
+    }
+  }
+
+  return true;
+}
+
 #else
 // Packet buffer access can only be 8- or 16-bit.
 /**
@@ -862,26 +892,52 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, ui
  * @param   dst, byte address in PMA; must be 16-bit aligned
  * @param   src pointer to user memory area.
  * @param   wPMABufAddr address into PMA.
- * @param   wNBytes no. of bytes to be copied.
+ * @param   nbytes no. of bytes to be copied.
  * @retval None
  */
-static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes) {
-  uint32_t n = (uint32_t)wNBytes >> 1U;
+static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes) {
+  uint32_t n16 = (uint32_t)nbytes >> 1U;
   const uint8_t *src8 = src;
-  volatile uint16_t *pdw16 = &pma[FSDEV_PMA_STRIDE * (dst >> 1)];
+  fsdev_pma16_t* pma16 = (fsdev_pma16_t*) (USB_PMAADDR + FSDEV_PMA_STRIDE * dst);
 
-  while (n--) {
-    *pdw16 = tu_unaligned_read16(src8);
+  while (n16--) {
+    pma16->u16 = tu_unaligned_read16(src8);
     src8 += 2;
-    pdw16 += FSDEV_PMA_STRIDE;
+    pma16++;
+  }
+
+  if (nbytes & 0x01) {
+    pma16->u16 = (uint16_t) *src8;
+  }
+
+  return true;
+}
+
+/**
+ * @brief Copy a buffer from packet memory area (PMA) to user memory area.
+ *        Uses unaligned for system memory and 16-bit access of packet memory
+ * @param   nbytes no. of bytes to be copied.
+ * @retval None
+ */
+static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes) {
+  uint32_t n16 = (uint32_t)nbytes >> 1U;
+  fsdev_pma16_t* pma16 = (fsdev_pma16_t*) (USB_PMAADDR + FSDEV_PMA_STRIDE * src);
+  uint8_t *dst8 = (uint8_t *)dst;
+
+  while (n16--) {
+    uint16_t temp16 = pma16->u16;
+    tu_unaligned_write16(dst8, temp16);
+    dst8 += 2;
+    pma16++;
   }
 
-  if (wNBytes & 0x01) {
-    *pdw16 = (uint16_t) *src8;
+  if (nbytes & 0x01) {
+    *dst8++ = tu_u16_low(pma16->u16);
   }
 
   return true;
 }
+
 #endif
 
 /**
@@ -959,61 +1015,6 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNB
   return true;
 }
 
-#ifdef FSDEV_BUS_32BIT
-static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes) {
-  uint8_t *dst8 = dst;
-  volatile uint32_t *src32 = (volatile uint32_t *)(USB_PMAADDR + src);
-
-  for (uint32_t n = wNBytes / 4; n > 0; --n) {
-    tu_unaligned_write32(dst8, *src32++);
-    dst8 += 4;
-  }
-
-  uint16_t odd = wNBytes & 0x03;
-  if (odd) {
-    uint32_t rdVal = *src32;
-
-    *dst8 = tu_u32_byte0(rdVal);
-    odd--;
-
-    if (odd) {
-      *++dst8 = tu_u32_byte1(rdVal);
-      odd--;
-
-      if (odd) {
-        *++dst8 = tu_u32_byte2(rdVal);
-      }
-    }
-  }
-
-  return true;
-}
-#else
-/**
- * @brief Copy a buffer from packet memory area (PMA) to user memory area.
- *        Uses unaligned for system memory and 16-bit access of packet memory
- * @param   wNBytes no. of bytes to be copied.
- * @retval None
- */
-static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes) {
-  uint32_t n = (uint32_t)wNBytes >> 1U;
-  volatile const uint16_t *pdw16 = &pma[FSDEV_PMA_STRIDE * (src >> 1)];
-  uint8_t *dst8 = (uint8_t *)dst;
-
-  while (n--) {
-    tu_unaligned_write16(dst8, *pdw16);
-    dst8 += 2;
-    pdw16 += FSDEV_PMA_STRIDE;
-  }
-
-  if (wNBytes & 0x01) {
-    *dst8++ = tu_u16_low(*pdw16);
-  }
-
-  return true;
-}
-#endif
-
 /**
  * @brief Copy a buffer from user packet memory area (PMA) to FIFO.
  *        Uses byte-access of system memory and 16-bit access of packet memory
diff --git a/src/portable/st/stm32_fsdev/fsdev_ch32.h b/src/portable/st/stm32_fsdev/fsdev_ch32.h
index 81ef08b8a6..8c0961bb9a 100644
--- a/src/portable/st/stm32_fsdev/fsdev_ch32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_ch32.h
@@ -54,29 +54,6 @@
 #endif
 
 #define FSDEV_PMA_SIZE (512u)
-
-#if 1
-// volatile 32-bit aligned
-#define _vaa32     volatile TU_ATTR_ALIGNED(4)
-
-typedef struct {
-  _vaa32 uint16_t EP0R;            // 00: USB Endpoint 0 register
-  _vaa32 uint16_t EP1R;            // 04: USB Endpoint 1 register
-  _vaa32 uint16_t EP2R;            // 08: USB Endpoint 2 register
-  _vaa32 uint16_t EP3R;            // 0C: USB Endpoint 3 register
-  _vaa32 uint16_t EP4R;            // 10: USB Endpoint 4 register
-  _vaa32 uint16_t EP5R;            // 14: USB Endpoint 5 register
-  _vaa32 uint16_t EP6R;            // 18: USB Endpoint 6 register
-  _vaa32 uint16_t EP7R;            // 1C: USB Endpoint 7 register
-  _vaa32 uint16_t RESERVED7[16];   // Reserved
-  _vaa32 uint16_t CNTR;            // 40: Control register
-  _vaa32 uint16_t ISTR;            // 44: Interrupt status register
-  _vaa32 uint16_t FNR;             // 48: Frame number register
-  _vaa32 uint16_t DADDR;           // 4C: Device address register
-  _vaa32 uint16_t BTABLE;          // 50: Buffer Table address register
-} USB_TypeDef;
-#endif
-
 #define FSDEV_REG_BASE  0x40005C00UL
 
 #define USB_BASE            (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers base address */
diff --git a/src/portable/st/stm32_fsdev/fsdev_type.h b/src/portable/st/stm32_fsdev/fsdev_type.h
index 116017f63b..e4a0f3f280 100644
--- a/src/portable/st/stm32_fsdev/fsdev_type.h
+++ b/src/portable/st/stm32_fsdev/fsdev_type.h
@@ -75,21 +75,19 @@ enum {
 
 // Buffer Table is located in Packet Memory Area (PMA) and therefore its address access is forced to either
 // 16-bit or 32-bit depending on FSDEV_BUS_32BIT.
-typedef struct {
-  union {
-    // 0: TX (IN), 1: RX (OUT)
-
-    // strictly 16-bit access (could be 32-bit aligned)
-    struct {
-      volatile pma_aligned uint16_t addr;
-      volatile pma_aligned uint16_t count;
-    } ep16[FSDEV_EP_COUNT][2];
-
-    // strictly 32-bit access
-    struct {
-      volatile uint32_t count_addr;
-    } ep32[FSDEV_EP_COUNT][2];
-  };
+typedef union {
+  // 0: TX (IN), 1: RX (OUT)
+
+  // strictly 16-bit access (could be 32-bit aligned)
+  struct {
+    volatile pma_aligned uint16_t addr;
+    volatile pma_aligned uint16_t count;
+  } ep16[FSDEV_EP_COUNT][2];
+
+  // strictly 32-bit access
+  struct {
+    volatile uint32_t count_addr;
+  } ep32[FSDEV_EP_COUNT][2];
 } fsdev_btable_t;
 
 TU_VERIFY_STATIC(sizeof(fsdev_btable_t) == FSDEV_EP_COUNT*8*FSDEV_PMA_STRIDE, "size is not correct");
@@ -97,6 +95,10 @@ TU_VERIFY_STATIC(FSDEV_BTABLE_BASE + FSDEV_EP_COUNT*8 <= FSDEV_PMA_SIZE, "BTABLE
 
 #define FSDEV_BTABLE ((volatile fsdev_btable_t*) (USB_PMAADDR+FSDEV_BTABLE_BASE))
 
+typedef struct {
+  volatile pma_aligned uint16_t u16;
+} fsdev_pma16_t;
+
 //--------------------------------------------------------------------+
 // Registers Typedef
 //--------------------------------------------------------------------+
@@ -105,16 +107,10 @@ TU_VERIFY_STATIC(FSDEV_BTABLE_BASE + FSDEV_EP_COUNT*8 <= FSDEV_PMA_SIZE, "BTABLE
 #define _va32     volatile TU_ATTR_ALIGNED(4)
 
 // The fsdev_bus_t type can be used for both register and PMA access necessities
-// For type-safety create a new macro for the volatile address of PMAADDR
-// The compiler should warn us if we cast it to a non-volatile type?
 #ifdef FSDEV_BUS_32BIT
 typedef uint32_t fsdev_bus_t;
-static volatile uint32_t * const pma32 = (volatile uint32_t*)USB_PMAADDR;
-
 #else
 typedef uint16_t fsdev_bus_t;
-// Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden)
-static volatile uint16_t * const pma = (volatile uint16_t*)USB_PMAADDR;
 #endif
 
 typedef struct {

From 5fa03dd906574e775ec025b12ee6c1bc490d87b9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Aug 2024 13:00:38 +0700
Subject: [PATCH 113/204] add stm32g0 (fsdev 2k) to hil pool remove esp32s3
 since cp210x cause usb bus issue in the long run

---
 .github/workflows/build.yml    |  4 +--
 .github/workflows/hil_test.yml | 14 +++++----
 test/hil/hil_test.py           | 10 +++++--
 test/hil/rpi.json              | 53 ++++++++++++++++++++--------------
 4 files changed, 48 insertions(+), 33 deletions(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 712c7dd438..fda7f02941 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -120,10 +120,8 @@ jobs:
       fail-fast: false
       matrix:
         board:
-          # ESP32-S2
           - 'espressif_kaluga_1'
-          # ESP32-S3 skip since devkitm is also compiled in hil-test workflow
-          #- 'espressif_s3_devkitm'
+          - 'espressif_s3_devkitm'
     with:
       build-system: 'cmake'
       toolchain: 'esp-idf'
diff --git a/.github/workflows/hil_test.yml b/.github/workflows/hil_test.yml
index 51227d4082..a95bd9bb84 100644
--- a/.github/workflows/hil_test.yml
+++ b/.github/workflows/hil_test.yml
@@ -66,9 +66,11 @@ jobs:
             cmake-build/cmake-build-*/*/*/*.bin
 
   # ---------------------------------------
-  # Build Espressif
+  # Build Espressif (skipped since CP210x cause USB bus issue)
+  # cp210x ttyUSB0: usb_serial_generic_write_bulk_callback - nonzero urb status: -71
   # ---------------------------------------
   build-esp:
+    if: false
     runs-on: ubuntu-latest
     outputs:
       BOARDS_LIST: ${{ steps.parse_hil_json.outputs.BOARDS_LIST }}
@@ -121,10 +123,10 @@ jobs:
     if: github.repository_owner == 'hathach'
     needs:
       - build
-      - build-esp
+      #- build-esp
     runs-on: [self-hosted, ARM64, rpi, hardware-in-the-loop]
     env:
-      BOARDS_LIST: "${{ needs.build.outputs.BOARDS_LIST }} ${{ needs.build-esp.outputs.BOARDS_LIST }}"
+      BOARDS_LIST: "${{ needs.build-esp.outputs.BOARDS_LIST }} ${{ needs.build.outputs.BOARDS_LIST }}"
     steps:
       - name: Clean workspace
         run: |
@@ -135,9 +137,9 @@ jobs:
         # USB bus on rpi is not stable, reset it before testing
 #      - name: Reset USB bus
 #        run: |
-#          # reset VIA Labs 2.0 hub
-#          sudo usbreset 001/002
-#          lsusb -t
+#          echo "1-2" | sudo tee /sys/bus/usb/drivers/usb/unbind
+#          sleep 5
+#          echo "1-2" | sudo tee /sys/bus/usb/drivers/usb/bind
 
       - name: Checkout TinyUSB
         uses: actions/checkout@v4
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index e2a2f01a0c..bda66a2b50 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -138,10 +138,15 @@ def flash_jlink(board, firmware):
 
 
 def flash_stlink(board, firmware):
-    #ret = run_cmd(f'st-flash --serial {board["flasher_sn"]} write {firmware}.bin 0x08000000')
     ret = run_cmd(f'STM32_Programmer_CLI --connect port=swd sn={board["flasher_sn"]} --write {firmware}.elf --go')
     return ret
 
+
+def flash_stflash(board, firmware):
+    ret = run_cmd(f'st-flash --serial {board["flasher_sn"]} write {firmware}.bin 0x8000000')
+    return ret
+
+
 def flash_openocd(board, firmware):
     ret = run_cmd(f'openocd -c "adapter serial {board["flasher_sn"]}" {board["flasher_args"]} -c "program {firmware}.elf reset exit"')
     return ret
@@ -378,7 +383,8 @@ def main():
             if not os.path.exists(fw_dir):
                 fw_dir = f'examples/cmake-build-{name}/device/{test}'
             fw_name = f'{fw_dir}/{test}'
-            print(f'  {test} ...', end='')
+            print(f'  {test} ... ', end='')
+            sys.stdout.flush()
 
             if not os.path.exists(fw_dir):
                 print('Skip')
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index dae3094b59..4d9b0f2164 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -1,12 +1,5 @@
 {
     "boards": [
-        {
-            "name": "raspberry_pi_pico",
-            "uid": "E6614C311B764A37",
-            "flasher": "openocd",
-            "flasher_sn": "E6614103E72C1D2F",
-            "flasher_args": "-f interface/cmsis-dap.cfg -f target/rp2040.cfg -c \"adapter speed 5000\""
-        },
         {
             "name": "feather_nrf52840_express",
             "uid": "1F0479CD0F764471",
@@ -21,16 +14,6 @@
             "flasher_sn": "E6614C311B597D32",
             "flasher_args": "-f interface/cmsis-dap.cfg -f target/atsame5x.cfg -c \"adapter speed 5000\""
         },
-        {
-            "name": "espressif_s3_devkitm",
-            "uid": "84F703C084E4",
-            "tests": [
-                "cdc_msc_freertos", "hid_composite_freertos"
-            ],
-            "flasher": "esptool",
-            "flasher_sn": "3ea619acd1cdeb11a0a0b806e93fd3f1",
-            "flasher_args": "-b 921600"
-        },
         {
             "name": "metro_m7_1011",
             "uid": "9CE8715DD71137363E00005002004200",
@@ -38,6 +21,13 @@
             "flasher_sn": "000611000000",
             "flasher_args": "-device MIMXRT1011xxx5A"
         },
+        {
+            "name": "lpcxpresso11u37",
+            "uid": "17121919",
+            "flasher": "jlink",
+            "flasher_sn": "000724441579",
+            "flasher_args": "-device LPC11U37/401"
+        },
         {
             "name": "ra4m1_ek",
             "uid": "152E163038303131393346E46F26574B",
@@ -48,11 +38,30 @@
             "flasher_args": "-device R7FA4M1AB"
         },
         {
-            "name": "lpcxpresso11u37",
-            "uid": "17121919",
-            "flasher": "jlink",
-            "flasher_sn": "000724441579",
-            "flasher_args": "-device LPC11U37/401"
+            "name": "raspberry_pi_pico",
+            "uid": "E6614C311B764A37",
+            "flasher": "openocd",
+            "flasher_sn": "E6614103E72C1D2F",
+            "flasher_args": "-f interface/cmsis-dap.cfg -f target/rp2040.cfg -c \"adapter speed 5000\""
+        },
+        {
+            "name": "stm32g0b1nucleo",
+            "uid": "4D0038000450434E37343120",
+            "flasher": "openocd",
+            "flasher_sn": "066FFF495087534867063844",
+            "flasher_args": "-f interface/stlink.cfg -f target/stm32g0x.cfg"
+        }
+    ],
+    "boards-skip": [
+        {
+            "name": "espressif_s3_devkitm",
+            "uid": "84F703C084E4",
+            "tests": [
+                "cdc_msc_freertos", "hid_composite_freertos"
+            ],
+            "flasher": "esptool",
+            "flasher_sn": "3ea619acd1cdeb11a0a0b806e93fd3f1",
+            "flasher_args": "-b 921600"
         }
     ]
 }

From 4e114b7bfa1c694e587c81993560424627ded26e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Aug 2024 14:01:35 +0700
Subject: [PATCH 114/204] update hil ci

---
 .github/workflows/hil_test.yml | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/.github/workflows/hil_test.yml b/.github/workflows/hil_test.yml
index a95bd9bb84..4939cdcff0 100644
--- a/.github/workflows/hil_test.yml
+++ b/.github/workflows/hil_test.yml
@@ -149,13 +149,6 @@ jobs:
       - name: Download Artifacts
         uses: actions/download-artifact@v4
         with:
-          name: hil_rpi
-          path: cmake-build
-
-      - name: Download Artifacts
-        uses: actions/download-artifact@v4
-        with:
-          name: hil_rpi_esp
           path: cmake-build
 
       - name: Test on actual hardware

From 8407252fa351e80a0abb3cfe4952213f96b486cd Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Aug 2024 14:13:03 +0700
Subject: [PATCH 115/204] fix hil ci

---
 .github/workflows/hil_test.yml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.github/workflows/hil_test.yml b/.github/workflows/hil_test.yml
index 4939cdcff0..a4573faf71 100644
--- a/.github/workflows/hil_test.yml
+++ b/.github/workflows/hil_test.yml
@@ -150,6 +150,7 @@ jobs:
         uses: actions/download-artifact@v4
         with:
           path: cmake-build
+          merge-multiple: true
 
       - name: Test on actual hardware
         run: |

From 46fd82299040ff8c572f2b991f5226bf18405ffe Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Aug 2024 14:24:23 +0700
Subject: [PATCH 116/204] increase freerto min task stack for some stm32

---
 hw/bsp/family_support.cmake                   | 19 +++++++++++++++++++
 .../stm32f0/FreeRTOSConfig/FreeRTOSConfig.h   |  2 +-
 .../stm32g0/FreeRTOSConfig/FreeRTOSConfig.h   |  2 +-
 hw/bsp/stm32g0/family.cmake                   |  5 +++--
 .../stm32h5/FreeRTOSConfig/FreeRTOSConfig.h   |  2 +-
 src/device/usbd.c                             |  2 +-
 6 files changed, 26 insertions(+), 6 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 6a1e966241..9a7eaeb920 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -428,6 +428,19 @@ function(family_flash_stlink TARGET)
 endfunction()
 
 
+# Add flash st-flash target
+function(family_flash_stflash TARGET)
+  if (NOT DEFINED ST_FLASH)
+    set(ST_FLASH st-flash)
+  endif ()
+
+  add_custom_target(${TARGET}-stflash
+    DEPENDS ${TARGET}
+    COMMAND ${ST_FLASH} write $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin 0x8000000
+    )
+endfunction()
+
+
 # Add flash openocd target
 function(family_flash_openocd TARGET)
   if (NOT DEFINED OPENOCD)
@@ -449,6 +462,7 @@ function(family_flash_openocd TARGET)
     )
 endfunction()
 
+
 # Add flash openocd-wch target
 # compiled from https://github.com/hathach/riscv-openocd-wch or https://github.com/dragonlock2/miscboards/blob/main/wch/SDK/riscv-openocd.tar.xz
 function(family_flash_openocd_wch TARGET)
@@ -459,6 +473,7 @@ function(family_flash_openocd_wch TARGET)
   family_flash_openocd(${TARGET})
 endfunction()
 
+
 # Add flash with https://github.com/ch32-rs/wlink
 function(family_flash_wlink_rs TARGET)
   if (NOT DEFINED WLINK_RS)
@@ -471,6 +486,7 @@ function(family_flash_wlink_rs TARGET)
     )
 endfunction()
 
+
 # Add flash pycod target
 function(family_flash_pyocd TARGET)
   if (NOT DEFINED PYOC)
@@ -483,6 +499,7 @@ function(family_flash_pyocd TARGET)
     )
 endfunction()
 
+
 # Flash with UF2
 function(family_flash_uf2 TARGET FAMILY_ID)
   add_custom_target(${TARGET}-uf2
@@ -491,6 +508,7 @@ function(family_flash_uf2 TARGET FAMILY_ID)
     )
 endfunction()
 
+
 # Add flash teensy_cli target
 function(family_flash_teensy TARGET)
   if (NOT DEFINED TEENSY_CLI)
@@ -503,6 +521,7 @@ function(family_flash_teensy TARGET)
     )
 endfunction()
 
+
 # Add flash using NXP's LinkServer (redserver)
 # https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools-/linkserver-for-microcontrollers:LINKERSERVER
 function(family_flash_nxplink TARGET)
diff --git a/hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h
index 37e7e09435..999dbfe9e4 100644
--- a/hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h
@@ -58,7 +58,7 @@
 #define configCPU_CLOCK_HZ                      SystemCoreClock
 #define configTICK_RATE_HZ                      ( 1000 )
 #define configMAX_PRIORITIES                    ( 5 )
-#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configMINIMAL_STACK_SIZE                ( 200 )
 #define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
 #define configMAX_TASK_NAME_LEN                 16
 #define configUSE_16_BIT_TICKS                  0
diff --git a/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h
index 82cb0cdb3f..76133ea2d6 100644
--- a/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h
@@ -58,7 +58,7 @@
 #define configCPU_CLOCK_HZ                      SystemCoreClock
 #define configTICK_RATE_HZ                      ( 1000 )
 #define configMAX_PRIORITIES                    ( 5 )
-#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configMINIMAL_STACK_SIZE                ( 200 )
 #define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
 #define configMAX_TASK_NAME_LEN                 16
 #define configUSE_16_BIT_TICKS                  0
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index b6838c6199..0dafa9c0a7 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -15,7 +15,7 @@ set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS STM32G0 CACHE INTERNAL "")
-
+set(OPENOCD_OPTION "-f interface/stlink.cfg -f target/stm32g0x.cfg")
 
 #------------------------------------
 # BOARD_TARGET
@@ -112,6 +112,7 @@ function(family_configure_example TARGET RTOS)
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
   # Flashing
-  family_flash_stlink(${TARGET})
   family_flash_jlink(${TARGET})
+  family_flash_stlink(${TARGET})
+  #family_flash_openocd(${TARGET})
 endfunction()
diff --git a/hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h
index cf6e23c1be..6a9c90a4ab 100644
--- a/hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32h5/FreeRTOSConfig/FreeRTOSConfig.h
@@ -58,7 +58,7 @@
 #define configCPU_CLOCK_HZ                      SystemCoreClock
 #define configTICK_RATE_HZ                      ( 1000 )
 #define configMAX_PRIORITIES                    ( 5 )
-#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configMINIMAL_STACK_SIZE                ( 200 )
 #define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
 #define configMAX_TASK_NAME_LEN                 16
 #define configUSE_16_BIT_TICKS                  0
diff --git a/src/device/usbd.c b/src/device/usbd.c
index d9b20d26d8..6d27a37356 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -1201,7 +1201,7 @@ TU_ATTR_FAST_FUNC void dcd_event_handler(dcd_event_t const* event, bool in_isr)
       break;
 
     case DCD_EVENT_SETUP_RECEIVED:
-      // TU_ASSERT(event->setup_received.bRequest != 0,);
+      // TU_ASSERT(event->setup_received.bRequest != 0,); // for catching issue with ch32v203 and windows with -O0/-Og
       _usbd_queued_setup++;
       send = true;
       break;

From f5d8796a6c59714d3096cf78cd7b4e8e114993a1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Aug 2024 15:24:55 +0700
Subject: [PATCH 117/204] add f072 (fsdev 1k) to hil test

---
 .github/workflows/cifuzz.yml | 2 +-
 test/hil/rpi.json            | 7 +++++++
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/cifuzz.yml b/.github/workflows/cifuzz.yml
index 622d261a0c..d7f1fc0667 100644
--- a/.github/workflows/cifuzz.yml
+++ b/.github/workflows/cifuzz.yml
@@ -26,7 +26,7 @@ jobs:
      with:
        oss-fuzz-project-name: 'tinyusb'
        language: c++
-       fuzz-seconds: 600
+       fuzz-seconds: 400
 
    - name: Upload Crash
      uses: actions/upload-artifact@v4
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index 4d9b0f2164..9520f30e24 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -44,6 +44,13 @@
             "flasher_sn": "E6614103E72C1D2F",
             "flasher_args": "-f interface/cmsis-dap.cfg -f target/rp2040.cfg -c \"adapter speed 5000\""
         },
+        {
+            "name": "stm32f072disco",
+            "uid": "3A001A001357364230353532",
+            "flasher": "jlink",
+            "flasher_sn": "779541626",
+            "flasher_args": "-device stm32f072rb"
+        },
         {
             "name": "stm32g0b1nucleo",
             "uid": "4D0038000450434E37343120",

From 3f4f6c0ec7f5c95ca8a1965a078c0f92d0d4e8ad Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Aug 2024 15:40:47 +0700
Subject: [PATCH 118/204] increase hil timeout, reduce fuzzing from 600 to 400
 seconds

---
 test/hil/hil_test.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index bda66a2b50..bdc48591ec 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -43,7 +43,7 @@
         pass
 
 
-ENUM_TIMEOUT = 10
+ENUM_TIMEOUT = 30
 
 
 # get usb serial by id

From af8609e96e269a423449cfb679977c150494c3a4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Aug 2024 18:36:28 +0700
Subject: [PATCH 119/204] fsdev improve ep bit manipulation

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 46 +++++++++----------
 src/portable/st/stm32_fsdev/fsdev_type.h      | 17 ++++---
 2 files changed, 31 insertions(+), 32 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index cff3284181..d1c40deb68 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -353,11 +353,11 @@ static void handle_ctr_rx(uint32_t ep_id) {
       dcd_event_setup_received(0, (uint8_t*) setup_packet, true);
 
       // Reset EP to NAK (in case it had been stalling)
-      ep_reg = ep_add_status(ep_reg, TUSB_DIR_IN, EP_STAT_NAK);
-      ep_reg = ep_add_status(ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
+      ep_add_status(&ep_reg, TUSB_DIR_IN, EP_STAT_NAK);
+      ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
 
-      ep_reg = ep_add_dtog(ep_reg, TUSB_DIR_IN, 1);
-      ep_reg = ep_add_dtog(ep_reg, TUSB_DIR_OUT, 1);
+      ep_add_dtog(&ep_reg, TUSB_DIR_IN, 1);
+      ep_add_dtog(&ep_reg, TUSB_DIR_OUT, 1);
     } else {
       ep_reg &= USB_EPREG_MASK; // reversed all toggle
     }
@@ -395,14 +395,14 @@ static void handle_ctr_rx(uint32_t ep_id) {
         // prepared for status packet
         btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, CFG_TUD_ENDPOINT0_SIZE);
       }
-      ep_reg = ep_add_status(ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
+      ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
     } else {
       // Set endpoint active again for receiving more data. Note that isochronous endpoints stay active always
       if (!is_iso) {
         uint16_t const cnt = tu_min16(xfer->total_len - xfer->queued_len, xfer->max_packet_size);
         btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, cnt);
       }
-      ep_reg = ep_add_status(ep_reg, TUSB_DIR_OUT, EP_STAT_VALID);
+      ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_VALID);
     }
   }
 
@@ -579,8 +579,8 @@ void edpt0_open(uint8_t rhport) {
 
   uint32_t ep_reg = FSDEV_REG->ep[0].reg & ~USB_EPREG_MASK;
   ep_reg |= USB_EP_CONTROL;
-  ep_reg = ep_add_status(ep_reg, TUSB_DIR_IN, EP_STAT_NAK);
-  ep_reg = ep_add_status(ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
+  ep_add_status(&ep_reg, TUSB_DIR_IN, EP_STAT_NAK);
+  ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
   // no need to explicitly set DTOG bits since we aren't masked DTOG bit
 
   // prepare for setup packet
@@ -623,8 +623,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   xfer->max_packet_size = packet_size;
   xfer->ep_idx = ep_idx;
 
-  ep_reg = ep_add_status(ep_reg, dir, EP_STAT_NAK);
-  ep_reg = ep_add_dtog(ep_reg, dir, 0);
+  ep_add_status(&ep_reg, dir, EP_STAT_NAK);
+  ep_add_dtog(&ep_reg, dir, 0);
 
   // reserve other direction toggle bits
   if (dir == TUSB_DIR_IN) {
@@ -694,10 +694,10 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
 
   uint32_t ep_reg = FSDEV_REG->ep[0].reg & ~USB_EPREG_MASK;
   ep_reg |= tu_edpt_number(ep_addr) | USB_EP_ISOCHRONOUS | USB_EP_CTR_RX | USB_EP_CTR_TX;
-  ep_reg = ep_add_status(ep_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
-  ep_reg = ep_add_status(ep_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
-  ep_reg = ep_add_dtog(ep_reg, dir, 0);
-  ep_reg = ep_add_dtog(ep_reg, 1-dir, 1);
+  ep_add_status(&ep_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
+  ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
+  ep_add_dtog(&ep_reg, dir, 0);
+  ep_add_dtog(&ep_reg, 1-dir, 1);
 
   ep_write(ep_idx, ep_reg);
 
@@ -707,7 +707,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
 // Currently, single-buffered, and only 64 bytes at a time (max)
 static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   uint16_t len = tu_min16(xfer->total_len - xfer->queued_len, xfer->max_packet_size);
-  uint16_t ep_reg = ep_read(ep_ix) | EP_CTR_TXRX;
+  uint32_t ep_reg = ep_read(ep_ix) | EP_CTR_TXRX;
   bool const is_iso = ep_is_iso(ep_reg);
 
   uint8_t buf_id;
@@ -727,8 +727,8 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   xfer->queued_len = (uint16_t)(xfer->queued_len + len);
 
   ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(TUSB_DIR_IN);
-  ep_reg = ep_add_status(ep_reg, TUSB_DIR_IN, EP_STAT_VALID);
-  ep_reg = ep_clear_ctr(ep_reg, TUSB_DIR_IN);
+  ep_add_status(&ep_reg, TUSB_DIR_IN, EP_STAT_VALID);
+  ep_clear_ctr(&ep_reg, TUSB_DIR_IN);
 
   dcd_int_disable(0);
   ep_write(ep_ix, ep_reg);
@@ -748,9 +748,9 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir) {
     dcd_transmit_packet(xfer, ep_idx);
   } else {
     uint32_t cnt = (uint32_t) tu_min16(xfer->total_len, xfer->max_packet_size);
-    uint16_t ep_reg = ep_read(ep_idx) | USB_EP_CTR_TX;
-    ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir); // keep CTR TX, clear CTR RX
-    ep_reg = ep_add_status(ep_reg, dir, EP_STAT_VALID);
+    uint32_t ep_reg = ep_read(ep_idx) | USB_EP_CTR_TX; // keep CTR TX, clear CTR RX
+    ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir);
+    ep_add_status(&ep_reg, dir, EP_STAT_VALID);
 
     if (ep_is_iso(ep_reg)) {
       btable_set_rx_bufsize(ep_idx, 0, cnt);
@@ -801,7 +801,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
   uint32_t ep_reg = ep_read(ep_idx);
   ep_reg |= USB_EP_CTR_RX | USB_EP_CTR_TX; // reserve CTR bits
   ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir);
-  ep_reg = ep_add_status(ep_reg, dir, EP_STAT_STALL);
+  ep_add_status(&ep_reg, dir, EP_STAT_STALL);
 
   ep_write(ep_idx, ep_reg);
 }
@@ -818,9 +818,9 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
   ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir) | EP_DTOG_MASK(dir);
 
   if (!ep_is_iso(ep_reg)) {
-    ep_reg = ep_add_status(ep_reg, dir, EP_STAT_NAK);
+    ep_add_status(&ep_reg, dir, EP_STAT_NAK);
   }
-  ep_reg = ep_add_dtog(ep_reg, dir, 0); // Reset to DATA0
+  ep_add_dtog(&ep_reg, dir, 0); // Reset to DATA0
 
   ep_write(ep_idx, ep_reg);
 }
diff --git a/src/portable/st/stm32_fsdev/fsdev_type.h b/src/portable/st/stm32_fsdev/fsdev_type.h
index e4a0f3f280..a44d8b35bc 100644
--- a/src/portable/st/stm32_fsdev/fsdev_type.h
+++ b/src/portable/st/stm32_fsdev/fsdev_type.h
@@ -75,10 +75,9 @@ enum {
 
 // Buffer Table is located in Packet Memory Area (PMA) and therefore its address access is forced to either
 // 16-bit or 32-bit depending on FSDEV_BUS_32BIT.
+// 0: TX (IN), 1: RX (OUT)
 typedef union {
-  // 0: TX (IN), 1: RX (OUT)
-
-  // strictly 16-bit access (could be 32-bit aligned)
+  // data is strictly 16-bit access (address could be 32-bit aligned)
   struct {
     volatile pma_aligned uint16_t addr;
     volatile pma_aligned uint16_t count;
@@ -181,16 +180,16 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_read(uint32_t ep_id) {
   return FSDEV_REG->ep[ep_id].reg;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_status(uint32_t reg, tusb_dir_t dir, ep_stat_t state) {
-  return reg ^ (state << (USB_EPTX_STAT_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
+TU_ATTR_ALWAYS_INLINE static inline void ep_add_status(uint32_t* reg, tusb_dir_t dir, ep_stat_t state) {
+  *reg ^= (state << (USB_EPTX_STAT_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_add_dtog(uint32_t reg, tusb_dir_t dir, uint8_t state) {
-  return reg ^ (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
+TU_ATTR_ALWAYS_INLINE static inline void ep_add_dtog(uint32_t* reg, tusb_dir_t dir, uint8_t state) {
+  *reg ^= (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_clear_ctr(uint32_t reg, tusb_dir_t dir) {
-  return reg & ~(1 << (USB_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
+TU_ATTR_ALWAYS_INLINE static inline void ep_clear_ctr(uint32_t* reg, tusb_dir_t dir) {
+  *reg &= ~(1 << (USB_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
 }
 
 TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(uint32_t reg) {

From e180d915c64c98ce7349cf4696f23abd55a91e19 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Aug 2024 23:08:12 +0700
Subject: [PATCH 120/204] read/write packet enhancement, merge 16-bit and
 32-bit together

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 139 ++++++------------
 src/portable/st/stm32_fsdev/fsdev_type.h      |  24 +--
 2 files changed, 60 insertions(+), 103 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index d1c40deb68..2aa776dbb2 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -825,121 +825,76 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
   ep_write(ep_idx, ep_reg);
 }
 
-#ifdef FSDEV_BUS_32BIT
-static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes) {
-  const uint8_t *src8 = src;
-  volatile uint32_t *pma32 = (volatile uint32_t *)(USB_PMAADDR + dst);
-
-  for (uint32_t n = wNBytes / 4; n > 0; --n) {
-    *pma32++ = tu_unaligned_read32(src8);
-    src8 += 4;
-  }
-
-  uint16_t odd = wNBytes & 0x03;
-  if (odd) {
-    uint32_t wrVal = *src8;
-    odd--;
-
-    if (odd) {
-      wrVal |= *++src8 << 8;
-      odd--;
-
-      if (odd) {
-        wrVal |= *++src8 << 16;
-      }
-    }
-
-    *pma32 = wrVal;
-  }
+// Write to packet memory area (PMA) from user memory
+// - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
+// - Uses unaligned for RAM (since M0 cannot access unaligned address)
+static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes) {
+  enum { BUS_SIZE = sizeof(fsdev_bus_t) };
+  uint32_t n_write = nbytes / BUS_SIZE;
 
-  return true;
-}
+  fsdev_pma_buf_t* pma_buf = PMA_BUF_AT(dst);
+  const uint8_t *src8 = src;
 
-static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes) {
-  uint8_t *dst8 = dst;
-  volatile uint32_t *src32 = (volatile uint32_t *)(USB_PMAADDR + src);
+  while (n_write--) {
+    #ifdef FSDEV_BUS_32BIT
+    pma_buf->value = tu_unaligned_read32(src8);
+    #else
+    pma_buf->value = tu_unaligned_read16(src8);
+    #endif
 
-  for (uint32_t n = wNBytes / 4; n > 0; --n) {
-    tu_unaligned_write32(dst8, *src32++);
-    dst8 += 4;
+    src8 += BUS_SIZE;
+    pma_buf++;
   }
 
-  uint16_t odd = wNBytes & 0x03;
+  // odd bytes e.g 1 for 16-bit or 1-3 for 32-bit
+  uint16_t odd = nbytes & (BUS_SIZE - 1);
   if (odd) {
-    uint32_t rdVal = *src32;
-
-    *dst8 = tu_u32_byte0(rdVal);
-    odd--;
-
-    if (odd) {
-      *++dst8 = tu_u32_byte1(rdVal);
-      odd--;
-
-      if (odd) {
-        *++dst8 = tu_u32_byte2(rdVal);
-      }
+    fsdev_bus_t temp = 0;
+    for(uint16_t i = 0; i < odd; i++) {
+      temp |= *src8++ << (i * 8);
     }
+    pma_buf->value = temp;
   }
 
   return true;
 }
 
-#else
-// Packet buffer access can only be 8- or 16-bit.
-/**
- * @brief Copy a buffer from user memory area to packet memory area (PMA).
- *        This uses un-aligned for user memory and 16-bit access for packet memory.
- * @param   dst, byte address in PMA; must be 16-bit aligned
- * @param   src pointer to user memory area.
- * @param   wPMABufAddr address into PMA.
- * @param   nbytes no. of bytes to be copied.
- * @retval None
- */
-static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes) {
-  uint32_t n16 = (uint32_t)nbytes >> 1U;
-  const uint8_t *src8 = src;
-  fsdev_pma16_t* pma16 = (fsdev_pma16_t*) (USB_PMAADDR + FSDEV_PMA_STRIDE * dst);
-
-  while (n16--) {
-    pma16->u16 = tu_unaligned_read16(src8);
-    src8 += 2;
-    pma16++;
-  }
+// Read from packet memory area (PMA) to user memory.
+// - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
+// - Uses unaligned for RAM (since M0 cannot access unaligned address)
+static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes) {
+  enum { BUS_SIZE = sizeof(fsdev_bus_t) };
+  uint32_t n_write = nbytes / BUS_SIZE;
 
-  if (nbytes & 0x01) {
-    pma16->u16 = (uint16_t) *src8;
-  }
+  fsdev_pma_buf_t* pma_buf = PMA_BUF_AT(src);
+  uint8_t *dst8 = (uint8_t *)dst;
 
-  return true;
-}
+  while (n_write--) {
+    fsdev_bus_t temp = pma_buf->value;
 
-/**
- * @brief Copy a buffer from packet memory area (PMA) to user memory area.
- *        Uses unaligned for system memory and 16-bit access of packet memory
- * @param   nbytes no. of bytes to be copied.
- * @retval None
- */
-static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes) {
-  uint32_t n16 = (uint32_t)nbytes >> 1U;
-  fsdev_pma16_t* pma16 = (fsdev_pma16_t*) (USB_PMAADDR + FSDEV_PMA_STRIDE * src);
-  uint8_t *dst8 = (uint8_t *)dst;
+    #ifdef FSDEV_BUS_32BIT
+    tu_unaligned_write32(dst8, temp);
+    #else
+    tu_unaligned_write16(dst8, temp);
+    #endif
 
-  while (n16--) {
-    uint16_t temp16 = pma16->u16;
-    tu_unaligned_write16(dst8, temp16);
-    dst8 += 2;
-    pma16++;
+    dst8 += BUS_SIZE;
+    pma_buf++;
   }
 
-  if (nbytes & 0x01) {
-    *dst8++ = tu_u16_low(pma16->u16);
+  // odd bytes e.g 1 for 16-bit or 1-3 for 32-bit
+  uint16_t odd = nbytes & (BUS_SIZE - 1);
+  if (odd) {
+    fsdev_bus_t temp = pma_buf->value;
+    while (odd--) {
+      *dst8++ = (uint8_t) (temp & 0xfful);
+      temp >>= 8;
+    }
   }
 
   return true;
 }
 
-#endif
-
 /**
  * @brief Copy from FIFO to packet memory area (PMA).
  *        Uses byte-access of system memory and 16-bit access of packet memory
diff --git a/src/portable/st/stm32_fsdev/fsdev_type.h b/src/portable/st/stm32_fsdev/fsdev_type.h
index a44d8b35bc..cac3b43867 100644
--- a/src/portable/st/stm32_fsdev/fsdev_type.h
+++ b/src/portable/st/stm32_fsdev/fsdev_type.h
@@ -1,9 +1,8 @@
 /*
  * The MIT License (MIT)
  *
- * Copyright(c) 2016 STMicroelectronics
  * Copyright(c) N Conrad
- * Copyright (c) 2024, hathach (tinyusb.org)
+ * Copyright(c) 2024, hathach (tinyusb.org)
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -23,6 +22,7 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
  *
+ * This file is part of the TinyUSB stack.
  */
 
 #ifndef TUSB_FSDEV_TYPE_H
@@ -62,6 +62,13 @@ TU_VERIFY_STATIC(FSDEV_BTABLE_BASE % 8 == 0, "BTABLE base must be aligned to 8 b
   #define pma_aligned
 #endif
 
+// The fsdev_bus_t type can be used for both register and PMA access necessities
+#ifdef FSDEV_BUS_32BIT
+  typedef uint32_t fsdev_bus_t;
+#else
+  typedef uint16_t fsdev_bus_t;
+#endif
+
 //--------------------------------------------------------------------+
 // BTable Typedef
 //--------------------------------------------------------------------+
@@ -95,8 +102,10 @@ TU_VERIFY_STATIC(FSDEV_BTABLE_BASE + FSDEV_EP_COUNT*8 <= FSDEV_PMA_SIZE, "BTABLE
 #define FSDEV_BTABLE ((volatile fsdev_btable_t*) (USB_PMAADDR+FSDEV_BTABLE_BASE))
 
 typedef struct {
-  volatile pma_aligned uint16_t u16;
-} fsdev_pma16_t;
+  volatile pma_aligned fsdev_bus_t value;
+} fsdev_pma_buf_t;
+
+#define PMA_BUF_AT(_addr) ((fsdev_pma_buf_t*) (USB_PMAADDR + FSDEV_PMA_STRIDE*(_addr)))
 
 //--------------------------------------------------------------------+
 // Registers Typedef
@@ -105,13 +114,6 @@ typedef struct {
 // volatile 32-bit aligned
 #define _va32     volatile TU_ATTR_ALIGNED(4)
 
-// The fsdev_bus_t type can be used for both register and PMA access necessities
-#ifdef FSDEV_BUS_32BIT
-typedef uint32_t fsdev_bus_t;
-#else
-typedef uint16_t fsdev_bus_t;
-#endif
-
 typedef struct {
   struct {
     _va32 fsdev_bus_t reg;

From e9a5af35121820c97a5ed0107e49a67b486c7e4e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 2 Aug 2024 15:48:39 +0700
Subject: [PATCH 121/204] add stm32f103ze_iar

---
 hw/bsp/family_support.cmake                   |  8 +-
 .../boards/stm32f103ze_iar/board.cmake        | 14 +++
 hw/bsp/stm32f1/boards/stm32f103ze_iar/board.h | 97 +++++++++++++++++++
 .../stm32f1/boards/stm32f103ze_iar/board.mk   | 13 +++
 hw/bsp/stm32f1/family.c                       | 35 ++++++-
 hw/bsp/stm32f1/family.mk                      | 34 +++----
 6 files changed, 182 insertions(+), 19 deletions(-)
 create mode 100644 hw/bsp/stm32f1/boards/stm32f103ze_iar/board.cmake
 create mode 100644 hw/bsp/stm32f1/boards/stm32f103ze_iar/board.h
 create mode 100644 hw/bsp/stm32f1/boards/stm32f103ze_iar/board.mk

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 9a7eaeb920..03a24c95b2 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -399,6 +399,11 @@ function(family_flash_jlink TARGET)
     set(JLINK_IF swd)
   endif ()
 
+  if (NOT DEFINED JLINK_OPTION)
+    set(JLINK_OPTION "")
+  endif ()
+  separate_arguments(OPTION_LIST UNIX_COMMAND ${JLINK_OPTION})
+
   file(GENERATE
     OUTPUT $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.jlink
     CONTENT "halt
@@ -410,7 +415,8 @@ exit"
 
   add_custom_target(${TARGET}-jlink
     DEPENDS ${TARGET}
-    COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} -if ${JLINK_IF} -JTAGConf -1,-1 -speed auto -CommandFile $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.jlink
+    COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} ${OPTION_LIST} -if ${JLINK_IF} -JTAGConf -1,-1 -speed auto -CommandFile $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.jlink
+    VERBATIM
     )
 endfunction()
 
diff --git a/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.cmake b/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.cmake
new file mode 100644
index 0000000000..c797d7090a
--- /dev/null
+++ b/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.cmake
@@ -0,0 +1,14 @@
+set(MCU_VARIANT stm32f103xe)
+set(JLINK_DEVICE stm32f103ze)
+
+string(TOUPPER ${MCU_VARIANT} MCU_VARIANT_UPPER)
+
+set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT_UPPER}_FLASH.ld)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F103xE
+    HSE_VALUE=8000000U
+    )
+endfunction()
diff --git a/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.h b/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.h
new file mode 100644
index 0000000000..d31102d327
--- /dev/null
+++ b/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.h
@@ -0,0 +1,97 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PORT              GPIOF
+#define LED_PIN               GPIO_PIN_6
+#define LED_STATE_ON          1
+
+// Button
+#define BUTTON_PORT           GPIOG
+#define BUTTON_PIN            GPIO_PIN_8
+#define BUTTON_STATE_ACTIVE   0
+
+// USB Connect
+#define USB_CONNECT_PORT      GPIOG
+#define USB_CONNECT_PIN       GPIO_PIN_11
+#define USB_CONNECT_STATE     0
+
+// UART
+//#define UART_DEV              USART1
+//#define UART_CLK_EN           __HAL_RCC_USART1_CLK_ENABLE
+//#define UART_GPIO_PORT        GPIOA
+//#define UART_GPIO_AF          GPIO_AF1_USART1
+//#define UART_TX_PIN           GPIO_PIN_9
+//#define UART_RX_PIN           GPIO_PIN_10
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+static inline void board_stm32f1_clock_init(void)
+{
+  RCC_ClkInitTypeDef clkinitstruct = {0};
+  RCC_OscInitTypeDef oscinitstruct = {0};
+  RCC_PeriphCLKInitTypeDef rccperiphclkinit = {0};
+
+  /* Enable HSE Oscillator and activate PLL with HSE as source */
+  oscinitstruct.OscillatorType  = RCC_OSCILLATORTYPE_HSE;
+  oscinitstruct.HSEState        = RCC_HSE_ON;
+  oscinitstruct.HSEPredivValue  = RCC_HSE_PREDIV_DIV1;
+  oscinitstruct.PLL.PLLMUL      = RCC_PLL_MUL9;
+  oscinitstruct.PLL.PLLState    = RCC_PLL_ON;
+  oscinitstruct.PLL.PLLSource   = RCC_PLLSOURCE_HSE;
+  HAL_RCC_OscConfig(&oscinitstruct);
+
+  /* USB clock selection */
+  rccperiphclkinit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+  rccperiphclkinit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
+  HAL_RCCEx_PeriphCLKConfig(&rccperiphclkinit);
+
+  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
+  clkinitstruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+  clkinitstruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  clkinitstruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  clkinitstruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  clkinitstruct.APB2CLKDivider = RCC_HCLK_DIV1;
+  HAL_RCC_ClockConfig(&clkinitstruct, FLASH_LATENCY_2);
+}
+
+static inline void board_vbus_sense_init(void)
+{
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.mk b/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.mk
new file mode 100644
index 0000000000..5b17d8036c
--- /dev/null
+++ b/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.mk
@@ -0,0 +1,13 @@
+MCU_VARIANT = stm32f103xe
+
+CFLAGS += -DSTM32F103xE -DHSE_VALUE=8000000U
+
+# Linker
+LD_FILE_GCC = ${ST_CMSIS}/Source/Templates/gcc/linker/STM32F103XE_FLASH.ld
+LD_FILE_IAR = ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf
+
+# For flash-jlink target
+JLINK_DEVICE = stm32f103ze
+
+# flash target ROM bootloader
+flash: flash-jlink
diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c
index 70f81e7fc9..600fc28c01 100644
--- a/hw/bsp/stm32f1/family.c
+++ b/hw/bsp/stm32f1/family.c
@@ -57,6 +57,19 @@ void board_init(void) {
   __HAL_RCC_GPIOC_CLK_ENABLE();
   __HAL_RCC_GPIOD_CLK_ENABLE();
 
+#ifdef __HAL_RCC_GPIOE_CLK_ENABLE
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+#endif
+
+#ifdef __HAL_RCC_GPIOF_CLK_ENABLE
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+#endif
+
+#ifdef __HAL_RCC_GPIOG_CLK_ENABLE
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+#endif
+
+
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
@@ -107,10 +120,18 @@ void board_init(void) {
   HAL_UART_Init(&UartHandle);
 #endif
 
+#ifdef USB_CONNECT_PIN
+  GPIO_InitStruct.Pin = USB_CONNECT_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  HAL_GPIO_Init(USB_CONNECT_PORT, &GPIO_InitStruct);
+#endif
+
   // USB Pins
   // Configure USB DM and DP pins.
   GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
@@ -119,6 +140,18 @@ void board_init(void) {
   __HAL_RCC_USB_CLK_ENABLE();
 }
 
+#ifdef USB_CONNECT_PIN
+void dcd_disconnect(uint8_t rhport) {
+  (void)rhport;
+  HAL_GPIO_WritePin(USB_CONNECT_PORT, USB_CONNECT_PIN, 1-USB_CONNECT_STATE);
+}
+
+void dcd_connect(uint8_t rhport) {
+  (void)rhport;
+  HAL_GPIO_WritePin(USB_CONNECT_PORT, USB_CONNECT_PIN, USB_CONNECT_STATE);
+}
+#endif
+
 //--------------------------------------------------------------------+
 // Board porting API
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32f1/family.mk b/hw/bsp/stm32f1/family.mk
index 03fbf40106..3646163043 100644
--- a/hw/bsp/stm32f1/family.mk
+++ b/hw/bsp/stm32f1/family.mk
@@ -1,10 +1,10 @@
 ST_FAMILY = f1
-DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
+DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_${ST_FAMILY} hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver
 
-ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
-ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
+ST_CMSIS = hw/mcu/st/cmsis_device_${ST_FAMILY}
+ST_HAL_DRIVER = hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver
 
-include $(TOP)/$(BOARD_PATH)/board.mk
+include ${TOP}/${BOARD_PATH}/board.mk
 CPU_CORE ?= cortex-m3
 
 # --------------
@@ -29,23 +29,23 @@ LDFLAGS_GCC += \
 # ------------------------
 SRC_C += \
   src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
-  $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c
+  ${ST_CMSIS}/Source/Templates/system_stm32${ST_FAMILY}xx.c \
+  ${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal.c \
+  ${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_cortex.c \
+  ${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_rcc.c \
+  ${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_rcc_ex.c \
+  ${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_gpio.c \
+  ${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_uart.c
 
 INC += \
-  $(TOP)/$(BOARD_PATH) \
-  $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-  $(TOP)/$(ST_CMSIS)/Include \
-  $(TOP)/$(ST_HAL_DRIVER)/Inc
+  ${TOP}/${BOARD_PATH} \
+  ${TOP}/lib/CMSIS_5/CMSIS/Core/Include \
+  ${TOP}/${ST_CMSIS}/Include \
+  ${TOP}/${ST_HAL_DRIVER}/Inc
 
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+SRC_S_GCC += ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s
+SRC_S_IAR += ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s
 
 # flash target ROM bootloader: flash-dfu-util
 DFU_UTIL_OPTION = -a 0 --dfuse-address 0x08000000

From 91e5a066c5b259c38d663d21e3485b2feecb779d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 2 Aug 2024 17:12:28 +0700
Subject: [PATCH 122/204] more fsdev clean up hil test boards in parallel

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c |   8 --
 src/portable/st/stm32_fsdev/fsdev_ch32.h      |  18 +--
 src/portable/st/stm32_fsdev/fsdev_stm32.h     |  50 ++++----
 src/portable/st/stm32_fsdev/fsdev_type.h      |  29 +++--
 test/hil/hil_test.py                          | 120 +++++++++---------
 5 files changed, 102 insertions(+), 123 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 2aa776dbb2..cbd240ca1e 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -114,8 +114,6 @@
 #include "device/dcd.h"
 
 #if defined(TUP_USBIP_FSDEV_STM32)
-  // Undefine to reduce the dependence on HAL
-  #undef USE_HAL_DRIVER
   #include "fsdev_stm32.h"
 #elif defined(TUP_USBIP_FSDEV_CH32)
   #include "fsdev_ch32.h"
@@ -125,12 +123,6 @@
 
 #include "fsdev_type.h"
 
-//--------------------------------------------------------------------+
-// Configuration
-//--------------------------------------------------------------------+
-
-
-
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
diff --git a/src/portable/st/stm32_fsdev/fsdev_ch32.h b/src/portable/st/stm32_fsdev/fsdev_ch32.h
index 8c0961bb9a..518197c477 100644
--- a/src/portable/st/stm32_fsdev/fsdev_ch32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_ch32.h
@@ -54,22 +54,8 @@
 #endif
 
 #define FSDEV_PMA_SIZE (512u)
-#define FSDEV_REG_BASE  0x40005C00UL
-
-#define USB_BASE            (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers base address */
-#define USB_PMAADDR         (APB1PERIPH_BASE + 0x00006000UL) /*!< USB_IP Packet Memory Area base address */
-#define USB                 ((USB_TypeDef *)USB_BASE)
-
-/******************************************************************************/
-/*                                                                            */
-/*                         USB Device General registers                       */
-/*                                                                            */
-/******************************************************************************/
-#define USB_CNTR                             (USB_BASE + 0x40U)             /*!< Control register */
-#define USB_ISTR                             (USB_BASE + 0x44U)             /*!< Interrupt status register */
-#define USB_FNR                              (USB_BASE + 0x48U)             /*!< Frame number register */
-#define USB_DADDR                            (USB_BASE + 0x4CU)             /*!< Device address register */
-#define USB_BTABLE                           (USB_BASE + 0x50U)             /*!< Buffer Table address register */
+#define FSDEV_REG_BASE  (APB1PERIPH_BASE + 0x00005C00UL)
+#define FSDEV_PMA_BASE  (APB1PERIPH_BASE + 0x00006000UL)
 
 /****************************  ISTR interrupt events  *************************/
 #define USB_ISTR_CTR                         ((uint16_t)0x8000U)               /*!< Correct TRansfer (clear-only bit) */
diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index bb2c72fd1b..99fe8d55fd 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -82,12 +82,9 @@
 
 #elif CFG_TUSB_MCU == OPT_MCU_STM32G0
   #include "stm32g0xx.h"
-  #define FSDEV_BUS_32BIT
   #define FSDEV_PMA_SIZE (2048u)
-  #undef USB_PMAADDR
-  #define USB_PMAADDR USB_DRD_PMAADDR
-  #define USB_TypeDef USB_DRD_TypeDef
-  #define EP0R CHEP0R
+  #define USB USB_DRD_FS
+
   #define USB_EP_CTR_RX USB_EP_VTRX
   #define USB_EP_CTR_TX USB_EP_VTTX
   #define USB_EP_T_FIELD USB_CHEP_UTYPE
@@ -100,7 +97,6 @@
   #define USB_EPRX_DTOG2 USB_CHEP_RX_DTOG2
   #define USB_EPRX_STAT USB_CH_RX_VALID
   #define USB_EPKIND_MASK USB_EP_KIND_MASK
-  #define USB USB_DRD_FS
   #define USB_CNTR_FRES USB_CNTR_USBRST
   #define USB_CNTR_RESUME USB_CNTR_L2RES
   #define USB_ISTR_EP_ID USB_ISTR_IDN
@@ -110,17 +106,9 @@
 
 #elif CFG_TUSB_MCU == OPT_MCU_STM32H5
   #include "stm32h5xx.h"
-  #define FSDEV_BUS_32BIT
-
-  #if !defined(USB_DRD_BASE) && defined(USB_DRD_FS_BASE)
-  #define USB_DRD_BASE USB_DRD_FS_BASE
-  #endif
-
   #define FSDEV_PMA_SIZE (2048u)
-  #undef USB_PMAADDR
-  #define USB_PMAADDR USB_DRD_PMAADDR
-  #define USB_TypeDef USB_DRD_TypeDef
-  #define EP0R CHEP0R
+  #define USB USB_DRD_FS
+
   #define USB_EP_CTR_RX USB_EP_VTRX
   #define USB_EP_CTR_TX USB_EP_VTTX
   #define USB_EP_T_FIELD USB_CHEP_UTYPE
@@ -133,7 +121,6 @@
   #define USB_EPRX_DTOG2 USB_CHEP_RX_DTOG2
   #define USB_EPRX_STAT USB_CH_RX_VALID
   #define USB_EPKIND_MASK USB_EP_KIND_MASK
-  #define USB USB_DRD_FS
   #define USB_CNTR_FRES USB_CNTR_USBRST
   #define USB_CNTR_RESUME USB_CNTR_L2RES
   #define USB_ISTR_EP_ID USB_ISTR_IDN
@@ -144,9 +131,8 @@
 #elif CFG_TUSB_MCU == OPT_MCU_STM32WB
   #include "stm32wbxx.h"
   #define FSDEV_PMA_SIZE (1024u)
-  /* ST provided header has incorrect value */
-  #undef USB_PMAADDR
-  #define USB_PMAADDR USB1_PMAADDR
+  /* ST provided header has incorrect value of USB_PMAADDR */
+  #define FSDEV_PMA_BASE USB1_PMAADDR
 
 #elif CFG_TUSB_MCU == OPT_MCU_STM32L4
   #include "stm32l4xx.h"
@@ -162,13 +148,9 @@
 
 #elif CFG_TUSB_MCU == OPT_MCU_STM32U5
   #include "stm32u5xx.h"
-  #define FSDEV_BUS_32BIT
-
   #define FSDEV_PMA_SIZE (2048u)
-  #undef USB_PMAADDR
-  #define USB_PMAADDR USB_DRD_PMAADDR
-  #define USB_TypeDef USB_DRD_TypeDef
-  #define EP0R CHEP0R
+  #define USB USB_DRD_FS
+
   #define USB_EP_CTR_RX USB_EP_VTRX
   #define USB_EP_CTR_TX USB_EP_VTTX
   #define USB_EP_T_FIELD USB_CHEP_UTYPE
@@ -181,7 +163,6 @@
   #define USB_EPRX_DTOG2 USB_CHEP_RX_DTOG2
   #define USB_EPRX_STAT USB_CH_RX_VALID
   #define USB_EPKIND_MASK USB_EP_KIND_MASK
-  #define USB USB_DRD_FS
   #define USB_CNTR_FRES USB_CNTR_USBRST
   #define USB_CNTR_RESUME USB_CNTR_L2RES
   #define USB_ISTR_EP_ID USB_ISTR_IDN
@@ -194,6 +175,10 @@
   // This includes U0
 #endif
 
+//--------------------------------------------------------------------+
+// Register and PMA Base Address
+//--------------------------------------------------------------------+
+#ifndef FSDEV_REG_BASE
 #if defined(USB_BASE)
   #define FSDEV_REG_BASE USB_BASE
 #elif defined(USB_DRD_BASE)
@@ -203,6 +188,17 @@
 #else
   #error "FSDEV_REG_BASE not defined"
 #endif
+#endif
+
+#ifndef FSDEV_PMA_BASE
+#if defined(USB_PMAADDR)
+  #define FSDEV_PMA_BASE USB_PMAADDR
+#elif defined(USB_DRD_PMAADDR)
+  #define FSDEV_PMA_BASE USB_DRD_PMAADDR
+#else
+  #error "FSDEV_PMA_BASE not defined"
+#endif
+#endif
 
 // This checks if the device has "LPM"
 #if defined(USB_ISTR_L1REQ)
diff --git a/src/portable/st/stm32_fsdev/fsdev_type.h b/src/portable/st/stm32_fsdev/fsdev_type.h
index cac3b43867..bdff2c9406 100644
--- a/src/portable/st/stm32_fsdev/fsdev_type.h
+++ b/src/portable/st/stm32_fsdev/fsdev_type.h
@@ -49,17 +49,18 @@ TU_VERIFY_STATIC(FSDEV_BTABLE_BASE % 8 == 0, "BTABLE base must be aligned to 8 b
 
 // For purposes of accessing the packet
 #if FSDEV_PMA_SIZE == 512
-  #define FSDEV_PMA_STRIDE  (2u) // 1x16 bit access scheme
-  #define pma_aligned TU_ATTR_ALIGNED(4)
+  // 1x16 bit / word access scheme
+  #define FSDEV_PMA_STRIDE  2
+  #define pma_access_scheme TU_ATTR_ALIGNED(4)
 #elif FSDEV_PMA_SIZE == 1024
-  #define FSDEV_PMA_STRIDE  (1u) // 2x16 bit access scheme
-  #define pma_aligned
+  // 2x16 bit / word access scheme
+  #define FSDEV_PMA_STRIDE  1
+  #define pma_access_scheme
 #elif FSDEV_PMA_SIZE == 2048
-  #ifndef FSDEV_BUS_32BIT
-    #warning "FSDEV_PMA_SIZE is 2048, but FSDEV_BUS_32BIT is not defined"
-  #endif
-  #define FSDEV_PMA_STRIDE  (1u) // 32 bit access scheme
-  #define pma_aligned
+  // 32 bit access scheme
+  #define FSDEV_BUS_32BIT
+  #define FSDEV_PMA_STRIDE  1
+  #define pma_access_scheme
 #endif
 
 // The fsdev_bus_t type can be used for both register and PMA access necessities
@@ -86,8 +87,8 @@ enum {
 typedef union {
   // data is strictly 16-bit access (address could be 32-bit aligned)
   struct {
-    volatile pma_aligned uint16_t addr;
-    volatile pma_aligned uint16_t count;
+    volatile pma_access_scheme uint16_t addr;
+    volatile pma_access_scheme uint16_t count;
   } ep16[FSDEV_EP_COUNT][2];
 
   // strictly 32-bit access
@@ -99,13 +100,13 @@ typedef union {
 TU_VERIFY_STATIC(sizeof(fsdev_btable_t) == FSDEV_EP_COUNT*8*FSDEV_PMA_STRIDE, "size is not correct");
 TU_VERIFY_STATIC(FSDEV_BTABLE_BASE + FSDEV_EP_COUNT*8 <= FSDEV_PMA_SIZE, "BTABLE does not fit in PMA RAM");
 
-#define FSDEV_BTABLE ((volatile fsdev_btable_t*) (USB_PMAADDR+FSDEV_BTABLE_BASE))
+#define FSDEV_BTABLE ((volatile fsdev_btable_t*) (FSDEV_PMA_BASE + FSDEV_PMA_STRIDE*(FSDEV_BTABLE_BASE)))
 
 typedef struct {
-  volatile pma_aligned fsdev_bus_t value;
+  volatile pma_access_scheme fsdev_bus_t value;
 } fsdev_pma_buf_t;
 
-#define PMA_BUF_AT(_addr) ((fsdev_pma_buf_t*) (USB_PMAADDR + FSDEV_PMA_STRIDE*(_addr)))
+#define PMA_BUF_AT(_addr) ((fsdev_pma_buf_t*) (FSDEV_PMA_BASE + FSDEV_PMA_STRIDE*(_addr)))
 
 //--------------------------------------------------------------------+
 // Registers Typedef
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index bdc48591ec..6b8ba06757 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -34,6 +34,7 @@
 import json
 import glob
 import platform
+from multiprocessing import Pool
 
 # for RPI double reset
 if platform.machine() == 'aarch64':
@@ -130,10 +131,11 @@ def run_cmd(cmd):
 
 def flash_jlink(board, firmware):
     script = ['halt', 'r', f'loadfile {firmware}.elf', 'r', 'go', 'exit']
-    with open('flash.jlink', 'w') as f:
+    f_jlink = f'{board["name"]}_{os.path.basename(firmware)}.jlink'
+    with open(f_jlink, 'w') as f:
         f.writelines(f'{s}\n' for s in script)
-    ret = run_cmd(f'JLinkExe -USB {board["flasher_sn"]} {board["flasher_args"]} -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink')
-    os.remove('flash.jlink')
+    ret = run_cmd(f'JLinkExe -USB {board["flasher_sn"]} {board["flasher_args"]} -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile {f_jlink}')
+    os.remove(f_jlink)
     return ret
 
 
@@ -327,6 +329,61 @@ def test_hid_composite_freertos(id):
 # -------------------------------------------------------------
 # Main
 # -------------------------------------------------------------
+# all possible tests: board_test is added last to disable board's usb
+all_tests = [
+    'cdc_dual_ports',
+    'cdc_msc',
+    #'cdc_msc_freertos',
+    'dfu',
+    #'dfu_runtime',
+    'hid_boot_interface',
+    'board_test'
+]
+
+
+def test_board(item):
+    name = item['name']
+    flasher = item['flasher'].lower()
+
+    # default to all tests
+    if 'tests' in item:
+        test_list = item['tests'] + ['board_test']
+    else:
+        test_list = list(all_tests)
+
+    # remove skip_tests
+    if 'tests_skip' in item:
+        for skip in item['tests_skip']:
+            if skip in test_list:
+                test_list.remove(skip)
+
+    for test in test_list:
+        fw_dir = f'cmake-build/cmake-build-{name}/device/{test}'
+        if not os.path.exists(fw_dir):
+            fw_dir = f'examples/cmake-build-{name}/device/{test}'
+        fw_name = f'{fw_dir}/{test}'
+        print(f'{name:20} {test:20} ... ', end='')
+
+        if not os.path.exists(fw_dir):
+            print('Skip')
+            continue
+
+        # flash firmware. It may fail randomly, retry a few times
+        for i in range(3):
+            ret = globals()[f'flash_{flasher}'](item, fw_name)
+            if ret.returncode == 0:
+                break
+            else:
+                print(f'Flashing failed, retry {i+1}')
+                time.sleep(1)
+
+        assert ret.returncode == 0, 'Flash failed\n' + ret.stdout.decode()
+
+        # run test
+        globals()[f'test_{test}'](item['uid'])
+        print('OK')
+
+
 def main():
     """
     Hardware test on specified boards
@@ -345,66 +402,13 @@ def main():
     with open(config_file) as f:
         config = json.load(f)
 
-    # all possible tests: board_test is added last to disable board's usb
-    all_tests = [
-        'cdc_dual_ports',
-        'cdc_msc',
-        'cdc_msc_freertos',
-        'dfu',
-        'dfu_runtime',
-        'hid_boot_interface',
-        'board_test'
-    ]
-
     if len(boards) == 0:
         config_boards = config['boards']
     else:
         config_boards = [e for e in config['boards'] if e['name'] in boards]
 
-    for item in config_boards:
-        name = item['name']
-        print(f'Testing board:{name}')
-        flasher = item['flasher'].lower()
-
-        # default to all tests
-        if 'tests' in item:
-            test_list = item['tests'] + ['board_test']
-        else:
-            test_list = list(all_tests)
-
-        # remove skip_tests
-        if 'tests_skip' in item:
-            for skip in item['tests_skip']:
-                if skip in test_list:
-                    test_list.remove(skip)
-
-        for test in test_list:
-            fw_dir = f'cmake-build/cmake-build-{name}/device/{test}'
-            if not os.path.exists(fw_dir):
-                fw_dir = f'examples/cmake-build-{name}/device/{test}'
-            fw_name = f'{fw_dir}/{test}'
-            print(f'  {test} ... ', end='')
-            sys.stdout.flush()
-
-            if not os.path.exists(fw_dir):
-                print('Skip')
-                continue
-
-            # flash firmware. It may fail randomly, retry a few times
-            for i in range(3):
-                ret = globals()[f'flash_{flasher}'](item, fw_name)
-                if ret.returncode == 0:
-                    break
-                else:
-                    print(f'Flashing failed, retry {i+1}')
-                    time.sleep(1)
-
-            assert ret.returncode == 0, 'Flash failed\n' + ret.stdout.decode()
-
-            # run test
-            globals()[f'test_{test}'](item['uid'])
-
-            print('OK')
+    with Pool(processes=os.cpu_count()) as pool:
+        pool.map(test_board, config_boards)
 
 
 if __name__ == '__main__':

From 315dae6a85cbb3df5b30429b28d8c74130f44db6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 5 Aug 2024 17:43:27 +0700
Subject: [PATCH 123/204] finally fixed fsdev setup handling, which cause race
 condition for ch32v203

---
 src/device/usbd.c                             |  1 -
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 59 ++++++++++---------
 src/portable/st/stm32_fsdev/fsdev_type.h      |  3 -
 3 files changed, 30 insertions(+), 33 deletions(-)

diff --git a/src/device/usbd.c b/src/device/usbd.c
index 6d27a37356..7089e9cf1d 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -1201,7 +1201,6 @@ TU_ATTR_FAST_FUNC void dcd_event_handler(dcd_event_t const* event, bool in_isr)
       break;
 
     case DCD_EVENT_SETUP_RECEIVED:
-      // TU_ASSERT(event->setup_received.bRequest != 0,); // for catching issue with ch32v203 and windows with -O0/-Og
       _usbd_queued_setup++;
       send = true;
       break;
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index cbd240ca1e..43636198ab 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -147,7 +147,6 @@ typedef struct {
 
 static xfer_ctl_t xfer_status[CFG_TUD_ENDPPOINT_MAX][2];
 static ep_alloc_t ep_alloc_status[FSDEV_EP_COUNT];
-
 static uint8_t remoteWakeCountdown; // When wake is requested
 
 //--------------------------------------------------------------------+
@@ -171,6 +170,10 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBy
 
 static void edpt0_open(uint8_t rhport);
 
+TU_ATTR_ALWAYS_INLINE static inline void edpt0_prepare_setup(void) {
+   btable_set_rx_bufsize(0, BTABLE_BUF_RX, 8);
+}
+
 //--------------------------------------------------------------------+
 // Inline helper
 //--------------------------------------------------------------------+
@@ -340,21 +343,24 @@ static void handle_ctr_rx(uint32_t ep_id) {
     // Setup packet should always be 8 bytes. If not, ignore it, and try again.
     if (count == 8) {
       uint16_t rx_addr = btable_get_addr(ep_id, BTABLE_BUF_RX);
-      uint32_t setup_packet[2];
+      uint8_t setup_packet[8] TU_ATTR_ALIGNED(4);
+
       dcd_read_packet_memory(setup_packet, rx_addr, 8);
       dcd_event_setup_received(0, (uint8_t*) setup_packet, true);
 
-      // Reset EP to NAK (in case it had been stalling)
+      // Reset EP to NAK and set both toggle to 1
       ep_add_status(&ep_reg, TUSB_DIR_IN, EP_STAT_NAK);
       ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
-
       ep_add_dtog(&ep_reg, TUSB_DIR_IN, 1);
       ep_add_dtog(&ep_reg, TUSB_DIR_OUT, 1);
     } else {
+      // Missed an setup packet !!!
+      TU_BREAKPOINT();
       ep_reg &= USB_EPREG_MASK; // reversed all toggle
+      edpt0_prepare_setup();
     }
   } else {
-    ep_reg &= USB_EPRX_STAT | USB_EPREG_MASK; // reversed all toggle except RX Status
+    ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(TUSB_DIR_OUT); // reversed all toggle except RX Status
 
     bool const is_iso = ep_is_iso(ep_reg);
     xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, TUSB_DIR_OUT);
@@ -374,20 +380,13 @@ static void handle_ctr_rx(uint32_t ep_id) {
       } else {
         dcd_read_packet_memory(xfer->buffer + xfer->queued_len, pma_addr, rx_count);
       }
-
       xfer->queued_len = (uint16_t)(xfer->queued_len + rx_count);
     }
 
     if ((rx_count < xfer->max_packet_size) || (xfer->queued_len == xfer->total_len)) {
-      uint8_t const ep_addr = ep_num;
       // all bytes received or short packet
-      dcd_event_xfer_complete(0, ep_addr, xfer->queued_len, XFER_RESULT_SUCCESS, true);
-
-      if (ep_num == 0) {
-        // prepared for status packet
-        btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, CFG_TUD_ENDPOINT0_SIZE);
-      }
       ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
+      dcd_event_xfer_complete(0, ep_num, xfer->queued_len, XFER_RESULT_SUCCESS, true);
     } else {
       // Set endpoint active again for receiving more data. Note that isochronous endpoints stay active always
       if (!is_iso) {
@@ -485,6 +484,8 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const *req
     uint8_t const dev_addr = (uint8_t)request->wValue;
     FSDEV_REG->DADDR = (USB_DADDR_EF | dev_addr);
   }
+
+  edpt0_prepare_setup();
 }
 
 /***
@@ -569,15 +570,13 @@ void edpt0_open(uint8_t rhport) {
   btable_set_addr(0, BTABLE_BUF_RX, pma_addr0);
   btable_set_addr(0, BTABLE_BUF_TX, pma_addr1);
 
-  uint32_t ep_reg = FSDEV_REG->ep[0].reg & ~USB_EPREG_MASK;
+  uint32_t ep_reg = ep_read(0) & ~USB_EPREG_MASK; // only get toggle bits
   ep_reg |= USB_EP_CONTROL;
   ep_add_status(&ep_reg, TUSB_DIR_IN, EP_STAT_NAK);
   ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
   // no need to explicitly set DTOG bits since we aren't masked DTOG bit
 
-  // prepare for setup packet
-  btable_set_rx_bufsize(0, BTABLE_BUF_RX, CFG_TUD_ENDPOINT0_SIZE);
-
+  edpt0_prepare_setup(); // prepare for setup packet
   ep_write(0, ep_reg);
 }
 
@@ -590,7 +589,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   uint8_t const ep_idx = dcd_ep_alloc(ep_addr, desc_ep->bmAttributes.xfer);
   TU_ASSERT(ep_idx < FSDEV_EP_COUNT);
 
-  uint32_t ep_reg = FSDEV_REG->ep[ep_idx].reg & ~USB_EPREG_MASK;
+  uint32_t ep_reg = ep_read(ep_idx) & ~USB_EPREG_MASK;
   ep_reg |= tu_edpt_number(ep_addr) | USB_EP_CTR_RX | USB_EP_CTR_TX;
 
   // Set type
@@ -684,7 +683,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
 
   xfer->max_packet_size = tu_edpt_packet_size(desc_ep);
 
-  uint32_t ep_reg = FSDEV_REG->ep[0].reg & ~USB_EPREG_MASK;
+  uint32_t ep_reg = ep_read(ep_idx) & ~USB_EPREG_MASK;
   ep_reg |= tu_edpt_number(ep_addr) | USB_EP_ISOCHRONOUS | USB_EP_CTR_RX | USB_EP_CTR_TX;
   ep_add_status(&ep_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
   ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
@@ -699,7 +698,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
 // Currently, single-buffered, and only 64 bytes at a time (max)
 static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   uint16_t len = tu_min16(xfer->total_len - xfer->queued_len, xfer->max_packet_size);
-  uint32_t ep_reg = ep_read(ep_ix) | EP_CTR_TXRX;
+  uint32_t ep_reg = ep_read(ep_ix) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR bits
   bool const is_iso = ep_is_iso(ep_reg);
 
   uint8_t buf_id;
@@ -709,14 +708,17 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
     buf_id = BTABLE_BUF_TX;
   }
   uint16_t addr_ptr = (uint16_t) btable_get_addr(ep_ix, buf_id);
-  btable_set_count(ep_ix, buf_id, len);
 
-  if (xfer->ff) {
-    dcd_write_packet_memory_ff(xfer->ff, addr_ptr, len);
-  } else {
-    dcd_write_packet_memory(addr_ptr, &(xfer->buffer[xfer->queued_len]), len);
+  if (len) {
+    if (xfer->ff) {
+      dcd_write_packet_memory_ff(xfer->ff, addr_ptr, len);
+    } else {
+      dcd_write_packet_memory(addr_ptr, &(xfer->buffer[xfer->queued_len]), len);
+    }
+    xfer->queued_len = (uint16_t) (xfer->queued_len + len);
   }
-  xfer->queued_len = (uint16_t)(xfer->queued_len + len);
+
+  btable_set_count(ep_ix, buf_id, len);
 
   ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(TUSB_DIR_IN);
   ep_add_status(&ep_reg, TUSB_DIR_IN, EP_STAT_VALID);
@@ -790,8 +792,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, dir);
   uint8_t const ep_idx = xfer->ep_idx;
 
-  uint32_t ep_reg = ep_read(ep_idx);
-  ep_reg |= USB_EP_CTR_RX | USB_EP_CTR_TX; // reserve CTR bits
+  uint32_t ep_reg = ep_read(ep_idx) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR bits
   ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir);
   ep_add_status(&ep_reg, dir, EP_STAT_STALL);
 
@@ -806,7 +807,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, dir);
   uint8_t const ep_idx = xfer->ep_idx;
 
-  uint32_t ep_reg = ep_read(ep_idx) | EP_CTR_TXRX;
+  uint32_t ep_reg = ep_read(ep_idx) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR bits
   ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir) | EP_DTOG_MASK(dir);
 
   if (!ep_is_iso(ep_reg)) {
diff --git a/src/portable/st/stm32_fsdev/fsdev_type.h b/src/portable/st/stm32_fsdev/fsdev_type.h
index bdff2c9406..8432df4b04 100644
--- a/src/portable/st/stm32_fsdev/fsdev_type.h
+++ b/src/portable/st/stm32_fsdev/fsdev_type.h
@@ -156,9 +156,6 @@ TU_VERIFY_STATIC(sizeof(fsdev_regs_t) == 0x5C, "Size is not correct");
 #define USB_EP_CTR_TX_Pos    7u
 #endif
 
-
-#define EP_CTR_TXRX (USB_EP_CTR_TX | USB_EP_CTR_RX)
-
 typedef enum {
   EP_STAT_DISABLED = 0,
   EP_STAT_STALL = 1,

From 30e0ef221aec56c10b9d615bea9d4d9b4ff5e9cc Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 5 Aug 2024 19:23:35 +0700
Subject: [PATCH 124/204] fix running hil in parallel

---
 test/hil/hil_test.py | 73 ++++++++++++--------------------------------
 1 file changed, 20 insertions(+), 53 deletions(-)

diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 6b8ba06757..a221982c08 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -36,14 +36,6 @@
 import platform
 from multiprocessing import Pool
 
-# for RPI double reset
-if platform.machine() == 'aarch64':
-    try:
-        import gpiozero
-    except ImportError:
-        pass
-
-
 ENUM_TIMEOUT = 30
 
 
@@ -154,6 +146,12 @@ def flash_openocd(board, firmware):
     return ret
 
 
+def flash_wlink_rs(board, firmware):
+    # wlink use index for probe selection and lacking usb serial support
+    ret = run_cmd(f'wlink flash {firmware}.elf')
+    return ret
+
+
 def flash_esptool(board, firmware):
     port = get_serial_dev(board["flasher_sn"], None, None, 0)
     dir = os.path.dirname(f'{firmware}.bin')
@@ -167,38 +165,6 @@ def flash_esptool(board, firmware):
     return ret
 
 
-def doublereset_with_rpi_gpio(pin):
-    # Off = 0 = Reset
-    nrst = gpiozero.LED(pin)
-
-    nrst.off()
-    time.sleep(0.1)
-    nrst.on()
-    time.sleep(0.1)
-    nrst.off()
-    time.sleep(0.1)
-    nrst.on()
-
-
-def flash_bossac(board, firmware):
-    # double reset to enter bootloader
-    if platform.machine() == 'aarch64':
-        doublereset_with_rpi_gpio(board["flasher_reset_pin"])
-
-    port = get_serial_dev(board["uid"], board["flashser_vendor"], board["flasher_product"], 0)
-    timeout = ENUM_TIMEOUT
-    while timeout:
-        if os.path.exists(port):
-            break
-        else:
-            time.sleep(0.5)
-            timeout = timeout - 0.5
-    assert timeout, 'bossac bootloader is not available'
-    # sleep a bit more for bootloader to be ready
-    time.sleep(0.5)
-    ret = run_cmd(f'bossac --port {port} {board["flasher_args"]} -U -i -R -e -w {firmware}.bin')
-    return ret
-
 # -------------------------------------------------------------
 # Tests
 # -------------------------------------------------------------
@@ -266,29 +232,30 @@ def test_dfu(id):
 
     assert timeout, 'Device not available'
 
+    f_dfu0 = f'dfu0_{id}'
+    f_dfu1 = f'dfu1_{id}'
+
     # Test upload
     try:
-        os.remove('dfu0')
-        os.remove('dfu1')
+        os.remove(f_dfu0)
+        os.remove(f_dfu1)
     except OSError:
         pass
 
-    ret = subprocess.run(f'dfu-util -S {id} -a 0 -U dfu0',
-                         shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+    ret = run_cmd(f'dfu-util -S {id} -a 0 -U {f_dfu0}')
     assert ret.returncode == 0, 'Upload failed'
 
-    ret = subprocess.run(f'dfu-util -S {id} -a 1 -U dfu1',
-                         shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+    ret = run_cmd(f'dfu-util -S {id} -a 1 -U {f_dfu1}')
     assert ret.returncode == 0, 'Upload failed'
 
-    with open('dfu0') as f:
+    with open(f_dfu0) as f:
         assert 'Hello world from TinyUSB DFU! - Partition 0' in f.read(), 'Wrong uploaded data'
 
-    with open('dfu1') as f:
+    with open(f_dfu1) as f:
         assert 'Hello world from TinyUSB DFU! - Partition 1' in f.read(), 'Wrong uploaded data'
 
-    os.remove('dfu0')
-    os.remove('dfu1')
+    os.remove(f_dfu0)
+    os.remove(f_dfu1)
 
 
 def test_dfu_runtime(id):
@@ -333,9 +300,9 @@ def test_hid_composite_freertos(id):
 all_tests = [
     'cdc_dual_ports',
     'cdc_msc',
-    #'cdc_msc_freertos',
+    'cdc_msc_freertos',
     'dfu',
-    #'dfu_runtime',
+    'dfu_runtime',
     'hid_boot_interface',
     'board_test'
 ]
@@ -362,7 +329,7 @@ def test_board(item):
         if not os.path.exists(fw_dir):
             fw_dir = f'examples/cmake-build-{name}/device/{test}'
         fw_name = f'{fw_dir}/{test}'
-        print(f'{name:20} {test:20} ... ', end='')
+        print(f'{name:30} {test:20} ... ', end='')
 
         if not os.path.exists(fw_dir):
             print('Skip')

From d680424f62b0d677158af7219b319a24f5497d1c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 6 Aug 2024 22:18:25 +0700
Subject: [PATCH 125/204] improve dcd_int_handler() - skip DIR and use CTR
 TX/RX to handle complete transfer - clear CTR first, except for setup which
 we need to get data first - separate handle_ctr_setup()

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 238 +++++++++---------
 src/portable/st/stm32_fsdev/fsdev_type.h      |  26 +-
 2 files changed, 132 insertions(+), 132 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 43636198ab..97529997db 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -4,7 +4,6 @@
  * Copyright (c) 2019 Nathan Conrad
  *
  * Portions:
- * Copyright (c) 2016 STMicroelectronics
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
  * Copyright (c) 2022 Simon Küppers (skuep)
  * Copyright (c) 2022 HiFiPhile
@@ -215,10 +214,11 @@ void dcd_init(uint8_t rhport) {
   // Reset endpoints to disabled
   for (uint32_t i = 0; i < FSDEV_EP_COUNT; i++) {
     // This doesn't clear all bits since some bits are "toggle", but does set the type to DISABLED.
-    ep_write(i, 0u);
+    ep_write(i, 0u, false);
   }
 
   FSDEV_REG->CNTR |= USB_CNTR_RESETM | USB_CNTR_ESOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM;
+      //| USB_CNTR_ERRM | USB_CNTR_PMAOVRM;
   handle_bus_reset(rhport);
 
   // Enable pull-up if supported
@@ -274,13 +274,10 @@ static void handle_bus_reset(uint8_t rhport) {
 
 // Handle CTR interrupt for the TX/IN direction
 static void handle_ctr_tx(uint32_t ep_id) {
-  uint32_t ep_reg = ep_read(ep_id) & USB_EPREG_MASK;
-
-  // Verify the CTR bit is set. This was in the ST Micro code, but I'm not sure it's actually necessary?
-  TU_VERIFY(ep_reg & USB_EP_CTR_TX, );
+  uint32_t ep_reg = ep_read(ep_id) | USB_EP_CTR_TX | USB_EP_CTR_RX;
+  ep_reg &= USB_EPREG_MASK;
 
   uint8_t const ep_num = ep_reg & USB_EPADDR_FIELD;
-  uint8_t ep_addr = (ep_reg & USB_EPADDR_FIELD) | TUSB_DIR_IN_MASK;
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, TUSB_DIR_IN);
 
   if (ep_is_iso(ep_reg)) {
@@ -296,108 +293,72 @@ static void handle_ctr_tx(uint32_t ep_id) {
   }
 
   if (xfer->total_len != xfer->queued_len) {
-    dcd_transmit_packet(xfer, ep_id); // also clear CTR bit
+    dcd_transmit_packet(xfer, ep_id);
   } else {
-    dcd_event_xfer_complete(0, ep_addr, xfer->total_len, XFER_RESULT_SUCCESS, true);
+    dcd_event_xfer_complete(0, ep_num | TUSB_DIR_IN_MASK, xfer->queued_len, XFER_RESULT_SUCCESS, true);
+  }
+}
 
-    // Clear CTR TX and reserved CTR RX
-    ep_reg = (ep_reg & ~USB_EP_CTR_TX) | USB_EP_CTR_RX;
+static void handle_ctr_setup(uint32_t ep_id) {
+  uint16_t rx_count = btable_get_count(ep_id, BTABLE_BUF_RX);
+  uint16_t rx_addr = btable_get_addr(ep_id, BTABLE_BUF_RX);
+  uint8_t setup_packet[8] TU_ATTR_ALIGNED(4);
 
-    ep_write(ep_id, ep_reg);
+  dcd_read_packet_memory(setup_packet, rx_addr, rx_count);
+
+  // Clear CTR RX if another setup packet arrived before this, it will be discarded
+  ep_write_clear_ctr(ep_id, TUSB_DIR_OUT);
+
+  // Setup packet should always be 8 bytes. If not, we probably missed the packet
+  if (rx_count == 8) {
+    dcd_event_setup_received(0, (uint8_t*) setup_packet, true);
+    // Hardware should reset EP0 RX/TX to NAK and both toggle to 1
+  } else {
+    // Missed setup packet !!!
+    TU_BREAKPOINT();
+    edpt0_prepare_setup();
   }
 }
 
 // Handle CTR interrupt for the RX/OUT direction
 static void handle_ctr_rx(uint32_t ep_id) {
-#ifdef FSDEV_BUS_32BIT
-  /* https://www.st.com/resource/en/errata_sheet/es0561-stm32h503cbebkbrb-device-errata-stmicroelectronics.pdf
-   * From STM32H503 errata 2.15.1: Buffer description table update completes after CTR interrupt triggers
-   * Description:
-   * - During OUT transfers, the correct transfer interrupt (CTR) is triggered a little before the last USB SRAM accesses
-   * have completed. If the software responds quickly to the interrupt, the full buffer contents may not be correct.
-   * Workaround:
-   * - Software should ensure that a small delay is included before accessing the SRAM contents. This delay
-   * should be 800 ns in Full Speed mode and 6.4 μs in Low Speed mode
-   * - Since H5 can run up to 250Mhz -> 1 cycle = 4ns. Per errata, we need to wait 200 cycles. Though executing code
-   * also takes time, so we'll wait 60 cycles (count = 20).
-   * - Since Low Speed mode is not supported/popular, we will ignore it for now.
-   *
-   * Note: this errata also seems to apply to G0, U5, H5 etc.
-   */
-  volatile uint32_t cycle_count = 20; // defined as PCD_RX_PMA_CNT in stm32 hal_driver
-  while (cycle_count > 0U) {
-    cycle_count--; // each count take 3 cycles (1 for sub, jump, and compare)
-  }
-#endif
-
-  uint32_t ep_reg = ep_read(ep_id);
-
-  // Verify the CTR bit is set. This was in the ST Micro code, but I'm not sure it's actually necessary?
-  TU_VERIFY(ep_reg & USB_EP_CTR_RX, );
-  ep_reg = (ep_reg & ~USB_EP_CTR_RX) | USB_EP_CTR_TX; // Clear CTR RX and reserved CTR TX
+  uint32_t ep_reg = ep_read(ep_id) | USB_EP_CTR_TX | USB_EP_CTR_RX;
+  ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(TUSB_DIR_OUT); // will change RX Status, reserved other toggle bits
 
   uint8_t const ep_num = ep_reg & USB_EPADDR_FIELD;
+  bool const is_iso = ep_is_iso(ep_reg);
+  xfer_ctl_t* xfer = xfer_ctl_ptr(ep_num, TUSB_DIR_OUT);
 
-  if (ep_reg & USB_EP_SETUP) {
-    uint32_t count = btable_get_count(ep_id, BTABLE_BUF_RX);
-    // Setup packet should always be 8 bytes. If not, ignore it, and try again.
-    if (count == 8) {
-      uint16_t rx_addr = btable_get_addr(ep_id, BTABLE_BUF_RX);
-      uint8_t setup_packet[8] TU_ATTR_ALIGNED(4);
-
-      dcd_read_packet_memory(setup_packet, rx_addr, 8);
-      dcd_event_setup_received(0, (uint8_t*) setup_packet, true);
-
-      // Reset EP to NAK and set both toggle to 1
-      ep_add_status(&ep_reg, TUSB_DIR_IN, EP_STAT_NAK);
-      ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
-      ep_add_dtog(&ep_reg, TUSB_DIR_IN, 1);
-      ep_add_dtog(&ep_reg, TUSB_DIR_OUT, 1);
-    } else {
-      // Missed an setup packet !!!
-      TU_BREAKPOINT();
-      ep_reg &= USB_EPREG_MASK; // reversed all toggle
-      edpt0_prepare_setup();
-    }
+  uint8_t buf_id;
+  if (is_iso) {
+    buf_id = (ep_reg & USB_EP_DTOG_RX) ? 0 : 1; // ISO are double buffered
   } else {
-    ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(TUSB_DIR_OUT); // reversed all toggle except RX Status
-
-    bool const is_iso = ep_is_iso(ep_reg);
-    xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, TUSB_DIR_OUT);
+    buf_id = BTABLE_BUF_RX;
+  }
+  uint16_t const rx_count = btable_get_count(ep_id, buf_id);
+  uint16_t pma_addr = (uint16_t) btable_get_addr(ep_id, buf_id);
 
-    uint8_t buf_id;
-    if (is_iso) {
-      buf_id = (ep_reg & USB_EP_DTOG_RX) ? 0 : 1; // ISO are double buffered
+  if (rx_count != 0) {
+    if (xfer->ff) {
+      dcd_read_packet_memory_ff(xfer->ff, pma_addr, rx_count);
     } else {
-      buf_id = BTABLE_BUF_RX;
-    }
-    uint32_t rx_count = btable_get_count(ep_id, buf_id);
-    uint16_t pma_addr = (uint16_t) btable_get_addr(ep_id, buf_id);
-
-    if (rx_count != 0) {
-      if (xfer->ff) {
-        dcd_read_packet_memory_ff(xfer->ff, pma_addr, rx_count);
-      } else {
-        dcd_read_packet_memory(xfer->buffer + xfer->queued_len, pma_addr, rx_count);
-      }
-      xfer->queued_len = (uint16_t)(xfer->queued_len + rx_count);
+      dcd_read_packet_memory(xfer->buffer + xfer->queued_len, pma_addr, rx_count);
     }
+    xfer->queued_len += rx_count;
+  }
 
-    if ((rx_count < xfer->max_packet_size) || (xfer->queued_len == xfer->total_len)) {
-      // all bytes received or short packet
-      ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
-      dcd_event_xfer_complete(0, ep_num, xfer->queued_len, XFER_RESULT_SUCCESS, true);
-    } else {
-      // Set endpoint active again for receiving more data. Note that isochronous endpoints stay active always
-      if (!is_iso) {
-        uint16_t const cnt = tu_min16(xfer->total_len - xfer->queued_len, xfer->max_packet_size);
-        btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, cnt);
-      }
-      ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_VALID);
+  if ((rx_count < xfer->max_packet_size) || (xfer->queued_len == xfer->total_len)) {
+    // all bytes received or short packet
+    dcd_event_xfer_complete(0, ep_num, xfer->queued_len, XFER_RESULT_SUCCESS, true);
+  } else {
+    // Set endpoint active again for receiving more data. Note that isochronous endpoints stay active always
+    if (!is_iso) {
+      uint16_t const cnt = tu_min16(xfer->total_len - xfer->queued_len, xfer->max_packet_size);
+      btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, cnt);
     }
+    ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_VALID);
+    ep_write(ep_id, ep_reg, false);
   }
-
-  ep_write(ep_id, ep_reg);
 }
 
 void dcd_int_handler(uint8_t rhport) {
@@ -406,10 +367,6 @@ void dcd_int_handler(uint8_t rhport) {
   //     | USB_ISTR_SUSP | USB_ISTR_SOF | USB_ISTR_ESOF;
   //  unused IRQs: (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_L1REQ )
 
-  // The ST driver loops here on the CTR bit, but that loop has been moved into the
-  // dcd_ep_ctr_handler(), so less need to loop here. The other interrupts shouldn't
-  // be triggered repeatedly.
-
   /* Put SOF flag at the beginning of ISR in case to get least amount of jitter if it is used for timing purposes */
   if (int_status & USB_ISTR_SOF) {
     FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_SOF;
@@ -455,17 +412,51 @@ void dcd_int_handler(uint8_t rhport) {
     FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_ESOF;
   }
 
+//  if (int_status & (USB_ISTR_ERR | USB_ISTR_PMAOVR)) {
+//    TU_BREAKPOINT();
+//  }
+
   // loop to handle all pending CTR interrupts
-  while (int_status & USB_ISTR_CTR) {
-    uint32_t const ep_id = int_status & USB_ISTR_EP_ID;
+  while (FSDEV_REG->ISTR & USB_ISTR_CTR) {
+    // skip DIR bit, and use CTR TX/RX instead, since there is chance we have both TX/RX completed in one interrupt
+    uint32_t const ep_id = FSDEV_REG->ISTR & USB_ISTR_EP_ID;
+    uint32_t const ep_reg = ep_read(ep_id);
+
+    if (ep_reg & USB_EP_CTR_RX) {
+      #ifdef FSDEV_BUS_32BIT
+      /* https://www.st.com/resource/en/errata_sheet/es0561-stm32h503cbebkbrb-device-errata-stmicroelectronics.pdf
+       * https://www.st.com/resource/en/errata_sheet/es0587-stm32u535xx-and-stm32u545xx-device-errata-stmicroelectronics.pdf
+       * From H503/U535 errata: Buffer description table update completes after CTR interrupt triggers
+       * Description:
+       * - During OUT transfers, the correct transfer interrupt (CTR) is triggered a little before the last USB SRAM accesses
+       * have completed. If the software responds quickly to the interrupt, the full buffer contents may not be correct.
+       * Workaround:
+       * - Software should ensure that a small delay is included before accessing the SRAM contents. This delay
+       * should be 800 ns in Full Speed mode and 6.4 μs in Low Speed mode
+       * - Since H5 can run up to 250Mhz -> 1 cycle = 4ns. Per errata, we need to wait 200 cycles. Though executing code
+       * also takes time, so we'll wait 60 cycles (count = 20).
+       * - Since Low Speed mode is not supported/popular, we will ignore it for now.
+       *
+       * Note: this errata may also apply to G0, U5, H5 etc.
+       */
+      volatile uint32_t cycle_count = 20; // defined as PCD_RX_PMA_CNT in stm32 hal_driver
+      while (cycle_count > 0U) {
+        cycle_count--; // each count take 3 cycles (1 for sub, jump, and compare)
+      }
+      #endif
 
-    if ((int_status & USB_ISTR_DIR) == 0U) {
-      handle_ctr_tx(ep_id); // TX/IN
-    } else {
-      handle_ctr_rx(ep_id); // RX/OUT or both (RX/TX !!)
+      if (ep_reg & USB_EP_SETUP) {
+        handle_ctr_setup(ep_id);
+      } else {
+        ep_write_clear_ctr(ep_id, TUSB_DIR_OUT);
+        handle_ctr_rx(ep_id);
+      }
     }
 
-    int_status = FSDEV_REG->ISTR;
+    if (ep_reg & USB_EP_CTR_TX) {
+      ep_write_clear_ctr(ep_id, TUSB_DIR_IN);
+      handle_ctr_tx(ep_id);
+    }
   }
 }
 
@@ -577,7 +568,7 @@ void edpt0_open(uint8_t rhport) {
   // no need to explicitly set DTOG bits since we aren't masked DTOG bit
 
   edpt0_prepare_setup(); // prepare for setup packet
-  ep_write(0, ep_reg);
+  ep_write(0, ep_reg, false);
 }
 
 bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
@@ -590,7 +581,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   TU_ASSERT(ep_idx < FSDEV_EP_COUNT);
 
   uint32_t ep_reg = ep_read(ep_idx) & ~USB_EPREG_MASK;
-  ep_reg |= tu_edpt_number(ep_addr) | USB_EP_CTR_RX | USB_EP_CTR_TX;
+  ep_reg |= tu_edpt_number(ep_addr) | USB_EP_CTR_TX | USB_EP_CTR_RX;
 
   // Set type
   switch (desc_ep->bmAttributes.xfer) {
@@ -624,18 +615,17 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
     ep_reg &= ~(USB_EPTX_STAT | USB_EP_DTOG_TX);
   }
 
-  ep_write(ep_idx, ep_reg);
+  ep_write(ep_idx, ep_reg, true);
 
   return true;
 }
 
-void dcd_edpt_close_all(uint8_t rhport)
-{
-  (void)rhport;
+void dcd_edpt_close_all(uint8_t rhport) {
+  dcd_int_disable(rhport);
 
   for (uint32_t i = 1; i < FSDEV_EP_COUNT; i++) {
     // Reset endpoint
-    ep_write(i, 0);
+    ep_write(i, 0, false);
     // Clear EP allocation status
     ep_alloc_status[i].ep_num = 0xFF;
     ep_alloc_status[i].ep_type = 0xFF;
@@ -643,6 +633,8 @@ void dcd_edpt_close_all(uint8_t rhport)
     ep_alloc_status[i].allocated[1] = false;
   }
 
+  dcd_int_enable(rhport);
+
   // Reset PMA allocation
   ep_buf_ptr = FSDEV_BTABLE_BASE + 8 * CFG_TUD_ENDPPOINT_MAX + 2 * CFG_TUD_ENDPOINT0_SIZE;
 }
@@ -684,13 +676,13 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
   xfer->max_packet_size = tu_edpt_packet_size(desc_ep);
 
   uint32_t ep_reg = ep_read(ep_idx) & ~USB_EPREG_MASK;
-  ep_reg |= tu_edpt_number(ep_addr) | USB_EP_ISOCHRONOUS | USB_EP_CTR_RX | USB_EP_CTR_TX;
+  ep_reg |= tu_edpt_number(ep_addr) | USB_EP_ISOCHRONOUS | USB_EP_CTR_TX | USB_EP_CTR_RX;
   ep_add_status(&ep_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
   ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
   ep_add_dtog(&ep_reg, dir, 0);
   ep_add_dtog(&ep_reg, 1-dir, 1);
 
-  ep_write(ep_idx, ep_reg);
+  ep_write(ep_idx, ep_reg, true);
 
   return true;
 }
@@ -698,7 +690,9 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
 // Currently, single-buffered, and only 64 bytes at a time (max)
 static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   uint16_t len = tu_min16(xfer->total_len - xfer->queued_len, xfer->max_packet_size);
-  uint32_t ep_reg = ep_read(ep_ix) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR bits
+  uint32_t ep_reg = ep_read(ep_ix) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR RX
+  ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(TUSB_DIR_IN); // only change TX Status, reserve other toggle bits
+
   bool const is_iso = ep_is_iso(ep_reg);
 
   uint8_t buf_id;
@@ -715,21 +709,16 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
     } else {
       dcd_write_packet_memory(addr_ptr, &(xfer->buffer[xfer->queued_len]), len);
     }
-    xfer->queued_len = (uint16_t) (xfer->queued_len + len);
+    xfer->queued_len += len;
   }
 
   btable_set_count(ep_ix, buf_id, len);
-
-  ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(TUSB_DIR_IN);
   ep_add_status(&ep_reg, TUSB_DIR_IN, EP_STAT_VALID);
-  ep_clear_ctr(&ep_reg, TUSB_DIR_IN);
 
-  dcd_int_disable(0);
-  ep_write(ep_ix, ep_reg);
   if (is_iso) {
     xfer->iso_in_sending = true;
   }
-  dcd_int_enable(0);
+  ep_write(ep_ix, ep_reg, true);
 }
 
 static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir) {
@@ -741,8 +730,8 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir) {
   if (dir == TUSB_DIR_IN) {
     dcd_transmit_packet(xfer, ep_idx);
   } else {
-    uint32_t cnt = (uint32_t) tu_min16(xfer->total_len, xfer->max_packet_size);
-    uint32_t ep_reg = ep_read(ep_idx) | USB_EP_CTR_TX; // keep CTR TX, clear CTR RX
+    uint16_t cnt = tu_min16(xfer->total_len, xfer->max_packet_size);
+    uint32_t ep_reg = ep_read(ep_idx) | USB_EP_CTR_TX | USB_EP_CTR_RX; // keep CTR TX
     ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir);
     ep_add_status(&ep_reg, dir, EP_STAT_VALID);
 
@@ -753,7 +742,7 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir) {
       btable_set_rx_bufsize(ep_idx, BTABLE_BUF_RX, cnt);
     }
 
-    ep_write(ep_idx, ep_reg);
+    ep_write(ep_idx, ep_reg, true);
   }
 
   return true;
@@ -796,7 +785,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
   ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir);
   ep_add_status(&ep_reg, dir, EP_STAT_STALL);
 
-  ep_write(ep_idx, ep_reg);
+  ep_write(ep_idx, ep_reg, true);
 }
 
 void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
@@ -814,8 +803,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
     ep_add_status(&ep_reg, dir, EP_STAT_NAK);
   }
   ep_add_dtog(&ep_reg, dir, 0); // Reset to DATA0
-
-  ep_write(ep_idx, ep_reg);
+  ep_write(ep_idx, ep_reg, true);
 }
 
 // Write to packet memory area (PMA) from user memory
diff --git a/src/portable/st/stm32_fsdev/fsdev_type.h b/src/portable/st/stm32_fsdev/fsdev_type.h
index 8432df4b04..f29abd7039 100644
--- a/src/portable/st/stm32_fsdev/fsdev_type.h
+++ b/src/portable/st/stm32_fsdev/fsdev_type.h
@@ -172,8 +172,24 @@ typedef enum {
 // - DTOG and STAT are write 1 to toggle
 //--------------------------------------------------------------------+
 
-TU_ATTR_ALWAYS_INLINE static inline void ep_write(uint32_t ep_id, uint32_t value) {
+TU_ATTR_ALWAYS_INLINE static inline void ep_write(uint32_t ep_id, uint32_t value, bool need_exclusive) {
+  if (need_exclusive) {
+    dcd_int_disable(0);
+  }
+
   FSDEV_REG->ep[ep_id].reg = (fsdev_bus_t) value;
+
+  if (need_exclusive) {
+    dcd_int_enable(0);
+  }
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ep_write_clear_ctr(uint32_t ep_id, tusb_dir_t dir) {
+  uint32_t reg = FSDEV_REG->ep[ep_id].reg;
+  reg |= USB_EP_CTR_TX | USB_EP_CTR_RX;
+  reg &= USB_EPREG_MASK;
+  reg &= ~(1 << (USB_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
+  ep_write(ep_id, reg, false);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_read(uint32_t ep_id) {
@@ -188,10 +204,6 @@ TU_ATTR_ALWAYS_INLINE static inline void ep_add_dtog(uint32_t* reg, tusb_dir_t d
   *reg ^= (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void ep_clear_ctr(uint32_t* reg, tusb_dir_t dir) {
-  *reg &= ~(1 << (USB_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
-}
-
 TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(uint32_t reg) {
   return (reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS;
 }
@@ -218,7 +230,7 @@ TU_ATTR_ALWAYS_INLINE static inline void btable_set_addr(uint32_t ep_id, uint8_t
 #endif
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_count(uint32_t ep_id, uint8_t buf_id) {
+TU_ATTR_ALWAYS_INLINE static inline uint16_t btable_get_count(uint32_t ep_id, uint8_t buf_id) {
   uint16_t count;
 #ifdef FSDEV_BUS_32BIT
   count = (FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr >> 16);
@@ -258,7 +270,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t pma_align_buffer_size(uint16_t size
   return (*num_block) * block_in_bytes;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint32_t wCount) {
+TU_ATTR_ALWAYS_INLINE static inline void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint16_t wCount) {
   uint8_t blsize, num_block;
   (void) pma_align_buffer_size(wCount, &blsize, &num_block);
 

From 0860cd3b5e95a7366bc2c68eb7648e8479059172 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 6 Aug 2024 22:20:24 +0700
Subject: [PATCH 126/204] minor rename

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 28 +++++++++----------
 src/portable/st/stm32_fsdev/fsdev_type.h      |  4 +--
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 97529997db..2075babe37 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -356,7 +356,7 @@ static void handle_ctr_rx(uint32_t ep_id) {
       uint16_t const cnt = tu_min16(xfer->total_len - xfer->queued_len, xfer->max_packet_size);
       btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, cnt);
     }
-    ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_VALID);
+    ep_change_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_VALID);
     ep_write(ep_id, ep_reg, false);
   }
 }
@@ -563,8 +563,8 @@ void edpt0_open(uint8_t rhport) {
 
   uint32_t ep_reg = ep_read(0) & ~USB_EPREG_MASK; // only get toggle bits
   ep_reg |= USB_EP_CONTROL;
-  ep_add_status(&ep_reg, TUSB_DIR_IN, EP_STAT_NAK);
-  ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
+  ep_change_status(&ep_reg, TUSB_DIR_IN, EP_STAT_NAK);
+  ep_change_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_NAK);
   // no need to explicitly set DTOG bits since we aren't masked DTOG bit
 
   edpt0_prepare_setup(); // prepare for setup packet
@@ -605,8 +605,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   xfer->max_packet_size = packet_size;
   xfer->ep_idx = ep_idx;
 
-  ep_add_status(&ep_reg, dir, EP_STAT_NAK);
-  ep_add_dtog(&ep_reg, dir, 0);
+  ep_change_status(&ep_reg, dir, EP_STAT_NAK);
+  ep_change_dtog(&ep_reg, dir, 0);
 
   // reserve other direction toggle bits
   if (dir == TUSB_DIR_IN) {
@@ -677,10 +677,10 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
 
   uint32_t ep_reg = ep_read(ep_idx) & ~USB_EPREG_MASK;
   ep_reg |= tu_edpt_number(ep_addr) | USB_EP_ISOCHRONOUS | USB_EP_CTR_TX | USB_EP_CTR_RX;
-  ep_add_status(&ep_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
-  ep_add_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
-  ep_add_dtog(&ep_reg, dir, 0);
-  ep_add_dtog(&ep_reg, 1-dir, 1);
+  ep_change_status(&ep_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
+  ep_change_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
+  ep_change_dtog(&ep_reg, dir, 0);
+  ep_change_dtog(&ep_reg, 1 - dir, 1);
 
   ep_write(ep_idx, ep_reg, true);
 
@@ -713,7 +713,7 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   }
 
   btable_set_count(ep_ix, buf_id, len);
-  ep_add_status(&ep_reg, TUSB_DIR_IN, EP_STAT_VALID);
+  ep_change_status(&ep_reg, TUSB_DIR_IN, EP_STAT_VALID);
 
   if (is_iso) {
     xfer->iso_in_sending = true;
@@ -733,7 +733,7 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir) {
     uint16_t cnt = tu_min16(xfer->total_len, xfer->max_packet_size);
     uint32_t ep_reg = ep_read(ep_idx) | USB_EP_CTR_TX | USB_EP_CTR_RX; // keep CTR TX
     ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir);
-    ep_add_status(&ep_reg, dir, EP_STAT_VALID);
+    ep_change_status(&ep_reg, dir, EP_STAT_VALID);
 
     if (ep_is_iso(ep_reg)) {
       btable_set_rx_bufsize(ep_idx, 0, cnt);
@@ -783,7 +783,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
 
   uint32_t ep_reg = ep_read(ep_idx) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR bits
   ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir);
-  ep_add_status(&ep_reg, dir, EP_STAT_STALL);
+  ep_change_status(&ep_reg, dir, EP_STAT_STALL);
 
   ep_write(ep_idx, ep_reg, true);
 }
@@ -800,9 +800,9 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
   ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir) | EP_DTOG_MASK(dir);
 
   if (!ep_is_iso(ep_reg)) {
-    ep_add_status(&ep_reg, dir, EP_STAT_NAK);
+    ep_change_status(&ep_reg, dir, EP_STAT_NAK);
   }
-  ep_add_dtog(&ep_reg, dir, 0); // Reset to DATA0
+  ep_change_dtog(&ep_reg, dir, 0); // Reset to DATA0
   ep_write(ep_idx, ep_reg, true);
 }
 
diff --git a/src/portable/st/stm32_fsdev/fsdev_type.h b/src/portable/st/stm32_fsdev/fsdev_type.h
index f29abd7039..d5028c7024 100644
--- a/src/portable/st/stm32_fsdev/fsdev_type.h
+++ b/src/portable/st/stm32_fsdev/fsdev_type.h
@@ -196,11 +196,11 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_read(uint32_t ep_id) {
   return FSDEV_REG->ep[ep_id].reg;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void ep_add_status(uint32_t* reg, tusb_dir_t dir, ep_stat_t state) {
+TU_ATTR_ALWAYS_INLINE static inline void ep_change_status(uint32_t* reg, tusb_dir_t dir, ep_stat_t state) {
   *reg ^= (state << (USB_EPTX_STAT_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void ep_add_dtog(uint32_t* reg, tusb_dir_t dir, uint8_t state) {
+TU_ATTR_ALWAYS_INLINE static inline void ep_change_dtog(uint32_t* reg, tusb_dir_t dir, uint8_t state) {
   *reg ^= (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
 }
 

From 3a2216306769f0af0ceb3dde7528dfb182fec8f5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 7 Aug 2024 15:16:22 +0700
Subject: [PATCH 127/204] fix v203 race condition between rx bufsize and
 RX_STAT which cause PMAOVR fix set_rx_bufsize with invalid value for zero
 length packet

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 28 +++++++++++--------
 src/portable/st/stm32_fsdev/fsdev_type.h      | 17 +++++++----
 2 files changed, 28 insertions(+), 17 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 2075babe37..cd74104880 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -217,8 +217,8 @@ void dcd_init(uint8_t rhport) {
     ep_write(i, 0u, false);
   }
 
-  FSDEV_REG->CNTR |= USB_CNTR_RESETM | USB_CNTR_ESOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM;
-      //| USB_CNTR_ERRM | USB_CNTR_PMAOVRM;
+  FSDEV_REG->CNTR |= USB_CNTR_RESETM | USB_CNTR_ESOFM | USB_CNTR_CTRM |
+      USB_CNTR_SUSPM | USB_CNTR_WKUPM | USB_CNTR_PMAOVRM;
   handle_bus_reset(rhport);
 
   // Enable pull-up if supported
@@ -349,6 +349,10 @@ static void handle_ctr_rx(uint32_t ep_id) {
 
   if ((rx_count < xfer->max_packet_size) || (xfer->queued_len == xfer->total_len)) {
     // all bytes received or short packet
+
+    // reset rx bufsize to mps to prevent race condition to cause PMAOVR (occurs with ch32v203 with msc write10)
+    btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, xfer->max_packet_size);
+
     dcd_event_xfer_complete(0, ep_num, xfer->queued_len, XFER_RESULT_SUCCESS, true);
   } else {
     // Set endpoint active again for receiving more data. Note that isochronous endpoints stay active always
@@ -412,9 +416,10 @@ void dcd_int_handler(uint8_t rhport) {
     FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_ESOF;
   }
 
-//  if (int_status & (USB_ISTR_ERR | USB_ISTR_PMAOVR)) {
-//    TU_BREAKPOINT();
-//  }
+  if (int_status & USB_ISTR_PMAOVR) {
+    TU_BREAKPOINT();
+    FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_PMAOVR;
+  }
 
   // loop to handle all pending CTR interrupts
   while (FSDEV_REG->ISTR & USB_ISTR_CTR) {
@@ -446,7 +451,7 @@ void dcd_int_handler(uint8_t rhport) {
       #endif
 
       if (ep_reg & USB_EP_SETUP) {
-        handle_ctr_setup(ep_id);
+        handle_ctr_setup(ep_id); // CTR will be clear after copied setup packet
       } else {
         ep_write_clear_ctr(ep_id, TUSB_DIR_OUT);
         handle_ctr_rx(ep_id);
@@ -690,7 +695,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
 // Currently, single-buffered, and only 64 bytes at a time (max)
 static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   uint16_t len = tu_min16(xfer->total_len - xfer->queued_len, xfer->max_packet_size);
-  uint32_t ep_reg = ep_read(ep_ix) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR RX
+  uint32_t ep_reg = ep_read(ep_ix) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR
   ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(TUSB_DIR_IN); // only change TX Status, reserve other toggle bits
 
   bool const is_iso = ep_is_iso(ep_reg);
@@ -730,10 +735,10 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir) {
   if (dir == TUSB_DIR_IN) {
     dcd_transmit_packet(xfer, ep_idx);
   } else {
-    uint16_t cnt = tu_min16(xfer->total_len, xfer->max_packet_size);
-    uint32_t ep_reg = ep_read(ep_idx) | USB_EP_CTR_TX | USB_EP_CTR_RX; // keep CTR TX
+    uint32_t ep_reg = ep_read(ep_idx) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR
     ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir);
-    ep_change_status(&ep_reg, dir, EP_STAT_VALID);
+
+    uint16_t cnt = tu_min16(xfer->total_len, xfer->max_packet_size);
 
     if (ep_is_iso(ep_reg)) {
       btable_set_rx_bufsize(ep_idx, 0, cnt);
@@ -742,7 +747,8 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir) {
       btable_set_rx_bufsize(ep_idx, BTABLE_BUF_RX, cnt);
     }
 
-    ep_write(ep_idx, ep_reg, true);
+    ep_change_status(&ep_reg, dir, EP_STAT_VALID);
+    ep_write(ep_idx, ep_reg, false);
   }
 
   return true;
diff --git a/src/portable/st/stm32_fsdev/fsdev_type.h b/src/portable/st/stm32_fsdev/fsdev_type.h
index d5028c7024..6c5ccae890 100644
--- a/src/portable/st/stm32_fsdev/fsdev_type.h
+++ b/src/portable/st/stm32_fsdev/fsdev_type.h
@@ -172,6 +172,10 @@ typedef enum {
 // - DTOG and STAT are write 1 to toggle
 //--------------------------------------------------------------------+
 
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_read(uint32_t ep_id) {
+  return FSDEV_REG->ep[ep_id].reg;
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void ep_write(uint32_t ep_id, uint32_t value, bool need_exclusive) {
   if (need_exclusive) {
     dcd_int_disable(0);
@@ -192,10 +196,6 @@ TU_ATTR_ALWAYS_INLINE static inline void ep_write_clear_ctr(uint32_t ep_id, tusb
   ep_write(ep_id, reg, false);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_read(uint32_t ep_id) {
-  return FSDEV_REG->ep[ep_id].reg;
-}
-
 TU_ATTR_ALWAYS_INLINE static inline void ep_change_status(uint32_t* reg, tusb_dir_t dir, ep_stat_t state) {
   *reg ^= (state << (USB_EPTX_STAT_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
 }
@@ -260,13 +260,13 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t pma_align_buffer_size(uint16_t size
   if (size > 62) {
     block_in_bytes = 32;
     *blsize = 1;
+    *num_block = tu_div_ceil(size, 32);
   } else {
     block_in_bytes = 2;
     *blsize = 0;
+    *num_block = tu_div_ceil(size, 2);
   }
 
-  *num_block = tu_div_ceil(size, block_in_bytes);
-
   return (*num_block) * block_in_bytes;
 }
 
@@ -276,6 +276,10 @@ TU_ATTR_ALWAYS_INLINE static inline void btable_set_rx_bufsize(uint32_t ep_id, u
 
   /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
   uint16_t bl_nb = (blsize << 15) | ((num_block - blsize) << 10);
+  if (bl_nb == 0) {
+    // 0 is invalid, set up blsize to 1
+    bl_nb = 1 << 15;
+  }
 
 #ifdef FSDEV_BUS_32BIT
   uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
@@ -284,6 +288,7 @@ TU_ATTR_ALWAYS_INLINE static inline void btable_set_rx_bufsize(uint32_t ep_id, u
 #else
   FSDEV_BTABLE->ep16[ep_id][buf_id].count = bl_nb;
 #endif
+
 }
 
 #ifdef __cplusplus

From 57c26fdc72dccee1da569e90f46b4060a97d47a7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 8 Aug 2024 00:27:51 +0700
Subject: [PATCH 128/204] use EP_KIND for STATUS OUT to fix OUT packet is auto
 accepted after SETUP without usbd consent

---
 .idea/cmake.xml                               | 15 ++++----
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 36 ++++++++++++-------
 src/portable/st/stm32_fsdev/fsdev_type.h      |  4 +--
 3 files changed, 33 insertions(+), 22 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 67e7930165..bf5696725a 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -89,19 +89,20 @@
       <configuration PROFILE_NAME="frdm_kl25z" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_kl25z -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="frdm_k32l2a4s" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_k32l2a4s" />
       <configuration PROFILE_NAME="frdm_k64f" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_k64f -DLOG=2 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="stm32f072disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f072disco" />
-      <configuration PROFILE_NAME="stm32f103_mini_2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f103_mini_2" />
+      <configuration PROFILE_NAME="stm32f072disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f072disco -DLOG=0 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="stm32f103_mini_2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f103_mini_2 -DLOG=1 -DLOGGGER=RTT" />
+      <configuration PROFILE_NAME="stm32f103ze_iar" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f103ze_iar -DLOG=1 -DLOGGGER=RTT" />
       <configuration PROFILE_NAME="stm32f207nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f207nucleo -DLOG=2 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="stm32f303disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f303disco -DLOG=2 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="stm32f303disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f303disco -DLOG=0 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32f411disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f411disco -DLOG=2 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32f769disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f769disco -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32g0b1nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32g0b1nucleo" />
       <configuration PROFILE_NAME="stm32g474nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32g474nucleo" />
       <configuration PROFILE_NAME="b_g474e_dpow1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=b_g474e_dpow1 -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="stm32h563nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h563nucleo -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="stm32h563nucleo" ENABLED="false" GENERATION_OPTIONS="-DBOARD=stm32h563nucleo -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="stm32h743eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="stm32h743nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743nucleo -DLOG=3" />
-      <configuration PROFILE_NAME="stm32l0538disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l0538disco" />
+      <configuration PROFILE_NAME="stm32l0538disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l0538disco -DLOG=0 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32l476disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l476disco" />
       <configuration PROFILE_NAME="stm32u575nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32u575nucleo -DLOG=2 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32u5a5nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32u5a5nucleo -DLOG=3 -DLOGGER=RTT" />
@@ -133,8 +134,8 @@
       <configuration PROFILE_NAME="fomu" ENABLED="false" GENERATION_OPTIONS="-DBOARD=fomu" />
       <configuration PROFILE_NAME="sipeed_longan_nano" ENABLED="false" GENERATION_OPTIONS="-DBOARD=sipeed_longan_nano" />
       <configuration PROFILE_NAME="nanoch32v203" ENABLED="false" GENERATION_OPTIONS="-DBOARD=nanoch32v203" />
-      <configuration PROFILE_NAME="ch32v203c_r0_1v0" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=ch32v203c_r0_1v0" />
-      <configuration PROFILE_NAME="ch32v203c_r0_1v0 USBFS" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=ch32v203c_r0_1v0 -DPORT=1" />
+      <configuration PROFILE_NAME="ch32v203c_r0_1v0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ch32v203c_r0_1v0 -DLOG=0" />
+      <configuration PROFILE_NAME="ch32v203c_r0_1v0 USBFS" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ch32v203c_r0_1v0 -DPORT=1" />
       <configuration PROFILE_NAME="ch32v203g_r0_1v0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ch32v203g_r0_1v0" />
       <configuration PROFILE_NAME="ch32v307v_r1_1v0" ENABLED="false" GENERATION_OPTIONS="-DBOARD=ch32v307v_r1_1v0 -DLOG=2" />
       <configuration PROFILE_NAME="ch32v307v_r1_1v0 USBFS" ENABLED="false" GENERATION_OPTIONS="-DBOARD=ch32v307v_r1_1v0 -DSPEED=full" />
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index cd74104880..89697106d8 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -147,6 +147,7 @@ typedef struct {
 static xfer_ctl_t xfer_status[CFG_TUD_ENDPPOINT_MAX][2];
 static ep_alloc_t ep_alloc_status[FSDEV_EP_COUNT];
 static uint8_t remoteWakeCountdown; // When wake is requested
+static uint8_t _setup_dir; // for detecting status OUT
 
 //--------------------------------------------------------------------+
 // Prototypes
@@ -311,6 +312,7 @@ static void handle_ctr_setup(uint32_t ep_id) {
 
   // Setup packet should always be 8 bytes. If not, we probably missed the packet
   if (rx_count == 8) {
+    _setup_dir = (setup_packet[0] & 0x80 ? TUSB_DIR_IN : TUSB_DIR_OUT);
     dcd_event_setup_received(0, (uint8_t*) setup_packet, true);
     // Hardware should reset EP0 RX/TX to NAK and both toggle to 1
   } else {
@@ -323,8 +325,6 @@ static void handle_ctr_setup(uint32_t ep_id) {
 // Handle CTR interrupt for the RX/OUT direction
 static void handle_ctr_rx(uint32_t ep_id) {
   uint32_t ep_reg = ep_read(ep_id) | USB_EP_CTR_TX | USB_EP_CTR_RX;
-  ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(TUSB_DIR_OUT); // will change RX Status, reserved other toggle bits
-
   uint8_t const ep_num = ep_reg & USB_EPADDR_FIELD;
   bool const is_iso = ep_is_iso(ep_reg);
   xfer_ctl_t* xfer = xfer_ctl_ptr(ep_num, TUSB_DIR_OUT);
@@ -345,6 +345,13 @@ static void handle_ctr_rx(uint32_t ep_id) {
       dcd_read_packet_memory(xfer->buffer + xfer->queued_len, pma_addr, rx_count);
     }
     xfer->queued_len += rx_count;
+  } else {
+    // ZLP Status OUT
+    if (ep_num == 0 && (ep_reg & USB_EP_KIND) ) {
+      ep_reg &= USB_EPREG_MASK;
+      ep_reg &= ~USB_EP_KIND; // clear kind bit
+      ep_write(ep_id, ep_reg, false);
+    }
   }
 
   if ((rx_count < xfer->max_packet_size) || (xfer->queued_len == xfer->total_len)) {
@@ -360,6 +367,7 @@ static void handle_ctr_rx(uint32_t ep_id) {
       uint16_t const cnt = tu_min16(xfer->total_len - xfer->queued_len, xfer->max_packet_size);
       btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, cnt);
     }
+    ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(TUSB_DIR_OUT); // will change RX Status, reserved other toggle bits
     ep_change_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_VALID);
     ep_write(ep_id, ep_reg, false);
   }
@@ -367,9 +375,6 @@ static void handle_ctr_rx(uint32_t ep_id) {
 
 void dcd_int_handler(uint8_t rhport) {
   uint32_t int_status = FSDEV_REG->ISTR;
-  // const uint32_t handled_ints = USB_ISTR_CTR | USB_ISTR_RESET | USB_ISTR_WKUP
-  //     | USB_ISTR_SUSP | USB_ISTR_SOF | USB_ISTR_ESOF;
-  //  unused IRQs: (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_L1REQ )
 
   /* Put SOF flag at the beginning of ISR in case to get least amount of jitter if it is used for timing purposes */
   if (int_status & USB_ISTR_SOF) {
@@ -738,17 +743,22 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir) {
     uint32_t ep_reg = ep_read(ep_idx) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR
     ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir);
 
-    uint16_t cnt = tu_min16(xfer->total_len, xfer->max_packet_size);
-
-    if (ep_is_iso(ep_reg)) {
-      btable_set_rx_bufsize(ep_idx, 0, cnt);
-      btable_set_rx_bufsize(ep_idx, 1, cnt);
+    if ( ep_num == 0 && dir == TUSB_DIR_OUT && _setup_dir == TUSB_DIR_IN ) {
+      // use EP0 OUT status stage, otherwise OUT packet right after SETUP will be accepted without
+      // the usbd (software) consent
+      ep_reg |= USB_EP_KIND;
     } else {
-      btable_set_rx_bufsize(ep_idx, BTABLE_BUF_RX, cnt);
-    }
+      uint16_t cnt = tu_min16(xfer->total_len, xfer->max_packet_size);
 
+      if (ep_is_iso(ep_reg)) {
+        btable_set_rx_bufsize(ep_idx, 0, cnt);
+        btable_set_rx_bufsize(ep_idx, 1, cnt);
+      } else {
+        btable_set_rx_bufsize(ep_idx, BTABLE_BUF_RX, cnt);
+      }
+    }
     ep_change_status(&ep_reg, dir, EP_STAT_VALID);
-    ep_write(ep_idx, ep_reg, false);
+    ep_write(ep_idx, ep_reg, true);
   }
 
   return true;
diff --git a/src/portable/st/stm32_fsdev/fsdev_type.h b/src/portable/st/stm32_fsdev/fsdev_type.h
index 6c5ccae890..7ebc32255f 100644
--- a/src/portable/st/stm32_fsdev/fsdev_type.h
+++ b/src/portable/st/stm32_fsdev/fsdev_type.h
@@ -277,8 +277,8 @@ TU_ATTR_ALWAYS_INLINE static inline void btable_set_rx_bufsize(uint32_t ep_id, u
   /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
   uint16_t bl_nb = (blsize << 15) | ((num_block - blsize) << 10);
   if (bl_nb == 0) {
-    // 0 is invalid, set up blsize to 1
-    bl_nb = 1 << 15;
+    // zlp but 0 is invalid value, set num_block to 1 (2 bytes)
+    bl_nb = 1 << 10;
   }
 
 #ifdef FSDEV_BUS_32BIT

From bd64625df271c461c3d6008f96c630c61218f451 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 8 Aug 2024 12:40:11 +0700
Subject: [PATCH 129/204] revert the use of EP_KIND. ch32v203 seems to
 unconditionally accept ZLP on EP0 OUT, which can incorrectly use queued_len
 of previous  transfer. So reset total_len and queued_len to 0.

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 38 +++++++------------
 1 file changed, 13 insertions(+), 25 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 89697106d8..bbdfbaa097 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -147,7 +147,6 @@ typedef struct {
 static xfer_ctl_t xfer_status[CFG_TUD_ENDPPOINT_MAX][2];
 static ep_alloc_t ep_alloc_status[FSDEV_EP_COUNT];
 static uint8_t remoteWakeCountdown; // When wake is requested
-static uint8_t _setup_dir; // for detecting status OUT
 
 //--------------------------------------------------------------------+
 // Prototypes
@@ -312,7 +311,6 @@ static void handle_ctr_setup(uint32_t ep_id) {
 
   // Setup packet should always be 8 bytes. If not, we probably missed the packet
   if (rx_count == 8) {
-    _setup_dir = (setup_packet[0] & 0x80 ? TUSB_DIR_IN : TUSB_DIR_OUT);
     dcd_event_setup_received(0, (uint8_t*) setup_packet, true);
     // Hardware should reset EP0 RX/TX to NAK and both toggle to 1
   } else {
@@ -345,22 +343,17 @@ static void handle_ctr_rx(uint32_t ep_id) {
       dcd_read_packet_memory(xfer->buffer + xfer->queued_len, pma_addr, rx_count);
     }
     xfer->queued_len += rx_count;
-  } else {
-    // ZLP Status OUT
-    if (ep_num == 0 && (ep_reg & USB_EP_KIND) ) {
-      ep_reg &= USB_EPREG_MASK;
-      ep_reg &= ~USB_EP_KIND; // clear kind bit
-      ep_write(ep_id, ep_reg, false);
-    }
   }
 
-  if ((rx_count < xfer->max_packet_size) || (xfer->queued_len == xfer->total_len)) {
+  if ((rx_count < xfer->max_packet_size) || (xfer->queued_len >= xfer->total_len)) {
     // all bytes received or short packet
+    dcd_event_xfer_complete(0, ep_num, xfer->queued_len, XFER_RESULT_SUCCESS, true);
 
-    // reset rx bufsize to mps to prevent race condition to cause PMAOVR (occurs with ch32v203 with msc write10)
+    // For ch32v203: reset rx bufsize to mps to prevent race condition to cause PMAOVR (occurs with msc write10)
+    // also ch32 seems to unconditionally accept ZLP on EP0 OUT, which can incorrectly use queued_len of previous
+    // transfer. So reset total_len and queued_len to 0.
     btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, xfer->max_packet_size);
-
-    dcd_event_xfer_complete(0, ep_num, xfer->queued_len, XFER_RESULT_SUCCESS, true);
+    xfer->total_len = xfer->queued_len = 0;
   } else {
     // Set endpoint active again for receiving more data. Note that isochronous endpoints stay active always
     if (!is_iso) {
@@ -743,20 +736,15 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir) {
     uint32_t ep_reg = ep_read(ep_idx) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR
     ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(dir);
 
-    if ( ep_num == 0 && dir == TUSB_DIR_OUT && _setup_dir == TUSB_DIR_IN ) {
-      // use EP0 OUT status stage, otherwise OUT packet right after SETUP will be accepted without
-      // the usbd (software) consent
-      ep_reg |= USB_EP_KIND;
-    } else {
-      uint16_t cnt = tu_min16(xfer->total_len, xfer->max_packet_size);
+    uint16_t cnt = tu_min16(xfer->total_len, xfer->max_packet_size);
 
-      if (ep_is_iso(ep_reg)) {
-        btable_set_rx_bufsize(ep_idx, 0, cnt);
-        btable_set_rx_bufsize(ep_idx, 1, cnt);
-      } else {
-        btable_set_rx_bufsize(ep_idx, BTABLE_BUF_RX, cnt);
-      }
+    if (ep_is_iso(ep_reg)) {
+      btable_set_rx_bufsize(ep_idx, 0, cnt);
+      btable_set_rx_bufsize(ep_idx, 1, cnt);
+    } else {
+      btable_set_rx_bufsize(ep_idx, BTABLE_BUF_RX, cnt);
     }
+
     ep_change_status(&ep_reg, dir, EP_STAT_VALID);
     ep_write(ep_idx, ep_reg, true);
   }

From 1ea38ebe13f07c4db99ae39f207e55815d3701b3 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 8 Aug 2024 15:43:11 +0700
Subject: [PATCH 130/204] refactor read/write pma from/to fifo

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 247 +++++++-----------
 src/portable/st/stm32_fsdev/fsdev_type.h      |   8 +
 2 files changed, 98 insertions(+), 157 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index bbdfbaa097..2529696484 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -336,14 +336,12 @@ static void handle_ctr_rx(uint32_t ep_id) {
   uint16_t const rx_count = btable_get_count(ep_id, buf_id);
   uint16_t pma_addr = (uint16_t) btable_get_addr(ep_id, buf_id);
 
-  if (rx_count != 0) {
-    if (xfer->ff) {
-      dcd_read_packet_memory_ff(xfer->ff, pma_addr, rx_count);
-    } else {
-      dcd_read_packet_memory(xfer->buffer + xfer->queued_len, pma_addr, rx_count);
-    }
-    xfer->queued_len += rx_count;
+  if (xfer->ff) {
+    dcd_read_packet_memory_ff(xfer->ff, pma_addr, rx_count);
+  } else {
+    dcd_read_packet_memory(xfer->buffer + xfer->queued_len, pma_addr, rx_count);
   }
+  xfer->queued_len += rx_count;
 
   if ((rx_count < xfer->max_packet_size) || (xfer->queued_len >= xfer->total_len)) {
     // all bytes received or short packet
@@ -706,14 +704,12 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   }
   uint16_t addr_ptr = (uint16_t) btable_get_addr(ep_ix, buf_id);
 
-  if (len) {
-    if (xfer->ff) {
-      dcd_write_packet_memory_ff(xfer->ff, addr_ptr, len);
-    } else {
-      dcd_write_packet_memory(addr_ptr, &(xfer->buffer[xfer->queued_len]), len);
-    }
-    xfer->queued_len += len;
+  if (xfer->ff) {
+    dcd_write_packet_memory_ff(xfer->ff, addr_ptr, len);
+  } else {
+    dcd_write_packet_memory(addr_ptr, &(xfer->buffer[xfer->queued_len]), len);
   }
+  xfer->queued_len += len;
 
   btable_set_count(ep_ix, buf_id, len);
   ep_change_status(&ep_reg, TUSB_DIR_IN, EP_STAT_VALID);
@@ -814,25 +810,20 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
 // - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
 // - Uses unaligned for RAM (since M0 cannot access unaligned address)
 static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes) {
-  enum { BUS_SIZE = sizeof(fsdev_bus_t) };
-  uint32_t n_write = nbytes / BUS_SIZE;
+  if (nbytes == 0) return true;
+  uint32_t n_write = nbytes / FSDEV_BUS_SIZE;
 
   fsdev_pma_buf_t* pma_buf = PMA_BUF_AT(dst);
   const uint8_t *src8 = src;
 
   while (n_write--) {
-    #ifdef FSDEV_BUS_32BIT
-    pma_buf->value = tu_unaligned_read32(src8);
-    #else
-    pma_buf->value = tu_unaligned_read16(src8);
-    #endif
-
-    src8 += BUS_SIZE;
+    pma_buf->value = fsdevbus_unaligned_read(src8);
+    src8 += FSDEV_BUS_SIZE;
     pma_buf++;
   }
 
   // odd bytes e.g 1 for 16-bit or 1-3 for 32-bit
-  uint16_t odd = nbytes & (BUS_SIZE - 1);
+  uint16_t odd = nbytes & (FSDEV_BUS_SIZE - 1);
   if (odd) {
     fsdev_bus_t temp = 0;
     for(uint16_t i = 0; i < odd; i++) {
@@ -848,27 +839,20 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, ui
 // - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
 // - Uses unaligned for RAM (since M0 cannot access unaligned address)
 static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes) {
-  enum { BUS_SIZE = sizeof(fsdev_bus_t) };
-  uint32_t n_write = nbytes / BUS_SIZE;
+  if (nbytes == 0) return true;
+  uint32_t n_read = nbytes / FSDEV_BUS_SIZE;
 
   fsdev_pma_buf_t* pma_buf = PMA_BUF_AT(src);
   uint8_t *dst8 = (uint8_t *)dst;
 
-  while (n_write--) {
-    fsdev_bus_t temp = pma_buf->value;
-
-    #ifdef FSDEV_BUS_32BIT
-    tu_unaligned_write32(dst8, temp);
-    #else
-    tu_unaligned_write16(dst8, temp);
-    #endif
-
-    dst8 += BUS_SIZE;
+  while (n_read--) {
+    fsdevbus_unaligned_write(dst8, (fsdev_bus_t ) pma_buf->value);
+    dst8 += FSDEV_BUS_SIZE;
     pma_buf++;
   }
 
   // odd bytes e.g 1 for 16-bit or 1-3 for 32-bit
-  uint16_t odd = nbytes & (BUS_SIZE - 1);
+  uint16_t odd = nbytes & (FSDEV_BUS_SIZE - 1);
   if (odd) {
     fsdev_bus_t temp = pma_buf->value;
     while (odd--) {
@@ -880,156 +864,105 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t
   return true;
 }
 
-/**
- * @brief Copy from FIFO to packet memory area (PMA).
- *        Uses byte-access of system memory and 16-bit access of packet memory
- * @param   wNBytes no. of bytes to be copied.
- * @retval None
- */
+// Write to PMA from FIFO
 static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNBytes) {
+  if (wNBytes == 0) return true;
+
   // Since we copy from a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
   tu_fifo_buffer_info_t info;
   tu_fifo_get_read_info(ff, &info);
 
-  uint16_t cnt_lin = TU_MIN(wNBytes, info.len_lin);
-  uint16_t cnt_wrap = TU_MIN(wNBytes - cnt_lin, info.len_wrap);
+  uint16_t cnt_lin = tu_min16(wNBytes, info.len_lin);
+  uint16_t cnt_wrap = tu_min16(wNBytes - cnt_lin, info.len_wrap);
+  uint16_t const cnt_total = cnt_lin + cnt_wrap;
 
   // We want to read from the FIFO and write it into the PMA, if LIN part is ODD and has WRAPPED part,
-  // last lin byte will be combined with wrapped part
-  // To ensure PMA is always access aligned (dst aligned to 16 or 32 bit)
-#ifdef FSDEV_BUS_32BIT
-  if ((cnt_lin & 0x03) && cnt_wrap) {
-    // Copy first linear part
-    dcd_write_packet_memory(dst, info.ptr_lin, cnt_lin & ~0x03);
-    dst += cnt_lin & ~0x03;
-
-    // Copy last linear bytes & first wrapped bytes to buffer
-    uint32_t i;
-    uint8_t tmp[4];
-    for (i = 0; i < (cnt_lin & 0x03); i++) {
-      tmp[i] = ((uint8_t *)info.ptr_lin)[(cnt_lin & ~0x03) + i];
-    }
-    uint32_t wCnt = cnt_wrap;
-    for (; i < 4 && wCnt > 0; i++, wCnt--) {
-      tmp[i] = *(uint8_t *)info.ptr_wrap;
-      info.ptr_wrap = (uint8_t *)info.ptr_wrap + 1;
+  // last lin byte will be combined with wrapped part To ensure PMA is always access aligned
+  uint16_t lin_even = cnt_lin & ~(FSDEV_BUS_SIZE - 1);
+  uint16_t lin_odd = cnt_lin & (FSDEV_BUS_SIZE - 1);
+  uint8_t const *src8 = (uint8_t const*) info.ptr_lin;
+
+  // write even linear part
+  dcd_write_packet_memory(dst, src8, lin_even);
+  dst += lin_even;
+  src8 += lin_even;
+
+  if (lin_odd == 0) {
+    src8 = (uint8_t const*) info.ptr_wrap;
+  } else {
+    // Combine last linear bytes + first wrapped bytes to form fsdev bus width data
+    fsdev_bus_t temp = 0;
+    uint16_t i;
+    for(i = 0; i < lin_odd; i++) {
+      temp |= *src8++ << (i * 8);
     }
 
-    // Write unaligned buffer
-    dcd_write_packet_memory(dst, &tmp, 4);
-    dst += 4;
-
-    // Copy rest of wrapped byte
-    if (wCnt) {
-      dcd_write_packet_memory(dst, info.ptr_wrap, wCnt);
-    }
-  }
-#else
-  if ((cnt_lin & 0x01) && cnt_wrap) {
-    // Copy first linear part
-    dcd_write_packet_memory(dst, info.ptr_lin, cnt_lin & ~0x01);
-    dst += cnt_lin & ~0x01;
-
-    // Copy last linear byte & first wrapped byte
-    uint16_t tmp = ((uint8_t *)info.ptr_lin)[cnt_lin - 1] | ((uint16_t)(((uint8_t *)info.ptr_wrap)[0]) << 8U);
-    dcd_write_packet_memory(dst, &tmp, 2);
-    dst += 2;
-
-    // Copy rest of wrapped byte
-    dcd_write_packet_memory(dst, ((uint8_t *)info.ptr_wrap) + 1, cnt_wrap - 1);
-  }
-#endif
-  else {
-    // Copy linear part
-    dcd_write_packet_memory(dst, info.ptr_lin, cnt_lin);
-    dst += info.len_lin;
-
-    if (info.len_wrap) {
-      // Copy wrapped byte
-      dcd_write_packet_memory(dst, info.ptr_wrap, cnt_wrap);
+    src8 = (uint8_t const*) info.ptr_wrap;
+    for(; i < FSDEV_BUS_SIZE && cnt_wrap > 0; i++, cnt_wrap--) {
+      temp |= *src8++ << (i * 8);
     }
+
+    dcd_write_packet_memory(dst, &temp, FSDEV_BUS_SIZE);
+    dst += FSDEV_BUS_SIZE;
   }
 
-  tu_fifo_advance_read_pointer(ff, cnt_lin + cnt_wrap);
+  // write the rest of the wrapped part
+  dcd_write_packet_memory(dst, src8, cnt_wrap);
 
+  tu_fifo_advance_read_pointer(ff, cnt_total);
   return true;
 }
 
-/**
- * @brief Copy a buffer from user packet memory area (PMA) to FIFO.
- *        Uses byte-access of system memory and 16-bit access of packet memory
- * @param   wNBytes no. of bytes to be copied.
- * @retval None
- */
+// Read from PMA to FIFO
 static bool dcd_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBytes) {
+  if (wNBytes == 0) return true;
+
   // Since we copy into a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
   // Check for first linear part
   tu_fifo_buffer_info_t info;
   tu_fifo_get_write_info(ff, &info); // We want to read from the FIFO
 
-  uint16_t cnt_lin = TU_MIN(wNBytes, info.len_lin);
-  uint16_t cnt_wrap = TU_MIN(wNBytes - cnt_lin, info.len_wrap);
-
-  // We want to read from PMA and write it into the FIFO, if LIN part is ODD and has WRAPPED part,
-  // last lin byte will be combined with wrapped part
-  // To ensure PMA is always access aligned (src aligned to 16 or 32 bit)
-#ifdef FSDEV_BUS_32BIT
-  if ((cnt_lin & 0x03) && cnt_wrap) {
-    // Copy first linear part
-    dcd_read_packet_memory(info.ptr_lin, src, cnt_lin & ~0x03);
-    src += cnt_lin & ~0x03;
-
-    // Copy last linear bytes & first wrapped bytes
-    uint8_t tmp[4];
-    dcd_read_packet_memory(tmp, src, 4);
-    src += 4;
-
-    uint32_t i;
-    for (i = 0; i < (cnt_lin & 0x03); i++) {
-      ((uint8_t *)info.ptr_lin)[(cnt_lin & ~0x03) + i] = tmp[i];
-    }
-    uint32_t wCnt = cnt_wrap;
-    for (; i < 4 && wCnt > 0; i++, wCnt--) {
-      *(uint8_t *)info.ptr_wrap = tmp[i];
-      info.ptr_wrap = (uint8_t *)info.ptr_wrap + 1;
-    }
+  uint16_t cnt_lin = tu_min16(wNBytes, info.len_lin);
+  uint16_t cnt_wrap = tu_min16(wNBytes - cnt_lin, info.len_wrap);
+  uint16_t cnt_total = cnt_lin + cnt_wrap;
 
-    // Copy rest of wrapped byte
-    if (wCnt) {
-      dcd_read_packet_memory(info.ptr_wrap, src, wCnt);
-    }
-  }
-#else
-  if ((cnt_lin & 0x01) && cnt_wrap) {
-    // Copy first linear part
-    dcd_read_packet_memory(info.ptr_lin, src, cnt_lin & ~0x01);
-    src += cnt_lin & ~0x01;
+  // We want to read from the FIFO and write it into the PMA, if LIN part is ODD and has WRAPPED part,
+  // last lin byte will be combined with wrapped part To ensure PMA is always access aligned
 
-    // Copy last linear byte & first wrapped byte
-    uint8_t tmp[2];
-    dcd_read_packet_memory(tmp, src, 2);
-    src += 2;
+  uint16_t lin_even = cnt_lin & ~(FSDEV_BUS_SIZE - 1);
+  uint16_t lin_odd = cnt_lin & (FSDEV_BUS_SIZE - 1);
+  uint8_t *dst8 = (uint8_t *) info.ptr_lin;
 
-    ((uint8_t *)info.ptr_lin)[cnt_lin - 1] = tmp[0];
-    ((uint8_t *)info.ptr_wrap)[0] = tmp[1];
+  // read even linear part
+  dcd_read_packet_memory(dst8, src, lin_even);
+  dst8 += lin_even;
+  src += lin_even;
 
-    // Copy rest of wrapped byte
-    dcd_read_packet_memory(((uint8_t *)info.ptr_wrap) + 1, src, cnt_wrap - 1);
-  }
-#endif
-  else {
-    // Copy linear part
-    dcd_read_packet_memory(info.ptr_lin, src, cnt_lin);
-    src += cnt_lin;
-
-    if (info.len_wrap) {
-      // Copy wrapped byte
-      dcd_read_packet_memory(info.ptr_wrap, src, cnt_wrap);
+  if (lin_odd == 0) {
+    dst8 = (uint8_t *) info.ptr_wrap;
+  } else {
+    // Combine last linear bytes + first wrapped bytes to form fsdev bus width data
+    fsdev_bus_t temp;
+    dcd_read_packet_memory(&temp, src, FSDEV_BUS_SIZE);
+    src += FSDEV_BUS_SIZE;
+
+    uint16_t i;
+    for (i = 0; i < lin_odd; i++) {
+      *dst8++ = (uint8_t) (temp & 0xfful);
+      temp >>= 8;
+    }
+
+    dst8 = (uint8_t *) info.ptr_wrap;
+    for (; i < FSDEV_BUS_SIZE && cnt_wrap > 0; i++, cnt_wrap--) {
+      *dst8++ = (uint8_t) (temp & 0xfful);
+      temp >>= 8;
     }
   }
 
-  tu_fifo_advance_write_pointer(ff, cnt_lin + cnt_wrap);
+  // read the rest of the wrapped part
+  dcd_read_packet_memory(dst8, src, cnt_wrap);
 
+  tu_fifo_advance_write_pointer(ff, cnt_total);
   return true;
 }
 
diff --git a/src/portable/st/stm32_fsdev/fsdev_type.h b/src/portable/st/stm32_fsdev/fsdev_type.h
index 7ebc32255f..26717fab04 100644
--- a/src/portable/st/stm32_fsdev/fsdev_type.h
+++ b/src/portable/st/stm32_fsdev/fsdev_type.h
@@ -66,10 +66,18 @@ TU_VERIFY_STATIC(FSDEV_BTABLE_BASE % 8 == 0, "BTABLE base must be aligned to 8 b
 // The fsdev_bus_t type can be used for both register and PMA access necessities
 #ifdef FSDEV_BUS_32BIT
   typedef uint32_t fsdev_bus_t;
+  #define fsdevbus_unaligned_read(_addr)           tu_unaligned_read32(_addr)
+  #define fsdevbus_unaligned_write(_addr, _value)  tu_unaligned_write32(_addr, _value)
 #else
   typedef uint16_t fsdev_bus_t;
+  #define fsdevbus_unaligned_read(_addr)           tu_unaligned_read16(_addr)
+  #define fsdevbus_unaligned_write(_addr, _value)  tu_unaligned_write16(_addr, _value)
 #endif
 
+enum {
+  FSDEV_BUS_SIZE = sizeof(fsdev_bus_t),
+};
+
 //--------------------------------------------------------------------+
 // BTable Typedef
 //--------------------------------------------------------------------+

From 0d44977b54c253e6b9faa9b37d56ba7a7522da7a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 8 Aug 2024 21:38:49 +0700
Subject: [PATCH 131/204] add ch32v203 nano to hil pool

---
 test/hil/hil_test.py | 30 ++++++++++++++++++++++++++++++
 test/hil/rpi.json    |  7 +++++++
 2 files changed, 37 insertions(+)

diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index a221982c08..b675205764 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -146,6 +146,36 @@ def flash_openocd(board, firmware):
     return ret
 
 
+def flash_openocd_wch(board, firmware):
+    # Content of the wch-riscv.cfg file
+    cfg_content = """
+adapter driver wlinke
+adapter speed 6000
+transport select sdi
+
+wlink_set_address 0x00000000
+set _CHIPNAME wch_riscv
+sdi newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x00001
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME.0 wch_riscv -chain-position $_TARGETNAME
+$_TARGETNAME.0 configure  -work-area-phys 0x20000000 -work-area-size 10000 -work-area-backup 1
+set _FLASHNAME $_CHIPNAME.flash
+
+flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0
+
+echo "Ready for Remote Connections"
+"""
+    f_wch = f"wch-riscv_{board['uid']}.cfg"
+    if not os.path.exists(f_wch):
+        with open(f_wch, 'w') as file:
+            file.write(cfg_content)
+
+    ret = run_cmd(f'openocd_wch -c "adapter serial {board["flasher_sn"]}" -f {f_wch} -c "program {firmware}.elf reset exit"')
+    return ret
+
+
 def flash_wlink_rs(board, firmware):
     # wlink use index for probe selection and lacking usb serial support
     ret = run_cmd(f'wlink flash {firmware}.elf')
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index 9520f30e24..fd00913f37 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -57,6 +57,13 @@
             "flasher": "openocd",
             "flasher_sn": "066FFF495087534867063844",
             "flasher_args": "-f interface/stlink.cfg -f target/stm32g0x.cfg"
+        },
+        {
+            "name": "nanoch32v203",
+            "uid": "CDAB277B0FBC03E339E339E3",
+            "flasher": "openocd_wch",
+            "flasher_sn": "EBCA8F0670AF",
+            "flasher_args": ""
         }
     ],
     "boards-skip": [

From c3f3465a40b2a83fc7e41e56d5456bceda5ad7a3 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 8 Aug 2024 22:04:54 +0700
Subject: [PATCH 132/204] remove hiL build-esp, add riscv support

---
 .github/workflows/hil_test.yml | 58 ++++------------------------------
 1 file changed, 6 insertions(+), 52 deletions(-)

diff --git a/.github/workflows/hil_test.yml b/.github/workflows/hil_test.yml
index a4573faf71..d02f13e05e 100644
--- a/.github/workflows/hil_test.yml
+++ b/.github/workflows/hil_test.yml
@@ -44,11 +44,16 @@ jobs:
           echo "BOARDS_LIST=$BOARDS_LIST" >> $GITHUB_ENV
           echo "BOARDS_LIST=$BOARDS_LIST" >> $GITHUB_OUTPUT
 
-      - name: Setup Toolchain
+      - name: Setup arm-gcc toolchain
         uses: ./.github/actions/setup_toolchain
         with:
           toolchain: 'arm-gcc'
 
+      - name: Setup risv-gcc toolchain
+        uses: ./.github/actions/setup_toolchain
+        with:
+          toolchain: 'riscv-gcc'
+
       - name: Get Dependencies
         uses: ./.github/actions/get_deps
         with:
@@ -65,56 +70,6 @@ jobs:
             cmake-build/cmake-build-*/*/*/*.elf
             cmake-build/cmake-build-*/*/*/*.bin
 
-  # ---------------------------------------
-  # Build Espressif (skipped since CP210x cause USB bus issue)
-  # cp210x ttyUSB0: usb_serial_generic_write_bulk_callback - nonzero urb status: -71
-  # ---------------------------------------
-  build-esp:
-    if: false
-    runs-on: ubuntu-latest
-    outputs:
-      BOARDS_LIST: ${{ steps.parse_hil_json.outputs.BOARDS_LIST }}
-    steps:
-      - name: Checkout TinyUSB
-        uses: actions/checkout@v4
-
-      - name: Parse HIL json
-        id: parse_hil_json
-        run: |
-          sudo apt install -y jq
-          # Espressif boards
-          BOARDS_LIST=$(jq -r '.boards[] | select(.flasher == "esptool") | "-b " + .name' ${{ env.HIL_JSON }} | tr '\n' ' ')
-          echo "BOARDS_LIST=$BOARDS_LIST"
-          echo "BOARDS_LIST=$BOARDS_LIST" >> $GITHUB_ENV
-          echo "BOARDS_LIST=$BOARDS_LIST" >> $GITHUB_OUTPUT
-
-      - name: Setup ESP-IDF
-        if: env.BOARDS_LIST != ''
-        uses: ./.github/actions/setup_toolchain
-        with:
-          toolchain: 'esp-idf'
-          toolchain_url: 'v5.1.1'
-
-      - name: Get Dependencies
-        uses: ./.github/actions/get_deps
-        with:
-          arg: ${{ env.BOARDS_LIST }}
-
-      - name: Build Espressif
-        if: env.BOARDS_LIST != ''
-        run: docker run --rm -v $PWD:/project -w /project espressif/idf:v5.1.1 python3 tools/build.py $BOARDS_LIST
-
-      - name: Upload Artifacts for Hardware Testing
-        uses: actions/upload-artifact@v4
-        with:
-          name: hil_rpi_esp
-          path: |
-            cmake-build/cmake-build-*/*/*/*.bin
-            cmake-build/cmake-build-*/*/*/bootloader/bootloader.bin
-            cmake-build/cmake-build-*/*/*/partition_table/partition-table.bin
-            cmake-build/cmake-build-*/*/*/config.env
-            cmake-build/cmake-build-*/*/*/flash_args
-
   # ---------------------------------------
   # Hardware in the loop (HIL)
   # self-hosted running on an RPI. For attached hardware checkout test/hil/rpi.json
@@ -123,7 +78,6 @@ jobs:
     if: github.repository_owner == 'hathach'
     needs:
       - build
-      #- build-esp
     runs-on: [self-hosted, ARM64, rpi, hardware-in-the-loop]
     env:
       BOARDS_LIST: "${{ needs.build-esp.outputs.BOARDS_LIST }} ${{ needs.build.outputs.BOARDS_LIST }}"

From e7e6fe7cd546c389cdafd1cab9dbf4d60791e70f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 8 Aug 2024 22:28:13 +0700
Subject: [PATCH 133/204] add riscv url

---
 .github/workflows/hil_test.yml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.github/workflows/hil_test.yml b/.github/workflows/hil_test.yml
index d02f13e05e..1ab50e0095 100644
--- a/.github/workflows/hil_test.yml
+++ b/.github/workflows/hil_test.yml
@@ -53,6 +53,7 @@ jobs:
         uses: ./.github/actions/setup_toolchain
         with:
           toolchain: 'riscv-gcc'
+          toolchain_url: 'https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v13.2.0-2/xpack-riscv-none-elf-gcc-13.2.0-2-linux-x64.tar.gz'
 
       - name: Get Dependencies
         uses: ./.github/actions/get_deps

From 00eb0144cbb11d1c37dcce5cd8ba8afe10e1b6b5 Mon Sep 17 00:00:00 2001
From: Scott Shawcroft <scott@tannewt.org>
Date: Thu, 8 Aug 2024 12:55:30 -0700
Subject: [PATCH 134/204] Fix ESPs without device support

The newer tusb_option.h assumes that there is a number of device
endpoints to check against.
---
 src/common/tusb_mcu.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 637281bfce..e3ad0f6279 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -336,8 +336,11 @@
   #define TUP_USBIP_DWC2
   #define TUP_DCD_ENDPOINT_MAX    6
 
-#elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C6, OPT_MCU_ESP32H2) && (CFG_TUD_ENABLED || !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421))
+#elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C6, OPT_MCU_ESP32H2)
+  #if (CFG_TUD_ENABLED || !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421))
   #error "MCUs are only supported with CFG_TUH_MAX3421 enabled"
+  #endif
+  #define TUP_DCD_ENDPOINT_MAX    0
 
 //--------------------------------------------------------------------+
 // Dialog

From ea64dd4999618ce14aea90118ee9218b4aefeba6 Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Fri, 9 Aug 2024 22:45:35 +0700
Subject: [PATCH 135/204] Update ci toolchain (#2758)

* move toolchain url to its setup action
---
 .github/actions/setup_toolchain/action.yml    | 29 ++++++++++++++++---
 .../setup_toolchain/espressif/action.yml      |  8 ++---
 .github/workflows/build.yml                   |  4 +--
 .github/workflows/build_util.yml              |  6 ++--
 .github/workflows/ci_set_matrix.py            | 22 +++++++-------
 .github/workflows/hil_test.yml                |  1 -
 6 files changed, 44 insertions(+), 26 deletions(-)

diff --git a/.github/actions/setup_toolchain/action.yml b/.github/actions/setup_toolchain/action.yml
index 19fe28b0c5..d173d69037 100644
--- a/.github/actions/setup_toolchain/action.yml
+++ b/.github/actions/setup_toolchain/action.yml
@@ -4,8 +4,8 @@ inputs:
   toolchain:
     description: 'Toolchain name'
     required: true
-  toolchain_url:
-    description: 'Toolchain URL or version'
+  toolchain_version:
+    description: 'Toolchain version'
     required: false
 
 outputs:
@@ -27,7 +27,28 @@ runs:
       uses: ./.github/actions/setup_toolchain/espressif
       with:
         toolchain: ${{ inputs.toolchain }}
-        toolchain_url: ${{ inputs.toolchain_url }}
+        toolchain_version: ${{ inputs.toolchain_version }}
+
+    - name: Get Toolchain URL
+      if: >-
+        inputs.toolchain != 'arm-gcc' &&
+        inputs.toolchain != 'arm-iar' &&
+        inputs.toolchain != 'esp-idf'
+      id: set-toolchain-url
+      run: |
+        TOOLCHAIN_JSON='{
+          "aarch64-gcc": "https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz",
+          "arm-clang": "https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm/releases/download/release-17.0.1/LLVMEmbeddedToolchainForArm-17.0.1-Linux-x86_64.tar.xz",
+          "arm-iar": "",
+          "arm-gcc": "",
+          "msp430-gcc": "http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/9_2_0_0/export/msp430-gcc-9.2.0.50_linux64.tar.bz2",
+          "riscv-gcc": "https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v13.2.0-2/xpack-riscv-none-elf-gcc-13.2.0-2-linux-x64.tar.gz",
+          "rx-gcc": "http://gcc-renesas.com/downloads/get.php?f=rx/8.3.0.202004-gnurx/gcc-8.3.0.202004-GNURX-ELF.run"
+        }'
+        TOOLCHAIN_URL=$(echo $TOOLCHAIN_JSON | jq -r '.["${{ inputs.toolchain }}"]')
+        echo "toolchain_url=$TOOLCHAIN_URL"
+        echo "toolchain_url=$TOOLCHAIN_URL" >> $GITHUB_OUTPUT
+      shell: bash
 
     - name: Download Toolchain
       if: >-
@@ -37,7 +58,7 @@ runs:
       uses: ./.github/actions/setup_toolchain/download
       with:
         toolchain: ${{ inputs.toolchain }}
-        toolchain_url: ${{ inputs.toolchain_url }}
+        toolchain_url: ${{ steps.set-toolchain-url.outputs.toolchain_url }}
 
     - name: Set toolchain option
       id: set-toolchain-option
diff --git a/.github/actions/setup_toolchain/espressif/action.yml b/.github/actions/setup_toolchain/espressif/action.yml
index 46da029118..3129329ddb 100644
--- a/.github/actions/setup_toolchain/espressif/action.yml
+++ b/.github/actions/setup_toolchain/espressif/action.yml
@@ -4,7 +4,7 @@ inputs:
   toolchain:
     description: 'Toolchain name'
     required: true
-  toolchain_url:
+  toolchain_version:
     description: 'Toolchain URL or version'
     required: true
 
@@ -22,14 +22,14 @@ runs:
       id: cache-toolchain-espressif
       with:
         path: ${{ env.DOCKER_ESP_IDF }}
-        key: ${{ inputs.toolchain }}-${{ inputs.toolchain_url }}
+        key: ${{ inputs.toolchain }}-${{ inputs.toolchain_version }}
 
     - name: Pull and Save Docker Image
       if: steps.cache-toolchain-espressif.outputs.cache-hit != 'true'
       run: |
-        docker pull espressif/idf:${{ inputs.toolchain_url }}
+        docker pull espressif/idf:${{ inputs.toolchain_version }}
         mkdir -p $(dirname $DOCKER_ESP_IDF)
-        docker save -o $DOCKER_ESP_IDF espressif/idf:${{ inputs.toolchain_url }}
+        docker save -o $DOCKER_ESP_IDF espressif/idf:${{ inputs.toolchain_version }}
         du -sh $DOCKER_ESP_IDF
       shell: bash
 
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index fda7f02941..b3dc3ec423 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -66,7 +66,6 @@ jobs:
     with:
       build-system: 'cmake'
       toolchain: ${{ matrix.toolchain }}
-      toolchain_url: ${{ fromJSON(needs.set-matrix.outputs.json)[matrix.toolchain].toolchain_url }}
       build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)[matrix.toolchain].family) }}
       one-per-family: ${{ github.event_name != 'pull_request' }}
 
@@ -90,7 +89,6 @@ jobs:
     with:
       build-system: 'make'
       toolchain: ${{ matrix.toolchain }}
-      toolchain_url: ${{ fromJSON(needs.set-matrix.outputs.json)[matrix.toolchain].toolchain_url }}
       build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)[matrix.toolchain].family) }}
       one-per-family: ${{ github.event_name != 'pull_request' }}
 
@@ -125,7 +123,7 @@ jobs:
     with:
       build-system: 'cmake'
       toolchain: 'esp-idf'
-      toolchain_url: 'v5.1.1'
+      toolchain_version: 'v5.1.1'
       build-args: '["-b${{ matrix.board }}"]'
 
   # ---------------------------------------
diff --git a/.github/workflows/build_util.yml b/.github/workflows/build_util.yml
index 49a9feabd7..b0a87d4df6 100644
--- a/.github/workflows/build_util.yml
+++ b/.github/workflows/build_util.yml
@@ -9,7 +9,7 @@ on:
       toolchain:
         required: true
         type: string
-      toolchain_url:
+      toolchain_version:
         required: false
         type: string
       build-args:
@@ -40,7 +40,7 @@ jobs:
         uses: ./.github/actions/setup_toolchain
         with:
           toolchain: ${{ inputs.toolchain }}
-          toolchain_url: ${{ inputs.toolchain_url }}
+          toolchain_version: ${{ inputs.toolchain_version }}
 
       - name: Get Dependencies
         uses: ./.github/actions/get_deps
@@ -65,4 +65,4 @@ jobs:
       - name: Build using ESP-IDF docker
         if: inputs.toolchain == 'esp-idf'
         run: |
-          docker run --rm -v $PWD:/project -w /project espressif/idf:${{ inputs.toolchain_url }} python3 tools/build.py ${{ matrix.arg }}
+          docker run --rm -v $PWD:/project -w /project espressif/idf:${{ inputs.toolchain_version }} python3 tools/build.py ${{ matrix.arg }}
diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py
index 2a00e54131..a56bd42141 100644
--- a/.github/workflows/ci_set_matrix.py
+++ b/.github/workflows/ci_set_matrix.py
@@ -1,15 +1,15 @@
 import json
 
 # toolchain, url
-toolchain_list = {
-    "aarch64-gcc": "https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz",
-    "arm-clang": "https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm/releases/download/release-17.0.1/LLVMEmbeddedToolchainForArm-17.0.1-Linux-x86_64.tar.xz",
-    "arm-iar": "",
-    "arm-gcc": "",
-    "msp430-gcc": "http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/9_2_0_0/export/msp430-gcc-9.2.0.50_linux64.tar.bz2",
-    "riscv-gcc": "https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v13.2.0-2/xpack-riscv-none-elf-gcc-13.2.0-2-linux-x64.tar.gz",
-    "rx-gcc": "http://gcc-renesas.com/downloads/get.php?f=rx/8.3.0.202004-gnurx/gcc-8.3.0.202004-GNURX-ELF.run",
-}
+toolchain_list = [
+    "aarch64-gcc",
+    "arm-clang",
+    "arm-iar",
+    "arm-gcc",
+    "msp430-gcc",
+    "riscv-gcc",
+    "rx-gcc"
+]
 
 # family: [supported toolchain]
 family_list = {
@@ -44,7 +44,7 @@
 
 def set_matrix_json():
     matrix = {}
-    for toolchain in toolchain_list.keys():
+    for toolchain in toolchain_list:
         filtered_families = [family for family, supported_toolchain in family_list.items() if
                              toolchain in supported_toolchain]
 
@@ -55,7 +55,7 @@ def set_matrix_json():
             hfp_boards = [f"-b{board['name']}" for board in hfp_data['boards']]
             filtered_families = filtered_families + hfp_boards
 
-        matrix[toolchain] = {"family": filtered_families, "toolchain_url": toolchain_list[toolchain]}
+        matrix[toolchain] = {"family": filtered_families}
 
     print(json.dumps(matrix))
 
diff --git a/.github/workflows/hil_test.yml b/.github/workflows/hil_test.yml
index 1ab50e0095..d02f13e05e 100644
--- a/.github/workflows/hil_test.yml
+++ b/.github/workflows/hil_test.yml
@@ -53,7 +53,6 @@ jobs:
         uses: ./.github/actions/setup_toolchain
         with:
           toolchain: 'riscv-gcc'
-          toolchain_url: 'https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v13.2.0-2/xpack-riscv-none-elf-gcc-13.2.0-2-linux-x64.tar.gz'
 
       - name: Get Dependencies
         uses: ./.github/actions/get_deps

From b786d6f4e632654a356932115bfc0c1621f6333b Mon Sep 17 00:00:00 2001
From: Hjalmar <github.disk321@passinbox.com>
Date: Fri, 9 Aug 2024 21:08:32 +0200
Subject: [PATCH 136/204] Marked the keycode parameter of the keyboard_report
 functions as const since the functions don't modifies the value

---
 src/class/hid/hid_device.c | 2 +-
 src/class/hid/hid_device.h | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c
index 00f6fc4747..ef6c7f3afb 100644
--- a/src/class/hid/hid_device.c
+++ b/src/class/hid/hid_device.c
@@ -134,7 +134,7 @@ uint8_t tud_hid_n_get_protocol(uint8_t instance) {
   return _hidd_itf[instance].protocol_mode;
 }
 
-bool tud_hid_n_keyboard_report(uint8_t instance, uint8_t report_id, uint8_t modifier, uint8_t keycode[6]) {
+bool tud_hid_n_keyboard_report(uint8_t instance, uint8_t report_id, uint8_t modifier, const uint8_t keycode[6]) {
   hid_keyboard_report_t report;
   report.modifier = modifier;
   report.reserved = 0;
diff --git a/src/class/hid/hid_device.h b/src/class/hid/hid_device.h
index 89c28e0618..ab2e273736 100644
--- a/src/class/hid/hid_device.h
+++ b/src/class/hid/hid_device.h
@@ -65,7 +65,7 @@ bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const* report, u
 
 // KEYBOARD: convenient helper to send keyboard report if application
 // use template layout report as defined by hid_keyboard_report_t
-bool tud_hid_n_keyboard_report(uint8_t instance, uint8_t report_id, uint8_t modifier, uint8_t keycode[6]);
+bool tud_hid_n_keyboard_report(uint8_t instance, uint8_t report_id, uint8_t modifier, const uint8_t keycode[6]);
 
 // MOUSE: convenient helper to send mouse report if application
 // use template layout report as defined by hid_mouse_report_t
@@ -98,7 +98,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_report(uint8_t report_id, void
   return tud_hid_n_report(0, report_id, report, len);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_keyboard_report(uint8_t report_id, uint8_t modifier, uint8_t keycode[6]) {
+TU_ATTR_ALWAYS_INLINE static inline bool tud_hid_keyboard_report(uint8_t report_id, uint8_t modifier, const uint8_t keycode[6]) {
   return tud_hid_n_keyboard_report(0, report_id, modifier, keycode);
 }
 

From e8f42df97a4421d90a4565f22308c5adb9560cf5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 10 Aug 2024 09:47:34 +0700
Subject: [PATCH 137/204] change pio to fix rp2040 build

---
 tools/get_deps.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/get_deps.py b/tools/get_deps.py
index 7fbde0e027..c7cf6ca63b 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -54,8 +54,8 @@
     'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git',
                             '144f1eb7ea8c06512e12f12b27383601c0272410',
                             'kinetis_k kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt'],
-    'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
-                                         '0f747aaa0c16f750bdfa2ba37ec25d6c8e1bc117',
+    'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/adafruit/Pico-PIO-USB.git',
+                                         '770e3b2e4af14dd202f062f850f9f14820ecbb1e',
                                          'rp2040'],
     'hw/mcu/renesas/fsp': ['https://github.com/renesas/fsp.git',
                            'd52e5a6a59b7c638da860c2bb309b6e78e752ff8',

From c07928e1b3bb680cb55de3a55eae9ba3cb459694 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 10 Aug 2024 22:07:10 +0700
Subject: [PATCH 138/204] fix build with rp2040 PICO_DEFAULT_SPI rename

---
 hw/bsp/rp2040/board.h | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/rp2040/board.h b/hw/bsp/rp2040/board.h
index 3849894ce2..733e937975 100644
--- a/hw/bsp/rp2040/board.h
+++ b/hw/bsp/rp2040/board.h
@@ -78,7 +78,12 @@
 // USB Host MAX3421E
 //--------------------------------------------------------------------
 
-#define MAX3421_SPI      PICO_DEFAULT_SPI_INSTANCE
+#ifdef PICO_DEFAULT_SPI
+#define MAX3421_SPI      PICO_DEFAULT_SPI // sdk v2
+#else
+#define MAX3421_SPI      PICO_DEFAULT_SPI_INSTANCE // sdk v1
+#endif
+
 #define MAX3421_SCK_PIN  PICO_DEFAULT_SPI_SCK_PIN
 #define MAX3421_MOSI_PIN PICO_DEFAULT_SPI_TX_PIN
 #define MAX3421_MISO_PIN PICO_DEFAULT_SPI_RX_PIN

From 2871bb0da6c928f6593f7eaa7cd4e1c4c287db43 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 11 Aug 2024 00:51:51 +0700
Subject: [PATCH 139/204] fix spi_set_format() -Wnull-dereference when
 compiling with -Os

---
 .github/workflows/build_util.yml | 13 ++++++-------
 hw/bsp/rp2040/family.c           |  8 ++++++++
 2 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/.github/workflows/build_util.yml b/.github/workflows/build_util.yml
index b0a87d4df6..e983f06d16 100644
--- a/.github/workflows/build_util.yml
+++ b/.github/workflows/build_util.yml
@@ -58,11 +58,10 @@ jobs:
         shell: bash
 
       - name: Build
-        if: inputs.toolchain != 'esp-idf'
         run: |
-          python tools/build.py -s ${{ inputs.build-system }} ${{ steps.setup-toolchain.outputs.build_option }} ${{ steps.set-one-per-family.outputs.build_option }} ${{ matrix.arg }}
-
-      - name: Build using ESP-IDF docker
-        if: inputs.toolchain == 'esp-idf'
-        run: |
-          docker run --rm -v $PWD:/project -w /project espressif/idf:${{ inputs.toolchain_version }} python3 tools/build.py ${{ matrix.arg }}
+          if [ "${{ inputs.toolchain }}" == "esp-idf" ]; then
+            docker run --rm -v $PWD:/project -w /project espressif/idf:${{ inputs.toolchain_version }} python3 tools/build.py ${{ matrix.arg }}
+          else
+            python tools/build.py -s ${{ inputs.build-system }} ${{ steps.setup-toolchain.outputs.build_option }} ${{ steps.set-one-per-family.outputs.build_option }} ${{ matrix.arg }}
+          fi
+        shell: bash
diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index 9360f7f57d..250989ce97 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -275,7 +275,15 @@ static void max3421_init(void) {
   gpio_set_function(MAX3421_SCK_PIN, GPIO_FUNC_SPI);
   gpio_set_function(MAX3421_MOSI_PIN, GPIO_FUNC_SPI);
   gpio_set_function(MAX3421_MISO_PIN, GPIO_FUNC_SPI);
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wnull-dereference"
+#endif
   spi_set_format(MAX3421_SPI, 8, SPI_CPOL_0, SPI_CPHA_0, SPI_MSB_FIRST);
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
 }
 
 //// API to enable/disable MAX3421 INTR pin interrupt

From 8b88749223e969148e9d1ce4c8fd3a6756d5e38c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 11 Aug 2024 09:51:14 +0700
Subject: [PATCH 140/204] skip ch32v203 for hil test

---
 test/hil/rpi.json | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index fd00913f37..396b21553b 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -57,16 +57,16 @@
             "flasher": "openocd",
             "flasher_sn": "066FFF495087534867063844",
             "flasher_args": "-f interface/stlink.cfg -f target/stm32g0x.cfg"
-        },
+        }
+    ],
+    "boards-skip": [
         {
             "name": "nanoch32v203",
             "uid": "CDAB277B0FBC03E339E339E3",
             "flasher": "openocd_wch",
             "flasher_sn": "EBCA8F0670AF",
             "flasher_args": ""
-        }
-    ],
-    "boards-skip": [
+        },
         {
             "name": "espressif_s3_devkitm",
             "uid": "84F703C084E4",

From 7a9ef9e7bdbd915e96ed40dbe76111959a92ce9f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 11 Aug 2024 11:10:15 +0700
Subject: [PATCH 141/204] readd v203 to hil pool

---
 test/hil/rpi.json | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index 396b21553b..fd00913f37 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -57,16 +57,16 @@
             "flasher": "openocd",
             "flasher_sn": "066FFF495087534867063844",
             "flasher_args": "-f interface/stlink.cfg -f target/stm32g0x.cfg"
-        }
-    ],
-    "boards-skip": [
+        },
         {
             "name": "nanoch32v203",
             "uid": "CDAB277B0FBC03E339E339E3",
             "flasher": "openocd_wch",
             "flasher_sn": "EBCA8F0670AF",
             "flasher_args": ""
-        },
+        }
+    ],
+    "boards-skip": [
         {
             "name": "espressif_s3_devkitm",
             "uid": "84F703C084E4",

From a621c4b6fcd89df9b86d2911414e05e2e15184ec Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 12 Aug 2024 16:39:25 +0700
Subject: [PATCH 142/204] fix more race with ch32v203 and setup when queuing
 zlp. improve hil test failed output

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 22 +++--
 src/portable/st/stm32_fsdev/fsdev_type.h      |  5 +-
 test/hil/hil_test.py                          | 93 +++++++++++--------
 3 files changed, 73 insertions(+), 47 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 2529696484..1e0e9c4477 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -345,12 +345,14 @@ static void handle_ctr_rx(uint32_t ep_id) {
 
   if ((rx_count < xfer->max_packet_size) || (xfer->queued_len >= xfer->total_len)) {
     // all bytes received or short packet
-    dcd_event_xfer_complete(0, ep_num, xfer->queued_len, XFER_RESULT_SUCCESS, true);
 
     // For ch32v203: reset rx bufsize to mps to prevent race condition to cause PMAOVR (occurs with msc write10)
-    // also ch32 seems to unconditionally accept ZLP on EP0 OUT, which can incorrectly use queued_len of previous
-    // transfer. So reset total_len and queued_len to 0.
     btable_set_rx_bufsize(ep_id, BTABLE_BUF_RX, xfer->max_packet_size);
+
+    dcd_event_xfer_complete(0, ep_num, xfer->queued_len, XFER_RESULT_SUCCESS, true);
+
+    // ch32 seems to unconditionally accept ZLP on EP0 OUT, which can incorrectly use queued_len of previous
+    // transfer. So reset total_len and queued_len to 0.
     xfer->total_len = xfer->queued_len = 0;
   } else {
     // Set endpoint active again for receiving more data. Note that isochronous endpoints stay active always
@@ -412,11 +414,6 @@ void dcd_int_handler(uint8_t rhport) {
     FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_ESOF;
   }
 
-  if (int_status & USB_ISTR_PMAOVR) {
-    TU_BREAKPOINT();
-    FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_PMAOVR;
-  }
-
   // loop to handle all pending CTR interrupts
   while (FSDEV_REG->ISTR & USB_ISTR_CTR) {
     // skip DIR bit, and use CTR TX/RX instead, since there is chance we have both TX/RX completed in one interrupt
@@ -459,6 +456,11 @@ void dcd_int_handler(uint8_t rhport) {
       handle_ctr_tx(ep_id);
     }
   }
+
+  if (int_status & USB_ISTR_PMAOVR) {
+    TU_BREAKPOINT();
+    FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_PMAOVR;
+  }
 }
 
 //--------------------------------------------------------------------+
@@ -806,6 +808,10 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
   ep_write(ep_idx, ep_reg, true);
 }
 
+//--------------------------------------------------------------------+
+// PMA read/write
+//--------------------------------------------------------------------+
+
 // Write to packet memory area (PMA) from user memory
 // - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
 // - Uses unaligned for RAM (since M0 cannot access unaligned address)
diff --git a/src/portable/st/stm32_fsdev/fsdev_type.h b/src/portable/st/stm32_fsdev/fsdev_type.h
index 26717fab04..cf36576bb6 100644
--- a/src/portable/st/stm32_fsdev/fsdev_type.h
+++ b/src/portable/st/stm32_fsdev/fsdev_type.h
@@ -285,8 +285,9 @@ TU_ATTR_ALWAYS_INLINE static inline void btable_set_rx_bufsize(uint32_t ep_id, u
   /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
   uint16_t bl_nb = (blsize << 15) | ((num_block - blsize) << 10);
   if (bl_nb == 0) {
-    // zlp but 0 is invalid value, set num_block to 1 (2 bytes)
-    bl_nb = 1 << 10;
+    // zlp but 0 is invalid value, set blsize to 1 (32 bytes)
+    // Note: lower value can cause PMAOVR on setup with ch32v203
+    bl_nb = 1 << 15;
   }
 
 #ifdef FSDEV_BUS_32BIT
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index b675205764..01ca93c7a1 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -36,7 +36,7 @@
 import platform
 from multiprocessing import Pool
 
-ENUM_TIMEOUT = 30
+ENUM_TIMEOUT = 20
 
 
 # get usb serial by id
@@ -110,7 +110,8 @@ def run_cmd(cmd):
     #print(cmd)
     r = subprocess.run(cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
     if r.returncode != 0:
-        title = 'command error'
+        title = f'COMMAND FAILED: {cmd}'
+        print()
         if os.getenv('CI'):
             print(f"::group::{title}")
             print(r.stdout.decode("utf-8"))
@@ -198,14 +199,15 @@ def flash_esptool(board, firmware):
 # -------------------------------------------------------------
 # Tests
 # -------------------------------------------------------------
-def test_board_test(id):
+def test_board_test(board):
     # Dummy test
     pass
 
 
-def test_cdc_dual_ports(id):
-    port1 = get_serial_dev(id, 'TinyUSB', "TinyUSB_Device", 0)
-    port2 = get_serial_dev(id, 'TinyUSB', "TinyUSB_Device", 2)
+def test_cdc_dual_ports(board):
+    uid = board['uid']
+    port1 = get_serial_dev(uid, 'TinyUSB', "TinyUSB_Device", 0)
+    port2 = get_serial_dev(uid, 'TinyUSB', "TinyUSB_Device", 2)
 
     ser1 = open_serial_dev(port1)
     ser2 = open_serial_dev(port2)
@@ -224,9 +226,10 @@ def test_cdc_dual_ports(id):
     assert ser2.read(100) == str2.upper(), 'Port2 wrong data'
 
 
-def test_cdc_msc(id):
+def test_cdc_msc(board):
+    uid = board['uid']
     # Echo test
-    port = get_serial_dev(id, 'TinyUSB', "TinyUSB_Device", 0)
+    port = get_serial_dev(uid, 'TinyUSB', "TinyUSB_Device", 0)
     ser = open_serial_dev(port)
 
     str = b"test_str"
@@ -235,7 +238,7 @@ def test_cdc_msc(id):
     assert ser.read(100) == str, 'CDC wrong data'
 
     # Block test
-    data = read_disk_file(id, 'README.TXT')
+    data = read_disk_file(uid, 'README.TXT')
     readme = \
     b"This is tinyusb's MassStorage Class demo.\r\n\r\n\
 If you find any bugs or get any questions, feel free to file an\r\n\
@@ -244,26 +247,28 @@ def test_cdc_msc(id):
     assert data == readme, 'MSC wrong data'
 
 
-def test_cdc_msc_freertos(id):
-    test_cdc_msc(id)
+def test_cdc_msc_freertos(board):
+    test_cdc_msc(board)
 
 
-def test_dfu(id):
+def test_dfu(board):
+    uid = board['uid']
+
     # Wait device enum
     timeout = ENUM_TIMEOUT
     while timeout:
         ret = subprocess.run(f'dfu-util -l',
                              shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
         stdout = ret.stdout.decode()
-        if f'serial="{id}"' in stdout and 'Found DFU: [cafe:4000]' in stdout:
+        if f'serial="{uid}"' in stdout and 'Found DFU: [cafe:4000]' in stdout:
             break
         time.sleep(1)
         timeout = timeout - 1
 
     assert timeout, 'Device not available'
 
-    f_dfu0 = f'dfu0_{id}'
-    f_dfu1 = f'dfu1_{id}'
+    f_dfu0 = f'dfu0_{uid}'
+    f_dfu1 = f'dfu1_{uid}'
 
     # Test upload
     try:
@@ -272,10 +277,10 @@ def test_dfu(id):
     except OSError:
         pass
 
-    ret = run_cmd(f'dfu-util -S {id} -a 0 -U {f_dfu0}')
+    ret = run_cmd(f'dfu-util -S {uid} -a 0 -U {f_dfu0}')
     assert ret.returncode == 0, 'Upload failed'
 
-    ret = run_cmd(f'dfu-util -S {id} -a 1 -U {f_dfu1}')
+    ret = run_cmd(f'dfu-util -S {uid} -a 1 -U {f_dfu1}')
     assert ret.returncode == 0, 'Upload failed'
 
     with open(f_dfu0) as f:
@@ -288,14 +293,16 @@ def test_dfu(id):
     os.remove(f_dfu1)
 
 
-def test_dfu_runtime(id):
+def test_dfu_runtime(board):
+    uid = board['uid']
+
     # Wait device enum
     timeout = ENUM_TIMEOUT
     while timeout:
         ret = subprocess.run(f'dfu-util -l',
                              shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
         stdout = ret.stdout.decode()
-        if f'serial="{id}"' in stdout and 'Found Runtime: [cafe:4000]' in stdout:
+        if f'serial="{uid}"' in stdout and 'Found Runtime: [cafe:4000]' in stdout:
             break
         time.sleep(1)
         timeout = timeout - 1
@@ -303,10 +310,11 @@ def test_dfu_runtime(id):
     assert timeout, 'Device not available'
 
 
-def test_hid_boot_interface(id):
-    kbd = get_hid_dev(id, 'TinyUSB', 'TinyUSB_Device', 'event-kbd')
-    mouse1 = get_hid_dev(id, 'TinyUSB', 'TinyUSB_Device', 'if01-event-mouse')
-    mouse2 = get_hid_dev(id, 'TinyUSB', 'TinyUSB_Device', 'if01-mouse')
+def test_hid_boot_interface(board):
+    uid = board['uid']
+    kbd = get_hid_dev(uid, 'TinyUSB', 'TinyUSB_Device', 'event-kbd')
+    mouse1 = get_hid_dev(uid, 'TinyUSB', 'TinyUSB_Device', 'if01-event-mouse')
+    mouse2 = get_hid_dev(uid, 'TinyUSB', 'TinyUSB_Device', 'if01-mouse')
     # Wait device enum
     timeout = ENUM_TIMEOUT
     while timeout:
@@ -338,22 +346,23 @@ def test_hid_composite_freertos(id):
 ]
 
 
-def test_board(item):
-    name = item['name']
-    flasher = item['flasher'].lower()
+def test_board(board):
+    name = board['name']
+    flasher = board['flasher'].lower()
 
     # default to all tests
-    if 'tests' in item:
-        test_list = item['tests'] + ['board_test']
+    if 'tests' in board:
+        test_list = board['tests'] + ['board_test']
     else:
         test_list = list(all_tests)
 
     # remove skip_tests
-    if 'tests_skip' in item:
-        for skip in item['tests_skip']:
+    if 'tests_skip' in board:
+        for skip in board['tests_skip']:
             if skip in test_list:
                 test_list.remove(skip)
 
+    err_count = 0
     for test in test_list:
         fw_dir = f'cmake-build/cmake-build-{name}/device/{test}'
         if not os.path.exists(fw_dir):
@@ -367,19 +376,26 @@ def test_board(item):
 
         # flash firmware. It may fail randomly, retry a few times
         for i in range(3):
-            ret = globals()[f'flash_{flasher}'](item, fw_name)
+            ret = globals()[f'flash_{flasher}'](board, fw_name)
             if ret.returncode == 0:
                 break
             else:
                 print(f'Flashing failed, retry {i+1}')
                 time.sleep(1)
 
-        assert ret.returncode == 0, 'Flash failed\n' + ret.stdout.decode()
-
-        # run test
-        globals()[f'test_{test}'](item['uid'])
-        print('OK')
+        if ret.returncode == 0:
+            try:
+                ret = globals()[f'test_{test}'](board)
+                print('OK')
+            except AssertionError as e:
+                err_count += 1
+                print('Failed')
+                print(f'  {e}')
+        else:
+            err_count += 1
+            print('Flash failed')
 
+    return err_count
 
 def main():
     """
@@ -404,8 +420,11 @@ def main():
     else:
         config_boards = [e for e in config['boards'] if e['name'] in boards]
 
+    err_count_list = 0
     with Pool(processes=os.cpu_count()) as pool:
-        pool.map(test_board, config_boards)
+        err_count_list = pool.map(test_board, config_boards)
+
+    sys.exit(sum(err_count_list))
 
 
 if __name__ == '__main__':

From 5666aa196f99e323e025179559ef8ac1db390749 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Mon, 12 Aug 2024 15:38:22 +0200
Subject: [PATCH 143/204] Fix tusb_dir_t warning.

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 1e0e9c4477..ed9036d190 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -155,7 +155,7 @@ static uint8_t remoteWakeCountdown; // When wake is requested
 // into the stack.
 static void handle_bus_reset(uint8_t rhport);
 static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix);
-static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir);
+static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, tusb_dir_t dir);
 
 // PMA allocation/access
 static uint16_t ep_buf_ptr; ///< Points to first free memory location
@@ -578,7 +578,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
   (void)rhport;
   uint8_t const ep_addr = desc_ep->bEndpointAddress;
   uint8_t const ep_num = tu_edpt_number(ep_addr);
-  uint8_t const dir = tu_edpt_dir(ep_addr);
+  tusb_dir_t const dir = tu_edpt_dir(ep_addr);
   const uint16_t packet_size = tu_edpt_packet_size(desc_ep);
   uint8_t const ep_idx = dcd_ep_alloc(ep_addr, desc_ep->bmAttributes.xfer);
   TU_ASSERT(ep_idx < FSDEV_EP_COUNT);
@@ -671,7 +671,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
   (void)rhport;
   uint8_t const ep_addr = desc_ep->bEndpointAddress;
   uint8_t const ep_num = tu_edpt_number(ep_addr);
-  uint8_t const dir = tu_edpt_dir(ep_addr);
+  tusb_dir_t const dir = tu_edpt_dir(ep_addr);
   xfer_ctl_t* xfer = xfer_ctl_ptr(ep_num, dir);
 
   uint8_t const ep_idx = xfer->ep_idx;
@@ -683,7 +683,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
   ep_change_status(&ep_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
   ep_change_status(&ep_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
   ep_change_dtog(&ep_reg, dir, 0);
-  ep_change_dtog(&ep_reg, 1 - dir, 1);
+  ep_change_dtog(&ep_reg, (tusb_dir_t)(1 - dir), 1);
 
   ep_write(ep_idx, ep_reg, true);
 
@@ -722,7 +722,7 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   ep_write(ep_ix, ep_reg, true);
 }
 
-static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir) {
+static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, tusb_dir_t dir) {
   (void) rhport;
 
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, dir);
@@ -752,7 +752,7 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, uint8_t dir) {
 
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes) {
   uint8_t const ep_num = tu_edpt_number(ep_addr);
-  uint8_t const dir = tu_edpt_dir(ep_addr);
+  tusb_dir_t const dir = tu_edpt_dir(ep_addr);
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, dir);
 
   xfer->buffer = buffer;
@@ -765,7 +765,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to
 
 bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t *ff, uint16_t total_bytes) {
   uint8_t const ep_num = tu_edpt_number(ep_addr);
-  uint8_t const dir = tu_edpt_dir(ep_addr);
+  tusb_dir_t const dir = tu_edpt_dir(ep_addr);
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, dir);
 
   xfer->buffer = NULL;
@@ -779,7 +779,7 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t *ff, uint16_t
 void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
   (void)rhport;
   uint8_t const ep_num = tu_edpt_number(ep_addr);
-  uint8_t const dir = tu_edpt_dir(ep_addr);
+  tusb_dir_t const dir = tu_edpt_dir(ep_addr);
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, dir);
   uint8_t const ep_idx = xfer->ep_idx;
 
@@ -794,7 +794,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
   (void)rhport;
 
   uint8_t const ep_num = tu_edpt_number(ep_addr);
-  uint8_t const dir = tu_edpt_dir(ep_addr);
+  tusb_dir_t const dir = tu_edpt_dir(ep_addr);
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, dir);
   uint8_t const ep_idx = xfer->ep_idx;
 

From 549f20d1793d1896a376a1ea978a4f02217de4ed Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Mon, 12 Aug 2024 15:39:02 +0200
Subject: [PATCH 144/204] Fix buf_id read for ISO transfer.

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index ed9036d190..0cdc3eef92 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -275,7 +275,6 @@ static void handle_bus_reset(uint8_t rhport) {
 // Handle CTR interrupt for the TX/IN direction
 static void handle_ctr_tx(uint32_t ep_id) {
   uint32_t ep_reg = ep_read(ep_id) | USB_EP_CTR_TX | USB_EP_CTR_RX;
-  ep_reg &= USB_EPREG_MASK;
 
   uint8_t const ep_num = ep_reg & USB_EPADDR_FIELD;
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_num, TUSB_DIR_IN);
@@ -694,7 +693,6 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep)
 static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   uint16_t len = tu_min16(xfer->total_len - xfer->queued_len, xfer->max_packet_size);
   uint32_t ep_reg = ep_read(ep_ix) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR
-  ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(TUSB_DIR_IN); // only change TX Status, reserve other toggle bits
 
   bool const is_iso = ep_is_iso(ep_reg);
 
@@ -719,6 +717,7 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   if (is_iso) {
     xfer->iso_in_sending = true;
   }
+  ep_reg &= USB_EPREG_MASK | EP_STAT_MASK(TUSB_DIR_IN); // only change TX Status, reserve other toggle bits
   ep_write(ep_ix, ep_reg, true);
 }
 

From f565267dafe63a8f92e53ba5e511f07ea34eaaa4 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Mon, 12 Aug 2024 18:32:51 +0200
Subject: [PATCH 145/204] Fix stm32l0 clock init.

---
 hw/bsp/stm32l0/boards/stm32l052dap52/board.h  | 9 +++++----
 hw/bsp/stm32l0/boards/stm32l0538disco/board.h | 9 +++++----
 2 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/hw/bsp/stm32l0/boards/stm32l052dap52/board.h b/hw/bsp/stm32l0/boards/stm32l052dap52/board.h
index c8963199b5..ee83bbcbcd 100644
--- a/hw/bsp/stm32l0/boards/stm32l052dap52/board.h
+++ b/hw/bsp/stm32l0/boards/stm32l052dap52/board.h
@@ -54,16 +54,17 @@
 //--------------------------------------------------------------------+
 static inline void board_stm32l0_clock_init(void)
 {
-  RCC_ClkInitTypeDef RCC_ClkInitStruct;
-  RCC_OscInitTypeDef RCC_OscInitStruct;
-  RCC_PeriphCLKInitTypeDef  PeriphClkInitStruct;
-  static RCC_CRSInitTypeDef RCC_CRSInitStruct;
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef  PeriphClkInitStruct = {0};
+  RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
 
   /* Enable HSI Oscillator to be used as System clock source
      Enable HSI48 Oscillator to be used as USB clock source */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
   RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
   HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
   /* Select HSI48 as USB clock source */
diff --git a/hw/bsp/stm32l0/boards/stm32l0538disco/board.h b/hw/bsp/stm32l0/boards/stm32l0538disco/board.h
index 0722e31024..5cda1c15a6 100644
--- a/hw/bsp/stm32l0/boards/stm32l0538disco/board.h
+++ b/hw/bsp/stm32l0/boards/stm32l0538disco/board.h
@@ -54,16 +54,17 @@
 //--------------------------------------------------------------------+
 static inline void board_stm32l0_clock_init(void)
 {
-  RCC_ClkInitTypeDef RCC_ClkInitStruct;
-  RCC_OscInitTypeDef RCC_OscInitStruct;
-  RCC_PeriphCLKInitTypeDef  PeriphClkInitStruct;
-  static RCC_CRSInitTypeDef RCC_CRSInitStruct;
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef  PeriphClkInitStruct = {0};
+  RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
 
   /* Enable HSI Oscillator to be used as System clock source
      Enable HSI48 Oscillator to be used as USB clock source */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
   RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
   HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
   /* Select HSI48 as USB clock source */

From 96c5c72e971674ba3a4023aed02bf31cc8c994dc Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Mon, 12 Aug 2024 18:38:23 +0200
Subject: [PATCH 146/204] Fix double buffer not disabled for smaller devices.

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 0cdc3eef92..6eea1ab32b 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -650,10 +650,11 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
 
   /* Create a packet memory buffer area. Enable double buffering for devices with 2048 bytes PMA,
      for smaller devices double buffering occupy too much space. */
-  uint32_t pma_addr = dcd_pma_alloc(largest_packet_size, true);
 #if FSDEV_PMA_SIZE > 1024u
+  uint32_t pma_addr = dcd_pma_alloc(largest_packet_size, true);
   uint16_t pma_addr2 = pma_addr >> 16;
 #else
+  uint32_t pma_addr = dcd_pma_alloc(largest_packet_size, false);
   uint16_t pma_addr2 = pma_addr;
 #endif
 

From ad411b6c252265676d9a61f77fd8a5c26465b392 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 13 Aug 2024 10:55:17 +0700
Subject: [PATCH 147/204] minor update to cmake profile

---
 .idea/cmake.xml                               | 114 +++++++++---------
 .../boards/stm32f103ze_iar/board.cmake        |   1 +
 .../boards/stm32l0538disco/board.cmake        |   1 +
 3 files changed, 59 insertions(+), 57 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index bf5696725a..729309ebb1 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -4,140 +4,140 @@
     <configurations>
       <configuration PROFILE_NAME="pico" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=1" />
       <configuration PROFILE_NAME="pico pio-host" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=1 -DCFLAGS_CLI=&quot;-DCFG_TUH_RPI_PIO_USB=1&quot;" />
-      <configuration PROFILE_NAME="feather_rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pico_sdk -DPICO_BOARD=adafruit_feather_rp2040 -DLOG=2" />
-      <configuration PROFILE_NAME="feather_rp2040_max3421" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_rp2040_max3421 -DLOG=2" />
-      <configuration PROFILE_NAME="metro_rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pico_sdk -DPICO_BOARD=adafruit_metro_rp2040 -DLOG=2 -DMAX3421_HOST=1" />
-      <configuration PROFILE_NAME="feather esp32s2" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=adafruit_feather_esp32s2 -DMAX3421_HOST=1 -DLOG=2">
+      <configuration PROFILE_NAME="feather_rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pico_sdk -DPICO_BOARD=adafruit_feather_rp2040 -DLOG=1" />
+      <configuration PROFILE_NAME="feather_rp2040_max3421" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_rp2040_max3421 -DLOG=1" />
+      <configuration PROFILE_NAME="metro_rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pico_sdk -DPICO_BOARD=adafruit_metro_rp2040 -DLOG=1 -DMAX3421_HOST=1" />
+      <configuration PROFILE_NAME="feather esp32s2" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=adafruit_feather_esp32s2 -DMAX3421_HOST=1 -DLOG=1">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="metro esp32s2" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=adafruit_metro_esp32s2 -DMAX3421_HOST=1 -DLOG=2">
+      <configuration PROFILE_NAME="metro esp32s2" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=adafruit_metro_esp32s2 -DMAX3421_HOST=1 -DLOG=1">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="kaluga" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_kaluga_1 -DMAX3421_HOST=1 -DLOG=2">
+      <configuration PROFILE_NAME="kaluga" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_kaluga_1 -DMAX3421_HOST=1 -DLOG=1">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="feather esp32s3" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=adafruit_feather_esp32s3 -DMAX3421_HOST=1 -DLOG=2">
+      <configuration PROFILE_NAME="feather esp32s3" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=adafruit_feather_esp32s3 -DMAX3421_HOST=1 -DLOG=1">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="espressif_s3_devkitc" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_s3_devkitc -DMAX3421_HOST=1 -DLOG=2">
+      <configuration PROFILE_NAME="espressif_s3_devkitc" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_s3_devkitc -DMAX3421_HOST=1 -DLOG=1">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="adafruit_metro_esp32s2" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=adafruit_metro_esp32s2 -DMAX3421_HOST=1 -DLOG=2">
+      <configuration PROFILE_NAME="adafruit_metro_esp32s2" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=adafruit_metro_esp32s2 -DMAX3421_HOST=1 -DLOG=1">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="adafruit_feather_esp32_v2" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=adafruit_feather_esp32_v2 -DMAX3421_HOST=1 -DLOG=2">
+      <configuration PROFILE_NAME="adafruit_feather_esp32_v2" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=adafruit_feather_esp32_v2 -DMAX3421_HOST=1 -DLOG=1">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="espressif_c3_devkitc" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_c3_devkitc -DMAX3421_HOST=1 -DLOG=2">
+      <configuration PROFILE_NAME="espressif_c3_devkitc" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_c3_devkitc -DMAX3421_HOST=1 -DLOG=1">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="feather_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_m0_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
-      <configuration PROFILE_NAME="metro_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
-      <configuration PROFILE_NAME="feather_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
+      <configuration PROFILE_NAME="feather_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_m0_express -DLOG=1 -DLOGGER=RTT -DMAX3421_HOST=1" />
+      <configuration PROFILE_NAME="metro_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=1 -DLOGGER=RTT -DMAX3421_HOST=1" />
+      <configuration PROFILE_NAME="feather_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_m4_express -DLOG=1 -DLOGGER=RTT -DMAX3421_HOST=1" />
       <configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express" />
       <configuration PROFILE_NAME="itsybitsy_m4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=itsybitsy_m4" />
-      <configuration PROFILE_NAME="same54_xplained" ENABLED="false" GENERATION_OPTIONS="-DBOARD=same54_xplained -DLOG=2 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="same54_xplained" ENABLED="false" GENERATION_OPTIONS="-DBOARD=same54_xplained -DLOG=1 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="feather_nrf52840_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_nrf52840_express -DLOG=1 -DLOGGER=RTT -DMAX3421_HOST=1" />
-      <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="metro m7 1011 sd" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011_sd -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="metro_m7_1011" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1060_evk -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="rt1170 evkb" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1170_evkb -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="lpcxpresso1769" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso1769 -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcb1800 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="ea4088 quickstart" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4088_quickstart -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="ea4357" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4357 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="metro m7 1011 sd" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011_sd -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="metro_m7_1011" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1060_evk -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="rt1170 evkb" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1170_evkb -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="lpcxpresso1769" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso1769 -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcb1800 -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="ea4088 quickstart" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4088_quickstart -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="ea4357" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4357 -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="lpc5414" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso54114 -DLOG=1 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="lpc54628" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso54628 -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso55s69 -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="mcxn947brk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcxn947brk -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="frdm_mcxa153" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_mcxa153 -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="frdm_kl25z" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_kl25z -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="lpc54628" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso54628 -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso55s69 -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="mcxn947brk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcxn947brk -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="frdm_mcxa153" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_mcxa153 -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="frdm_kl25z" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_kl25z -DLOG=1 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="frdm_k32l2a4s" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_k32l2a4s" />
-      <configuration PROFILE_NAME="frdm_k64f" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_k64f -DLOG=2 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="frdm_k64f" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_k64f -DLOG=1 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32f072disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f072disco -DLOG=0 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32f103_mini_2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f103_mini_2 -DLOG=1 -DLOGGGER=RTT" />
       <configuration PROFILE_NAME="stm32f103ze_iar" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f103ze_iar -DLOG=1 -DLOGGGER=RTT" />
-      <configuration PROFILE_NAME="stm32f207nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f207nucleo -DLOG=2 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="stm32f207nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f207nucleo -DLOG=1 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32f303disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f303disco -DLOG=0 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="stm32f411disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f411disco -DLOG=2 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="stm32f769disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f769disco -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="stm32f411disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f411disco -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="stm32f769disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f769disco -DLOG=1 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32g0b1nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32g0b1nucleo" />
       <configuration PROFILE_NAME="stm32g474nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32g474nucleo" />
-      <configuration PROFILE_NAME="b_g474e_dpow1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=b_g474e_dpow1 -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="b_g474e_dpow1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=b_g474e_dpow1 -DLOG=1 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32h563nucleo" ENABLED="false" GENERATION_OPTIONS="-DBOARD=stm32h563nucleo -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="stm32h743eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="stm32h743nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743nucleo -DLOG=3" />
+      <configuration PROFILE_NAME="stm32h743eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="stm32h743nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743nucleo -DLOG=1" />
       <configuration PROFILE_NAME="stm32l0538disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l0538disco -DLOG=0 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32l476disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l476disco" />
-      <configuration PROFILE_NAME="stm32u575nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32u575nucleo -DLOG=2 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="stm32u5a5nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32u5a5nucleo -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="stm32u575nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32u575nucleo -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="stm32u5a5nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32u5a5nucleo -DLOG=1 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32wb55nucleo" ENABLED="false" GENERATION_OPTIONS="-DBOARD=stm32wb55nucleo" />
-      <configuration PROFILE_NAME="ra2a1_ek" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra2a1_ek -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="ra4m1_ek" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra4m1_ek -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="ra6m1_ek" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m1_ek -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="ra6m5_ek" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="ra6m5_ek PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
+      <configuration PROFILE_NAME="ra2a1_ek" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra2a1_ek -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="ra4m1_ek" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra4m1_ek -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="ra6m1_ek" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m1_ek -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="ra6m5_ek" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="ra6m5_ek PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
       <configuration PROFILE_NAME="uno_r4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=uno_r4 -DLOG=4 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
+      <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=1" />
       <configuration PROFILE_NAME="msp430f5529" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=msp_exp430f5529lp" />
-      <configuration PROFILE_NAME="raspberrypi_zero" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_zero -DLOG=2" />
-      <configuration PROFILE_NAME="raspberrypi_cm4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_cm4 -DLOG=2" />
-      <configuration PROFILE_NAME="raspberrypi_zero2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_zero2 -DLOG=2" />
+      <configuration PROFILE_NAME="raspberrypi_zero" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_zero -DLOG=1" />
+      <configuration PROFILE_NAME="raspberrypi_cm4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_cm4 -DLOG=1" />
+      <configuration PROFILE_NAME="raspberrypi_zero2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_zero2 -DLOG=1" />
       <configuration PROFILE_NAME="lpcxpresso11u37" ENABLED="false" GENERATION_OPTIONS="-DBOARD=lpcxpresso11u37" />
-      <configuration PROFILE_NAME="lpcxpresso11u68" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso11u68 -DLOG=2 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="lpcxpresso1347" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso1347 -DLOG=2 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="lpcxpresso1549" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso1549 -DLOG=2 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="lpcxpresso51u68" ENABLED="false" CONFIG_NAME="Debug" TOOLCHAIN_NAME="armclang 17.0.1" GENERATION_OPTIONS="-DBOARD=lpcxpresso51u68 -DLOG=2 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="msp_exp432e401y" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=msp_exp432e401y -DLOG=2" />
+      <configuration PROFILE_NAME="lpcxpresso11u68" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso11u68 -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="lpcxpresso1347" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso1347 -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="lpcxpresso1549" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso1549 -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="lpcxpresso51u68" ENABLED="false" CONFIG_NAME="Debug" TOOLCHAIN_NAME="armclang 17.0.1" GENERATION_OPTIONS="-DBOARD=lpcxpresso51u68 -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="msp_exp432e401y" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=msp_exp432e401y -DLOG=1" />
       <configuration PROFILE_NAME="atsaml21_xpro" ENABLED="false" GENERATION_OPTIONS="-DBOARD=atsaml21_xpro" />
       <configuration PROFILE_NAME="samd11_xplained" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=samd11_xplained" />
       <configuration PROFILE_NAME="ek_tm4c123gxl" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=ek_tm4c123gxl" />
-      <configuration PROFILE_NAME="xmc4500_relax" ENABLED="false" GENERATION_OPTIONS="-DBOARD=xmc4500_relax -DLOG=2 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="xmc4500_relax" ENABLED="false" GENERATION_OPTIONS="-DBOARD=xmc4500_relax -DLOG=1 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="f1c100s" ENABLED="false" GENERATION_OPTIONS="-DBOARD=f1c100s" />
       <configuration PROFILE_NAME="mm32f327x_mb39" ENABLED="false" GENERATION_OPTIONS="-DBOARD=mm32f327x_mb39" />
       <configuration PROFILE_NAME="samg55_xplained" ENABLED="false" GENERATION_OPTIONS="-DBOARD=samg55_xplained" />
       <configuration PROFILE_NAME="fomu" ENABLED="false" GENERATION_OPTIONS="-DBOARD=fomu" />
       <configuration PROFILE_NAME="sipeed_longan_nano" ENABLED="false" GENERATION_OPTIONS="-DBOARD=sipeed_longan_nano" />
-      <configuration PROFILE_NAME="nanoch32v203" ENABLED="false" GENERATION_OPTIONS="-DBOARD=nanoch32v203" />
+      <configuration PROFILE_NAME="nanoch32v203" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=nanoch32v203" />
       <configuration PROFILE_NAME="ch32v203c_r0_1v0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ch32v203c_r0_1v0 -DLOG=0" />
       <configuration PROFILE_NAME="ch32v203c_r0_1v0 USBFS" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ch32v203c_r0_1v0 -DPORT=1" />
       <configuration PROFILE_NAME="ch32v203g_r0_1v0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ch32v203g_r0_1v0" />
-      <configuration PROFILE_NAME="ch32v307v_r1_1v0" ENABLED="false" GENERATION_OPTIONS="-DBOARD=ch32v307v_r1_1v0 -DLOG=2" />
+      <configuration PROFILE_NAME="ch32v307v_r1_1v0" ENABLED="false" GENERATION_OPTIONS="-DBOARD=ch32v307v_r1_1v0 -DLOG=1" />
       <configuration PROFILE_NAME="ch32v307v_r1_1v0 USBFS" ENABLED="false" GENERATION_OPTIONS="-DBOARD=ch32v307v_r1_1v0 -DSPEED=full" />
       <configuration PROFILE_NAME="da14695_dk_usb" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=da14695_dk_usb" />
     </configurations>
diff --git a/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.cmake b/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.cmake
index c797d7090a..7672ff3381 100644
--- a/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.cmake
+++ b/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.cmake
@@ -1,5 +1,6 @@
 set(MCU_VARIANT stm32f103xe)
 set(JLINK_DEVICE stm32f103ze)
+#set(JLINK_OPTION "-USB 320000338")
 
 string(TOUPPER ${MCU_VARIANT} MCU_VARIANT_UPPER)
 
diff --git a/hw/bsp/stm32l0/boards/stm32l0538disco/board.cmake b/hw/bsp/stm32l0/boards/stm32l0538disco/board.cmake
index 8d7b537d54..895bbb3abc 100644
--- a/hw/bsp/stm32l0/boards/stm32l0538disco/board.cmake
+++ b/hw/bsp/stm32l0/boards/stm32l0538disco/board.cmake
@@ -1,5 +1,6 @@
 set(MCU_VARIANT stm32l053xx)
 set(JLINK_DEVICE stm32l053r8)
+#set(JLINK_OPTION "-USB 778921770")
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32L053C8Tx_FLASH.ld)
 

From 45f50ebaa8dd4d2542d2db8fe51783803c8698be Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 13 Aug 2024 11:04:53 +0700
Subject: [PATCH 148/204] increase enum timeout

---
 test/hil/hil_test.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 01ca93c7a1..597d6c5cae 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -36,7 +36,7 @@
 import platform
 from multiprocessing import Pool
 
-ENUM_TIMEOUT = 20
+ENUM_TIMEOUT = 30
 
 
 # get usb serial by id

From 61725a5263b6820051d515fcb716e4a91c13cdac Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 13 Aug 2024 13:16:46 +0700
Subject: [PATCH 149/204] fix concurrent mass storage test conflict, use
 pyfatfs to access disk dev by usb id instead of mounted in /media/

---
 test/hil/hil_test.py | 38 +++++++++++++++++++-------------------
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 597d6c5cae..9a7fe83216 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -33,8 +33,8 @@
 import subprocess
 import json
 import glob
-import platform
 from multiprocessing import Pool
+import fs
 
 ENUM_TIMEOUT = 30
 
@@ -53,9 +53,8 @@ def get_serial_dev(id, vendor_str, product_str, ifnum):
         return port_list[0]
 
 
-# Currently not used, left as reference
+# get usb disk by id
 def get_disk_dev(id, vendor_str, lun):
-    # get usb disk by id
     return f'/dev/disk/by-id/usb-{vendor_str}_Mass_Storage_{id}-0:{lun}'
 
 
@@ -72,34 +71,34 @@ def open_serial_dev(port):
                 # slight delay since kernel may occupy the port briefly
                 time.sleep(0.5)
                 timeout = timeout - 0.5
-                ser = serial.Serial(port, timeout=1)
+                ser = serial.Serial(port, timeout=2)
                 break
             except serial.SerialException:
                 pass
         time.sleep(0.5)
         timeout = timeout - 0.5
-    assert timeout, 'Device not available or Cannot open port'
+
+    assert timeout, f'Cannot open port f{port}' if os.path.exists(port) else f'Port {port} not existed'
     return ser
 
 
-def read_disk_file(id, fname):
-    # on different self-hosted, the mount point is different
-    file_list = [
-        f'/media/blkUSB_{id[-8:]}.02/{fname}',
-        f'/media/{os.getenv("USER")}/TinyUSB MSC/{fname}'
-    ]
+def read_disk_file(uid, lun, fname):
+    # open_fs("fat://{dev}) require 'pip install pyfatfs'
+    dev = get_disk_dev(uid, 'TinyUSB', lun)
     timeout = ENUM_TIMEOUT
     while timeout:
-        for file in file_list:
-            if os.path.isfile(file):
-                with open(file, 'rb') as f:
-                    data = f.read()
-                    return data
-
+        if os.path.exists(dev):
+            fat = fs.open_fs(f'fat://{dev}')
+            try:
+                assert fat.exists(fname), f'File {fname} not found in {dev}'
+                with fat.open(fname, 'rb') as f:
+                    return f.read()
+            finally:
+                fat.close()
         time.sleep(1)
         timeout = timeout - 1
 
-    assert timeout, 'Device not available'
+    assert timeout, f'Storage {dev} not existed'
     return None
 
 
@@ -238,7 +237,7 @@ def test_cdc_msc(board):
     assert ser.read(100) == str, 'CDC wrong data'
 
     # Block test
-    data = read_disk_file(uid, 'README.TXT')
+    data = read_disk_file(uid,0,'README.TXT')
     readme = \
     b"This is tinyusb's MassStorage Class demo.\r\n\r\n\
 If you find any bugs or get any questions, feel free to file an\r\n\
@@ -397,6 +396,7 @@ def test_board(board):
 
     return err_count
 
+
 def main():
     """
     Hardware test on specified boards

From f23170786abe8bde0a00065987674f6ff66104c5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 13 Aug 2024 13:50:19 +0700
Subject: [PATCH 150/204] increase pyserial timeout

---
 test/hil/hil_test.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 9a7fe83216..ff8034b95e 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -71,7 +71,7 @@ def open_serial_dev(port):
                 # slight delay since kernel may occupy the port briefly
                 time.sleep(0.5)
                 timeout = timeout - 0.5
-                ser = serial.Serial(port, timeout=2)
+                ser = serial.Serial(port, timeout=5)
                 break
             except serial.SerialException:
                 pass

From 525406597627fb9307425539b86dddf10278eca8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 13 Aug 2024 13:51:28 +0700
Subject: [PATCH 151/204] change pio-usb back to upstreaam

---
 tools/get_deps.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/get_deps.py b/tools/get_deps.py
index c7cf6ca63b..b639ed6d68 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -54,8 +54,8 @@
     'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git',
                             '144f1eb7ea8c06512e12f12b27383601c0272410',
                             'kinetis_k kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt'],
-    'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/adafruit/Pico-PIO-USB.git',
-                                         '770e3b2e4af14dd202f062f850f9f14820ecbb1e',
+    'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
+                                         '7902e9fa8ed4a271d8d1d5e7e50516c2292b7bc2',
                                          'rp2040'],
     'hw/mcu/renesas/fsp': ['https://github.com/renesas/fsp.git',
                            'd52e5a6a59b7c638da860c2bb309b6e78e752ff8',

From 5f8599f6d44c1b1741f3e0edf0d342720c0c17d8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 13 Aug 2024 14:35:42 +0700
Subject: [PATCH 152/204] metro m7 has issue with cdc_msc example randomly on
 hil test. Exclude it for now

---
 test/hil/hil_test.py | 11 ++++++-----
 test/hil/rpi.json    |  2 ++
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index ff8034b95e..c6feb7de25 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -88,15 +88,16 @@ def read_disk_file(uid, lun, fname):
     timeout = ENUM_TIMEOUT
     while timeout:
         if os.path.exists(dev):
-            fat = fs.open_fs(f'fat://{dev}')
+            fat = fs.open_fs(f'fat://{dev}?read_only=true')
             try:
-                assert fat.exists(fname), f'File {fname} not found in {dev}'
                 with fat.open(fname, 'rb') as f:
-                    return f.read()
+                    data = f.read()
             finally:
                 fat.close()
+            assert data, f'Cannot read file {fname} from {dev}'
+            return data
         time.sleep(1)
-        timeout = timeout - 1
+        timeout -= 1
 
     assert timeout, f'Storage {dev} not existed'
     return None
@@ -322,7 +323,7 @@ def test_hid_boot_interface(board):
         time.sleep(1)
         timeout = timeout - 1
 
-    assert timeout, 'Device not available'
+    assert timeout, 'HID device not available'
 
 
 def test_hid_composite_freertos(id):
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index fd00913f37..a4f6073eb0 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -17,6 +17,8 @@
         {
             "name": "metro_m7_1011",
             "uid": "9CE8715DD71137363E00005002004200",
+            "tests_skip": ["cdc_msc", "cdc_msc_freertos"],
+            "comment": "Somehow has issue with cdc_msc example randomly",
             "flasher": "jlink",
             "flasher_sn": "000611000000",
             "flasher_args": "-device MIMXRT1011xxx5A"

From 0f732a2f8b83ba5a6eebacf4ded73a682214591e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 13 Aug 2024 14:50:54 +0700
Subject: [PATCH 153/204] remove metro m7 for now

---
 test/hil/hil_test.py |  2 +-
 test/hil/rpi.json    | 17 ++++++++---------
 2 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index c6feb7de25..c2ed4d94e2 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -387,7 +387,7 @@ def test_board(board):
             try:
                 ret = globals()[f'test_{test}'](board)
                 print('OK')
-            except AssertionError as e:
+            except Exception as e:
                 err_count += 1
                 print('Failed')
                 print(f'  {e}')
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index a4f6073eb0..5f218d0732 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -14,15 +14,6 @@
             "flasher_sn": "E6614C311B597D32",
             "flasher_args": "-f interface/cmsis-dap.cfg -f target/atsame5x.cfg -c \"adapter speed 5000\""
         },
-        {
-            "name": "metro_m7_1011",
-            "uid": "9CE8715DD71137363E00005002004200",
-            "tests_skip": ["cdc_msc", "cdc_msc_freertos"],
-            "comment": "Somehow has issue with cdc_msc example randomly",
-            "flasher": "jlink",
-            "flasher_sn": "000611000000",
-            "flasher_args": "-device MIMXRT1011xxx5A"
-        },
         {
             "name": "lpcxpresso11u37",
             "uid": "17121919",
@@ -69,6 +60,14 @@
         }
     ],
     "boards-skip": [
+        {
+            "name": "metro_m7_1011",
+            "uid": "9CE8715DD71137363E00005002004200",
+            "flasher": "jlink",
+            "flasher_sn": "000611000000",
+            "flasher_args": "-device MIMXRT1011xxx5A",
+            "comment": "sometime it is not enumerated/not reset, maybe need an bsp explicit disconnect/reconnect"
+        },
         {
             "name": "espressif_s3_devkitm",
             "uid": "84F703C084E4",

From 86419df42c3220a867a3ffbc22140e11b7ad57ee Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 13 Aug 2024 16:01:51 +0700
Subject: [PATCH 154/204] use zero wait flash for nano v203

---
 hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake | 4 ++--
 test/hil/hil_test.py                            | 2 +-
 test/hil/rpi.json                               | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake b/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake
index a0bf12b5ca..6c7712cdd5 100644
--- a/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake
+++ b/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake
@@ -1,8 +1,8 @@
 set(MCU_VARIANT D6)
 
 # 64KB zero-wait, 224KB total flash
-#set(LD_FLASH_SIZE 64K)
-set(LD_FLASH_SIZE 224K)
+set(LD_FLASH_SIZE 64K)
+#set(LD_FLASH_SIZE 224K)
 set(LD_RAM_SIZE 20K)
 
 function(update_board TARGET)
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index c2ed4d94e2..486f0d2ebf 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -338,8 +338,8 @@ def test_hid_composite_freertos(id):
 all_tests = [
     'cdc_dual_ports',
     'cdc_msc',
-    'cdc_msc_freertos',
     'dfu',
+    'cdc_msc_freertos',  # dont test 2 cdc_msc next to each other, since they have same vid/pid. Can be confused by host
     'dfu_runtime',
     'hid_boot_interface',
     'board_test'
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index 5f218d0732..688ea38220 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -66,7 +66,7 @@
             "flasher": "jlink",
             "flasher_sn": "000611000000",
             "flasher_args": "-device MIMXRT1011xxx5A",
-            "comment": "sometime it is not enumerated/not reset, maybe need an bsp explicit disconnect/reconnect"
+            "comment": "not running reliably in bulk with other boards, probably power, flashing etc .."
         },
         {
             "name": "espressif_s3_devkitm",

From b8d3c0c4a8e005bcfcc4ed04556e6da54f235ccc Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Tue, 13 Aug 2024 23:57:01 +0700
Subject: [PATCH 155/204] Circi dynamic config (#2763)

Circleci
* build cmake armgcc and arm clang on circleci
* use docker medium+
---
 .circleci/config.yml        | 105 +++++++++---------------------------
 .circleci/config2.yml       |  98 +++++++++++++++++++++++++++++++++
 .github/workflows/build.yml |  19 +++++--
 tools/build_utils.py        |  32 ++++++-----
 4 files changed, 155 insertions(+), 99 deletions(-)
 create mode 100644 .circleci/config2.yml

diff --git a/.circleci/config.yml b/.circleci/config.yml
index 7b36bed7c1..4d541a595e 100644
--- a/.circleci/config.yml
+++ b/.circleci/config.yml
@@ -1,92 +1,39 @@
 version: 2.1
 
-commands:
-  setup-toolchain:
-    parameters:
-        toolchain:
-            type: string
-        toolchain_url:
-            type: string
-    steps:
-#      - run:
-#          name: Make toolchain cache key
-#          command: echo "<< parameters.toolchain >>-<< parameters.toolchain_url>>" > toolchain_key
-#      - restore_cache:
-#          name: Restore Toolchain Cache
-#          key: deps-{{ checksum "toolchain_key" }}
-#          paths:
-#            - ~/cache/<< parameters.toolchain >>
-      - run:
-          name: Install Toolchain
-          command: |
-            # Only download if folder does not exist (not cached)
-            if [ ! -d ~/cache/<< parameters.toolchain >> ]; then
-              mkdir -p ~/cache/<< parameters.toolchain >>
-              wget << parameters.toolchain_url>> -O toolchain.tar.gz
-              tar -C ~/cache/<< parameters.toolchain >> -xaf toolchain.tar.gz
-            fi
-#      - save_cache:
-#          name: Save Toolchain Cache
-#          key: deps-{{ checksum "toolchain_key" }}
-#          paths:
-#            - ~/cache/<< parameters.toolchain >>
-      - run:
-          name: Setup build environment
-          command: |
-            echo "export PATH=$PATH:`echo ~/cache/<< parameters.toolchain >>/*/bin`" >> $BASH_ENV
-            # Install Ninja
-            NINJA_URL=https://github.com/ninja-build/ninja/releases/download/v1.12.1/ninja-linux.zip
-            wget $NINJA_URL -O ninja-linux.zip
-            unzip ninja-linux.zip -d ~/bin
-
-  get-deps:
-    parameters:
-      family:
-        type: string
-    steps:
-      - run:
-          name: Get Dependencies
-          command: |
-            python tools/get_deps.py << parameters.family >>
+setup: true
+orbs:
+  continuation: circleci/continuation@1
 
 jobs:
-  arm-clang:
-    parameters:
-      family:
-        type: string
-      build-system:
-        type: string
-
+  set-matrix:
+    executor: continuation/default
     docker:
       - image: cimg/base:current
-    resource_class: medium
-    environment:
-      TOOLCHAIN_URL: https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm/releases/download/release-17.0.1/LLVMEmbeddedToolchainForArm-17.0.1-Linux-x86_64.tar.xz
+    resource_class: small
     steps:
       - checkout
-      - setup-toolchain:
-          toolchain: clang
-          toolchain_url: $TOOLCHAIN_URL
-      - get-deps:
-          family: << parameters.family >>
       - run:
-          name: Build
+          name: Set matrix
           command: |
-            # Only build one board per family for non PRs i.e commit to master
-            ONE_PER_FAMILY=""
-            if [ -z "$CIRCLE_PULL_REQUEST" ]; then
-              ONE_PER_FAMILY="--one-per-family"
-            fi
-            python tools/build.py $ONE_PER_FAMILY -s << parameters.build-system >> --toolchain clang << parameters.family >>
+            MATRIX_JSON=$(python .github/workflows/ci_set_matrix.py)
+            echo "MATRIX_JSON=$MATRIX_JSON"
+
+            TOOLCHAIN_LIST=("arm-clang" "arm-gcc")
+            for toolchain in "${TOOLCHAIN_LIST[@]}"; do
+              FAMILY=$(echo $MATRIX_JSON | jq -r ".\"$toolchain\".family")
+              echo "${toolchain}_FAMILY=$FAMILY"
+              echo "      - build:" >> .circleci/config2.yml
+              echo "          matrix:" >> .circleci/config2.yml
+              echo "            parameters:" >> .circleci/config2.yml
+              echo "              toolchain: ['$toolchain']" >> .circleci/config2.yml
+              echo "              build-system: ['cmake']" >> .circleci/config2.yml
+              echo "              family: $FAMILY" >> .circleci/config2.yml
+            done
+
+      - continuation/continue:
+          configuration_path: .circleci/config2.yml
 
 workflows:
-  build:
+  set-matrix:
     jobs:
-      - arm-clang:
-          matrix:
-            parameters:
-              build-system:
-                - cmake
-              #family: ['stm32f1']
-              #family: ['stm32f1', 'stm32f2']
-              family: ['imxrt', 'kinetis_k kinetis_kl kinetis_k32l2', 'lpc11 lpc13 lpc15', 'lpc17 lpc18 lpc40 lpc43', 'lpc51 lpc54 lpc55', 'nrf', 'samd11 samd21 saml2x', 'samd5x_e5x samg', 'stm32f0 stm32f1 stm32f2 stm32f3', 'stm32f4', 'stm32f7', 'stm32g0 stm32g4 stm32h5', 'stm32h7', 'stm32l4 stm32u5 stm32wb']
+      - set-matrix
diff --git a/.circleci/config2.yml b/.circleci/config2.yml
new file mode 100644
index 0000000000..ea7fccaffe
--- /dev/null
+++ b/.circleci/config2.yml
@@ -0,0 +1,98 @@
+version: 2.1
+
+commands:
+  setup-toolchain:
+    parameters:
+        toolchain:
+            type: string
+    steps:
+      - run:
+          name: Install Toolchain
+          command: |
+            TOOLCHAIN_JSON='{
+              "arm-clang": "https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm/releases/download/release-17.0.1/LLVMEmbeddedToolchainForArm-17.0.1-Linux-x86_64.tar.xz",
+              "arm-gcc": "https://github.com/xpack-dev-tools/arm-none-eabi-gcc-xpack/releases/download/v12.3.1-1.1/xpack-arm-none-eabi-gcc-12.3.1-1.1-linux-x64.tar.gz"
+            }'
+            toolchain_url=$(echo $TOOLCHAIN_JSON | jq -r '.["<< parameters.toolchain >>"]')
+            echo "toolchain_url=$toolchain_url"
+
+            # download and extract toolchain
+            mkdir -p ~/cache/<< parameters.toolchain >>
+            wget $toolchain_url -O toolchain.tar.gz
+            tar -C ~/cache/<< parameters.toolchain >> -xaf toolchain.tar.gz
+
+            # Add toolchain to PATH
+            echo "export PATH=$PATH:`echo ~/cache/<< parameters.toolchain >>/*/bin`" >> $BASH_ENV
+
+  get-deps:
+    parameters:
+      family:
+        type: string
+    steps:
+      - run:
+          name: Get Dependencies
+          command: |
+            python tools/get_deps.py << parameters.family >>
+
+            # Install Pico SDK
+            if [ << parameters.family >> == "rp2040" ]; then
+              git clone --depth 1 https://github.com/raspberrypi/pico-sdk.git ~/pico-sdk
+              echo "export PICO_SDK_PATH=~/pico-sdk" >> $BASH_ENV
+            fi
+
+jobs:
+  build:
+    parameters:
+      build-system:
+        type: string
+      toolchain:
+        type: string
+      family:
+        type: string
+
+    docker:
+      - image: cimg/base:current
+    resource_class: medium+
+    steps:
+      - checkout
+      - when:
+          condition: << parameters.build-system >> == 'cmake'
+          steps:
+            - run:
+                name: Install Ninja
+                command: |
+                  # Install Ninja
+                  NINJA_URL=https://github.com/ninja-build/ninja/releases/download/v1.12.1/ninja-linux.zip
+                  wget $NINJA_URL -O ninja-linux.zip
+                  unzip ninja-linux.zip -d ~/bin
+      - setup-toolchain:
+          toolchain: << parameters.toolchain >>
+      - get-deps:
+          family: << parameters.family >>
+      - run:
+          name: Build
+          command: |
+            # Only build one board per family for non PRs i.e commit to master
+            ONE_PER_FAMILY=""
+            if [ -z "$CIRCLE_PULL_REQUEST" ]; then
+              ONE_PER_FAMILY="--one-per-family"
+            fi
+
+            # Toolchain option default is gcc
+            if [ "<< parameters.toolchain >>" == "arm-clang" ]; then
+              TOOLCHAIN_OPTION="--toolchain clang"
+            elif [ "<< parameters.toolchain >>" == "arm-gcc" ]; then
+              TOOLCHAIN_OPTION="--toolchain gcc"
+            fi
+
+            python tools/build.py $ONE_PER_FAMILY -s << parameters.build-system >> $TOOLCHAIN_OPTION << parameters.family >>
+
+workflows:
+  build:
+    jobs:
+#      - build:
+#          matrix:
+#            parameters:
+#              toolchain: ['arm-clang']
+#              build-system: ['cmake']
+#              family: ['imxrt']
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index b3dc3ec423..fde9400a7f 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -58,9 +58,8 @@ jobs:
       fail-fast: false
       matrix:
         toolchain:
-          # - 'arm-clang' is built by circle-ci
+          # - 'arm-clang' is built by circle-ci in PR
           - 'aarch64-gcc'
-          - 'arm-gcc'
           - 'msp430-gcc'
           - 'riscv-gcc'
     with:
@@ -69,6 +68,20 @@ jobs:
       build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)[matrix.toolchain].family) }}
       one-per-family: ${{ github.event_name != 'pull_request' }}
 
+  # ---------------------------------------
+  # Build CMake arm-gcc
+  # only build with push, for PR: all board is built by circle-ci
+  # ---------------------------------------
+  cmake-arm-gcc:
+    if: github.event_name == 'push'
+    needs: set-matrix
+    uses: ./.github/workflows/build_util.yml
+    with:
+      build-system: 'cmake'
+      toolchain: 'arm-gcc'
+      build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)['arm-gcc'].family) }}
+      one-per-family: true
+
   # ---------------------------------------
   # Build Make
   # ---------------------------------------
@@ -80,7 +93,7 @@ jobs:
       fail-fast: false
       matrix:
         toolchain:
-          # 'arm-clang' is built by circle-ci
+          # 'arm-clang' would be built by circle-ci
           - 'aarch64-gcc'
           - 'arm-gcc'
           - 'msp430-gcc'
diff --git a/tools/build_utils.py b/tools/build_utils.py
index b66b64b975..32aca95dd1 100644
--- a/tools/build_utils.py
+++ b/tools/build_utils.py
@@ -81,6 +81,19 @@ def skip_example(example, board):
     return False
 
 
+def build_size(make_cmd):
+    size_output = subprocess.run(make_cmd + ' size', shell=True, stdout=subprocess.PIPE).stdout.decode("utf-8").splitlines()
+    for i, l in enumerate(size_output):
+        text_title = 'text	   data	    bss	    dec'
+        if text_title in l:
+            size_list = size_output[i+1].split('\t')
+            flash_size = int(size_list[0])
+            sram_size = int(size_list[1]) + int(size_list[2])
+            return (flash_size, sram_size)
+
+    return (0, 0)
+
+
 def build_example(example, board, make_option):
     start_time = time.monotonic()
     flash_size = "-"
@@ -89,7 +102,7 @@ def build_example(example, board, make_option):
     # succeeded, failed, skipped
     ret = [0, 0, 0]
 
-    make_cmd = "make -j -C examples/{} BOARD={} {}".format(example, board, make_option)
+    make_cmd = f"make -j -C examples/{example} BOARD={board} {make_option}"
 
     # Check if board is skipped
     if skip_example(example, board):
@@ -97,14 +110,12 @@ def build_example(example, board, make_option):
         ret[2] = 1
         print(build_format.format(example, board, status, '-', flash_size, sram_size))
     else:
-        #subprocess.run(make_cmd + " clean", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
-        build_result = subprocess.run(make_cmd + " all", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+        build_result = subprocess.run(f"{make_cmd} all", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
 
         if build_result.returncode == 0:
             status = SUCCEEDED
             ret[0] = 1
             (flash_size, sram_size) = build_size(make_cmd)
-            #subprocess.run(make_cmd + " copy-artifact", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
         else:
             status = FAILED
             ret[1] = 1
@@ -116,16 +127,3 @@ def build_example(example, board, make_option):
             print(build_result.stdout.decode("utf-8"))
 
     return ret
-
-
-def build_size(make_cmd):
-    size_output = subprocess.run(make_cmd + ' size', shell=True, stdout=subprocess.PIPE).stdout.decode("utf-8").splitlines()
-    for i, l in enumerate(size_output):
-        text_title = 'text	   data	    bss	    dec'
-        if text_title in l:
-            size_list = size_output[i+1].split('\t')
-            flash_size = int(size_list[0])
-            sram_size = int(size_list[1]) + int(size_list[2])
-            return (flash_size, sram_size)
-
-    return (0, 0)

From f6b96f7ea9f0d0c4872e1e290bf59f65c68a7bf3 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 14 Aug 2024 22:56:59 +0700
Subject: [PATCH 156/204] fix spelling, add max32 to ci with arm-gcc build

---
 .github/workflows/ci_set_matrix.py | 1 +
 src/portable/mentor/musb/musb_ti.h | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py
index a56bd42141..c9698c934d 100644
--- a/.github/workflows/ci_set_matrix.py
+++ b/.github/workflows/ci_set_matrix.py
@@ -22,6 +22,7 @@
     "lpc11 lpc13 lpc15": ["arm-gcc", "arm-clang"],
     "lpc17 lpc18 lpc40 lpc43": ["arm-gcc", "arm-clang"],
     "lpc51 lpc54 lpc55": ["arm-gcc", "arm-clang"],
+    "max32650 max32666 max32690 max78002": ["arm-gcc"],
     "mcx": ["arm-gcc"],
     "mm32": ["arm-gcc"],
     "msp430": ["msp430-gcc"],
diff --git a/src/portable/mentor/musb/musb_ti.h b/src/portable/mentor/musb/musb_ti.h
index dbf82f3911..4c9f002780 100644
--- a/src/portable/mentor/musb/musb_ti.h
+++ b/src/portable/mentor/musb/musb_ti.h
@@ -43,7 +43,7 @@
 #endif
 
 
-// Header supports both device and host modes. Only include whats necessary
+// Header supports both device and host modes. Only include what's necessary
 #if CFG_TUD_ENABLED
 
 // Mapping of peripheral instances to port. Currently just 1.

From 0be427bae95ef0fe94cb6f0b405eb5c3bbae160a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 14 Aug 2024 23:59:35 +0700
Subject: [PATCH 157/204] use max32 cmsis, fix NVIC_GetEnableIRQ() not defined
 when using with CMISIS < 5

---
 hw/bsp/max32650/family.c              | 16 +++++++++++--
 hw/bsp/max32650/family.cmake          |  1 -
 hw/bsp/max32650/family.mk             |  3 +--
 hw/bsp/max32666/family.c              | 15 ++++++++++--
 hw/bsp/max32666/family.cmake          |  1 -
 hw/bsp/max32666/family.mk             |  1 -
 hw/bsp/max32690/family.c              | 16 +++++++++++--
 hw/bsp/max32690/family.cmake          |  1 -
 hw/bsp/max32690/family.mk             |  1 -
 hw/bsp/max78002/family.c              | 15 ++++++++++--
 hw/bsp/max78002/family.cmake          |  1 -
 hw/bsp/max78002/family.mk             |  1 -
 src/portable/mentor/musb/musb_max32.h | 33 ++++++++++++---------------
 tools/get_deps.py                     |  2 +-
 14 files changed, 70 insertions(+), 37 deletions(-)

diff --git a/hw/bsp/max32650/family.c b/hw/bsp/max32650/family.c
index 16b5233b95..89a5db1600 100644
--- a/hw/bsp/max32650/family.c
+++ b/hw/bsp/max32650/family.c
@@ -24,12 +24,24 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "board.h"
-#include "bsp/board_api.h"
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wstrict-prototypes" // _mxc_crit_get_state()
+#endif
+
 #include "gpio.h"
+#include "mxc_sys.h"
 #include "mxc_device.h"
 #include "uart.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+#include "board.h"
+#include "bsp/board_api.h"
+
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/max32650/family.cmake b/hw/bsp/max32650/family.cmake
index 92b68a1cd3..8c4f286a2b 100644
--- a/hw/bsp/max32650/family.cmake
+++ b/hw/bsp/max32650/family.cmake
@@ -74,7 +74,6 @@ function(add_board_target BOARD_TARGET)
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    ${CMSIS_5}/CMSIS/Core/Include
     ${MAX32_CMSIS}/Include
     ${MAX32_CMSIS}/Device/Maxim/MAX32650/Include
     ${MAX32_PERIPH}/Include/MAX32650
diff --git a/hw/bsp/max32650/family.mk b/hw/bsp/max32650/family.mk
index 3592612165..d2fc293e4f 100644
--- a/hw/bsp/max32650/family.mk
+++ b/hw/bsp/max32650/family.mk
@@ -82,14 +82,13 @@ SRC_C += \
 	$(PERIPH_SRC)/ICC/icc_reva.c \
 	$(PERIPH_SRC)/ICC/icc_common.c \
 	$(PERIPH_SRC)/TPU/tpu_me10.c \
-    $(PERIPH_SRC)/TPU/tpu_reva.c \
+	$(PERIPH_SRC)/TPU/tpu_reva.c \
 	$(PERIPH_SRC)/UART/uart_common.c \
 	$(PERIPH_SRC)/UART/uart_me10.c \
 	$(PERIPH_SRC)/UART/uart_reva.c \
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(MAX32_CMSIS)/Include \
 	$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX32650/Include \
 	$(TOP)/$(MAX32_PERIPH)/Include/MAX32650 \
diff --git a/hw/bsp/max32666/family.c b/hw/bsp/max32666/family.c
index 1398e09ffe..8ee4b67622 100644
--- a/hw/bsp/max32666/family.c
+++ b/hw/bsp/max32666/family.c
@@ -24,13 +24,24 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "board.h"
-#include "bsp/board_api.h"
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wstrict-prototypes" // _mxc_crit_get_state()
+#endif
+
 #include "gpio.h"
+#include "mxc_sys.h"
 #include "mcr_regs.h"
 #include "mxc_device.h"
 #include "uart.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+#include "board.h"
+#include "bsp/board_api.h"
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/max32666/family.cmake b/hw/bsp/max32666/family.cmake
index eb9d2175fb..4a3f1a428c 100644
--- a/hw/bsp/max32666/family.cmake
+++ b/hw/bsp/max32666/family.cmake
@@ -70,7 +70,6 @@ function(add_board_target BOARD_TARGET)
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    ${CMSIS_5}/CMSIS/Core/Include
     ${MAX32_CMSIS}/Include
     ${MAX32_CMSIS}/Device/Maxim/MAX32665/Include
     ${MAX32_PERIPH}/Include/MAX32665
diff --git a/hw/bsp/max32666/family.mk b/hw/bsp/max32666/family.mk
index 720d994efc..b4f7d1e575 100644
--- a/hw/bsp/max32666/family.mk
+++ b/hw/bsp/max32666/family.mk
@@ -82,7 +82,6 @@ SRC_C += \
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(MAX32_CMSIS)/Include \
 	$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX32665/Include \
 	$(TOP)/$(MAX32_PERIPH)/Include/MAX32665 \
diff --git a/hw/bsp/max32690/family.c b/hw/bsp/max32690/family.c
index f4998bdbe3..2418168d41 100644
--- a/hw/bsp/max32690/family.c
+++ b/hw/bsp/max32690/family.c
@@ -24,13 +24,25 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "board.h"
-#include "bsp/board_api.h"
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wstrict-prototypes" // _mxc_crit_get_state()
+#endif
+
 #include "gpio.h"
+#include "mxc_sys.h"
 #include "mcr_regs.h"
 #include "mxc_device.h"
 #include "uart.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+#include "board.h"
+#include "bsp/board_api.h"
+
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/max32690/family.cmake b/hw/bsp/max32690/family.cmake
index 2a9422dbe4..58647e4320 100644
--- a/hw/bsp/max32690/family.cmake
+++ b/hw/bsp/max32690/family.cmake
@@ -75,7 +75,6 @@ function(add_board_target BOARD_TARGET)
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    ${CMSIS_5}/CMSIS/Core/Include
     ${MAX32_CMSIS}/Include
     ${MAX32_CMSIS}/Device/Maxim/MAX32690/Include
     ${MAX32_PERIPH}/Include/MAX32690
diff --git a/hw/bsp/max32690/family.mk b/hw/bsp/max32690/family.mk
index c533cf4a46..d4df8ef2fa 100644
--- a/hw/bsp/max32690/family.mk
+++ b/hw/bsp/max32690/family.mk
@@ -90,7 +90,6 @@ SRC_C += \
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(MAX32_CMSIS)/Include \
 	$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX32690/Include \
 	$(TOP)/$(MAX32_PERIPH)/Include/MAX32690 \
diff --git a/hw/bsp/max78002/family.c b/hw/bsp/max78002/family.c
index 7758083a2a..8d51f141c4 100644
--- a/hw/bsp/max78002/family.c
+++ b/hw/bsp/max78002/family.c
@@ -24,13 +24,24 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "board.h"
-#include "bsp/board_api.h"
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wstrict-prototypes" // _mxc_crit_get_state()
+#endif
+
 #include "gpio.h"
+#include "mxc_sys.h"
 #include "mcr_regs.h"
 #include "mxc_device.h"
 #include "uart.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+#include "board.h"
+#include "bsp/board_api.h"
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/max78002/family.cmake b/hw/bsp/max78002/family.cmake
index 090f1da43d..446930bd88 100644
--- a/hw/bsp/max78002/family.cmake
+++ b/hw/bsp/max78002/family.cmake
@@ -72,7 +72,6 @@ function(add_board_target BOARD_TARGET)
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    ${CMSIS_5}/CMSIS/Core/Include
     ${MAX32_CMSIS}/Include
     ${MAX32_CMSIS}/Device/Maxim/MAX78002/Include
     ${MAX32_PERIPH}/Include/MAX78002
diff --git a/hw/bsp/max78002/family.mk b/hw/bsp/max78002/family.mk
index 5297815de3..997816261f 100644
--- a/hw/bsp/max78002/family.mk
+++ b/hw/bsp/max78002/family.mk
@@ -87,7 +87,6 @@ SRC_C += \
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(MAX32_CMSIS)/Include \
 	$(TOP)/$(MAX32_CMSIS)/Device/Maxim/MAX78002/Include \
 	$(TOP)/$(MAX32_PERIPH)/Include/MAX78002 \
diff --git a/src/portable/mentor/musb/musb_max32.h b/src/portable/mentor/musb/musb_max32.h
index 297a695f89..bc6ce76dd2 100644
--- a/src/portable/mentor/musb/musb_max32.h
+++ b/src/portable/mentor/musb/musb_max32.h
@@ -31,13 +31,8 @@
  extern "C" {
 #endif
 
-#if TU_CHECK_MCU(OPT_MCU_MAX32690, OPT_MCU_MAX32650, OPT_MCU_MAX32666, OPT_MCU_MAX78002)
-  #include "mxc_device.h"
-  #include "usbhs_regs.h"
-#else
-  #error "Unsupported MCUs"
-#endif
-
+#include "mxc_device.h"
+#include "usbhs_regs.h"
 
 #if CFG_TUD_ENABLED
 #define USBHS_M31_CLOCK_RECOVERY
@@ -48,39 +43,39 @@ static mxc_usbhs_regs_t* const musb_periph_inst[] = {
 };
 
 // Mapping of IRQ numbers to port. Currently just 1.
-static const IRQn_Type  musb_irqs[] = {
+static const IRQn_Type musb_irqs[] = {
     USB_IRQn
 };
 
 TU_ATTR_ALWAYS_INLINE
-static inline void musb_dcd_int_enable(uint8_t rhport)
-{
+static inline void musb_dcd_int_enable(uint8_t rhport) {
   NVIC_EnableIRQ(musb_irqs[rhport]);
 }
 
 TU_ATTR_ALWAYS_INLINE
-static inline void musb_dcd_int_disable(uint8_t rhport)
-{
+static inline void musb_dcd_int_disable(uint8_t rhport) {
   NVIC_DisableIRQ(musb_irqs[rhport]);
 }
 
 TU_ATTR_ALWAYS_INLINE
-static inline unsigned musb_dcd_get_int_enable(uint8_t rhport)
-{
+static inline unsigned musb_dcd_get_int_enable(uint8_t rhport) {
+  #ifdef NVIC_GetEnableIRQ // only defined in CMSIS 5
   return NVIC_GetEnableIRQ(musb_irqs[rhport]);
+  #else
+  uint32_t IRQn = (uint32_t) musb_irqs[rhport];
+  return ((NVIC->ISER[IRQn >> 5UL] & (1UL << (IRQn & 0x1FUL))) != 0UL) ? 1UL : 0UL;
+  #endif
 }
 
 TU_ATTR_ALWAYS_INLINE
-static inline void musb_dcd_int_clear(uint8_t rhport)
-{
-    NVIC_ClearPendingIRQ(musb_irqs[rhport]);
+static inline void musb_dcd_int_clear(uint8_t rhport) {
+  NVIC_ClearPendingIRQ(musb_irqs[rhport]);
 }
 
 //Used to save and restore user's register map when interrupt occurs
 static volatile unsigned isr_saved_index = 0;
 
-static inline void musb_dcd_int_handler_enter(uint8_t rhport)
-{
+static inline void musb_dcd_int_handler_enter(uint8_t rhport) {
   uint32_t mxm_int, mxm_int_en, mxm_is;
 
   //save current register index
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 51d6304ae5..f141d3d41b 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -26,7 +26,7 @@
                          'fc100s'],
     'hw/mcu/analog/max32' : ['https://github.com/analogdevicesinc/msdk.git',
                              'b20b398d3e5e2007594e54a74ba3d2a2e50ddd75',
-                             'max32690 max32650 max32666 max78002'],
+                             'max32650 max32666 max32690 max78002'],
     'hw/mcu/bridgetek/ft9xx/ft90x-sdk': ['https://github.com/BRTSG-FOSS/ft90x-sdk.git',
                                          '91060164afe239fcb394122e8bf9eb24d3194eb1',
                                          'brtmm90x'],

From 1402e6ec0d5ed60375c9deb1add9061fcb37e590 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 15 Aug 2024 14:36:31 +0700
Subject: [PATCH 158/204] add flash-uniflash support for ti tm4c

---
 README.rst                                    |  4 +-
 examples/build_system/make/rules.mk           |  5 ++
 hw/bsp/family_support.cmake                   | 15 ++++
 hw/bsp/tm4c/boards/ek_tm4c123gxl/board.cmake  |  1 +
 hw/bsp/tm4c/boards/ek_tm4c123gxl/board.mk     |  2 +
 .../boards/ek_tm4c123gxl/ek_tm4c123gxl.ccxml  | 17 ++++
 hw/bsp/tm4c/family.c                          | 83 ++++++++-----------
 hw/bsp/tm4c/family.cmake                      |  1 +
 test/hil/hil_test.py                          |  5 ++
 9 files changed, 85 insertions(+), 48 deletions(-)
 create mode 100644 hw/bsp/tm4c/boards/ek_tm4c123gxl/ek_tm4c123gxl.ccxml

diff --git a/README.rst b/README.rst
index 1ae8c53758..422f232710 100644
--- a/README.rst
+++ b/README.rst
@@ -1,4 +1,4 @@
-|Build Status| |Documentation Status| |Fuzzing Status| |License|
+|Build Status| |CircleCI Status| |Documentation Status| |Fuzzing Status| |License|
 
 Sponsors
 ========
@@ -197,6 +197,8 @@ Docs
 
 .. |Build Status| image:: https://github.com/hathach/tinyusb/actions/workflows/cmake_arm.yml/badge.svg
    :target: https://github.com/hathach/tinyusb/actions
+.. |CircleCI Status| image:: https://dl.circleci.com/status-badge/img/circleci/4AYHvUhFxdnY4rA7LEsdqW/QmrpoL2AjGqetvFQNqtWyq/tree/master.svg?style=svg
+   :target: https://dl.circleci.com/status-badge/redirect/circleci/4AYHvUhFxdnY4rA7LEsdqW/QmrpoL2AjGqetvFQNqtWyq/tree/master
 .. |Documentation Status| image:: https://readthedocs.org/projects/tinyusb/badge/?version=latest
    :target: https://docs.tinyusb.org/en/latest/?badge=latest
 .. |Fuzzing Status| image:: https://oss-fuzz-build-logs.storage.googleapis.com/badges/tinyusb.svg
diff --git a/examples/build_system/make/rules.mk b/examples/build_system/make/rules.mk
index f322dbae64..86de17b6ce 100644
--- a/examples/build_system/make/rules.mk
+++ b/examples/build_system/make/rules.mk
@@ -166,6 +166,11 @@ flash-bmp: $(BUILD)/$(PROJECT).elf
 debug-bmp: $(BUILD)/$(PROJECT).elf
 	$(GDB) -ex 'target extended-remote $(BMP)' -ex 'monitor swdp_scan' -ex 'attach 1' $<
 
+# --------------- TI Uniflash -----------------
+DSLITE ?= dslite.sh
+flash-uniflash: $(BUILD)/$(PROJECT).hex
+	${DSLITE} ${UNIFLASH_OPTION} -f $<
+
 #-------------- Artifacts --------------
 
 # Create binary directory
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 03a24c95b2..4a31f6218d 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -573,6 +573,21 @@ function(family_flash_msp430flasher TARGET)
     )
 endfunction()
 
+
+function(family_flash_uniflash TARGET)
+  if (NOT DEFINED DSLITE)
+    set(DSLITE dslite.sh)
+  endif ()
+
+  separate_arguments(OPTION_LIST UNIX_COMMAND ${UNIFLASH_OPTION})
+
+  add_custom_target(${TARGET}-uniflash
+    DEPENDS ${TARGET}
+    COMMAND ${DSLITE} ${UNIFLASH_OPTION} -f $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
+    VERBATIM
+    )
+endfunction()
+
 #----------------------------------
 # Family specific
 #----------------------------------
diff --git a/hw/bsp/tm4c/boards/ek_tm4c123gxl/board.cmake b/hw/bsp/tm4c/boards/ek_tm4c123gxl/board.cmake
index a86b5c0e5d..b8df9f1898 100644
--- a/hw/bsp/tm4c/boards/ek_tm4c123gxl/board.cmake
+++ b/hw/bsp/tm4c/boards/ek_tm4c123gxl/board.cmake
@@ -4,6 +4,7 @@ set(JLINK_DEVICE TM4C123GH6PM)
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/tm4c123.ld)
 
 set(OPENOCD_OPTION "-f board/ti_ek-tm4c123gxl.cfg")
+set(UNIFLASH_OPTION "-c ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ccxml -r 1")
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/tm4c/boards/ek_tm4c123gxl/board.mk b/hw/bsp/tm4c/boards/ek_tm4c123gxl/board.mk
index a3e8df62c8..b3ded8007e 100644
--- a/hw/bsp/tm4c/boards/ek_tm4c123gxl/board.mk
+++ b/hw/bsp/tm4c/boards/ek_tm4c123gxl/board.mk
@@ -10,4 +10,6 @@ JLINK_DEVICE = TM4C123GH6PM
 # flash using openocd
 OPENOCD_OPTION = -f board/ti_ek-tm4c123gxl.cfg
 
+UNIFLASH_OPTION = -c ${TOP}/${BOARD_PATH}/${BOARD}.ccxml -r 1
+
 flash: flash-openocd
diff --git a/hw/bsp/tm4c/boards/ek_tm4c123gxl/ek_tm4c123gxl.ccxml b/hw/bsp/tm4c/boards/ek_tm4c123gxl/ek_tm4c123gxl.ccxml
new file mode 100644
index 0000000000..426a6f368d
--- /dev/null
+++ b/hw/bsp/tm4c/boards/ek_tm4c123gxl/ek_tm4c123gxl.ccxml
@@ -0,0 +1,17 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<configurations XML_version="1.2" id="configurations_0">
+<configuration XML_version="1.2" id="configuration_0">
+        <instance XML_version="1.2" desc="Stellaris In-Circuit Debug Interface" href="connections/Stellaris_ICDI_Connection.xml" id="Stellaris In-Circuit Debug Interface" xml="Stellaris_ICDI_Connection.xml" xmlpath="connections"/>
+        <connection XML_version="1.2" id="Stellaris In-Circuit Debug Interface">
+
+        		   <instance XML_version="1.2" href="drivers/stellaris_cs_dap.xml" id="drivers" xml="stellaris_cs_dap.xml" xmlpath="drivers"/>
+
+        		   <instance XML_version="1.2" href="drivers/stellaris_cortex_m4.xml" id="drivers" xml="stellaris_cortex_m4.xml" xmlpath="drivers"/>
+
+
+            <platform XML_version="1.2" id="platform_0">
+                <instance XML_version="1.2" desc="Tiva TM4C123GH6PM" href="devices/tm4c123gh6pm.xml" id="Tiva TM4C123GH6PM" xml="tm4c123gh6pm.xml" xmlpath="devices"/>
+            </platform>
+        </connection>
+    </configuration>
+</configurations>
diff --git a/hw/bsp/tm4c/family.c b/hw/bsp/tm4c/family.c
index 738bc3fa0d..5e1f6d3ffd 100644
--- a/hw/bsp/tm4c/family.c
+++ b/hw/bsp/tm4c/family.c
@@ -5,8 +5,7 @@
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void USB0_Handler(void)
-{
+void USB0_Handler(void) {
 #if CFG_TUH_ENABLED
   tuh_int_handler(0, true);
 #endif
@@ -20,8 +19,7 @@ void USB0_Handler(void)
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 
-static void board_uart_init (void)
-{
+static void board_uart_init(void) {
   SYSCTL->RCGCUART |= (1 << 0);                // Enable the clock to UART0
   SYSCTL->RCGCGPIO |= (1 << 0);                // Enable the clock to GPIOA
 
@@ -42,13 +40,12 @@ static void board_uart_init (void)
   UART0->CTL = (1 << 0) | (1 << 8) | (1 << 9); // UART0 Enable, Transmit Enable, Receive Enable
 }
 
-static void initialize_board_led (GPIOA_Type *port, uint8_t PinMsk, uint8_t dirmsk)
-{
+static void initialize_board_led(GPIOA_Type* port, uint8_t PinMsk, uint8_t dirmsk) {
   /* Enable PortF Clock */
   SYSCTL->RCGCGPIO |= (1 << 5);
 
   /* Let the clock stabilize */
-  while ( !((SYSCTL->PRGPIO) & (1 << 5)) ) {}
+  while (!((SYSCTL->PRGPIO) & (1 << 5))) {}
 
   /* Port Digital Enable */
   port->DEN |= PinMsk;
@@ -57,46 +54,33 @@ static void initialize_board_led (GPIOA_Type *port, uint8_t PinMsk, uint8_t dirm
   port->DIR = dirmsk;
 }
 
-static void board_switch_init (void)
-{
-  GPIOF->DIR &= ~(1 << BOARD_BTN);
-  GPIOF->PUR |= (1 << BOARD_BTN);
-  GPIOF->DEN |= (1 << BOARD_BTN);
-}
-
-static void WriteGPIOPin (GPIOA_Type *port, uint8_t PinMsk, bool state)
-{
-  if ( state )
-  {
+static void WriteGPIOPin(GPIOA_Type* port, uint8_t PinMsk, bool state) {
+  if (state) {
     port->DATA |= PinMsk;
-  }
-  else
-  {
+  } else {
     port->DATA &= ~(PinMsk);
   }
 }
 
-static uint32_t ReadGPIOPin (GPIOA_Type *port, uint8_t pinMsk)
-{
+static uint32_t ReadGPIOPin(GPIOA_Type* port, uint8_t pinMsk) {
   return (port->DATA & pinMsk);
 }
 
-void board_init (void)
-{
+void board_init(void) {
   SystemCoreClockUpdate();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-    // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-    NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
 
   /* Reset USB */
   SYSCTL->SRCR2 |= (1u << 16);
 
-  for ( volatile uint8_t i = 0; i < 20; i++ ) {}
+  for (volatile uint8_t i = 0; i < 20; i++) {}
 
   SYSCTL->SRCR2 &= ~(1u << 16);
 
@@ -110,7 +94,7 @@ void board_init (void)
   SYSCTL->RCGCGPIO |= (1u << 3);
 
   /* Let the clock stabilize */
-  while ( !(SYSCTL->PRGPIO & (1u << 3)) ) {}
+  while (!(SYSCTL->PRGPIO & (1u << 3))) {}
 
   /* USB IOs to Analog Mode */
   GPIOD->AFSEL &= ~((1u << 4) | (1u << 5));
@@ -124,7 +108,9 @@ void board_init (void)
   initialize_board_led(LED_PORT, leds, dirmsk);
 
   /* Configure GPIO for board switch */
-  board_switch_init();
+  GPIOF->DIR &= ~(1 << BOARD_BTN);
+  GPIOF->PUR |= (1 << BOARD_BTN);
+  GPIOF->DEN |= (1 << BOARD_BTN);
 
   /* Initialize board UART */
   board_uart_init();
@@ -132,32 +118,35 @@ void board_init (void)
   TU_LOG1_INT(SystemCoreClock);
 }
 
-void board_led_write (bool state)
-{
+void board_led_write(bool state) {
   WriteGPIOPin(LED_PORT, (1 << LED_PIN_BLUE), state);
 }
 
-uint32_t board_button_read (void)
-{
+uint32_t board_button_read(void) {
   uint32_t gpio_value = ReadGPIOPin(BOARD_BTN_PORT, BOARD_BTN_Msk);
   return BUTTON_STATE_ACTIVE ? gpio_value : !gpio_value;
 }
 
-int board_uart_write (void const *buf, int len)
-{
-  uint8_t const * data = buf;
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  uint8_t const len = 8;
+  // Note: DID0, DID1 are variant ID, they aer used since TM4C123 does not have unique ID
+  memcpy(id, (void*)(uintptr_t) &SYSCTL->DID0, len);
+  return len;
+}
 
-  for ( int i = 0; i < len; i++ )
-  {
-    while ( (UART0->FR & (1 << 5)) != 0 ) {} // Poll until previous data was shofted out
-    UART0->DR = data[i];                     // Write UART0 DATA REGISTER
+int board_uart_write(void const* buf, int len) {
+  uint8_t const* data = buf;
+
+  for (int i = 0; i < len; i++) {
+    while ((UART0->FR & (1 << 5)) != 0) {} // Poll until previous data was shofted out
+    UART0->DR = data[i];                   // Write UART0 DATA REGISTER
   }
 
   return len;
 }
 
-int board_uart_read (uint8_t *buf, int len)
-{
+int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
   return 0;
@@ -165,13 +154,13 @@ int board_uart_read (uint8_t *buf, int len)
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
+
+void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis (void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif
diff --git a/hw/bsp/tm4c/family.cmake b/hw/bsp/tm4c/family.cmake
index 86db985d6b..9c083759bd 100644
--- a/hw/bsp/tm4c/family.cmake
+++ b/hw/bsp/tm4c/family.cmake
@@ -92,4 +92,5 @@ function(family_configure_example TARGET RTOS)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_openocd(${TARGET})
+  family_flash_uniflash(${TARGET})
 endfunction()
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 486f0d2ebf..1d5f98e5ca 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -196,6 +196,11 @@ def flash_esptool(board, firmware):
     return ret
 
 
+def flash_uniflash(board, firmware):
+    ret = run_cmd(f'dslite.sh {board["flasher_args"]} -f {firmware}.hex')
+    return ret
+
+
 # -------------------------------------------------------------
 # Tests
 # -------------------------------------------------------------

From a9df933e0d35c1c198343464d49e69eff20dde4a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 15 Aug 2024 15:24:04 +0700
Subject: [PATCH 159/204] add TUP_USBIP_MUSB macro, minor rename

---
 src/common/tusb_mcu.h                 |  6 ++--
 src/portable/mentor/musb/dcd_musb.c   | 50 +++++++++++++--------------
 src/portable/mentor/musb/musb_max32.h | 18 +++++-----
 src/portable/mentor/musb/musb_ti.h    | 18 +++++-----
 src/portable/mentor/musb/musb_type.h  |  6 ++--
 5 files changed, 49 insertions(+), 49 deletions(-)

diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 259b9e0022..7ec3c58425 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -308,6 +308,7 @@
   #define TUP_DCD_ENDPOINT_MAX    8
 
 #elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
+  #define TUP_USBIP_MUSB
   #define TUP_DCD_ENDPOINT_MAX    8
 
 //--------------------------------------------------------------------+
@@ -471,12 +472,11 @@
 //--------------------------------------------------------------------+
 // Analog Devices
 //--------------------------------------------------------------------+
-#elif TU_CHECK_MCU(OPT_MCU_MAX32690, OPT_MCU_MAX32666, \
-                   OPT_MCU_MAX32650, OPT_MCU_MAX78002)
+#elif TU_CHECK_MCU(OPT_MCU_MAX32650, OPT_MCU_MAX32666, OPT_MCU_MAX32690, OPT_MCU_MAX78002)
+  #define TUP_USBIP_MUSB
   #define TUP_DCD_ENDPOINT_MAX    12
   #define TUP_RHPORT_HIGHSPEED    1
 
-
 #endif
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index ee36656fd6..80dfb9235a 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -27,7 +27,7 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUD_ENABLED
+#if CFG_TUD_ENABLED && defined(TUP_USBIP_MUSB)
 
 #if __GNUC__ > 8 && defined(__ARM_FEATURE_UNALIGNED)
 /* GCC warns that an address may be unaligned, even though
@@ -155,7 +155,7 @@ static void process_setup_packet(uint8_t rhport)
 {
   uint32_t *p = (void*)&_dcd.setup_packet;
   volatile uint32_t *fifo_ptr = musb_dcd_ep_get_fifo_ptr(rhport, 0);
-  volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
+  volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
   p[0]        = *fifo_ptr;
   p[1]        = *fifo_ptr;
 
@@ -183,7 +183,7 @@ static bool handle_xfer_in(uint8_t rhport, uint_fast8_t ep_addr)
     return true;
   }
 
-  volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
+  volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
   const unsigned mps = regs->TXMAXP;
   const unsigned len = TU_MIN(mps, rem);
   void          *buf = pipe->buf;
@@ -208,7 +208,7 @@ static bool handle_xfer_out(uint8_t rhport, uint_fast8_t ep_addr)
   unsigned epnum = tu_edpt_number(ep_addr);
   unsigned epnum_minus1 = epnum - 1;
   pipe_state_t  *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
-  volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
+  volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
   // TU_LOG1(" RXCSRL%d = %x\r\n", epnum_minus1 + 1, regs->RXCSRL);
 
   TU_ASSERT(regs->RXCSRL & USB_RXCSRL1_RXRDY);
@@ -250,7 +250,7 @@ static bool edpt_n_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16
   if (dir_in) {
     handle_xfer_in(rhport, ep_addr);
   } else {
-    volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
+    volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
     if (regs->RXCSRL & USB_RXCSRL1_RXRDY) regs->RXCSRL = 0;
   }
   return true;
@@ -260,7 +260,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
 {
   (void)rhport;
   TU_ASSERT(total_bytes <= 64); /* Current implementation supports for only up to 64 bytes. */
-  volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
+  volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
   const unsigned req = _dcd.setup_packet.bmRequestType;
   TU_ASSERT(req != REQUEST_TYPE_INVALID || total_bytes == 0);
 
@@ -325,7 +325,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
 
 static void process_ep0(uint8_t rhport)
 {
-  volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
+  volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
   uint_fast8_t csrl = ep0_regs->CSRL0;
 
   // TU_LOG1(" EP0 ep0_regs->CSRL0 = %x\r\n", csrl);
@@ -381,7 +381,7 @@ static void process_ep0(uint8_t rhport)
     return;
   }
 
-  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
 
   /* When CSRL0 is zero, it means that completion of sending a any length packet
    * or receiving a zero length packet. */
@@ -415,7 +415,7 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
   const unsigned epn = tu_edpt_number(ep_addr);
   const unsigned epn_minus1 = epn - 1;
 
-  volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
+  volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
   if (dir_in) {
     // TU_LOG1(" TXCSRL%d = %x\r\n", epn, regs->TXCSRL);
     if (regs->TXCSRL & USB_TXCSRL1_STALLED) {
@@ -442,7 +442,7 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
 
 static void process_bus_reset(uint8_t rhport)
 {
-  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
   /* When bmRequestType is REQUEST_TYPE_INVALID(0xFF),
    * a control transfer state is SETUP or STATUS stage. */
   _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
@@ -467,7 +467,7 @@ static void process_bus_reset(uint8_t rhport)
 
 void dcd_init(uint8_t rhport)
 {
-  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
   ctrl_regs->IE |= USB_IE_SUSPND;
   musb_dcd_int_clear(rhport);
   musb_dcd_phy_init(rhport);
@@ -488,7 +488,7 @@ void dcd_int_disable(uint8_t rhport)
 void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
 {
   (void)dev_addr;
-  volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
+  volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
   _dcd.pipe0.buf       = NULL;
   _dcd.pipe0.length    = 0;
   _dcd.pipe0.remaining = 0;
@@ -499,7 +499,7 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
 // Wake up host
 void dcd_remote_wakeup(uint8_t rhport)
 {
-  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
   ctrl_regs->POWER |= USB_POWER_RESUME;
 
   unsigned cnt = SystemCoreClock / 1000;
@@ -511,7 +511,7 @@ void dcd_remote_wakeup(uint8_t rhport)
 // Connect by enabling internal pull-up resistor on D+/D-
 void dcd_connect(uint8_t rhport)
 {
-  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
   ctrl_regs->POWER |= TUD_OPT_HIGH_SPEED ? USB_POWER_HSENAB : 0;
   ctrl_regs->POWER |= USB_POWER_SOFTCONN;
 }
@@ -519,7 +519,7 @@ void dcd_connect(uint8_t rhport)
 // Disconnect by disabling internal pull-up resistor on D+/D-
 void dcd_disconnect(uint8_t rhport)
 {
-  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
   ctrl_regs->POWER &= ~USB_POWER_SOFTCONN;
 }
 
@@ -551,8 +551,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   pipe->length    = 0;
   pipe->remaining = 0;
 
-  volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
-  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
+  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
   if (dir_in) {
     regs->TXMAXP = mps;
     regs->TXCSRH = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_TXCSRH1_ISO : 0;
@@ -579,8 +579,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
 
 void dcd_edpt_close_all(uint8_t rhport)
 {
-  volatile musb_dcd_epn_regs_t *regs;
-  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  volatile musb_epn_regs_t *regs;
+  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
   ctrl_regs->TXIE = 1; /* Enable only EP0 */
@@ -613,8 +613,8 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   unsigned const epn    = tu_edpt_number(ep_addr);
   unsigned const dir_in = tu_edpt_dir(ep_addr);
 
-  volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
-  volatile musb_dcd_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
+  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
   if (dir_in) {
@@ -679,14 +679,14 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
   if (0 == epn) {
-    volatile musb_dcd_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
+    volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
     if (!ep_addr) { /* Ignore EP80 */
       _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
       _dcd.pipe0.buf = NULL;
       ep0_regs->CSRL0 = USB_CSRL0_STALL;
     }
   } else {
-    volatile musb_dcd_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
+    volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
     if (tu_edpt_dir(ep_addr)) { /* IN */
       regs->TXCSRL = USB_TXCSRL1_STALL;
     } else { /* OUT */
@@ -702,7 +702,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 {
   (void)rhport;
   unsigned const epn = tu_edpt_number(ep_addr);
-  musb_dcd_epn_regs_t volatile *regs = musb_dcd_epn_regs(rhport, epn);
+  musb_epn_regs_t volatile *regs = musb_dcd_epn_regs(rhport, epn);
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
   if (tu_edpt_dir(ep_addr)) { /* IN */
@@ -719,7 +719,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 void dcd_int_handler(uint8_t rhport)
 {
   uint_fast8_t is, txis, rxis;
-  volatile musb_dcd_ctl_regs_t *ctrl_regs;
+  volatile musb_ctl_regs_t *ctrl_regs;
 
   //Part specific ISR setup/entry
   musb_dcd_int_handler_enter(rhport);
diff --git a/src/portable/mentor/musb/musb_max32.h b/src/portable/mentor/musb/musb_max32.h
index bc6ce76dd2..0712aeda41 100644
--- a/src/portable/mentor/musb/musb_max32.h
+++ b/src/portable/mentor/musb/musb_max32.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_MUSB_MAX32_H_
-#define _TUSB_MUSB_MAX32_H_
+#ifndef TUSB_MUSB_MAX32_H_
+#define TUSB_MUSB_MAX32_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -136,25 +136,25 @@ static inline void musb_dcd_phy_init(uint8_t rhport)
   musb_periph_inst[rhport]->m31_phy_ponrst = 1;
 }
 
-static inline volatile musb_dcd_ctl_regs_t* musb_dcd_ctl_regs(uint8_t rhport)
+static inline volatile musb_ctl_regs_t* musb_dcd_ctl_regs(uint8_t rhport)
 {
-  volatile musb_dcd_ctl_regs_t *regs = (volatile musb_dcd_ctl_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->faddr));
+  volatile musb_ctl_regs_t *regs = (volatile musb_ctl_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->faddr));
   return regs;
 }
 
-static inline volatile musb_dcd_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum)
+static inline volatile musb_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum)
 {
   //Need to set index to map EP registers
   musb_periph_inst[rhport]->index = epnum;
-  volatile musb_dcd_epn_regs_t *regs = (volatile musb_dcd_epn_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->inmaxp));
+  volatile musb_epn_regs_t *regs = (volatile musb_epn_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->inmaxp));
   return regs;
 }
 
-static inline volatile musb_dcd_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport)
+static inline volatile musb_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport)
 {
   //Need to set index to map EP0 registers
   musb_periph_inst[rhport]->index = 0;
-  volatile musb_dcd_ep0_regs_t *regs = (volatile musb_dcd_ep0_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->csr0));
+  volatile musb_ep0_regs_t *regs = (volatile musb_ep0_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->csr0));
   return regs;
 }
 
@@ -213,4 +213,4 @@ static inline void musb_dcd_reset_fifo(uint8_t rhport, unsigned epnum, unsigned
  }
 #endif
 
-#endif // _TUSB_MUSB_MAX32_H_
+#endif // TUSB_MUSB_MAX32_H_
diff --git a/src/portable/mentor/musb/musb_ti.h b/src/portable/mentor/musb/musb_ti.h
index 4c9f002780..ec0a267b1b 100644
--- a/src/portable/mentor/musb/musb_ti.h
+++ b/src/portable/mentor/musb/musb_ti.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_MUSB_TI_H_
-#define _TUSB_MUSB_TI_H_
+#ifndef TUSB_MUSB_TI_H_
+#define TUSB_MUSB_TI_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -95,25 +95,25 @@ static inline void musb_dcd_int_handler_exit(uint8_t rhport){
   //Nothing to do for this part
 }
 
-static inline volatile musb_dcd_ctl_regs_t* musb_dcd_ctl_regs(uint8_t rhport)
+static inline volatile musb_ctl_regs_t* musb_dcd_ctl_regs(uint8_t rhport)
 {
-  volatile musb_dcd_ctl_regs_t *regs = (volatile musb_dcd_ctl_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->FADDR));
+  volatile musb_ctl_regs_t *regs = (volatile musb_ctl_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->FADDR));
   return regs;
 }
 
-static inline volatile musb_dcd_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum)
+static inline volatile musb_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum)
 {
   uintptr_t baseptr = (uintptr_t)&(musb_periph_inst[rhport]->TXMAXP1);
 
   //On the TI parts, the epn registers are 16-bytes apart. The core regs defined
   //by musb_dcd_epn_regs and 6 reserved/other use bytes
-  volatile musb_dcd_epn_regs_t *regs = (volatile musb_dcd_epn_regs_t*)(baseptr + ((epnum - 1)*16));
+  volatile musb_epn_regs_t *regs = (volatile musb_epn_regs_t*)(baseptr + ((epnum - 1) * 16));
   return regs;
 }
 
-static inline volatile musb_dcd_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport)
+static inline volatile musb_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport)
 {
-  volatile musb_dcd_ep0_regs_t *regs = (volatile musb_dcd_ep0_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->CSRL0));
+  volatile musb_ep0_regs_t *regs = (volatile musb_ep0_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->CSRL0));
   return regs;
 }
 
@@ -282,4 +282,4 @@ static inline void musb_dcd_reset_fifo(uint8_t rhport, unsigned epnum, unsigned
  }
 #endif
 
-#endif // _TUSB_MUSB_TI_H_
+#endif // TUSB_MUSB_TI_H_
diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index e8af8f19b0..d21dcd6da4 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -50,7 +50,7 @@ typedef struct TU_ATTR_PACKED {
   uint8_t  RXCSRL;
   uint8_t  RXCSRH;
   uint16_t RXCOUNT;
-} musb_dcd_epn_regs_t;
+} musb_epn_regs_t;
 
 // Endpoint 0 register mapping.
 typedef struct TU_ATTR_PACKED {
@@ -58,7 +58,7 @@ typedef struct TU_ATTR_PACKED {
   uint8_t   CSRH0;
   uint32_t  RESERVED;
   uint8_t   COUNT0;
-} musb_dcd_ep0_regs_t;
+} musb_ep0_regs_t;
 
 // Control register mapping
 typedef struct TU_ATTR_PACKED {
@@ -70,7 +70,7 @@ typedef struct TU_ATTR_PACKED {
   uint16_t  RXIE;
   uint8_t   IS;
   uint8_t   IE;
-} musb_dcd_ctl_regs_t;
+} musb_ctl_regs_t;
 
 //*****************************************************************************
 //

From e339702a2a7977e4e62c2f3fea9aca55f71190ee Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 15 Aug 2024 16:41:20 +0700
Subject: [PATCH 160/204] adding universal register structs for musb

---
 src/portable/mentor/musb/dcd_musb.c   |  99 ++++++++--------
 src/portable/mentor/musb/musb_max32.h |  47 +++-----
 src/portable/mentor/musb/musb_ti.h    |   8 +-
 src/portable/mentor/musb/musb_type.h  | 156 +++++++++++++++++++++++---
 4 files changed, 216 insertions(+), 94 deletions(-)

diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index 80dfb9235a..78fc3d616d 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -54,6 +54,8 @@ _Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
   #error "Unsupported MCU"
 #endif
 
+#define MUSB_REGS(rhport)   ((musb_regs_t*) MUSB_BASES[rhport])
+
 /*------------------------------------------------------------------
  * MACRO TYPEDEF CONSTANT ENUM DECLARATION
  *------------------------------------------------------------------*/
@@ -381,7 +383,7 @@ static void process_ep0(uint8_t rhport)
     return;
   }
 
-  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
 
   /* When CSRL0 is zero, it means that completion of sending a any length packet
    * or receiving a zero length packet. */
@@ -389,7 +391,7 @@ static void process_ep0(uint8_t rhport)
     /* STATUS IN */
     if (*(const uint16_t*)(uintptr_t)&_dcd.setup_packet == 0x0500) {
       /* The address must be changed on completion of the control transfer. */
-      ctrl_regs->FADDR = (uint8_t)_dcd.setup_packet.wValue;
+      musb_regs->faddr = (uint8_t)_dcd.setup_packet.wValue;
     }
     _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
     dcd_event_xfer_complete(rhport,
@@ -442,7 +444,7 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
 
 static void process_bus_reset(uint8_t rhport)
 {
-  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
   /* When bmRequestType is REQUEST_TYPE_INVALID(0xFF),
    * a control transfer state is SETUP or STATUS stage. */
   _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
@@ -450,15 +452,15 @@ static void process_bus_reset(uint8_t rhport)
   /* When pipe0.buf has not NULL, DATA stage works in progress. */
   _dcd.pipe0.buf = NULL;
 
-  ctrl_regs->TXIE = 1; /* Enable only EP0 */
-  ctrl_regs->RXIE = 0;
+  musb_regs->intr_txen = 1; /* Enable only EP0 */
+  musb_regs->intr_rxen = 0;
 
   /* Clear FIFO settings */
   for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
     musb_dcd_reset_fifo(rhport, i, 0);
     musb_dcd_reset_fifo(rhport, i, 1);
   }
-  dcd_event_bus_reset(rhport, (ctrl_regs->POWER & USB_POWER_HSMODE) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL, true);
+  dcd_event_bus_reset(rhport, (musb_regs->power & USB_POWER_HSMODE) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL, true);
 }
 
 /*------------------------------------------------------------------
@@ -467,8 +469,8 @@ static void process_bus_reset(uint8_t rhport)
 
 void dcd_init(uint8_t rhport)
 {
-  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
-  ctrl_regs->IE |= USB_IE_SUSPND;
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
+  musb_regs->intrusben |= USB_IE_SUSPND;
   musb_dcd_int_clear(rhport);
   musb_dcd_phy_init(rhport);
   dcd_connect(rhport);
@@ -497,30 +499,29 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
 }
 
 // Wake up host
-void dcd_remote_wakeup(uint8_t rhport)
-{
-  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
-  ctrl_regs->POWER |= USB_POWER_RESUME;
+void dcd_remote_wakeup(uint8_t rhport) {
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
+  musb_regs->power |= USB_POWER_RESUME;
 
   unsigned cnt = SystemCoreClock / 1000;
   while (cnt--) __NOP();
 
-  ctrl_regs->POWER &= ~USB_POWER_RESUME;
+  musb_regs->power &= ~USB_POWER_RESUME;
 }
 
 // Connect by enabling internal pull-up resistor on D+/D-
 void dcd_connect(uint8_t rhport)
 {
-  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
-  ctrl_regs->POWER |= TUD_OPT_HIGH_SPEED ? USB_POWER_HSENAB : 0;
-  ctrl_regs->POWER |= USB_POWER_SOFTCONN;
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
+  musb_regs->power |= TUD_OPT_HIGH_SPEED ? USB_POWER_HSENAB : 0;
+  musb_regs->power |= USB_POWER_SOFTCONN;
 }
 
 // Disconnect by disabling internal pull-up resistor on D+/D-
 void dcd_disconnect(uint8_t rhport)
 {
-  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
-  ctrl_regs->POWER &= ~USB_POWER_SOFTCONN;
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
+  musb_regs->power &= ~USB_POWER_SOFTCONN;
 }
 
 void dcd_sof_enable(uint8_t rhport, bool en)
@@ -552,23 +553,25 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   pipe->remaining = 0;
 
   volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
-  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
   if (dir_in) {
     regs->TXMAXP = mps;
     regs->TXCSRH = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_TXCSRH1_ISO : 0;
-    if (regs->TXCSRL & USB_TXCSRL1_TXRDY)
+    if (regs->TXCSRL & USB_TXCSRL1_TXRDY) {
       regs->TXCSRL = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
-    else
+    } else {
       regs->TXCSRL = USB_TXCSRL1_CLRDT;
-    ctrl_regs->TXIE |= TU_BIT(epn);
+    }
+    musb_regs->intr_txen |= TU_BIT(epn);
   } else {
     regs->RXMAXP = mps;
     regs->RXCSRH = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_RXCSRH1_ISO : 0;
-    if (regs->RXCSRL & USB_RXCSRL1_RXRDY)
+    if (regs->RXCSRL & USB_RXCSRL1_RXRDY) {
       regs->RXCSRL = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
-    else
+    } else {
       regs->RXCSRL = USB_RXCSRL1_CLRDT;
-    ctrl_regs->RXIE |= TU_BIT(epn);
+    }
+    musb_regs->intr_rxen |= TU_BIT(epn);
   }
 
   /* Setup FIFO */
@@ -580,11 +583,11 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
 void dcd_edpt_close_all(uint8_t rhport)
 {
   volatile musb_epn_regs_t *regs;
-  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
-  ctrl_regs->TXIE = 1; /* Enable only EP0 */
-  ctrl_regs->RXIE = 0;
+  musb_regs->intr_txen = 1; /* Enable only EP0 */
+  musb_regs->intr_rxen = 0;
   for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
     regs = musb_dcd_epn_regs(rhport, i);
     regs->TXMAXP = 0;
@@ -596,10 +599,11 @@ void dcd_edpt_close_all(uint8_t rhport)
 
     regs->RXMAXP = 0;
     regs->RXCSRH = 0;
-    if (regs->RXCSRL & USB_RXCSRL1_RXRDY)
+    if (regs->RXCSRL & USB_RXCSRL1_RXRDY) {
       regs->RXCSRL = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
-    else
+    } else {
       regs->RXCSRL = USB_RXCSRL1_CLRDT;
+    }
 
     musb_dcd_reset_fifo(rhport, i, 0);
     musb_dcd_reset_fifo(rhport, i, 1);
@@ -614,25 +618,27 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   unsigned const dir_in = tu_edpt_dir(ep_addr);
 
   volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
-  volatile musb_ctl_regs_t *ctrl_regs = musb_dcd_ctl_regs(rhport);
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
   if (dir_in) {
-    ctrl_regs->TXIE  &= ~TU_BIT(epn);
+    musb_regs->intr_txen  &= ~TU_BIT(epn);
     regs->TXMAXP = 0;
     regs->TXCSRH = 0;
-    if (regs->TXCSRL & USB_TXCSRL1_TXRDY)
+    if (regs->TXCSRL & USB_TXCSRL1_TXRDY) {
       regs->TXCSRL = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
-    else
+    } else {
       regs->TXCSRL = USB_TXCSRL1_CLRDT;
+    }
   } else {
-    ctrl_regs->RXIE  &= ~TU_BIT(epn);
+    musb_regs->intr_rxen  &= ~TU_BIT(epn);
     regs->RXMAXP = 0;
     regs->RXCSRH = 0;
-    if (regs->RXCSRL & USB_RXCSRL1_RXRDY)
+    if (regs->RXCSRL & USB_RXCSRL1_RXRDY) {
       regs->RXCSRL = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
-    else
+    } else {
       regs->RXCSRL = USB_RXCSRL1_CLRDT;
+    }
   }
   musb_dcd_reset_fifo(rhport, epn, dir_in);
   if (ie) musb_dcd_int_enable(rhport);
@@ -650,8 +656,9 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
   if (epnum) {
     _dcd.pipe_buf_is_fifo[tu_edpt_dir(ep_addr)] &= ~TU_BIT(epnum - 1);
     ret = edpt_n_xfer(rhport, ep_addr, buffer, total_bytes);
-  } else
+  } else {
     ret = edpt0_xfer(rhport, ep_addr, buffer, total_bytes);
+  }
   if (ie) musb_dcd_int_enable(rhport);
   return ret;
 }
@@ -719,18 +726,18 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 void dcd_int_handler(uint8_t rhport)
 {
   uint_fast8_t is, txis, rxis;
-  volatile musb_ctl_regs_t *ctrl_regs;
 
   //Part specific ISR setup/entry
   musb_dcd_int_handler_enter(rhport);
 
-  ctrl_regs = musb_dcd_ctl_regs(rhport);
-  is   = ctrl_regs->IS;   /* read and clear interrupt status */
-  txis = ctrl_regs->TXIS; /* read and clear interrupt status */
-  rxis = ctrl_regs->RXIS; /* read and clear interrupt status */
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
+
+  is   = musb_regs->intrusb;   /* read and clear interrupt status */
+  txis = musb_regs->intr_tx; /* read and clear interrupt status */
+  rxis = musb_regs->intr_rx; /* read and clear interrupt status */
   // TU_LOG1("D%2x T%2x R%2x\r\n", is, txis, rxis);
 
-  is &= ctrl_regs->IE; /* Clear disabled interrupts */
+  is &= musb_regs->intrusben; /* Clear disabled interrupts */
   if (is & USB_IS_DISCON) {
   }
   if (is & USB_IS_SOF) {
@@ -746,7 +753,7 @@ void dcd_int_handler(uint8_t rhport)
     dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
   }
 
-  txis &= ctrl_regs->TXIE; /* Clear disabled interrupts */
+  txis &= musb_regs->intr_txen; /* Clear disabled interrupts */
   if (txis & USB_TXIE_EP0) {
     process_ep0(rhport);
     txis &= ~TU_BIT(0);
@@ -756,7 +763,7 @@ void dcd_int_handler(uint8_t rhport)
     process_edpt_n(rhport, tu_edpt_addr(num, TUSB_DIR_IN));
     txis &= ~TU_BIT(num);
   }
-  rxis &= ctrl_regs->RXIE; /* Clear disabled interrupts */
+  rxis &= musb_regs->intr_rxen; /* Clear disabled interrupts */
   while (rxis) {
     unsigned const num = __builtin_ctz(rxis);
     process_edpt_n(rhport, tu_edpt_addr(num, TUSB_DIR_OUT));
diff --git a/src/portable/mentor/musb/musb_max32.h b/src/portable/mentor/musb/musb_max32.h
index 0712aeda41..9c048513cd 100644
--- a/src/portable/mentor/musb/musb_max32.h
+++ b/src/portable/mentor/musb/musb_max32.h
@@ -28,12 +28,14 @@
 #define TUSB_MUSB_MAX32_H_
 
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 #include "mxc_device.h"
 #include "usbhs_regs.h"
 
+const uintptr_t MUSB_BASES[] = { MXC_BASE_USBHS };
+
 #if CFG_TUD_ENABLED
 #define USBHS_M31_CLOCK_RECOVERY
 
@@ -92,14 +94,12 @@ static inline void musb_dcd_int_handler_enter(uint8_t rhport) {
   }
 }
 
-static inline void musb_dcd_int_handler_exit(uint8_t rhport)
-{
+static inline void musb_dcd_int_handler_exit(uint8_t rhport) {
   //restore register index
   musb_periph_inst[rhport]->index = isr_saved_index;
 }
 
-static inline void musb_dcd_phy_init(uint8_t rhport)
-{
+static inline void musb_dcd_phy_init(uint8_t rhport) {
   //Interrupt for VBUS disconnect
   musb_periph_inst[rhport]->mxm_int_en |= MXC_F_USBHS_MXM_INT_EN_NOVBUS;
 
@@ -136,42 +136,32 @@ static inline void musb_dcd_phy_init(uint8_t rhport)
   musb_periph_inst[rhport]->m31_phy_ponrst = 1;
 }
 
-static inline volatile musb_ctl_regs_t* musb_dcd_ctl_regs(uint8_t rhport)
-{
-  volatile musb_ctl_regs_t *regs = (volatile musb_ctl_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->faddr));
-  return regs;
-}
-
-static inline volatile musb_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum)
-{
+static inline volatile musb_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum) {
   //Need to set index to map EP registers
   musb_periph_inst[rhport]->index = epnum;
-  volatile musb_epn_regs_t *regs = (volatile musb_epn_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->inmaxp));
+  volatile musb_epn_regs_t* regs = (volatile musb_epn_regs_t*) ((uintptr_t) &(musb_periph_inst[rhport]->inmaxp));
   return regs;
 }
 
-static inline volatile musb_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport)
-{
+static inline volatile musb_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport) {
   //Need to set index to map EP0 registers
   musb_periph_inst[rhport]->index = 0;
-  volatile musb_ep0_regs_t *regs = (volatile musb_ep0_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->csr0));
+  volatile musb_ep0_regs_t* regs = (volatile musb_ep0_regs_t*) ((uintptr_t) &(musb_periph_inst[rhport]->csr0));
   return regs;
 }
 
-static volatile void *musb_dcd_ep_get_fifo_ptr(uint8_t rhport, unsigned epnum)
-{
-  volatile uint32_t *ptr;
+static volatile void* musb_dcd_ep_get_fifo_ptr(uint8_t rhport, unsigned epnum) {
+  volatile uint32_t* ptr;
 
   ptr = &(musb_periph_inst[rhport]->fifo0);
   ptr += epnum;
 
-  return (volatile void *) ptr;
+  return (volatile void*) ptr;
 }
 
 
-static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in, unsigned mps)
-{
-  (void)mps;
+static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in, unsigned mps) {
+  (void) mps;
 
   //Most likely the caller has already grabbed the right register block. But
   //as a precaution save and restore the register bank anyways
@@ -180,7 +170,7 @@ static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned
   musb_periph_inst[rhport]->index = epnum;
 
   //Disable double buffering
-  if(dir_in) {
+  if (dir_in) {
     musb_periph_inst[rhport]->incsru |= (MXC_F_USBHS_INCSRU_DPKTBUFDIS | MXC_F_USBHS_INCSRU_MODE);
   } else {
     musb_periph_inst[rhport]->outcsru |= (MXC_F_USBHS_OUTCSRU_DPKTBUFDIS);
@@ -189,8 +179,7 @@ static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned
   musb_periph_inst[rhport]->index = saved_index;
 }
 
-static inline void musb_dcd_reset_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in)
-{
+static inline void musb_dcd_reset_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in) {
   //Most likely the caller has already grabbed the right register block. But
   //as a precaution save and restore the register bank anyways
   unsigned saved_index = musb_periph_inst[rhport]->index;
@@ -198,7 +187,7 @@ static inline void musb_dcd_reset_fifo(uint8_t rhport, unsigned epnum, unsigned
   musb_periph_inst[rhport]->index = epnum;
 
   //Disable double buffering
-  if(dir_in) {
+  if (dir_in) {
     musb_periph_inst[rhport]->incsru |= (MXC_F_USBHS_INCSRU_DPKTBUFDIS);
   } else {
     musb_periph_inst[rhport]->outcsru |= (MXC_F_USBHS_OUTCSRU_DPKTBUFDIS);
@@ -210,7 +199,7 @@ static inline void musb_dcd_reset_fifo(uint8_t rhport, unsigned epnum, unsigned
 #endif // CFG_TUD_ENABLED
 
 #ifdef __cplusplus
- }
+}
 #endif
 
 #endif // TUSB_MUSB_MAX32_H_
diff --git a/src/portable/mentor/musb/musb_ti.h b/src/portable/mentor/musb/musb_ti.h
index ec0a267b1b..df77303a00 100644
--- a/src/portable/mentor/musb/musb_ti.h
+++ b/src/portable/mentor/musb/musb_ti.h
@@ -42,6 +42,8 @@
   #error "Unsupported MCUs"
 #endif
 
+const uintptr_t MUSB_BASES[] = { USB0_BASE };
+
 
 // Header supports both device and host modes. Only include what's necessary
 #if CFG_TUD_ENABLED
@@ -95,12 +97,6 @@ static inline void musb_dcd_int_handler_exit(uint8_t rhport){
   //Nothing to do for this part
 }
 
-static inline volatile musb_ctl_regs_t* musb_dcd_ctl_regs(uint8_t rhport)
-{
-  volatile musb_ctl_regs_t *regs = (volatile musb_ctl_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->FADDR));
-  return regs;
-}
-
 static inline volatile musb_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum)
 {
   uintptr_t baseptr = (uintptr_t)&(musb_periph_inst[rhport]->TXMAXP1);
diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index d21dcd6da4..9986a30e01 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -32,8 +32,8 @@
 *
 *******************************************************************************/
 
-#ifndef _TUSB_MUSB_TYPE_H_
-#define _TUSB_MUSB_TYPE_H_
+#ifndef TUSB_MUSB_TYPE_H_
+#define TUSB_MUSB_TYPE_H_
 
 #include "stdint.h"
 
@@ -41,6 +41,22 @@
  extern "C" {
 #endif
 
+#ifndef __IO
+  #define __IO volatile
+#endif
+
+#ifndef __I
+  #define __I  volatile const
+#endif
+
+#ifndef __O
+  #define __O  volatile
+#endif
+
+#ifndef __R
+  #define __R  volatile const
+#endif
+
 // Endpoint register mapping. Non-zero end points.
 typedef struct TU_ATTR_PACKED {
   uint16_t TXMAXP;
@@ -60,17 +76,131 @@ typedef struct TU_ATTR_PACKED {
   uint8_t   COUNT0;
 } musb_ep0_regs_t;
 
-// Control register mapping
-typedef struct TU_ATTR_PACKED {
-  uint8_t   FADDR;
-  uint8_t   POWER;
-  uint16_t  TXIS;
-  uint16_t  RXIS;
-  uint16_t  TXIE;
-  uint16_t  RXIE;
-  uint8_t   IS;
-  uint8_t   IE;
-} musb_ctl_regs_t;
+typedef struct {
+  //------------- Common -------------//
+  __IO uint8_t  faddr;                             // 0x00: FADDR
+  __IO uint8_t  power;                             // 0x01: POWER
+
+  __IO uint16_t intr_tx;                           // 0x02: INTR_TX
+  __IO uint16_t intr_rx;                           // 0x04: INTR_RX
+
+  __IO uint16_t intr_txen;                         // 0x06: INTR_TXEN
+  __IO uint16_t intr_rxen;                         // 0x08: INTR_RXEN
+
+  __IO uint8_t  intrusb;                           // 0x0A: INTRUSB
+  __IO uint8_t  intrusben;                         // 0x0B: INTRUSBEN
+
+  __IO uint16_t frame;                             // 0x0C: FRAME
+  __IO uint8_t  index;                             // 0x0E: INDEX
+  __IO uint8_t  testmode;                          // 0x0F: TESTMODE
+  __IO uint16_t inmaxp;                            // 0x10: INMAXP
+  union {
+    __IO uint8_t  csr0;                            // 0x12: CSR0
+    __IO uint8_t  incsrl;                          // 0x12: INCSRL
+  };
+  __IO uint8_t  incsru;                            // 0x13: INCSRU
+  __IO uint16_t outmaxp;                           // 0x14: OUTMAXP
+  __IO uint8_t  outcsrl;                           // 0x16: OUTCSRL
+  __IO uint8_t  outcsru;                           // 0x17: OUTCSRU
+  union {
+    __IO uint16_t count0;                          // 0x18: COUNT0
+    __IO uint16_t outcount;                        // 0x18: OUTCOUNT
+  };
+  __R  uint16_t rsv_0x1a_0x1f[3];
+  __IO uint32_t fifo0;                             // 0x20: FIFO0
+  __IO uint32_t fifo1;                             // 0x24: FIFO1
+  __IO uint32_t fifo2;                             // 0x28: FIFO2
+  __IO uint32_t fifo3;                             // 0x2c: FIFO3
+  __IO uint32_t fifo4;                             // 0x30: FIFO4
+  __IO uint32_t fifo5;                             // 0x34: FIFO5
+  __IO uint32_t fifo6;                             // 0x38: FIFO6
+  __IO uint32_t fifo7;                             // 0x3c: FIFO7
+  __IO uint32_t fifo8;                             // 0x40: FIFO8
+  __IO uint32_t fifo9;                             // 0x44: FIFO9
+  __IO uint32_t fifo10;                            // 0x48: FIFO10
+  __IO uint32_t fifo11;                            // 0x4c: FIFO11
+  __IO uint32_t fifo12;                            // 0x50: FIFO12
+  __IO uint32_t fifo13;                            // 0x54: FIFO13
+  __IO uint32_t fifo14;                            // 0x58: FIFO14
+  __IO uint32_t fifo15;                            // 0x5c: FIFO15
+  __IO uint8_t  devctl;                            // 0x60: DEVCTL
+  __IO uint8_t  misc;                              // 0x61: MISC
+
+  //------------- Dynammic FIFO -------------//
+  __IO uint8_t  txfifo_sz;                         // 0x62: TXFIFO_SZ
+  __IO uint8_t  rxfifo_sz;                         // 0x63: RXFIFO_SZ
+  __IO uint16_t txfifo_addr;                       // 0x64: TXFIFO_ADDR
+  __IO uint16_t rxfifo_addr;                       // 0x66: RXFIFO_ADDR
+
+  //------------- Additional Control/Status -------------//
+  union {
+    __O  uint32_t vcontrol;                        // 0x68: VCONTROL
+    __IO uint32_t vstatus;                         // 0x68: VSTATUS
+  };
+  __IO uint16_t hwvers;                            // 0x6c: HWVERS
+  __R  uint16_t rsv_0x6e_0x77[5];
+
+  //------------- Additional Configuration -------------//
+  __IO uint8_t  epinfo;                            // 0x78: EPINFO
+  __IO uint8_t  raminfo;                           // 0x79: RAMINFO
+  __IO uint8_t  softreset;                         // 0x7A: SOFTRESET (Analog), Link info
+  __IO uint8_t  vplen;                             // 0x7B: VPLEN
+  __IO uint8_t  hs_eof1;                           // 0x7C: HS_EOF1
+  __IO uint8_t  fs_eof1;                           // 0x7D: FS_EOF1
+  __IO uint8_t  ls_eof1;                           // 0x7E: LS_EOF1
+  __IO uint8_t  soft_rst;                          // 0x7F: SOFT_RST
+
+  //------------- Extended -------------//
+  __IO uint16_t ctuch;                             // 0x80: CTUCH
+  __IO uint16_t cthsrtn;                           // 0x82: CTHSRTN
+  __R  uint32_t rsv_0x84_0x3ff[223];
+
+  //------------- Analog PHY -------------//
+  __IO uint32_t mxm_usb_reg_00;                    // 0x400: MXM_USB_REG_00
+  __IO uint32_t m31_phy_utmi_reset;                // 0x404: M31_PHY_UTMI_RESET
+  __IO uint32_t m31_phy_utmi_vcontrol;             // 0x408: M31_PHY_UTMI_VCONTROL
+  __IO uint32_t m31_phy_clk_en;                    // 0x40C: M31_PHY_CLK_EN
+  __IO uint32_t m31_phy_ponrst;                    // 0x410: M31_PHY_PONRST
+  __IO uint32_t m31_phy_noncry_rstb;               // 0x414: M31_PHY_NONCRY_RSTB
+  __IO uint32_t m31_phy_noncry_en;                 // 0x418: M31_PHY_NONCRY_EN
+  __R  uint32_t rsv_0x41c;
+  __IO uint32_t m31_phy_u2_compliance_en;          // 0x420: M31_PHY_U2_COMPLIANCE_EN
+  __IO uint32_t m31_phy_u2_compliance_dac_adj;     // 0x424: M31_PHY_U2_COMPLIANCE_DAC_ADJ
+  __IO uint32_t m31_phy_u2_compliance_dac_adj_en;  // 0x428: M31_PHY_U2_COMPLIANCE_DAC_ADJ_EN
+  __IO uint32_t m31_phy_clk_rdy;                   // 0x42C: M31_PHY_CLK_RDY
+  __IO uint32_t m31_phy_pll_en;                    // 0x430: M31_PHY_PLL_EN
+  __IO uint32_t m31_phy_bist_ok;                   // 0x434: M31_PHY_BIST_OK
+  __IO uint32_t m31_phy_data_oe;                   // 0x438: M31_PHY_DATA_OE
+  __IO uint32_t m31_phy_oscouten;                  // 0x43C: M31_PHY_OSCOUTEN
+  __IO uint32_t m31_phy_lpm_alive;                 // 0x440: M31_PHY_LPM_ALIVE
+  __IO uint32_t m31_phy_hs_bist_mode;              // 0x444: M31_PHY_HS_BIST_MODE
+  __IO uint32_t m31_phy_coreclkin;                 // 0x448: M31_PHY_CORECLKIN
+  __IO uint32_t m31_phy_xtlsel;                    // 0x44C: M31_PHY_XTLSEL
+  __IO uint32_t m31_phy_ls_en;                     // 0x450: M31_PHY_LS_EN
+  __IO uint32_t m31_phy_debug_sel;                 // 0x454: M31_PHY_DEBUG_SEL
+  __IO uint32_t m31_phy_debug_out;                 // 0x458: M31_PHY_DEBUG_OUT
+  __IO uint32_t m31_phy_outclksel;                 // 0x45C: M31_PHY_OUTCLKSEL
+  __IO uint32_t m31_phy_xcfgi_31_0;                // 0x460: M31_PHY_XCFGI_31_0
+  __IO uint32_t m31_phy_xcfgi_63_32;               // 0x464: M31_PHY_XCFGI_63_32
+  __IO uint32_t m31_phy_xcfgi_95_64;               // 0x468: M31_PHY_XCFGI_95_64
+  __IO uint32_t m31_phy_xcfgi_127_96;              // 0x46C: M31_PHY_XCFGI_127_96
+  __IO uint32_t m31_phy_xcfgi_137_128;             // 0x470: M31_PHY_XCFGI_137_128
+  __IO uint32_t m31_phy_xcfg_hs_coarse_tune_num;   // 0x474: M31_PHY_XCFG_HS_COARSE_TUNE_NUM
+  __IO uint32_t m31_phy_xcfg_hs_fine_tune_num;     // 0x478: M31_PHY_XCFG_HS_FINE_TUNE_NUM
+  __IO uint32_t m31_phy_xcfg_fs_coarse_tune_num;   // 0x47C: M31_PHY_XCFG_FS_COARSE_TUNE_NUM
+  __IO uint32_t m31_phy_xcfg_fs_fine_tune_num;     // 0x480: M31_PHY_XCFG_FS_FINE_TUNE_NUM
+  __IO uint32_t m31_phy_xcfg_lock_range_max;       // 0x484: M31_PHY_XCFG_LOCK_RANGE_MAX
+  __IO uint32_t m31_phy_xcfgi_lock_range_min;      // 0x488: M31_PHY_XCFGI_LOCK_RANGE_MIN
+  __IO uint32_t m31_phy_xcfg_ob_rsel;              // 0x48C: M31_PHY_XCFG_OB_RSEL
+  __IO uint32_t m31_phy_xcfg_oc_rsel;              // 0x490: M31_PHY_XCFG_OC_RSEL
+  __IO uint32_t m31_phy_xcfgo;                     // 0x494: M31_PHY_XCFGO
+  __IO uint32_t mxm_int;                           // 0x498: MXM_INT
+  __IO uint32_t mxm_int_en;                        // 0x49C: MXM_INT_EN
+  __IO uint32_t mxm_suspend;                       // 0x4A0: MXM_SUSPEND
+  __IO uint32_t mxm_reg_a4;                        // 0x4A4: MXM_REG_A4
+} musb_regs_t;
+
+TU_VERIFY_STATIC(sizeof(musb_regs_t) == 0x4A8, "size is not correct");
 
 //*****************************************************************************
 //

From 7d8d364332189f840cbd0265f2834c1b343c5e52 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 15 Aug 2024 16:52:50 +0700
Subject: [PATCH 161/204] update musb fifo usage

---
 src/portable/mentor/musb/dcd_musb.c   | 20 +++++++++++---------
 src/portable/mentor/musb/musb_max32.h | 10 ----------
 src/portable/mentor/musb/musb_ti.h    | 10 ----------
 src/portable/mentor/musb/musb_type.h  | 17 +----------------
 4 files changed, 12 insertions(+), 45 deletions(-)

diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index 78fc3d616d..114720a6a9 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -153,10 +153,10 @@ static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigne
   ops[dir].tu_fifo_advance(f, total_len - rem);
 }
 
-static void process_setup_packet(uint8_t rhport)
-{
+static void process_setup_packet(uint8_t rhport) {
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
   uint32_t *p = (void*)&_dcd.setup_packet;
-  volatile uint32_t *fifo_ptr = musb_dcd_ep_get_fifo_ptr(rhport, 0);
+  volatile uint32_t *fifo_ptr = &musb_regs->fifo[0];
   volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
   p[0]        = *fifo_ptr;
   p[1]        = *fifo_ptr;
@@ -185,11 +185,12 @@ static bool handle_xfer_in(uint8_t rhport, uint_fast8_t ep_addr)
     return true;
   }
 
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
   volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
   const unsigned mps = regs->TXMAXP;
   const unsigned len = TU_MIN(mps, rem);
   void          *buf = pipe->buf;
-  volatile void *fifo_ptr = musb_dcd_ep_get_fifo_ptr(rhport, epnum);
+  volatile void *fifo_ptr = &musb_regs->fifo[epnum];
   // TU_LOG1("   %p mps %d len %d rem %d\r\n", buf, mps, len, rem);
   if (len) {
     if (_dcd.pipe_buf_is_fifo[TUSB_DIR_IN] & TU_BIT(epnum_minus1)) {
@@ -210,6 +211,7 @@ static bool handle_xfer_out(uint8_t rhport, uint_fast8_t ep_addr)
   unsigned epnum = tu_edpt_number(ep_addr);
   unsigned epnum_minus1 = epnum - 1;
   pipe_state_t  *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
   volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
   // TU_LOG1(" RXCSRL%d = %x\r\n", epnum_minus1 + 1, regs->RXCSRL);
 
@@ -220,7 +222,7 @@ static bool handle_xfer_out(uint8_t rhport, uint_fast8_t ep_addr)
   const unsigned vld = regs->RXCOUNT;
   const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf = pipe->buf;
-  volatile void *fifo_ptr = musb_dcd_ep_get_fifo_ptr(rhport, epnum);
+  volatile void *fifo_ptr = &musb_regs->fifo[epnum];
   if (len) {
     if (_dcd.pipe_buf_is_fifo[TUSB_DIR_OUT] & TU_BIT(epnum_minus1)) {
       pipe_read_write_packet_ff(buf, fifo_ptr, len, TUSB_DIR_OUT);
@@ -262,6 +264,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
 {
   (void)rhport;
   TU_ASSERT(total_bytes <= 64); /* Current implementation supports for only up to 64 bytes. */
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
   volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
   const unsigned req = _dcd.setup_packet.bmRequestType;
   TU_ASSERT(req != REQUEST_TYPE_INVALID || total_bytes == 0);
@@ -289,7 +292,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
     TU_ASSERT(total_bytes <= _dcd.remaining_ctrl);
     const unsigned rem = _dcd.remaining_ctrl;
     const unsigned len = TU_MIN(TU_MIN(rem, 64), total_bytes);
-    volatile void *fifo_ptr = musb_dcd_ep_get_fifo_ptr(rhport, 0);
+    volatile void *fifo_ptr = &musb_regs->fifo[0];
     if (dir_in) {
       pipe_write_packet(buffer, fifo_ptr, len);
 
@@ -327,6 +330,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
 
 static void process_ep0(uint8_t rhport)
 {
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
   volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
   uint_fast8_t csrl = ep0_regs->CSRL0;
 
@@ -368,7 +372,7 @@ static void process_ep0(uint8_t rhport)
       const unsigned vld = ep0_regs->COUNT0;
       const unsigned rem = _dcd.pipe0.remaining;
       const unsigned len = TU_MIN(TU_MIN(rem, 64), vld);
-      volatile void *fifo_ptr = musb_dcd_ep_get_fifo_ptr(rhport, 0);
+      volatile void *fifo_ptr = &musb_regs->fifo[0];
       pipe_read_packet(_dcd.pipe0.buf, fifo_ptr, len);
 
       _dcd.pipe0.remaining = rem - len;
@@ -383,8 +387,6 @@ static void process_ep0(uint8_t rhport)
     return;
   }
 
-  musb_regs_t* musb_regs = MUSB_REGS(rhport);
-
   /* When CSRL0 is zero, it means that completion of sending a any length packet
    * or receiving a zero length packet. */
   if (req != REQUEST_TYPE_INVALID && !tu_edpt_dir(req)) {
diff --git a/src/portable/mentor/musb/musb_max32.h b/src/portable/mentor/musb/musb_max32.h
index 9c048513cd..0a97f529a4 100644
--- a/src/portable/mentor/musb/musb_max32.h
+++ b/src/portable/mentor/musb/musb_max32.h
@@ -150,16 +150,6 @@ static inline volatile musb_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport) {
   return regs;
 }
 
-static volatile void* musb_dcd_ep_get_fifo_ptr(uint8_t rhport, unsigned epnum) {
-  volatile uint32_t* ptr;
-
-  ptr = &(musb_periph_inst[rhport]->fifo0);
-  ptr += epnum;
-
-  return (volatile void*) ptr;
-}
-
-
 static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in, unsigned mps) {
   (void) mps;
 
diff --git a/src/portable/mentor/musb/musb_ti.h b/src/portable/mentor/musb/musb_ti.h
index df77303a00..499e01e63b 100644
--- a/src/portable/mentor/musb/musb_ti.h
+++ b/src/portable/mentor/musb/musb_ti.h
@@ -113,16 +113,6 @@ static inline volatile musb_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport)
   return regs;
 }
 
-static volatile void *musb_dcd_ep_get_fifo_ptr(uint8_t rhport, unsigned epnum)
-{
-  if(epnum){
-    return (volatile void *)(&(musb_periph_inst[rhport]->FIFO1_WORD) + (epnum - 1));
-  } else {
-    return (volatile void *)&(musb_periph_inst[rhport]->FIFO0_WORD);
-  }
-}
-
-
 typedef struct {
   uint_fast16_t beg; /* offset of including first element */
   uint_fast16_t end; /* offset of excluding the last element */
diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index 9986a30e01..c31e0c984f 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -107,22 +107,7 @@ typedef struct {
     __IO uint16_t outcount;                        // 0x18: OUTCOUNT
   };
   __R  uint16_t rsv_0x1a_0x1f[3];
-  __IO uint32_t fifo0;                             // 0x20: FIFO0
-  __IO uint32_t fifo1;                             // 0x24: FIFO1
-  __IO uint32_t fifo2;                             // 0x28: FIFO2
-  __IO uint32_t fifo3;                             // 0x2c: FIFO3
-  __IO uint32_t fifo4;                             // 0x30: FIFO4
-  __IO uint32_t fifo5;                             // 0x34: FIFO5
-  __IO uint32_t fifo6;                             // 0x38: FIFO6
-  __IO uint32_t fifo7;                             // 0x3c: FIFO7
-  __IO uint32_t fifo8;                             // 0x40: FIFO8
-  __IO uint32_t fifo9;                             // 0x44: FIFO9
-  __IO uint32_t fifo10;                            // 0x48: FIFO10
-  __IO uint32_t fifo11;                            // 0x4c: FIFO11
-  __IO uint32_t fifo12;                            // 0x50: FIFO12
-  __IO uint32_t fifo13;                            // 0x54: FIFO13
-  __IO uint32_t fifo14;                            // 0x58: FIFO14
-  __IO uint32_t fifo15;                            // 0x5c: FIFO15
+  __IO uint32_t fifo[16];                          // 0x20-0x5C: FIFO 0-15
   __IO uint8_t  devctl;                            // 0x60: DEVCTL
   __IO uint8_t  misc;                              // 0x61: MISC
 

From 06e52e4fb298c15c6d918150b1c70873963c0673 Mon Sep 17 00:00:00 2001
From: Hinko Kocevar <hinko.kocevar@ess.eu>
Date: Thu, 15 Aug 2024 14:33:02 +0200
Subject: [PATCH 162/204] couple of fixes for usbtmc example

---
 examples/device/usbtmc/src/usb_descriptors.c | 21 +++++---------------
 1 file changed, 5 insertions(+), 16 deletions(-)

diff --git a/examples/device/usbtmc/src/usb_descriptors.c b/examples/device/usbtmc/src/usb_descriptors.c
index 54948291ed..85acd990a8 100644
--- a/examples/device/usbtmc/src/usb_descriptors.c
+++ b/examples/device/usbtmc/src/usb_descriptors.c
@@ -38,7 +38,7 @@
 #define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
                            _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
 
-#define USB_VID   0xCafe
+#define USB_VID   0xcafe
 #define USB_BCD   0x0200
 
 //--------------------------------------------------------------------+
@@ -48,8 +48,8 @@ tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
-    .bcdUSB             = 0x0200,
-    .bDeviceClass       = 0x00,
+    .bcdUSB             = USB_BCD,
+    .bDeviceClass       = TUSB_CLASS_UNSPECIFIED,
     .bDeviceSubClass    = 0x00,
     .bDeviceProtocol    = 0x00,
 
@@ -57,7 +57,7 @@ tusb_desc_device_t const desc_device =
 
     .idVendor           = USB_VID,
     .idProduct          = USB_PID,
-    .bcdDevice          = USB_BCD,
+    .bcdDevice          = 0x0100,
 
     .iManufacturer      = 0x01,
     .iProduct           = 0x02,
@@ -112,17 +112,6 @@ enum
 
 #define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_USBTMC_DESC_LEN)
 
-#if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX
-  // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
-  // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
-  // Note: since CDC EP ( 1 & 2), HID (4) are spot-on, thus we only need to force
-  // endpoint number for MSC to 5
-  #define EPNUM_MSC   0x05
-#else
-  #define EPNUM_MSC   0x03
-#endif
-
-
 uint8_t const desc_fs_configuration[] =
 {
   // Config number, interface count, string index, total length, attribute, power in mA
@@ -151,7 +140,7 @@ tusb_desc_device_qualifier_t const desc_device_qualifier =
   .bDescriptorType    = TUSB_DESC_DEVICE_QUALIFIER,
   .bcdUSB             = USB_BCD,
 
-  .bDeviceClass       = 0x00,
+  .bDeviceClass       = TUSB_CLASS_UNSPECIFIED,
   .bDeviceSubClass    = 0x00,
   .bDeviceProtocol    = 0x00,
 

From 6152adb17fd0e8d76c60f589d84eee0fec323fa5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 15 Aug 2024 19:05:28 +0700
Subject: [PATCH 163/204] use musb_ep_csr_t for indexed CSR, also use indexed
 csr for TI access as well. Merge ep0 and epn together

---
 src/portable/mentor/musb/dcd_musb.c   | 181 +++++++++++++-------------
 src/portable/mentor/musb/musb_max32.h |  14 --
 src/portable/mentor/musb/musb_ti.h    |  16 ---
 src/portable/mentor/musb/musb_type.h  | 104 ++++++++++-----
 4 files changed, 163 insertions(+), 152 deletions(-)

diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index 114720a6a9..48f6e9d97f 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -41,10 +41,6 @@ _Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
 // Following symbols must be defined by port header
 // - musb_dcd_int_enable/disable/clear/get_enable
 // - musb_dcd_int_handler_enter/exit
-// - musb_dcd_epn_regs: Get memory mapped struct of end point registers
-// - musb_dcd_ep0_regs: Get memory mapped struct of EP0 registers
-// - musb_dcd_ctl_regs: Get memory mapped struct of control registers
-// - musb_dcd_ep_get_fifo_ptr: Gets the address of the provided EP's FIFO
 // - musb_dcd_setup_fifo/reset_fifo: Configuration of the EP's FIFO
 #if TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
   #include "musb_ti.h"
@@ -157,7 +153,7 @@ static void process_setup_packet(uint8_t rhport) {
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
   uint32_t *p = (void*)&_dcd.setup_packet;
   volatile uint32_t *fifo_ptr = &musb_regs->fifo[0];
-  volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
+
   p[0]        = *fifo_ptr;
   p[1]        = *fifo_ptr;
 
@@ -170,7 +166,10 @@ static void process_setup_packet(uint8_t rhport) {
   _dcd.remaining_ctrl   = len;
   const unsigned dir_in = tu_edpt_dir(_dcd.setup_packet.bmRequestType);
   /* Clear RX FIFO and reverse the transaction direction */
-  if (len && dir_in) ep0_regs->CSRL0 = USB_CSRL0_RXRDYC;
+  if (len && dir_in) {
+    musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, 0);
+    ep_csr->csr0l = USB_CSRL0_RXRDYC;
+  }
 }
 
 static bool handle_xfer_in(uint8_t rhport, uint_fast8_t ep_addr)
@@ -186,8 +185,8 @@ static bool handle_xfer_in(uint8_t rhport, uint_fast8_t ep_addr)
   }
 
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
-  volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
-  const unsigned mps = regs->TXMAXP;
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epnum);
+  const unsigned mps = ep_csr->tx_maxp;
   const unsigned len = TU_MIN(mps, rem);
   void          *buf = pipe->buf;
   volatile void *fifo_ptr = &musb_regs->fifo[epnum];
@@ -201,8 +200,8 @@ static bool handle_xfer_in(uint8_t rhport, uint_fast8_t ep_addr)
     }
     pipe->remaining = rem - len;
   }
-  regs->TXCSRL = USB_TXCSRL1_TXRDY;
-  // TU_LOG1(" TXCSRL%d = %x %d\r\n", epnum, regs->TXCSRL, rem - len);
+  ep_csr->tx_csrl = USB_TXCSRL1_TXRDY;
+  // TU_LOG1(" TXCSRL%d = %x %d\r\n", epnum, ep_csr->tx_csrl, rem - len);
   return false;
 }
 
@@ -212,14 +211,14 @@ static bool handle_xfer_out(uint8_t rhport, uint_fast8_t ep_addr)
   unsigned epnum_minus1 = epnum - 1;
   pipe_state_t  *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
-  volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
-  // TU_LOG1(" RXCSRL%d = %x\r\n", epnum_minus1 + 1, regs->RXCSRL);
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epnum);
+  // TU_LOG1(" RXCSRL%d = %x\r\n", epnum_minus1 + 1, ep_csr->rx_csrl);
 
-  TU_ASSERT(regs->RXCSRL & USB_RXCSRL1_RXRDY);
+  TU_ASSERT(ep_csr->rx_csrl & USB_RXCSRL1_RXRDY);
 
-  const unsigned mps = regs->RXMAXP;
+  const unsigned mps = ep_csr->rx_maxp;
   const unsigned rem = pipe->remaining;
-  const unsigned vld = regs->RXCOUNT;
+  const unsigned vld = ep_csr->rx_count;
   const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf = pipe->buf;
   volatile void *fifo_ptr = &musb_regs->fifo[epnum];
@@ -236,7 +235,7 @@ static bool handle_xfer_out(uint8_t rhport, uint_fast8_t ep_addr)
     pipe->buf = NULL;
     return NULL != buf;
   }
-  regs->RXCSRL = 0; /* Clear RXRDY bit */
+  ep_csr->rx_csrl = 0; /* Clear RXRDY bit */
   return false;
 }
 
@@ -254,8 +253,9 @@ static bool edpt_n_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16
   if (dir_in) {
     handle_xfer_in(rhport, ep_addr);
   } else {
-    volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epnum);
-    if (regs->RXCSRL & USB_RXCSRL1_RXRDY) regs->RXCSRL = 0;
+    musb_regs_t* musb_regs = MUSB_REGS(rhport);
+    musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epnum);
+    if (ep_csr->rx_csrl & USB_RXCSRL1_RXRDY) ep_csr->rx_csrl = 0;
   }
   return true;
 }
@@ -265,7 +265,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
   (void)rhport;
   TU_ASSERT(total_bytes <= 64); /* Current implementation supports for only up to 64 bytes. */
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
-  volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, 0);
   const unsigned req = _dcd.setup_packet.bmRequestType;
   TU_ASSERT(req != REQUEST_TYPE_INVALID || total_bytes == 0);
 
@@ -276,7 +276,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
      * may have already finished and received the next setup packet
      * without calling this function, so we have no choice but to
      * invoke the callback function of status packet here. */
-    // TU_LOG1(" STATUS OUT ep0_regs->CSRL0 = %x\r\n", ep0_regs->CSRL0);
+    // TU_LOG1(" STATUS OUT ep_csr->csr0l = %x\r\n", ep_csr->csr0l);
     _dcd.status_out = 0;
     if (req == REQUEST_TYPE_INVALID) {
       dcd_event_xfer_complete(rhport, ep_addr, total_bytes, XFER_RESULT_SUCCESS, false);
@@ -305,25 +305,25 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
         _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID; /* Change to STATUS/SETUP stage */
         _dcd.status_out = 1;
         /* Flush TX FIFO and reverse the transaction direction. */
-        ep0_regs->CSRL0 = USB_CSRL0_TXRDY | USB_CSRL0_DATAEND;
+        ep_csr->csr0l = USB_CSRL0_TXRDY | USB_CSRL0_DATAEND;
       } else {
-        ep0_regs->CSRL0 = USB_CSRL0_TXRDY; /* Flush TX FIFO to return ACK. */
+        ep_csr->csr0l = USB_CSRL0_TXRDY; /* Flush TX FIFO to return ACK. */
       }
-      // TU_LOG1(" IN ep0_regs->CSRL0 = %x\r\n", ep0_regs->CSRL0);
+      // TU_LOG1(" IN ep_csr->csr0l = %x\r\n", ep_csr->csr0l);
     } else {
-      // TU_LOG1(" OUT ep0_regs->CSRL0 = %x\r\n", ep0_regs->CSRL0);
+      // TU_LOG1(" OUT ep_csr->csr0l = %x\r\n", ep_csr->csr0l);
       _dcd.pipe0.buf       = buffer;
       _dcd.pipe0.length    = len;
       _dcd.pipe0.remaining = len;
-      ep0_regs->CSRL0 = USB_CSRL0_RXRDYC; /* Clear RX FIFO to return ACK. */
+      ep_csr->csr0l = USB_CSRL0_RXRDYC; /* Clear RX FIFO to return ACK. */
     }
   } else if (dir_in) {
-    // TU_LOG1(" STATUS IN ep0_regs->CSRL0  = %x\r\n", ep0_regs->CSRL0);
+    // TU_LOG1(" STATUS IN ep_csr->csr0l  = %x\r\n", ep_csr->csr0l);
     _dcd.pipe0.buf = NULL;
     _dcd.pipe0.length    = 0;
     _dcd.pipe0.remaining = 0;
     /* Clear RX FIFO and reverse the transaction direction */
-    ep0_regs->CSRL0 = USB_CSRL0_RXRDYC | USB_CSRL0_DATAEND;
+    ep_csr->csr0l = USB_CSRL0_RXRDYC | USB_CSRL0_DATAEND;
   }
   return true;
 }
@@ -331,21 +331,21 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
 static void process_ep0(uint8_t rhport)
 {
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
-  volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
-  uint_fast8_t csrl = ep0_regs->CSRL0;
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, 0);
+  uint_fast8_t csrl = ep_csr->csr0l;
 
-  // TU_LOG1(" EP0 ep0_regs->CSRL0 = %x\r\n", csrl);
+  // TU_LOG1(" EP0 ep_csr->csr0l = %x\r\n", csrl);
 
   if (csrl & USB_CSRL0_STALLED) {
     /* Returned STALL packet to HOST. */
-    ep0_regs->CSRL0 = 0; /* Clear STALL */
+    ep_csr->csr0l = 0; /* Clear STALL */
     return;
   }
 
   unsigned req = _dcd.setup_packet.bmRequestType;
   if (csrl & USB_CSRL0_SETEND) {
     TU_LOG1("   ABORT by the next packets\r\n");
-    ep0_regs->CSRL0 = USB_CSRL0_SETENDC;
+    ep_csr->csr0l = USB_CSRL0_SETENDC;
     if (req != REQUEST_TYPE_INVALID && _dcd.pipe0.buf) {
       /* DATA stage was aborted by receiving STATUS or SETUP packet. */
       _dcd.pipe0.buf = NULL;
@@ -363,13 +363,13 @@ static void process_ep0(uint8_t rhport)
     /* Received SETUP or DATA OUT packet */
     if (req == REQUEST_TYPE_INVALID) {
       /* SETUP */
-      TU_ASSERT(sizeof(tusb_control_request_t) == ep0_regs->COUNT0,);
+      TU_ASSERT(sizeof(tusb_control_request_t) == ep_csr->rx_count,);
       process_setup_packet(rhport);
       return;
     }
     if (_dcd.pipe0.buf) {
       /* DATA OUT */
-      const unsigned vld = ep0_regs->COUNT0;
+      const unsigned vld = ep_csr->rx_count;
       const unsigned rem = _dcd.pipe0.remaining;
       const unsigned len = TU_MIN(TU_MIN(rem, 64), vld);
       volatile void *fifo_ptr = &musb_regs->fifo[0];
@@ -415,22 +415,23 @@ static void process_ep0(uint8_t rhport)
 static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
 {
   bool completed;
-  const unsigned dir_in     = tu_edpt_dir(ep_addr);
+  const unsigned dir_in = tu_edpt_dir(ep_addr);
   const unsigned epn = tu_edpt_number(ep_addr);
   const unsigned epn_minus1 = epn - 1;
 
-  volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epn);
   if (dir_in) {
-    // TU_LOG1(" TXCSRL%d = %x\r\n", epn, regs->TXCSRL);
-    if (regs->TXCSRL & USB_TXCSRL1_STALLED) {
-      regs->TXCSRL &= ~(USB_TXCSRL1_STALLED | USB_TXCSRL1_UNDRN);
+    // TU_LOG1(" TX CSRL%d = %x\r\n", epn, ep_csr->tx_csrl);
+    if (ep_csr->tx_csrl & USB_TXCSRL1_STALLED) {
+      ep_csr->tx_csrl &= ~(USB_TXCSRL1_STALLED | USB_TXCSRL1_UNDRN);
       return;
     }
     completed = handle_xfer_in(rhport, ep_addr);
   } else {
-    // TU_LOG1(" RXCSRL%d = %x\r\n", epn, regs->RXCSRL);
-    if (regs->RXCSRL & USB_RXCSRL1_STALLED) {
-      regs->RXCSRL &= ~(USB_RXCSRL1_STALLED | USB_RXCSRL1_OVER);
+    // TU_LOG1(" RX CSRL%d = %x\r\n", epn, ep_csr->rx_csrl);
+    if (ep_csr->rx_csrl & USB_RXCSRL1_STALLED) {
+      ep_csr->rx_csrl &= ~(USB_RXCSRL1_STALLED | USB_RXCSRL1_OVER);
       return;
     }
     completed = handle_xfer_out(rhport, ep_addr);
@@ -492,12 +493,14 @@ void dcd_int_disable(uint8_t rhport)
 void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
 {
   (void)dev_addr;
-  volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, 0);
+
   _dcd.pipe0.buf       = NULL;
   _dcd.pipe0.length    = 0;
   _dcd.pipe0.remaining = 0;
   /* Clear RX FIFO to return ACK. */
-  ep0_regs->CSRL0 = USB_CSRL0_RXRDYC | USB_CSRL0_DATAEND;
+  ep_csr->csr0l = USB_CSRL0_RXRDYC | USB_CSRL0_DATAEND;
 }
 
 // Wake up host
@@ -554,24 +557,24 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   pipe->length    = 0;
   pipe->remaining = 0;
 
-  volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epn);
   if (dir_in) {
-    regs->TXMAXP = mps;
-    regs->TXCSRH = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_TXCSRH1_ISO : 0;
-    if (regs->TXCSRL & USB_TXCSRL1_TXRDY) {
-      regs->TXCSRL = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
+    ep_csr->tx_maxp = mps;
+    ep_csr->tx_csrh = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_TXCSRH1_ISO : 0;
+    if (ep_csr->tx_csrl & USB_TXCSRL1_TXRDY) {
+      ep_csr->tx_csrl = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
     } else {
-      regs->TXCSRL = USB_TXCSRL1_CLRDT;
+      ep_csr->tx_csrl = USB_TXCSRL1_CLRDT;
     }
     musb_regs->intr_txen |= TU_BIT(epn);
   } else {
-    regs->RXMAXP = mps;
-    regs->RXCSRH = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_RXCSRH1_ISO : 0;
-    if (regs->RXCSRL & USB_RXCSRL1_RXRDY) {
-      regs->RXCSRL = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
+    ep_csr->rx_maxp = mps;
+    ep_csr->rx_csrh = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_RXCSRH1_ISO : 0;
+    if (ep_csr->rx_csrl & USB_RXCSRL1_RXRDY) {
+      ep_csr->rx_csrl = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
     } else {
-      regs->RXCSRL = USB_RXCSRL1_CLRDT;
+      ep_csr->rx_csrl = USB_RXCSRL1_CLRDT;
     }
     musb_regs->intr_rxen |= TU_BIT(epn);
   }
@@ -584,27 +587,26 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
 
 void dcd_edpt_close_all(uint8_t rhport)
 {
-  volatile musb_epn_regs_t *regs;
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
   musb_regs->intr_txen = 1; /* Enable only EP0 */
   musb_regs->intr_rxen = 0;
   for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
-    regs = musb_dcd_epn_regs(rhport, i);
-    regs->TXMAXP = 0;
-    regs->TXCSRH = 0;
-    if (regs->TXCSRL & USB_TXCSRL1_TXRDY)
-      regs->TXCSRL = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
+    musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, i);
+    ep_csr->tx_maxp = 0;
+    ep_csr->tx_csrh = 0;
+    if (ep_csr->tx_csrl & USB_TXCSRL1_TXRDY)
+      ep_csr->tx_csrl = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
     else
-      regs->TXCSRL = USB_TXCSRL1_CLRDT;
+      ep_csr->tx_csrl = USB_TXCSRL1_CLRDT;
 
-    regs->RXMAXP = 0;
-    regs->RXCSRH = 0;
-    if (regs->RXCSRL & USB_RXCSRL1_RXRDY) {
-      regs->RXCSRL = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
+    ep_csr->rx_maxp = 0;
+    ep_csr->rx_csrh = 0;
+    if (ep_csr->rx_csrl & USB_RXCSRL1_RXRDY) {
+      ep_csr->rx_csrl = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
     } else {
-      regs->RXCSRL = USB_RXCSRL1_CLRDT;
+      ep_csr->rx_csrl = USB_RXCSRL1_CLRDT;
     }
 
     musb_dcd_reset_fifo(rhport, i, 0);
@@ -618,28 +620,27 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
 {
   unsigned const epn    = tu_edpt_number(ep_addr);
   unsigned const dir_in = tu_edpt_dir(ep_addr);
-
-  volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epn);
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
   if (dir_in) {
     musb_regs->intr_txen  &= ~TU_BIT(epn);
-    regs->TXMAXP = 0;
-    regs->TXCSRH = 0;
-    if (regs->TXCSRL & USB_TXCSRL1_TXRDY) {
-      regs->TXCSRL = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
+    ep_csr->tx_maxp = 0;
+    ep_csr->tx_csrh = 0;
+    if (ep_csr->tx_csrl & USB_TXCSRL1_TXRDY) {
+      ep_csr->tx_csrl = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
     } else {
-      regs->TXCSRL = USB_TXCSRL1_CLRDT;
+      ep_csr->tx_csrl = USB_TXCSRL1_CLRDT;
     }
   } else {
     musb_regs->intr_rxen  &= ~TU_BIT(epn);
-    regs->RXMAXP = 0;
-    regs->RXCSRH = 0;
-    if (regs->RXCSRL & USB_RXCSRL1_RXRDY) {
-      regs->RXCSRL = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
+    ep_csr->rx_maxp = 0;
+    ep_csr->rx_csrh = 0;
+    if (ep_csr->rx_csrl & USB_RXCSRL1_RXRDY) {
+      ep_csr->rx_csrl = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
     } else {
-      regs->RXCSRL = USB_RXCSRL1_CLRDT;
+      ep_csr->rx_csrl = USB_RXCSRL1_CLRDT;
     }
   }
   musb_dcd_reset_fifo(rhport, epn, dir_in);
@@ -682,25 +683,24 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_
 }
 
 // Stall endpoint
-void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
-{
+void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
   unsigned const epn = tu_edpt_number(ep_addr);
   unsigned const ie = musb_dcd_get_int_enable(rhport);
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epn);
   musb_dcd_int_disable(rhport);
   if (0 == epn) {
-    volatile musb_ep0_regs_t* ep0_regs = musb_dcd_ep0_regs(rhport);
     if (!ep_addr) { /* Ignore EP80 */
       _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
       _dcd.pipe0.buf = NULL;
-      ep0_regs->CSRL0 = USB_CSRL0_STALL;
+      ep_csr->csr0l = USB_CSRL0_STALL;
     }
   } else {
-    volatile musb_epn_regs_t *regs = musb_dcd_epn_regs(rhport, epn);
     if (tu_edpt_dir(ep_addr)) { /* IN */
-      regs->TXCSRL = USB_TXCSRL1_STALL;
+      ep_csr->tx_csrl = USB_TXCSRL1_STALL;
     } else { /* OUT */
-      TU_ASSERT(!(regs->RXCSRL & USB_RXCSRL1_RXRDY),);
-      regs->RXCSRL = USB_RXCSRL1_STALL;
+      TU_ASSERT(!(ep_csr->rx_csrl & USB_RXCSRL1_RXRDY),);
+      ep_csr->rx_csrl = USB_RXCSRL1_STALL;
     }
   }
   if (ie) musb_dcd_int_enable(rhport);
@@ -711,13 +711,14 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 {
   (void)rhport;
   unsigned const epn = tu_edpt_number(ep_addr);
-  musb_epn_regs_t volatile *regs = musb_dcd_epn_regs(rhport, epn);
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epn);
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
   if (tu_edpt_dir(ep_addr)) { /* IN */
-    regs->TXCSRL = USB_TXCSRL1_CLRDT;
+    ep_csr->tx_csrl = USB_TXCSRL1_CLRDT;
   } else { /* OUT */
-    regs->RXCSRL = USB_RXCSRL1_CLRDT;
+    ep_csr->rx_csrl = USB_RXCSRL1_CLRDT;
   }
   if (ie) musb_dcd_int_enable(rhport);
 }
diff --git a/src/portable/mentor/musb/musb_max32.h b/src/portable/mentor/musb/musb_max32.h
index 0a97f529a4..43f56de3cf 100644
--- a/src/portable/mentor/musb/musb_max32.h
+++ b/src/portable/mentor/musb/musb_max32.h
@@ -136,20 +136,6 @@ static inline void musb_dcd_phy_init(uint8_t rhport) {
   musb_periph_inst[rhport]->m31_phy_ponrst = 1;
 }
 
-static inline volatile musb_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum) {
-  //Need to set index to map EP registers
-  musb_periph_inst[rhport]->index = epnum;
-  volatile musb_epn_regs_t* regs = (volatile musb_epn_regs_t*) ((uintptr_t) &(musb_periph_inst[rhport]->inmaxp));
-  return regs;
-}
-
-static inline volatile musb_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport) {
-  //Need to set index to map EP0 registers
-  musb_periph_inst[rhport]->index = 0;
-  volatile musb_ep0_regs_t* regs = (volatile musb_ep0_regs_t*) ((uintptr_t) &(musb_periph_inst[rhport]->csr0));
-  return regs;
-}
-
 static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in, unsigned mps) {
   (void) mps;
 
diff --git a/src/portable/mentor/musb/musb_ti.h b/src/portable/mentor/musb/musb_ti.h
index 499e01e63b..d1a0aa4f9b 100644
--- a/src/portable/mentor/musb/musb_ti.h
+++ b/src/portable/mentor/musb/musb_ti.h
@@ -97,22 +97,6 @@ static inline void musb_dcd_int_handler_exit(uint8_t rhport){
   //Nothing to do for this part
 }
 
-static inline volatile musb_epn_regs_t* musb_dcd_epn_regs(uint8_t rhport, unsigned epnum)
-{
-  uintptr_t baseptr = (uintptr_t)&(musb_periph_inst[rhport]->TXMAXP1);
-
-  //On the TI parts, the epn registers are 16-bytes apart. The core regs defined
-  //by musb_dcd_epn_regs and 6 reserved/other use bytes
-  volatile musb_epn_regs_t *regs = (volatile musb_epn_regs_t*)(baseptr + ((epnum - 1) * 16));
-  return regs;
-}
-
-static inline volatile musb_ep0_regs_t* musb_dcd_ep0_regs(uint8_t rhport)
-{
-  volatile musb_ep0_regs_t *regs = (volatile musb_ep0_regs_t*)((uintptr_t)&(musb_periph_inst[rhport]->CSRL0));
-  return regs;
-}
-
 typedef struct {
   uint_fast16_t beg; /* offset of including first element */
   uint_fast16_t end; /* offset of excluding the last element */
diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index c31e0c984f..670bc2ca10 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -1,3 +1,29 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
 /******************************************************************************
 *
 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
@@ -57,24 +83,29 @@
   #define __R  volatile const
 #endif
 
-// Endpoint register mapping. Non-zero end points.
-typedef struct TU_ATTR_PACKED {
-  uint16_t TXMAXP;
-  uint8_t  TXCSRL;
-  uint8_t  TXCSRH;
-  uint16_t RXMAXP;
-  uint8_t  RXCSRL;
-  uint8_t  RXCSRH;
-  uint16_t RXCOUNT;
-} musb_epn_regs_t;
-
-// Endpoint 0 register mapping.
 typedef struct TU_ATTR_PACKED {
-  uint8_t   CSRL0;
-  uint8_t   CSRH0;
-  uint32_t  RESERVED;
-  uint8_t   COUNT0;
-} musb_ep0_regs_t;
+  __IO uint16_t tx_maxp;       // 0x00: TXMAXP
+  union {
+    __IO uint8_t csr0l;        // 0x02: CSR0
+    __IO uint8_t tx_csrl;      // 0x02: TX CSRL
+  };
+  union {
+    __IO uint8_t csr0h;        // 0x03: CSR0H
+    __IO uint8_t tx_csrh;      // 0x03: TX CSRH
+  };
+  __IO uint16_t rx_maxp;       // 0x04: RX MAXP
+  __IO uint8_t  rx_csrl;       // 0x06: RX CSRL
+  __IO uint8_t  rx_csrh;       // 0x07: RX CSRH
+  __IO uint16_t rx_count;      // 0x08: RX COUNT
+  __IO uint8_t tx_type;        // 0x0A: TX TYPE
+  __IO uint8_t tx_interval;    // 0x0B: TX INTERVAL
+  __IO uint8_t rx_type;        // 0x0C: RX TYPE
+  __IO uint8_t rx_interval;    // 0x0D: RX INTERVAL
+  __IO uint8_t reserved_0x0e;  // 0x0E: Reserved
+  __IO uint8_t fifo_size;      // 0x0F: FIFO_SIZE
+} musb_ep_csr_t;
+
+TU_VERIFY_STATIC(sizeof(musb_ep_csr_t) == 16, "size is not correct");
 
 typedef struct {
   //------------- Common -------------//
@@ -93,21 +124,14 @@ typedef struct {
   __IO uint16_t frame;                             // 0x0C: FRAME
   __IO uint8_t  index;                             // 0x0E: INDEX
   __IO uint8_t  testmode;                          // 0x0F: TESTMODE
-  __IO uint16_t inmaxp;                            // 0x10: INMAXP
-  union {
-    __IO uint8_t  csr0;                            // 0x12: CSR0
-    __IO uint8_t  incsrl;                          // 0x12: INCSRL
-  };
-  __IO uint8_t  incsru;                            // 0x13: INCSRU
-  __IO uint16_t outmaxp;                           // 0x14: OUTMAXP
-  __IO uint8_t  outcsrl;                           // 0x16: OUTCSRL
-  __IO uint8_t  outcsru;                           // 0x17: OUTCSRU
-  union {
-    __IO uint16_t count0;                          // 0x18: COUNT0
-    __IO uint16_t outcount;                        // 0x18: OUTCOUNT
-  };
-  __R  uint16_t rsv_0x1a_0x1f[3];
+
+  //------------- Indexed CSR -------------//
+  musb_ep_csr_t indexed_csr;                       // 0x10-0x1F: Indexed CSR 0-15
+
+  //------------- FIFOs -------------//
   __IO uint32_t fifo[16];                          // 0x20-0x5C: FIFO 0-15
+
+  // Common (2)
   __IO uint8_t  devctl;                            // 0x60: DEVCTL
   __IO uint8_t  misc;                              // 0x61: MISC
 
@@ -138,7 +162,13 @@ typedef struct {
   //------------- Extended -------------//
   __IO uint16_t ctuch;                             // 0x80: CTUCH
   __IO uint16_t cthsrtn;                           // 0x82: CTHSRTN
-  __R  uint32_t rsv_0x84_0x3ff[223];
+  __R  uint32_t rsv_0x84_0xff[31];                 // 0x84-0xFF: Reserved
+
+  //------------- Absolute CSR (used index to remap to Indexed above) -------------//
+  // TI tm4c can access this directly, but should use indexed_csr for portability
+  musb_ep_csr_t ep_csr[16];                        // 0x100-0x1FF: EP0-15 CSR
+
+  __R  uint32_t rsv_0x200_0x3ff[128];              // 0x200-0x3FF: Reserved
 
   //------------- Analog PHY -------------//
   __IO uint32_t mxm_usb_reg_00;                    // 0x400: MXM_USB_REG_00
@@ -187,6 +217,16 @@ typedef struct {
 
 TU_VERIFY_STATIC(sizeof(musb_regs_t) == 0x4A8, "size is not correct");
 
+//--------------------------------------------------------------------+
+// Helper
+//--------------------------------------------------------------------+
+
+TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_regs, unsigned epnum) {
+  musb_regs->index = epnum;
+  return &musb_regs->indexed_csr;
+}
+
+
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_FADDR register.

From 33e3ea36450a30d76113e5e356ddf5f99cdda2c5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 15 Aug 2024 23:46:33 +0700
Subject: [PATCH 164/204] remove analog PHY from musb_regs_t hil: remove
 ch32v203 since not reliable enough

---
 src/portable/mentor/musb/musb_type.h | 138 ++++++++++-----------------
 test/hil/rpi.json                    |  14 +--
 2 files changed, 55 insertions(+), 97 deletions(-)

diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index 670bc2ca10..57ab2aefae 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -97,136 +97,94 @@ typedef struct TU_ATTR_PACKED {
   __IO uint8_t  rx_csrl;       // 0x06: RX CSRL
   __IO uint8_t  rx_csrh;       // 0x07: RX CSRH
   __IO uint16_t rx_count;      // 0x08: RX COUNT
-  __IO uint8_t tx_type;        // 0x0A: TX TYPE
+  union {
+    __IO uint8_t type0;        // 0x0A: TYPE0 (host only)
+    __IO uint8_t tx_type;      // 0x0A: TX TYPE
+  };
   __IO uint8_t tx_interval;    // 0x0B: TX INTERVAL
   __IO uint8_t rx_type;        // 0x0C: RX TYPE
   __IO uint8_t rx_interval;    // 0x0D: RX INTERVAL
   __IO uint8_t reserved_0x0e;  // 0x0E: Reserved
-  __IO uint8_t fifo_size;      // 0x0F: FIFO_SIZE
+  union {
+    __IO uint8_t config_data;  // 0x0F: CONFIG DATA
+    __IO uint8_t fifo_size;    // 0x0F: FIFO_SIZE
+  };
 } musb_ep_csr_t;
 
 TU_VERIFY_STATIC(sizeof(musb_ep_csr_t) == 16, "size is not correct");
 
 typedef struct {
   //------------- Common -------------//
-  __IO uint8_t  faddr;                             // 0x00: FADDR
-  __IO uint8_t  power;                             // 0x01: POWER
+  __IO uint8_t  faddr;             // 0x00: FADDR
+  __IO uint8_t  power;             // 0x01: POWER
 
-  __IO uint16_t intr_tx;                           // 0x02: INTR_TX
-  __IO uint16_t intr_rx;                           // 0x04: INTR_RX
+  __IO uint16_t intr_tx;           // 0x02: INTR_TX
+  __IO uint16_t intr_rx;           // 0x04: INTR_RX
 
-  __IO uint16_t intr_txen;                         // 0x06: INTR_TXEN
-  __IO uint16_t intr_rxen;                         // 0x08: INTR_RXEN
+  __IO uint16_t intr_txen;         // 0x06: INTR_TXEN
+  __IO uint16_t intr_rxen;         // 0x08: INTR_RXEN
 
-  __IO uint8_t  intrusb;                           // 0x0A: INTRUSB
-  __IO uint8_t  intrusben;                         // 0x0B: INTRUSBEN
+  __IO uint8_t  intrusb;           // 0x0A: INTRUSB
+  __IO uint8_t  intrusben;         // 0x0B: INTRUSBEN
 
-  __IO uint16_t frame;                             // 0x0C: FRAME
-  __IO uint8_t  index;                             // 0x0E: INDEX
-  __IO uint8_t  testmode;                          // 0x0F: TESTMODE
+  __IO uint16_t frame;             // 0x0C: FRAME
+  __IO uint8_t  index;             // 0x0E: INDEX
+  __IO uint8_t  testmode;          // 0x0F: TESTMODE
 
-  //------------- Indexed CSR -------------//
-  musb_ep_csr_t indexed_csr;                       // 0x10-0x1F: Indexed CSR 0-15
+  //------------- CSR (indexed) -------------//
+  musb_ep_csr_t indexed_csr;       // 0x10-0x1F: Indexed CSR 0-15
 
   //------------- FIFOs -------------//
-  __IO uint32_t fifo[16];                          // 0x20-0x5C: FIFO 0-15
+  __IO uint32_t fifo[16];          // 0x20-0x5C: FIFO 0-15
 
   // Common (2)
-  __IO uint8_t  devctl;                            // 0x60: DEVCTL
-  __IO uint8_t  misc;                              // 0x61: MISC
+  __IO uint8_t  devctl;            // 0x60: DEVCTL
+  __IO uint8_t  misc;              // 0x61: MISC
 
-  //------------- Dynammic FIFO -------------//
-  __IO uint8_t  txfifo_sz;                         // 0x62: TXFIFO_SZ
-  __IO uint8_t  rxfifo_sz;                         // 0x63: RXFIFO_SZ
-  __IO uint16_t txfifo_addr;                       // 0x64: TXFIFO_ADDR
-  __IO uint16_t rxfifo_addr;                       // 0x66: RXFIFO_ADDR
+  //------------- Dynammic FIFO (indexed) -------------//
+  __IO uint8_t  txfifo_sz;         // 0x62: TXFIFO_SZ
+  __IO uint8_t  rxfifo_sz;         // 0x63: RXFIFO_SZ
+  __IO uint16_t txfifo_addr;       // 0x64: TXFIFO_ADDR
+  __IO uint16_t rxfifo_addr;       // 0x66: RXFIFO_ADDR
 
   //------------- Additional Control/Status -------------//
   union {
-    __O  uint32_t vcontrol;                        // 0x68: VCONTROL
-    __IO uint32_t vstatus;                         // 0x68: VSTATUS
+    __O  uint32_t vcontrol;        // 0x68: VCONTROL
+    __IO uint32_t vstatus;         // 0x68: VSTATUS
   };
-  __IO uint16_t hwvers;                            // 0x6c: HWVERS
-  __R  uint16_t rsv_0x6e_0x77[5];
-
-  //------------- Additional Configuration -------------//
-  __IO uint8_t  epinfo;                            // 0x78: EPINFO
-  __IO uint8_t  raminfo;                           // 0x79: RAMINFO
-  __IO uint8_t  softreset;                         // 0x7A: SOFTRESET (Analog), Link info
-  __IO uint8_t  vplen;                             // 0x7B: VPLEN
-  __IO uint8_t  hs_eof1;                           // 0x7C: HS_EOF1
-  __IO uint8_t  fs_eof1;                           // 0x7D: FS_EOF1
-  __IO uint8_t  ls_eof1;                           // 0x7E: LS_EOF1
-  __IO uint8_t  soft_rst;                          // 0x7F: SOFT_RST
+  __IO uint16_t hwvers;            // 0x6c: HWVERS
+  __R  uint16_t rsv_0x6e_0x77[5];  // 0x6E-0x77: Reserved
+
+   //------------- Additional Configuration -------------//
+  __IO uint8_t  epinfo;            // 0x78: EPINFO
+   __IO uint8_t  raminfo;          // 0x79: RAMINFO
+  __IO uint8_t  softreset;         // 0x7A: SOFTRESET (Analog), Link info
+  __IO uint8_t  vplen;             // 0x7B: VPLEN
+  __IO uint8_t  hs_eof1;           // 0x7C: HS_EOF1
+  __IO uint8_t  fs_eof1;           // 0x7D: FS_EOF1
+  __IO uint8_t  ls_eof1;           // 0x7E: LS_EOF1
+  __IO uint8_t  soft_rst;          // 0x7F: SOFT_RST
 
   //------------- Extended -------------//
-  __IO uint16_t ctuch;                             // 0x80: CTUCH
-  __IO uint16_t cthsrtn;                           // 0x82: CTHSRTN
-  __R  uint32_t rsv_0x84_0xff[31];                 // 0x84-0xFF: Reserved
+  __IO uint16_t ctuch;             // 0x80: CTUCH
+  __IO uint16_t cthsrtn;           // 0x82: CTHSRTN
+  __R  uint32_t rsv_0x84_0xff[31]; // 0x84-0xFF: Reserved
 
   //------------- Absolute CSR (used index to remap to Indexed above) -------------//
   // TI tm4c can access this directly, but should use indexed_csr for portability
-  musb_ep_csr_t ep_csr[16];                        // 0x100-0x1FF: EP0-15 CSR
-
-  __R  uint32_t rsv_0x200_0x3ff[128];              // 0x200-0x3FF: Reserved
-
-  //------------- Analog PHY -------------//
-  __IO uint32_t mxm_usb_reg_00;                    // 0x400: MXM_USB_REG_00
-  __IO uint32_t m31_phy_utmi_reset;                // 0x404: M31_PHY_UTMI_RESET
-  __IO uint32_t m31_phy_utmi_vcontrol;             // 0x408: M31_PHY_UTMI_VCONTROL
-  __IO uint32_t m31_phy_clk_en;                    // 0x40C: M31_PHY_CLK_EN
-  __IO uint32_t m31_phy_ponrst;                    // 0x410: M31_PHY_PONRST
-  __IO uint32_t m31_phy_noncry_rstb;               // 0x414: M31_PHY_NONCRY_RSTB
-  __IO uint32_t m31_phy_noncry_en;                 // 0x418: M31_PHY_NONCRY_EN
-  __R  uint32_t rsv_0x41c;
-  __IO uint32_t m31_phy_u2_compliance_en;          // 0x420: M31_PHY_U2_COMPLIANCE_EN
-  __IO uint32_t m31_phy_u2_compliance_dac_adj;     // 0x424: M31_PHY_U2_COMPLIANCE_DAC_ADJ
-  __IO uint32_t m31_phy_u2_compliance_dac_adj_en;  // 0x428: M31_PHY_U2_COMPLIANCE_DAC_ADJ_EN
-  __IO uint32_t m31_phy_clk_rdy;                   // 0x42C: M31_PHY_CLK_RDY
-  __IO uint32_t m31_phy_pll_en;                    // 0x430: M31_PHY_PLL_EN
-  __IO uint32_t m31_phy_bist_ok;                   // 0x434: M31_PHY_BIST_OK
-  __IO uint32_t m31_phy_data_oe;                   // 0x438: M31_PHY_DATA_OE
-  __IO uint32_t m31_phy_oscouten;                  // 0x43C: M31_PHY_OSCOUTEN
-  __IO uint32_t m31_phy_lpm_alive;                 // 0x440: M31_PHY_LPM_ALIVE
-  __IO uint32_t m31_phy_hs_bist_mode;              // 0x444: M31_PHY_HS_BIST_MODE
-  __IO uint32_t m31_phy_coreclkin;                 // 0x448: M31_PHY_CORECLKIN
-  __IO uint32_t m31_phy_xtlsel;                    // 0x44C: M31_PHY_XTLSEL
-  __IO uint32_t m31_phy_ls_en;                     // 0x450: M31_PHY_LS_EN
-  __IO uint32_t m31_phy_debug_sel;                 // 0x454: M31_PHY_DEBUG_SEL
-  __IO uint32_t m31_phy_debug_out;                 // 0x458: M31_PHY_DEBUG_OUT
-  __IO uint32_t m31_phy_outclksel;                 // 0x45C: M31_PHY_OUTCLKSEL
-  __IO uint32_t m31_phy_xcfgi_31_0;                // 0x460: M31_PHY_XCFGI_31_0
-  __IO uint32_t m31_phy_xcfgi_63_32;               // 0x464: M31_PHY_XCFGI_63_32
-  __IO uint32_t m31_phy_xcfgi_95_64;               // 0x468: M31_PHY_XCFGI_95_64
-  __IO uint32_t m31_phy_xcfgi_127_96;              // 0x46C: M31_PHY_XCFGI_127_96
-  __IO uint32_t m31_phy_xcfgi_137_128;             // 0x470: M31_PHY_XCFGI_137_128
-  __IO uint32_t m31_phy_xcfg_hs_coarse_tune_num;   // 0x474: M31_PHY_XCFG_HS_COARSE_TUNE_NUM
-  __IO uint32_t m31_phy_xcfg_hs_fine_tune_num;     // 0x478: M31_PHY_XCFG_HS_FINE_TUNE_NUM
-  __IO uint32_t m31_phy_xcfg_fs_coarse_tune_num;   // 0x47C: M31_PHY_XCFG_FS_COARSE_TUNE_NUM
-  __IO uint32_t m31_phy_xcfg_fs_fine_tune_num;     // 0x480: M31_PHY_XCFG_FS_FINE_TUNE_NUM
-  __IO uint32_t m31_phy_xcfg_lock_range_max;       // 0x484: M31_PHY_XCFG_LOCK_RANGE_MAX
-  __IO uint32_t m31_phy_xcfgi_lock_range_min;      // 0x488: M31_PHY_XCFGI_LOCK_RANGE_MIN
-  __IO uint32_t m31_phy_xcfg_ob_rsel;              // 0x48C: M31_PHY_XCFG_OB_RSEL
-  __IO uint32_t m31_phy_xcfg_oc_rsel;              // 0x490: M31_PHY_XCFG_OC_RSEL
-  __IO uint32_t m31_phy_xcfgo;                     // 0x494: M31_PHY_XCFGO
-  __IO uint32_t mxm_int;                           // 0x498: MXM_INT
-  __IO uint32_t mxm_int_en;                        // 0x49C: MXM_INT_EN
-  __IO uint32_t mxm_suspend;                       // 0x4A0: MXM_SUSPEND
-  __IO uint32_t mxm_reg_a4;                        // 0x4A4: MXM_REG_A4
+  musb_ep_csr_t ep_csr[16];        // 0x100-0x1FF: EP0-15 CSR
 } musb_regs_t;
 
-TU_VERIFY_STATIC(sizeof(musb_regs_t) == 0x4A8, "size is not correct");
+TU_VERIFY_STATIC(sizeof(musb_regs_t) == 0x200, "size is not correct");
 
 //--------------------------------------------------------------------+
 // Helper
 //--------------------------------------------------------------------+
-
 TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_regs, unsigned epnum) {
   musb_regs->index = epnum;
   return &musb_regs->indexed_csr;
 }
 
-
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_FADDR register.
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index 688ea38220..b7d36c543d 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -50,13 +50,6 @@
             "flasher": "openocd",
             "flasher_sn": "066FFF495087534867063844",
             "flasher_args": "-f interface/stlink.cfg -f target/stm32g0x.cfg"
-        },
-        {
-            "name": "nanoch32v203",
-            "uid": "CDAB277B0FBC03E339E339E3",
-            "flasher": "openocd_wch",
-            "flasher_sn": "EBCA8F0670AF",
-            "flasher_args": ""
         }
     ],
     "boards-skip": [
@@ -68,6 +61,13 @@
             "flasher_args": "-device MIMXRT1011xxx5A",
             "comment": "not running reliably in bulk with other boards, probably power, flashing etc .."
         },
+        {
+            "name": "nanoch32v203",
+            "uid": "CDAB277B0FBC03E339E339E3",
+            "flasher": "openocd_wch",
+            "flasher_sn": "EBCA8F0670AF",
+            "flasher_args": ""
+        },
         {
             "name": "espressif_s3_devkitm",
             "uid": "84F703C084E4",

From 8e3093e06faf51ad855ce965b28edc2d066fb528 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 16 Aug 2024 08:21:20 +0700
Subject: [PATCH 165/204] update cmake profile

---
 .idea/cmake.xml | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 729309ebb1..e8b46d468d 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -114,7 +114,6 @@
       <configuration PROFILE_NAME="ra6m5_ek PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
       <configuration PROFILE_NAME="uno_r4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=uno_r4 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=1" />
-      <configuration PROFILE_NAME="msp430f5529" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=msp_exp430f5529lp" />
       <configuration PROFILE_NAME="raspberrypi_zero" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_zero -DLOG=1" />
       <configuration PROFILE_NAME="raspberrypi_cm4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_cm4 -DLOG=1" />
       <configuration PROFILE_NAME="raspberrypi_zero2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_zero2 -DLOG=1" />
@@ -122,11 +121,12 @@
       <configuration PROFILE_NAME="lpcxpresso11u68" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso11u68 -DLOG=1 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="lpcxpresso1347" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso1347 -DLOG=1 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="lpcxpresso1549" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso1549 -DLOG=1 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="lpcxpresso51u68" ENABLED="false" CONFIG_NAME="Debug" TOOLCHAIN_NAME="armclang 17.0.1" GENERATION_OPTIONS="-DBOARD=lpcxpresso51u68 -DLOG=1 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="msp_exp432e401y" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=msp_exp432e401y -DLOG=1" />
+      <configuration PROFILE_NAME="lpcxpresso51u68" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso51u68 -DLOG=1 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="atsaml21_xpro" ENABLED="false" GENERATION_OPTIONS="-DBOARD=atsaml21_xpro" />
       <configuration PROFILE_NAME="samd11_xplained" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=samd11_xplained" />
-      <configuration PROFILE_NAME="ek_tm4c123gxl" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=ek_tm4c123gxl" />
+      <configuration PROFILE_NAME="msp430f5529" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=msp_exp430f5529lp" />
+      <configuration PROFILE_NAME="msp_exp432e401y" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=msp_exp432e401y -DLOG=1" />
+      <configuration PROFILE_NAME="ek_tm4c123gxl" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=ek_tm4c123gxl -DLOG=1" />
       <configuration PROFILE_NAME="xmc4500_relax" ENABLED="false" GENERATION_OPTIONS="-DBOARD=xmc4500_relax -DLOG=1 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="f1c100s" ENABLED="false" GENERATION_OPTIONS="-DBOARD=f1c100s" />
       <configuration PROFILE_NAME="mm32f327x_mb39" ENABLED="false" GENERATION_OPTIONS="-DBOARD=mm32f327x_mb39" />
@@ -140,6 +140,9 @@
       <configuration PROFILE_NAME="ch32v307v_r1_1v0" ENABLED="false" GENERATION_OPTIONS="-DBOARD=ch32v307v_r1_1v0 -DLOG=1" />
       <configuration PROFILE_NAME="ch32v307v_r1_1v0 USBFS" ENABLED="false" GENERATION_OPTIONS="-DBOARD=ch32v307v_r1_1v0 -DSPEED=full" />
       <configuration PROFILE_NAME="da14695_dk_usb" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=da14695_dk_usb" />
+      <configuration PROFILE_NAME="max32650fthr" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=max32650fthr -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="max32666fthr" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=max32666fthr -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="max32690evkit" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=max32690evkit -DLOG=1 -DLOGGER=RTT" />
     </configurations>
   </component>
 </project>
\ No newline at end of file

From c34d5e7a71303c91fab134606841dd62ec57eef6 Mon Sep 17 00:00:00 2001
From: dp111 <19616418+dp111@users.noreply.github.com>
Date: Fri, 16 Aug 2024 21:43:41 +0100
Subject: [PATCH 166/204] Put break inside #if #endif

---
 src/common/tusb_fifo.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index 8a0fd44176..5f2dcabad5 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -315,9 +315,8 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rd_ptr,
         // Read data wrapped part
         if (wrap_bytes > 0) _ff_pull_const_addr(app_buf, ff_buf, wrap_bytes);
       }
-#endif
     break;
-
+#endif
     default: break;
   }
 }

From eaf9cc1beb6f5e34683debe531c7fa4d012c47b2 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 17 Aug 2024 13:31:31 +0700
Subject: [PATCH 167/204] more refactor to simplify musb driver

---
 src/common/tusb_mcu.h                 |    2 +
 src/portable/mentor/musb/dcd_musb.c   |  176 +-
 src/portable/mentor/musb/musb_max32.h |   66 +-
 src/portable/mentor/musb/musb_ti.h    |   47 +-
 src/portable/mentor/musb/musb_type.h  | 2387 ++++++++++---------------
 5 files changed, 1090 insertions(+), 1588 deletions(-)

diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 7ec3c58425..0180fc466f 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -309,6 +309,7 @@
 
 #elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
   #define TUP_USBIP_MUSB
+  #define TUP_USBIP_MUSB_TI
   #define TUP_DCD_ENDPOINT_MAX    8
 
 //--------------------------------------------------------------------+
@@ -474,6 +475,7 @@
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_MAX32650, OPT_MCU_MAX32666, OPT_MCU_MAX32690, OPT_MCU_MAX78002)
   #define TUP_USBIP_MUSB
+  #define TUP_USBIP_MUSB_ADI
   #define TUP_DCD_ENDPOINT_MAX    12
   #define TUP_RHPORT_HIGHSPEED    1
 
diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index 48f6e9d97f..36690c9526 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -41,10 +41,10 @@ _Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
 // Following symbols must be defined by port header
 // - musb_dcd_int_enable/disable/clear/get_enable
 // - musb_dcd_int_handler_enter/exit
-// - musb_dcd_setup_fifo/reset_fifo: Configuration of the EP's FIFO
-#if TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
+// - musb_dcd_setup_fifo: Configuration of the EP's FIFO
+#if defined(TUP_USBIP_MUSB_TI)
   #include "musb_ti.h"
-#elif TU_CHECK_MCU(OPT_MCU_MAX32690, OPT_MCU_MAX32650, OPT_MCU_MAX32666, OPT_MCU_MAX78002)
+#elif defined(TUP_USBIP_MUSB_ADI)
   #include "musb_max32.h"
 #else
   #error "Unsupported MCU"
@@ -52,6 +52,8 @@ _Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
 
 #define MUSB_REGS(rhport)   ((musb_regs_t*) MUSB_BASES[rhport])
 
+#define MUSB_DEBUG 2
+
 /*------------------------------------------------------------------
  * MACRO TYPEDEF CONSTANT ENUM DECLARATION
  *------------------------------------------------------------------*/
@@ -86,6 +88,18 @@ typedef struct
  *------------------------------------------------------------------*/
 static dcd_data_t _dcd;
 
+TU_ATTR_ALWAYS_INLINE static inline void fifo_reset(musb_regs_t* musb, unsigned epnum, unsigned dir_in) {
+  musb->index = epnum;
+  const uint8_t is_rx = 1 - dir_in;
+
+#if MUSB_CFG_DYNAMIC_FIFO
+  musb->fifo_size[is_rx] = 0;
+  musb->fifo_addr[is_rx] = 0;
+#elif defined(TUP_USBIP_MUSB_ADI)
+  // Analog have custom double buffered in csrh register, disable it
+  musb->indexed_csr.maxp_csr[is_rx].csrh |= MUSB_CSRH_DISABLE_DOUBLE_PACKET(is_rx);
+#endif
+}
 
 static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
 {
@@ -363,13 +377,13 @@ static void process_ep0(uint8_t rhport)
     /* Received SETUP or DATA OUT packet */
     if (req == REQUEST_TYPE_INVALID) {
       /* SETUP */
-      TU_ASSERT(sizeof(tusb_control_request_t) == ep_csr->rx_count,);
+      TU_ASSERT(sizeof(tusb_control_request_t) == ep_csr->count0,);
       process_setup_packet(rhport);
       return;
     }
     if (_dcd.pipe0.buf) {
       /* DATA OUT */
-      const unsigned vld = ep_csr->rx_count;
+      const unsigned vld = ep_csr->count0;
       const unsigned rem = _dcd.pipe0.remaining;
       const unsigned len = TU_MIN(TU_MIN(rem, 64), vld);
       volatile void *fifo_ptr = &musb_regs->fifo[0];
@@ -445,47 +459,70 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
   }
 }
 
-static void process_bus_reset(uint8_t rhport)
-{
-  musb_regs_t* musb_regs = MUSB_REGS(rhport);
-  /* When bmRequestType is REQUEST_TYPE_INVALID(0xFF),
-   * a control transfer state is SETUP or STATUS stage. */
+// Upon BUS RESET is detected, hardware havs already done:
+// faddr = 0, index = 0, flushes all ep fifos, clears all ep csr, enabled all ep interrupts
+static void process_bus_reset(uint8_t rhport) {
+  musb_regs_t* musb = MUSB_REGS(rhport);
+  /* When bmRequestType is REQUEST_TYPE_INVALID(0xFF), a control transfer state is SETUP or STATUS stage. */
   _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
   _dcd.status_out = 0;
   /* When pipe0.buf has not NULL, DATA stage works in progress. */
   _dcd.pipe0.buf = NULL;
 
-  musb_regs->intr_txen = 1; /* Enable only EP0 */
-  musb_regs->intr_rxen = 0;
+  musb->intr_txen = 1; /* Enable only EP0 */
+  musb->intr_rxen = 0;
 
   /* Clear FIFO settings */
   for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
-    musb_dcd_reset_fifo(rhport, i, 0);
-    musb_dcd_reset_fifo(rhport, i, 1);
+    fifo_reset(musb, i, 0);
+    fifo_reset(musb, i, 1);
   }
-  dcd_event_bus_reset(rhport, (musb_regs->power & USB_POWER_HSMODE) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL, true);
+  dcd_event_bus_reset(rhport, (musb->power & USB_POWER_HSMODE) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL, true);
 }
 
 /*------------------------------------------------------------------
  * Device API
  *------------------------------------------------------------------*/
 
-void dcd_init(uint8_t rhport)
-{
+#if CFG_TUSB_DEBUG >= MUSB_DEBUG
+void print_musb_info(musb_regs_t* musb_regs) {
+  // print version, epinfo, raminfo, config_data0, fifo_size
+  TU_LOG1("musb version = %u.%u\r\n", musb_regs->hwvers_bit.major, musb_regs->hwvers_bit.minor);
+  TU_LOG1("Number of endpoints: %u TX, %u RX\r\n", musb_regs->epinfo_bit.tx_ep_num, musb_regs->epinfo_bit.rx_ep_num);
+  TU_LOG1("RAM Info: %u DMA Channel, %u RAM address width\r\n", musb_regs->raminfo_bit.dma_channel, musb_regs->raminfo_bit.ram_bits);
+
+  musb_regs->index = 0;
+  TU_LOG1("config_data0 = 0x%x\r\n", musb_regs->indexed_csr.config_data0);
+
+#if MUSB_CFG_DYNAMIC_FIFO
+  TU_LOG1("Dynamic FIFO configuration\r\n");
+#else
+  for (uint8_t i=1; i <= musb_regs->epinfo_bit.tx_ep_num; i++) {
+    musb_regs->index = i;
+    TU_LOG1("FIFO %u Size: TX %u RX %u\r\n", i, musb_regs->indexed_csr.fifo_size_bit.tx, musb_regs->indexed_csr.fifo_size_bit.rx);
+  }
+#endif
+}
+#endif
+
+void dcd_init(uint8_t rhport) {
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
-  musb_regs->intrusben |= USB_IE_SUSPND;
+
+#if CFG_TUSB_DEBUG >= MUSB_DEBUG
+  print_musb_info(musb_regs);
+#endif
+
+  musb_regs->intr_usben |= USB_IE_SUSPND;
   musb_dcd_int_clear(rhport);
   musb_dcd_phy_init(rhport);
   dcd_connect(rhport);
 }
 
-void dcd_int_enable(uint8_t rhport)
-{
+void dcd_int_enable(uint8_t rhport) {
   musb_dcd_int_enable(rhport);
 }
 
-void dcd_int_disable(uint8_t rhport)
-{
+void dcd_int_disable(uint8_t rhport) {
   musb_dcd_int_disable(rhport);
 }
 
@@ -559,25 +596,17 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
 
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
   musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epn);
-  if (dir_in) {
-    ep_csr->tx_maxp = mps;
-    ep_csr->tx_csrh = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_TXCSRH1_ISO : 0;
-    if (ep_csr->tx_csrl & USB_TXCSRL1_TXRDY) {
-      ep_csr->tx_csrl = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
-    } else {
-      ep_csr->tx_csrl = USB_TXCSRL1_CLRDT;
-    }
-    musb_regs->intr_txen |= TU_BIT(epn);
-  } else {
-    ep_csr->rx_maxp = mps;
-    ep_csr->rx_csrh = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_RXCSRH1_ISO : 0;
-    if (ep_csr->rx_csrl & USB_RXCSRL1_RXRDY) {
-      ep_csr->rx_csrl = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
-    } else {
-      ep_csr->rx_csrl = USB_RXCSRL1_CLRDT;
-    }
-    musb_regs->intr_rxen |= TU_BIT(epn);
+
+  const uint8_t is_rx = 1 - dir_in;
+  ep_csr->maxp_csr[is_rx].maxp = mps;
+  ep_csr->maxp_csr[is_rx].csrh = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_RXCSRH1_ISO : 0;
+
+  uint8_t csrl = MUSB_CSRL_CLEAR_DATA_TOGGLE(is_rx);
+  if (ep_csr->maxp_csr[is_rx].csrl & MUSB_CSRL_PACKET_READY(is_rx)) {
+    csrl |= MUSB_CSRL_FLUSH_FIFO(is_rx);
   }
+  ep_csr->maxp_csr[is_rx].csrl = csrl;
+  musb_regs->intren_ep[is_rx] |= TU_BIT(epn);
 
   /* Setup FIFO */
   musb_dcd_setup_fifo(rhport, epn, dir_in, mps);
@@ -587,13 +616,13 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
 
 void dcd_edpt_close_all(uint8_t rhport)
 {
-  musb_regs_t* musb_regs = MUSB_REGS(rhport);
+  musb_regs_t* musb = MUSB_REGS(rhport);
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
-  musb_regs->intr_txen = 1; /* Enable only EP0 */
-  musb_regs->intr_rxen = 0;
+  musb->intr_txen = 1; /* Enable only EP0 */
+  musb->intr_rxen = 0;
   for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
-    musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, i);
+    musb_ep_csr_t* ep_csr = get_ep_csr(musb, i);
     ep_csr->tx_maxp = 0;
     ep_csr->tx_csrh = 0;
     if (ep_csr->tx_csrl & USB_TXCSRL1_TXRDY)
@@ -609,8 +638,8 @@ void dcd_edpt_close_all(uint8_t rhport)
       ep_csr->rx_csrl = USB_RXCSRL1_CLRDT;
     }
 
-    musb_dcd_reset_fifo(rhport, i, 0);
-    musb_dcd_reset_fifo(rhport, i, 1);
+    fifo_reset(musb, i, 0);
+    fifo_reset(musb, i, 1);
 
   }
   if (ie) musb_dcd_int_enable(rhport);
@@ -620,12 +649,12 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
 {
   unsigned const epn    = tu_edpt_number(ep_addr);
   unsigned const dir_in = tu_edpt_dir(ep_addr);
-  musb_regs_t* musb_regs = MUSB_REGS(rhport);
-  musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epn);
+  musb_regs_t* musb = MUSB_REGS(rhport);
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb, epn);
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
   if (dir_in) {
-    musb_regs->intr_txen  &= ~TU_BIT(epn);
+    musb->intr_txen  &= ~TU_BIT(epn);
     ep_csr->tx_maxp = 0;
     ep_csr->tx_csrh = 0;
     if (ep_csr->tx_csrl & USB_TXCSRL1_TXRDY) {
@@ -634,7 +663,7 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
       ep_csr->tx_csrl = USB_TXCSRL1_CLRDT;
     }
   } else {
-    musb_regs->intr_rxen  &= ~TU_BIT(epn);
+    musb->intr_rxen  &= ~TU_BIT(epn);
     ep_csr->rx_maxp = 0;
     ep_csr->rx_csrh = 0;
     if (ep_csr->rx_csrl & USB_RXCSRL1_RXRDY) {
@@ -643,7 +672,7 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
       ep_csr->rx_csrl = USB_RXCSRL1_CLRDT;
     }
   }
-  musb_dcd_reset_fifo(rhport, epn, dir_in);
+  fifo_reset(musb, epn, dir_in);
   if (ie) musb_dcd_int_enable(rhport);
 }
 
@@ -726,51 +755,48 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 /*-------------------------------------------------------------------
  * ISR
  *-------------------------------------------------------------------*/
-void dcd_int_handler(uint8_t rhport)
-{
-  uint_fast8_t is, txis, rxis;
-
+void dcd_int_handler(uint8_t rhport) {
   //Part specific ISR setup/entry
   musb_dcd_int_handler_enter(rhport);
 
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
-
-  is   = musb_regs->intrusb;   /* read and clear interrupt status */
-  txis = musb_regs->intr_tx; /* read and clear interrupt status */
-  rxis = musb_regs->intr_rx; /* read and clear interrupt status */
+  uint_fast8_t intr_usb = musb_regs->intr_usb; // a read will clear this interrupt status
+  uint_fast8_t intr_tx = musb_regs->intr_tx; // a read will clear this interrupt status
+  uint_fast8_t intr_rx = musb_regs->intr_rx; // a read will clear this interrupt status
   // TU_LOG1("D%2x T%2x R%2x\r\n", is, txis, rxis);
 
-  is &= musb_regs->intrusben; /* Clear disabled interrupts */
-  if (is & USB_IS_DISCON) {
+  intr_usb &= musb_regs->intr_usben; /* Clear disabled interrupts */
+  if (intr_usb & USB_IS_DISCON) {
   }
-  if (is & USB_IS_SOF) {
+  if (intr_usb & USB_IS_SOF) {
     dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
   }
-  if (is & USB_IS_RESET) {
+  if (intr_usb & USB_IS_RESET) {
     process_bus_reset(rhport);
   }
-  if (is & USB_IS_RESUME) {
+  if (intr_usb & USB_IS_RESUME) {
     dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
   }
-  if (is & USB_IS_SUSPEND) {
+  if (intr_usb & USB_IS_SUSPEND) {
     dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
   }
 
-  txis &= musb_regs->intr_txen; /* Clear disabled interrupts */
-  if (txis & USB_TXIE_EP0) {
+  intr_tx &= musb_regs->intr_txen; /* Clear disabled interrupts */
+  if (intr_tx & TU_BIT(0)) {
     process_ep0(rhport);
-    txis &= ~TU_BIT(0);
+    intr_tx &= ~TU_BIT(0);
   }
-  while (txis) {
-    unsigned const num = __builtin_ctz(txis);
+  while (intr_tx) {
+    unsigned const num = __builtin_ctz(intr_tx);
     process_edpt_n(rhport, tu_edpt_addr(num, TUSB_DIR_IN));
-    txis &= ~TU_BIT(num);
+    intr_tx &= ~TU_BIT(num);
   }
-  rxis &= musb_regs->intr_rxen; /* Clear disabled interrupts */
-  while (rxis) {
-    unsigned const num = __builtin_ctz(rxis);
+
+  intr_rx &= musb_regs->intr_rxen; /* Clear disabled interrupts */
+  while (intr_rx) {
+    unsigned const num = __builtin_ctz(intr_rx);
     process_edpt_n(rhport, tu_edpt_addr(num, TUSB_DIR_OUT));
-    rxis &= ~TU_BIT(num);
+    intr_rx &= ~TU_BIT(num);
   }
 
   //Part specific ISR exit
diff --git a/src/portable/mentor/musb/musb_max32.h b/src/portable/mentor/musb/musb_max32.h
index 43f56de3cf..73f63ee2ed 100644
--- a/src/portable/mentor/musb/musb_max32.h
+++ b/src/portable/mentor/musb/musb_max32.h
@@ -34,6 +34,8 @@ extern "C" {
 #include "mxc_device.h"
 #include "usbhs_regs.h"
 
+#define MUSB_CFG_DYNAMIC_FIFO  0
+
 const uintptr_t MUSB_BASES[] = { MXC_BASE_USBHS };
 
 #if CFG_TUD_ENABLED
@@ -100,40 +102,43 @@ static inline void musb_dcd_int_handler_exit(uint8_t rhport) {
 }
 
 static inline void musb_dcd_phy_init(uint8_t rhport) {
-  //Interrupt for VBUS disconnect
-  musb_periph_inst[rhport]->mxm_int_en |= MXC_F_USBHS_MXM_INT_EN_NOVBUS;
+  (void) rhport;
+  mxc_usbhs_regs_t* hs_phy = MXC_USBHS;
+
+  // Interrupt for VBUS disconnect
+  hs_phy->mxm_int_en |= MXC_F_USBHS_MXM_INT_EN_NOVBUS;
 
   musb_dcd_int_clear(rhport);
 
-  //Unsuspend the MAC
-  musb_periph_inst[rhport]->mxm_suspend = 0;
+  // Unsuspend the MAC
+  hs_phy->mxm_suspend = 0;
 
   // Configure PHY
-  musb_periph_inst[rhport]->m31_phy_xcfgi_31_0 = (0x1 << 3) | (0x1 << 11);
-  musb_periph_inst[rhport]->m31_phy_xcfgi_63_32 = 0;
-  musb_periph_inst[rhport]->m31_phy_xcfgi_95_64 = 0x1 << (72 - 64);
-  musb_periph_inst[rhport]->m31_phy_xcfgi_127_96 = 0;
+  hs_phy->m31_phy_xcfgi_31_0 = (0x1 << 3) | (0x1 << 11);
+  hs_phy->m31_phy_xcfgi_63_32 = 0;
+  hs_phy->m31_phy_xcfgi_95_64 = 0x1 << (72 - 64);
+  hs_phy->m31_phy_xcfgi_127_96 = 0;
 
 
   #ifdef USBHS_M31_CLOCK_RECOVERY
-  musb_periph_inst[rhport]->m31_phy_noncry_rstb = 1;
-  musb_periph_inst[rhport]->m31_phy_noncry_en = 1;
-  musb_periph_inst[rhport]->m31_phy_outclksel = 0;
-  musb_periph_inst[rhport]->m31_phy_coreclkin = 0;
-  musb_periph_inst[rhport]->m31_phy_xtlsel = 2; /* Select 25 MHz clock */
+  hs_phy->m31_phy_noncry_rstb = 1;
+  hs_phy->m31_phy_noncry_en = 1;
+  hs_phy->m31_phy_outclksel = 0;
+  hs_phy->m31_phy_coreclkin = 0;
+  hs_phy->m31_phy_xtlsel = 2; /* Select 25 MHz clock */
   #else
-  musb_periph_inst[rhport]->m31_phy_noncry_rstb = 0;
-  musb_periph_inst[rhport]->m31_phy_noncry_en = 0;
-  musb_periph_inst[rhport]->m31_phy_outclksel = 1;
-  musb_periph_inst[rhport]->m31_phy_coreclkin = 1;
-  musb_periph_inst[rhport]->m31_phy_xtlsel = 3; /* Select 30 MHz clock */
+  hs_phy->m31_phy_noncry_rstb = 0;
+  hs_phy->m31_phy_noncry_en = 0;
+  hs_phy->m31_phy_outclksel = 1;
+  hs_phy->m31_phy_coreclkin = 1;
+  hs_phy->m31_phy_xtlsel = 3; /* Select 30 MHz clock */
   #endif
-  musb_periph_inst[rhport]->m31_phy_pll_en = 1;
-  musb_periph_inst[rhport]->m31_phy_oscouten = 1;
+  hs_phy->m31_phy_pll_en = 1;
+  hs_phy->m31_phy_oscouten = 1;
 
   /* Reset PHY */
-  musb_periph_inst[rhport]->m31_phy_ponrst = 0;
-  musb_periph_inst[rhport]->m31_phy_ponrst = 1;
+  hs_phy->m31_phy_ponrst = 0;
+  hs_phy->m31_phy_ponrst = 1;
 }
 
 static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in, unsigned mps) {
@@ -155,23 +160,6 @@ static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned
   musb_periph_inst[rhport]->index = saved_index;
 }
 
-static inline void musb_dcd_reset_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in) {
-  //Most likely the caller has already grabbed the right register block. But
-  //as a precaution save and restore the register bank anyways
-  unsigned saved_index = musb_periph_inst[rhport]->index;
-
-  musb_periph_inst[rhport]->index = epnum;
-
-  //Disable double buffering
-  if (dir_in) {
-    musb_periph_inst[rhport]->incsru |= (MXC_F_USBHS_INCSRU_DPKTBUFDIS);
-  } else {
-    musb_periph_inst[rhport]->outcsru |= (MXC_F_USBHS_OUTCSRU_DPKTBUFDIS);
-  }
-
-  musb_periph_inst[rhport]->index = saved_index;
-}
-
 #endif // CFG_TUD_ENABLED
 
 #ifdef __cplusplus
diff --git a/src/portable/mentor/musb/musb_ti.h b/src/portable/mentor/musb/musb_ti.h
index d1a0aa4f9b..e43b3d3c0b 100644
--- a/src/portable/mentor/musb/musb_ti.h
+++ b/src/portable/mentor/musb/musb_ti.h
@@ -42,8 +42,10 @@
   #error "Unsupported MCUs"
 #endif
 
-const uintptr_t MUSB_BASES[] = { USB0_BASE };
+#define MUSB_CFG_DYNAMIC_FIFO  1
+#define MUSB_CFG_DYNAMIC_FIFO_SIZE 4096
 
+const uintptr_t MUSB_BASES[] = { USB0_BASE };
 
 // Header supports both device and host modes. Only include what's necessary
 #if CFG_TUD_ENABLED
@@ -63,36 +65,28 @@ static inline void musb_dcd_phy_init(uint8_t rhport){
   //Nothing to do for this part
 }
 
-TU_ATTR_ALWAYS_INLINE
-static inline void musb_dcd_int_enable(uint8_t rhport)
-{
+TU_ATTR_ALWAYS_INLINE static inline void musb_dcd_int_enable(uint8_t rhport) {
   NVIC_EnableIRQ(musb_irqs[rhport]);
 }
 
-TU_ATTR_ALWAYS_INLINE
-static inline void musb_dcd_int_disable(uint8_t rhport)
-{
+TU_ATTR_ALWAYS_INLINE static inline void musb_dcd_int_disable(uint8_t rhport) {
   NVIC_DisableIRQ(musb_irqs[rhport]);
 }
 
-TU_ATTR_ALWAYS_INLINE
-static inline unsigned musb_dcd_get_int_enable(uint8_t rhport)
-{
+TU_ATTR_ALWAYS_INLINE static inline unsigned musb_dcd_get_int_enable(uint8_t rhport) {
   return NVIC_GetEnableIRQ(musb_irqs[rhport]);
 }
 
-TU_ATTR_ALWAYS_INLINE
-static inline void musb_dcd_int_clear(uint8_t rhport)
-{
-    NVIC_ClearPendingIRQ(musb_irqs[rhport]);
+TU_ATTR_ALWAYS_INLINE static inline void musb_dcd_int_clear(uint8_t rhport) {
+  NVIC_ClearPendingIRQ(musb_irqs[rhport]);
 }
 
-static inline void musb_dcd_int_handler_enter(uint8_t rhport){
+static inline void musb_dcd_int_handler_enter(uint8_t rhport) {
   (void)rhport;
   //Nothing to do for this part
 }
 
-static inline void musb_dcd_int_handler_exit(uint8_t rhport){
+static inline void musb_dcd_int_handler_exit(uint8_t rhport) {
   (void)rhport;
   //Nothing to do for this part
 }
@@ -102,15 +96,13 @@ typedef struct {
   uint_fast16_t end; /* offset of excluding the last element */
 } free_block_t;
 
-static inline free_block_t *find_containing_block(free_block_t *beg, free_block_t *end, uint_fast16_t addr)
-{
+static inline free_block_t *find_containing_block(free_block_t *beg, free_block_t *end, uint_fast16_t addr) {
   free_block_t *cur = beg;
   for (; cur < end && ((addr < cur->beg) || (cur->end <= addr)); ++cur) ;
   return cur;
 }
 
-static inline int update_free_block_list(free_block_t *blks, unsigned num, uint_fast16_t addr, uint_fast16_t size)
-{
+static inline int update_free_block_list(free_block_t *blks, unsigned num, uint_fast16_t addr, uint_fast16_t size) {
   free_block_t *p = find_containing_block(blks, blks + num, addr);
   TU_ASSERT(p != blks + num, -2);
   if (p->beg == addr) {
@@ -150,8 +142,7 @@ static inline int update_free_block_list(free_block_t *blks, unsigned num, uint_
   }
 }
 
-static inline unsigned free_block_size(free_block_t const *blk)
-{
+static inline unsigned free_block_size(free_block_t const *blk) {
   return blk->end - blk->beg;
 }
 
@@ -234,18 +225,6 @@ static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned
   }
 }
 
-static inline void musb_dcd_reset_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in)
-{
-  musb_periph_inst[rhport]->EPIDX = epnum;
-  if (dir_in) {
-    musb_periph_inst[rhport]->TXFIFOADD = 0;
-    musb_periph_inst[rhport]->TXFIFOSZ  = 0;
-  } else {
-    musb_periph_inst[rhport]->RXFIFOADD = 0;
-    musb_periph_inst[rhport]->RXFIFOSZ  = 0;
-  }
-}
-
 #endif // CFG_TUD_ENABLED
 
 #ifdef __cplusplus
diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index 57ab2aefae..ee01872708 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -83,20 +83,37 @@
   #define __R  volatile const
 #endif
 
+// 0: TX (device IN, host OUT)
+// 1: RX (device OUT, host IN)
 typedef struct TU_ATTR_PACKED {
-  __IO uint16_t tx_maxp;       // 0x00: TXMAXP
   union {
-    __IO uint8_t csr0l;        // 0x02: CSR0
-    __IO uint8_t tx_csrl;      // 0x02: TX CSRL
+    struct {
+      __IO uint16_t tx_maxp;       // 0x00: TXMAXP
+      union {
+        __IO uint8_t csr0l;        // 0x02: CSR0
+        __IO uint8_t tx_csrl;      // 0x02: TX CSRL
+      };
+      union {
+        __IO uint8_t csr0h;        // 0x03: CSR0H
+        __IO uint8_t tx_csrh;      // 0x03: TX CSRH
+      };
+
+      __IO uint16_t rx_maxp;       // 0x04: RX MAXP
+      __IO uint8_t  rx_csrl;       // 0x06: RX CSRL
+      __IO uint8_t  rx_csrh;       // 0x07: RX CSRH
+    };
+
+    struct {
+      __IO uint16_t maxp;          // 0x00: MAXP
+      __IO uint8_t  csrl;          // 0x02: CSRL
+      __IO uint8_t  csrh;          // 0x03: CSRH
+    }maxp_csr[2];
   };
+
   union {
-    __IO uint8_t csr0h;        // 0x03: CSR0H
-    __IO uint8_t tx_csrh;      // 0x03: TX CSRH
+    __IO uint16_t count0;      // 0x08: COUNT0
+    __IO uint16_t rx_count;    // 0x08: RX COUNT
   };
-  __IO uint16_t rx_maxp;       // 0x04: RX MAXP
-  __IO uint8_t  rx_csrl;       // 0x06: RX CSRL
-  __IO uint8_t  rx_csrh;       // 0x07: RX CSRH
-  __IO uint16_t rx_count;      // 0x08: RX COUNT
   union {
     __IO uint8_t type0;        // 0x0A: TYPE0 (host only)
     __IO uint8_t tx_type;      // 0x0A: TX TYPE
@@ -106,32 +123,71 @@ typedef struct TU_ATTR_PACKED {
   __IO uint8_t rx_interval;    // 0x0D: RX INTERVAL
   __IO uint8_t reserved_0x0e;  // 0x0E: Reserved
   union {
-    __IO uint8_t config_data;  // 0x0F: CONFIG DATA
+    __IO uint8_t config_data0; // 0x0F: CONFIG DATA
+    struct {
+      __IO uint8_t utmi_data_width : 1; // [0] UTMI Data Width
+      __IO uint8_t softconn_en     : 1; // [1] Soft Connect Enable
+      __IO uint8_t dynamic_fifo    : 1; // [2] Dynamic FIFO Sizing
+      __IO uint8_t hb_tx_en        : 1; // [3] High Bandwidth TX ISO Enable
+      __IO uint8_t hb_rx_en        : 1; // [4] High Bandwidth RX ISO Enable
+      __IO uint8_t big_endian      : 1; // [5] Big Endian
+      __IO uint8_t mp_tx_en        : 1; // [6] Auto splitting BULK TX Enable
+      __IO uint8_t mp_rx_en        : 1; // [7] Auto amalgamation BULK RX Enable
+    } config_data0_bit;
+
     __IO uint8_t fifo_size;    // 0x0F: FIFO_SIZE
+    struct {
+      __IO uint8_t tx : 4;  // [3:0] TX FIFO Size
+      __IO uint8_t rx : 4;  // [7:4] RX FIFO Size
+    }fifo_size_bit;
   };
 } musb_ep_csr_t;
 
 TU_VERIFY_STATIC(sizeof(musb_ep_csr_t) == 16, "size is not correct");
 
-typedef struct {
+typedef struct TU_ATTR_PACKED {
   //------------- Common -------------//
   __IO uint8_t  faddr;             // 0x00: FADDR
-  __IO uint8_t  power;             // 0x01: POWER
+  union {
+    __IO uint8_t  power;             // 0x01: POWER
+    struct {
+      __IO uint8_t suspend_mode_en : 1; // [0] SUSPEND Mode Enable
+      __IO uint8_t suspend_mode    : 1; // [1] SUSPEND Mode
+      __IO uint8_t resume_mode     : 1; // [2] RESUME
+      __IO uint8_t reset           : 1; // [3] RESET
+      __IO uint8_t highspeed_mode  : 1; // [4] High Speed Mode
+      __IO uint8_t highspeed_en    : 1; // [5] High Speed Enable
+      __IO uint8_t soft_conn       : 1; // [6] Soft Connect/Disconnect
+      __IO uint8_t iso_update      : 1; // [7] Isochronous Update
+    } power_bit;
+  };
+
+  union {
+    struct {
+      __IO uint16_t intr_tx;           // 0x02: INTR_TX
+      __IO uint16_t intr_rx;           // 0x04: INTR_RX
+    };
+
+    __IO uint16_t intr_ep[2];         // 0x02-0x05: INTR_EP0-1
+  };
 
-  __IO uint16_t intr_tx;           // 0x02: INTR_TX
-  __IO uint16_t intr_rx;           // 0x04: INTR_RX
+  union {
+    struct {
+      __IO uint16_t intr_txen;         // 0x06: INTR_TXEN
+      __IO uint16_t intr_rxen;         // 0x08: INTR_RXEN
+    };
 
-  __IO uint16_t intr_txen;         // 0x06: INTR_TXEN
-  __IO uint16_t intr_rxen;         // 0x08: INTR_RXEN
+    __IO uint16_t intren_ep[2];       // 0x06-0x09: INTREN_EP0-1
+  };
 
-  __IO uint8_t  intrusb;           // 0x0A: INTRUSB
-  __IO uint8_t  intrusben;         // 0x0B: INTRUSBEN
+  __IO uint8_t  intr_usb;          // 0x0A: INTRUSB
+  __IO uint8_t  intr_usben;        // 0x0B: INTRUSBEN
 
   __IO uint16_t frame;             // 0x0C: FRAME
   __IO uint8_t  index;             // 0x0E: INDEX
   __IO uint8_t  testmode;          // 0x0F: TESTMODE
 
-  //------------- CSR (indexed) -------------//
+  //------------- Endpoint CSR (indexed) -------------//
   musb_ep_csr_t indexed_csr;       // 0x10-0x1F: Indexed CSR 0-15
 
   //------------- FIFOs -------------//
@@ -142,35 +198,68 @@ typedef struct {
   __IO uint8_t  misc;              // 0x61: MISC
 
   //------------- Dynammic FIFO (indexed) -------------//
-  __IO uint8_t  txfifo_sz;         // 0x62: TXFIFO_SZ
-  __IO uint8_t  rxfifo_sz;         // 0x63: RXFIFO_SZ
-  __IO uint16_t txfifo_addr;       // 0x64: TXFIFO_ADDR
-  __IO uint16_t rxfifo_addr;       // 0x66: RXFIFO_ADDR
+  union {
+    struct {
+      __IO uint8_t  txfifo_sz;         // 0x62: TXFIFO_SZ
+      __IO uint8_t  rxfifo_sz;         // 0x63: RXFIFO_SZ
+    };
+    __IO uint8_t fifo_size[2];
+  };
+
+  union {
+    struct {
+      __IO uint16_t txfifo_addr;       // 0x64: TXFIFO_ADDR
+      __IO uint16_t rxfifo_addr;       // 0x66: RXFIFO_ADDR
+    };
+    __IO uint16_t fifo_addr[2];
+  };
 
-  //------------- Additional Control/Status -------------//
+  //------------- Additional Control and Configuration -------------//
+  union {
+    __O  uint32_t vcontrol;        // 0x68: PHY VCONTROL
+    __IO uint32_t vstatus;         // 0x68: PHY VSTATUS
+  };
   union {
-    __O  uint32_t vcontrol;        // 0x68: VCONTROL
-    __IO uint32_t vstatus;         // 0x68: VSTATUS
+    __IO uint16_t hwvers;            // 0x6C: HWVERS
+    struct {
+      __IO uint16_t minor : 10;     // [9:0] Minor
+      __IO uint16_t major : 5;      // [14:10] Major
+      __IO uint16_t rc    : 1;      // [15] Release Candidate
+    } hwvers_bit;
   };
-  __IO uint16_t hwvers;            // 0x6c: HWVERS
   __R  uint16_t rsv_0x6e_0x77[5];  // 0x6E-0x77: Reserved
 
    //------------- Additional Configuration -------------//
-  __IO uint8_t  epinfo;            // 0x78: EPINFO
-   __IO uint8_t  raminfo;          // 0x79: RAMINFO
-  __IO uint8_t  softreset;         // 0x7A: SOFTRESET (Analog), Link info
+  union {
+    __IO uint8_t  epinfo;            // 0x78: EPINFO
+    struct {
+      __IO uint8_t tx_ep_num : 4;    // [3:0] TX Endpoints
+      __IO uint8_t rx_ep_num : 4;    // [7:4] RX Endpoints
+    } epinfo_bit;
+  };
+  union {
+    __IO uint8_t  raminfo;           // 0x79: RAMINFO
+    struct {
+      __IO uint8_t ram_bits    : 4;  // [3:0] RAM Address Bus Width
+      __IO uint8_t dma_channel : 4;  // [7:4] DMA Channels
+    }raminfo_bit;
+  };
+  union {
+    __IO uint8_t  link_info;       // 0x7A: LINK_INFO
+    __IO uint8_t  adi_softreset;   // 0x7A: AnalogDevice SOFTRESET
+  };
   __IO uint8_t  vplen;             // 0x7B: VPLEN
   __IO uint8_t  hs_eof1;           // 0x7C: HS_EOF1
   __IO uint8_t  fs_eof1;           // 0x7D: FS_EOF1
   __IO uint8_t  ls_eof1;           // 0x7E: LS_EOF1
   __IO uint8_t  soft_rst;          // 0x7F: SOFT_RST
 
-  //------------- Extended -------------//
+  //------------- Target Endpoints (multipoint option) -------------//
   __IO uint16_t ctuch;             // 0x80: CTUCH
   __IO uint16_t cthsrtn;           // 0x82: CTHSRTN
   __R  uint32_t rsv_0x84_0xff[31]; // 0x84-0xFF: Reserved
 
-  //------------- Absolute CSR (used index to remap to Indexed above) -------------//
+  //------------- Non-Indexed Endpoint CSRs -------------//
   // TI tm4c can access this directly, but should use indexed_csr for portability
   musb_ep_csr_t ep_csr[16];        // 0x100-0x1FF: EP0-15 CSR
 } musb_regs_t;
@@ -185,267 +274,151 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
   return &musb_regs->indexed_csr;
 }
 
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_FADDR register.
-//
-//*****************************************************************************
-#define USB_FADDR_M             0x0000007F  // Function Address
-#define USB_FADDR_S             0
+//--------------------------------------------------------------------+
+// Register Bit Field
+//--------------------------------------------------------------------+
 
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_POWER register.
-//
-//*****************************************************************************
-#define USB_POWER_ISOUP         0x00000080  // Isochronous Update
-#define USB_POWER_SOFTCONN      0x00000040  // Soft Connect/Disconnect
-#define USB_POWER_HSENAB        0x00000020  // High Speed Enable
-#define USB_POWER_HSMODE        0x00000010  // High Speed Enable
-#define USB_POWER_RESET         0x00000008  // RESET Signaling
-#define USB_POWER_RESUME        0x00000004  // RESUME Signaling
-#define USB_POWER_SUSPEND       0x00000002  // SUSPEND Mode
-#define USB_POWER_PWRDNPHY      0x00000001  // Power Down PHY
+// 0x01: Power
+#define USB_POWER_ISOUP         0x0080  // Isochronous Update
+#define USB_POWER_SOFTCONN      0x0040  // Soft Connect/Disconnect
+#define USB_POWER_HSENAB        0x0020  // High Speed Enable
+#define USB_POWER_HSMODE        0x0010  // High Speed Enable
+#define USB_POWER_RESET         0x0008  // RESET Signaling
+#define USB_POWER_RESUME        0x0004  // RESUME Signaling
+#define USB_POWER_SUSPEND       0x0002  // SUSPEND Mode
+#define USB_POWER_PWRDNPHY      0x0001  // Power Down PHY
 
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXIS register.
-//
-//*****************************************************************************
-#define USB_TXIS_EP7            0x00000080  // TX Endpoint 7 Interrupt
-#define USB_TXIS_EP6            0x00000040  // TX Endpoint 6 Interrupt
-#define USB_TXIS_EP5            0x00000020  // TX Endpoint 5 Interrupt
-#define USB_TXIS_EP4            0x00000010  // TX Endpoint 4 Interrupt
-#define USB_TXIS_EP3            0x00000008  // TX Endpoint 3 Interrupt
-#define USB_TXIS_EP2            0x00000004  // TX Endpoint 2 Interrupt
-#define USB_TXIS_EP1            0x00000002  // TX Endpoint 1 Interrupt
-#define USB_TXIS_EP0            0x00000001  // TX and RX Endpoint 0 Interrupt
+// Interrupt TX/RX Status and Enable: each bit is for an endpoint
 
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXIS register.
-//
-//*****************************************************************************
-#define USB_RXIS_EP7            0x00000080  // RX Endpoint 7 Interrupt
-#define USB_RXIS_EP6            0x00000040  // RX Endpoint 6 Interrupt
-#define USB_RXIS_EP5            0x00000020  // RX Endpoint 5 Interrupt
-#define USB_RXIS_EP4            0x00000010  // RX Endpoint 4 Interrupt
-#define USB_RXIS_EP3            0x00000008  // RX Endpoint 3 Interrupt
-#define USB_RXIS_EP2            0x00000004  // RX Endpoint 2 Interrupt
-#define USB_RXIS_EP1            0x00000002  // RX Endpoint 1 Interrupt
+// 0x6c: HWVERS
+#define MUSB_HWVERS_RC_SHIFT    15
+#define MUSB_HWVERS_RC_MASK     0x8000
+#define MUSB_HWVERS_MAJOR_SHIFT 10
+#define MUSB_HWVERS_MAJOR_MASK  0x7C00
+#define MUSB_HWVERS_MINOR_SHIFT 0
+#define MUSB_HWVERS_MINOR_MASK  0x03FF
 
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXIE register.
-//
-//*****************************************************************************
-#define USB_TXIE_EP7            0x00000080  // TX Endpoint 7 Interrupt Enable
-#define USB_TXIE_EP6            0x00000040  // TX Endpoint 6 Interrupt Enable
-#define USB_TXIE_EP5            0x00000020  // TX Endpoint 5 Interrupt Enable
-#define USB_TXIE_EP4            0x00000010  // TX Endpoint 4 Interrupt Enable
-#define USB_TXIE_EP3            0x00000008  // TX Endpoint 3 Interrupt Enable
-#define USB_TXIE_EP2            0x00000004  // TX Endpoint 2 Interrupt Enable
-#define USB_TXIE_EP1            0x00000002  // TX Endpoint 1 Interrupt Enable
-#define USB_TXIE_EP0            0x00000001  // TX and RX Endpoint 0 Interrupt
-                                            // Enable
+// 0x12, 0x16: TX/RX CSRL
+#define MUSB_CSRL_PACKET_READY(_rx)      (1u << 0)
+#define MUSB_CSRL_FLUSH_FIFO(_rx)        (1u << ((_rx) ? 4 : 3))
+#define MUSB_CSRL_SEND_STALL(_rx)        (1u << ((_rx) ? 5 : 4))
+#define MUSB_CSRL_SENT_STALL(_rx)        (1u << ((_rx) ? 6 : 5))
+#define MUSB_CSRL_CLEAR_DATA_TOGGLE(_rx) (1u << ((_rx) ? 7 : 6))
+
+// 0x13, 0x17: TX/RX CSRH
+#define MUSB_CSRH_DISABLE_DOUBLE_PACKET(_rx) (1u << 1)
 
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXIE register.
-//
-//*****************************************************************************
-#define USB_RXIE_EP7            0x00000080  // RX Endpoint 7 Interrupt Enable
-#define USB_RXIE_EP6            0x00000040  // RX Endpoint 6 Interrupt Enable
-#define USB_RXIE_EP5            0x00000020  // RX Endpoint 5 Interrupt Enable
-#define USB_RXIE_EP4            0x00000010  // RX Endpoint 4 Interrupt Enable
-#define USB_RXIE_EP3            0x00000008  // RX Endpoint 3 Interrupt Enable
-#define USB_RXIE_EP2            0x00000004  // RX Endpoint 2 Interrupt Enable
-#define USB_RXIE_EP1            0x00000002  // RX Endpoint 1 Interrupt Enable
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_IS register.
 //
 //*****************************************************************************
-#define USB_IS_VBUSERR          0x00000080  // VBUS Error (OTG only)
-#define USB_IS_SESREQ           0x00000040  // SESSION REQUEST (OTG only)
-#define USB_IS_DISCON           0x00000020  // Session Disconnect (OTG only)
-#define USB_IS_CONN             0x00000010  // Session Connect
-#define USB_IS_SOF              0x00000008  // Start of Frame
-#define USB_IS_BABBLE           0x00000004  // Babble Detected
-#define USB_IS_RESET            0x00000004  // RESET Signaling Detected
-#define USB_IS_RESUME           0x00000002  // RESUME Signaling Detected
-#define USB_IS_SUSPEND          0x00000001  // SUSPEND Signaling Detected
+#define USB_IS_VBUSERR          0x0080  // VBUS Error (OTG only)
+#define USB_IS_SESREQ           0x0040  // SESSION REQUEST (OTG only)
+#define USB_IS_DISCON           0x0020  // Session Disconnect (OTG only)
+#define USB_IS_CONN             0x0010  // Session Connect
+#define USB_IS_SOF              0x0008  // Start of Frame
+#define USB_IS_BABBLE           0x0004  // Babble Detected
+#define USB_IS_RESET            0x0004  // RESET Signaling Detected
+#define USB_IS_RESUME           0x0002  // RESUME Signaling Detected
+#define USB_IS_SUSPEND          0x0001  // SUSPEND Signaling Detected
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_IE register.
 //
 //*****************************************************************************
-#define USB_IE_VBUSERR          0x00000080  // Enable VBUS Error Interrupt (OTG
-                                            // only)
-#define USB_IE_SESREQ           0x00000040  // Enable Session Request (OTG
-                                            // only)
-#define USB_IE_DISCON           0x00000020  // Enable Disconnect Interrupt
-#define USB_IE_CONN             0x00000010  // Enable Connect Interrupt
-#define USB_IE_SOF              0x00000008  // Enable Start-of-Frame Interrupt
-#define USB_IE_BABBLE           0x00000004  // Enable Babble Interrupt
-#define USB_IE_RESET            0x00000004  // Enable RESET Interrupt
-#define USB_IE_RESUME           0x00000002  // Enable RESUME Interrupt
-#define USB_IE_SUSPND           0x00000001  // Enable SUSPEND Interrupt
+#define USB_IE_VBUSERR          0x0080  // Enable VBUS Error Interrupt (OTG only)
+#define USB_IE_SESREQ           0x0040  // Enable Session Request (OTG only)
+#define USB_IE_DISCON           0x0020  // Enable Disconnect Interrupt
+#define USB_IE_CONN             0x0010  // Enable Connect Interrupt
+#define USB_IE_SOF              0x0008  // Enable Start-of-Frame Interrupt
+#define USB_IE_BABBLE           0x0004  // Enable Babble Interrupt
+#define USB_IE_RESET            0x0004  // Enable RESET Interrupt
+#define USB_IE_RESUME           0x0002  // Enable RESUME Interrupt
+#define USB_IE_SUSPND           0x0001  // Enable SUSPEND Interrupt
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_FRAME register.
 //
 //*****************************************************************************
-#define USB_FRAME_M             0x000007FF  // Frame Number
+#define USB_FRAME_M             0x07FF  // Frame Number
 #define USB_FRAME_S             0
 
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_EPIDX register.
-//
-//*****************************************************************************
-#define USB_EPIDX_EPIDX_M       0x0000000F  // Endpoint Index
-#define USB_EPIDX_EPIDX_S       0
-
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TEST register.
 //
 //*****************************************************************************
-#define USB_TEST_FORCEH         0x00000080  // Force Host Mode
-#define USB_TEST_FIFOACC        0x00000040  // FIFO Access
-#define USB_TEST_FORCEFS        0x00000020  // Force Full-Speed Mode
-#define USB_TEST_FORCEHS        0x00000010  // Force High-Speed Mode
-#define USB_TEST_TESTPKT        0x00000008  // Test Packet Mode Enable
-#define USB_TEST_TESTK          0x00000004  // Test_K Mode Enable
-#define USB_TEST_TESTJ          0x00000002  // Test_J Mode Enable
-#define USB_TEST_TESTSE0NAK     0x00000001  // Test_SE0_NAK Test Mode Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_FIFO0 register.
-//
-//*****************************************************************************
-#define USB_FIFO0_EPDATA_M      0xFFFFFFFF  // Endpoint Data
-#define USB_FIFO0_EPDATA_S      0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_FIFO1 register.
-//
-//*****************************************************************************
-#define USB_FIFO1_EPDATA_M      0xFFFFFFFF  // Endpoint Data
-#define USB_FIFO1_EPDATA_S      0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_FIFO2 register.
-//
-//*****************************************************************************
-#define USB_FIFO2_EPDATA_M      0xFFFFFFFF  // Endpoint Data
-#define USB_FIFO2_EPDATA_S      0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_FIFO3 register.
-//
-//*****************************************************************************
-#define USB_FIFO3_EPDATA_M      0xFFFFFFFF  // Endpoint Data
-#define USB_FIFO3_EPDATA_S      0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_FIFO4 register.
-//
-//*****************************************************************************
-#define USB_FIFO4_EPDATA_M      0xFFFFFFFF  // Endpoint Data
-#define USB_FIFO4_EPDATA_S      0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_FIFO5 register.
-//
-//*****************************************************************************
-#define USB_FIFO5_EPDATA_M      0xFFFFFFFF  // Endpoint Data
-#define USB_FIFO5_EPDATA_S      0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_FIFO6 register.
-//
-//*****************************************************************************
-#define USB_FIFO6_EPDATA_M      0xFFFFFFFF  // Endpoint Data
-#define USB_FIFO6_EPDATA_S      0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_FIFO7 register.
-//
-//*****************************************************************************
-#define USB_FIFO7_EPDATA_M      0xFFFFFFFF  // Endpoint Data
-#define USB_FIFO7_EPDATA_S      0
+#define USB_TEST_FORCEH         0x0080  // Force Host Mode
+#define USB_TEST_FIFOACC        0x0040  // FIFO Access
+#define USB_TEST_FORCEFS        0x0020  // Force Full-Speed Mode
+#define USB_TEST_FORCEHS        0x0010  // Force High-Speed Mode
+#define USB_TEST_TESTPKT        0x0008  // Test Packet Mode Enable
+#define USB_TEST_TESTK          0x0004  // Test_K Mode Enable
+#define USB_TEST_TESTJ          0x0002  // Test_J Mode Enable
+#define USB_TEST_TESTSE0NAK     0x0001  // Test_SE0_NAK Test Mode Enable
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_DEVCTL register.
 //
 //*****************************************************************************
-#define USB_DEVCTL_DEV          0x00000080  // Device Mode (OTG only)
-#define USB_DEVCTL_FSDEV        0x00000040  // Full-Speed Device Detected
-#define USB_DEVCTL_LSDEV        0x00000020  // Low-Speed Device Detected
-#define USB_DEVCTL_VBUS_M       0x00000018  // VBUS Level (OTG only)
-#define USB_DEVCTL_VBUS_NONE    0x00000000  // Below SessionEnd
-#define USB_DEVCTL_VBUS_SEND    0x00000008  // Above SessionEnd, below AValid
-#define USB_DEVCTL_VBUS_AVALID  0x00000010  // Above AValid, below VBUSValid
-#define USB_DEVCTL_VBUS_VALID   0x00000018  // Above VBUSValid
-#define USB_DEVCTL_HOST         0x00000004  // Host Mode
-#define USB_DEVCTL_HOSTREQ      0x00000002  // Host Request (OTG only)
-#define USB_DEVCTL_SESSION      0x00000001  // Session Start/End (OTG only)
+#define USB_DEVCTL_DEV          0x0080  // Device Mode (OTG only)
+#define USB_DEVCTL_FSDEV        0x0040  // Full-Speed Device Detected
+#define USB_DEVCTL_LSDEV        0x0020  // Low-Speed Device Detected
+#define USB_DEVCTL_VBUS_M       0x0018  // VBUS Level (OTG only)
+#define USB_DEVCTL_VBUS_NONE    0x0000  // Below SessionEnd
+#define USB_DEVCTL_VBUS_SEND    0x0008  // Above SessionEnd, below AValid
+#define USB_DEVCTL_VBUS_AVALID  0x0010  // Above AValid, below VBUSValid
+#define USB_DEVCTL_VBUS_VALID   0x0018  // Above VBUSValid
+#define USB_DEVCTL_HOST         0x0004  // Host Mode
+#define USB_DEVCTL_HOSTREQ      0x0002  // Host Request (OTG only)
+#define USB_DEVCTL_SESSION      0x0001  // Session Start/End (OTG only)
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_CCONF register.
 //
 //*****************************************************************************
-#define USB_CCONF_TXEDMA        0x00000002  // TX Early DMA Enable
-#define USB_CCONF_RXEDMA        0x00000001  // TX Early DMA Enable
+#define USB_CCONF_TXEDMA        0x0002  // TX Early DMA Enable
+#define USB_CCONF_RXEDMA        0x0001  // TX Early DMA Enable
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXFIFOSZ register.
 //
 //*****************************************************************************
-#define USB_TXFIFOSZ_DPB        0x00000010  // Double Packet Buffer Support
-#define USB_TXFIFOSZ_SIZE_M     0x0000000F  // Max Packet Size
-#define USB_TXFIFOSZ_SIZE_8     0x00000000  // 8
-#define USB_TXFIFOSZ_SIZE_16    0x00000001  // 16
-#define USB_TXFIFOSZ_SIZE_32    0x00000002  // 32
-#define USB_TXFIFOSZ_SIZE_64    0x00000003  // 64
-#define USB_TXFIFOSZ_SIZE_128   0x00000004  // 128
-#define USB_TXFIFOSZ_SIZE_256   0x00000005  // 256
-#define USB_TXFIFOSZ_SIZE_512   0x00000006  // 512
-#define USB_TXFIFOSZ_SIZE_1024  0x00000007  // 1024
-#define USB_TXFIFOSZ_SIZE_2048  0x00000008  // 2048
+#define USB_TXFIFOSZ_DPB        0x0010  // Double Packet Buffer Support
+#define USB_TXFIFOSZ_SIZE_M     0x000F  // Max Packet Size
+#define USB_TXFIFOSZ_SIZE_8     0x0000  // 8
+#define USB_TXFIFOSZ_SIZE_16    0x0001  // 16
+#define USB_TXFIFOSZ_SIZE_32    0x0002  // 32
+#define USB_TXFIFOSZ_SIZE_64    0x0003  // 64
+#define USB_TXFIFOSZ_SIZE_128   0x0004  // 128
+#define USB_TXFIFOSZ_SIZE_256   0x0005  // 256
+#define USB_TXFIFOSZ_SIZE_512   0x0006  // 512
+#define USB_TXFIFOSZ_SIZE_1024  0x0007  // 1024
+#define USB_TXFIFOSZ_SIZE_2048  0x0008  // 2048
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXFIFOSZ register.
 //
 //*****************************************************************************
-#define USB_RXFIFOSZ_DPB        0x00000010  // Double Packet Buffer Support
-#define USB_RXFIFOSZ_SIZE_M     0x0000000F  // Max Packet Size
-#define USB_RXFIFOSZ_SIZE_8     0x00000000  // 8
-#define USB_RXFIFOSZ_SIZE_16    0x00000001  // 16
-#define USB_RXFIFOSZ_SIZE_32    0x00000002  // 32
-#define USB_RXFIFOSZ_SIZE_64    0x00000003  // 64
-#define USB_RXFIFOSZ_SIZE_128   0x00000004  // 128
-#define USB_RXFIFOSZ_SIZE_256   0x00000005  // 256
-#define USB_RXFIFOSZ_SIZE_512   0x00000006  // 512
-#define USB_RXFIFOSZ_SIZE_1024  0x00000007  // 1024
-#define USB_RXFIFOSZ_SIZE_2048  0x00000008  // 2048
+#define USB_RXFIFOSZ_DPB        0x0010  // Double Packet Buffer Support
+#define USB_RXFIFOSZ_SIZE_M     0x000F  // Max Packet Size
+#define USB_RXFIFOSZ_SIZE_8     0x0000  // 8
+#define USB_RXFIFOSZ_SIZE_16    0x0001  // 16
+#define USB_RXFIFOSZ_SIZE_32    0x0002  // 32
+#define USB_RXFIFOSZ_SIZE_64    0x0003  // 64
+#define USB_RXFIFOSZ_SIZE_128   0x0004  // 128
+#define USB_RXFIFOSZ_SIZE_256   0x0005  // 256
+#define USB_RXFIFOSZ_SIZE_512   0x0006  // 512
+#define USB_RXFIFOSZ_SIZE_1024  0x0007  // 1024
+#define USB_RXFIFOSZ_SIZE_2048  0x0008  // 2048
 
 //*****************************************************************************
 //
@@ -453,7 +426,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_TXFIFOADD_ADDR_M    0x000001FF  // Transmit/Receive Start Address
+#define USB_TXFIFOADD_ADDR_M    0x01FF  // Transmit/Receive Start Address
 #define USB_TXFIFOADD_ADDR_S    0
 
 //*****************************************************************************
@@ -462,7 +435,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RXFIFOADD_ADDR_M    0x000001FF  // Transmit/Receive Start Address
+#define USB_RXFIFOADD_ADDR_M    0x01FF  // Transmit/Receive Start Address
 #define USB_RXFIFOADD_ADDR_S    0
 
 //*****************************************************************************
@@ -471,10 +444,8 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_ULPIVBUSCTL_USEEXTVBUSIND                                         \
-                                0x00000002  // Use External VBUS Indicator
-#define USB_ULPIVBUSCTL_USEEXTVBUS                                            \
-                                0x00000001  // Use External VBUS
+#define USB_ULPIVBUSCTL_USEEXTVBUSIND  0x0002  // Use External VBUS Indicator
+#define USB_ULPIVBUSCTL_USEEXTVBUS     0x0001  // Use External VBUS
 
 //*****************************************************************************
 //
@@ -482,18 +453,15 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_ULPIREGDATA_REGDATA_M                                             \
-                                0x000000FF  // Register Data
-#define USB_ULPIREGDATA_REGDATA_S                                             \
-                                0
-
+#define USB_ULPIREGDATA_REGDATA_M      0x00FF  // Register Data
+#define USB_ULPIREGDATA_REGDATA_S      0
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_ULPIREGADDR
 // register.
 //
 //*****************************************************************************
-#define USB_ULPIREGADDR_ADDR_M  0x000000FF  // Register Address
+#define USB_ULPIREGADDR_ADDR_M  0x00FF  // Register Address
 #define USB_ULPIREGADDR_ADDR_S  0
 
 //*****************************************************************************
@@ -502,17 +470,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_ULPIREGCTL_RDWR     0x00000004  // Read/Write Control
-#define USB_ULPIREGCTL_REGCMPLT 0x00000002  // Register Access Complete
-#define USB_ULPIREGCTL_REGACC   0x00000001  // Initiate Register Access
+#define USB_ULPIREGCTL_RDWR     0x0004  // Read/Write Control
+#define USB_ULPIREGCTL_REGCMPLT 0x0002  // Register Access Complete
+#define USB_ULPIREGCTL_REGACC   0x0001  // Initiate Register Access
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_EPINFO register.
 //
 //*****************************************************************************
-#define USB_EPINFO_RXEP_M       0x000000F0  // RX Endpoints
-#define USB_EPINFO_TXEP_M       0x0000000F  // TX Endpoints
+#define USB_EPINFO_RXEP_M       0x00F0  // RX Endpoints
+#define USB_EPINFO_TXEP_M       0x000F  // TX Endpoints
 #define USB_EPINFO_RXEP_S       4
 #define USB_EPINFO_TXEP_S       0
 
@@ -521,8 +489,8 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RAMINFO register.
 //
 //*****************************************************************************
-#define USB_RAMINFO_DMACHAN_M   0x000000F0  // DMA Channels
-#define USB_RAMINFO_RAMBITS_M   0x0000000F  // RAM Address Bus Width
+#define USB_RAMINFO_DMACHAN_M   0x00F0  // DMA Channels
+#define USB_RAMINFO_RAMBITS_M   0x000F  // RAM Address Bus Width
 #define USB_RAMINFO_DMACHAN_S   4
 #define USB_RAMINFO_RAMBITS_S   0
 
@@ -531,8 +499,8 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_CONTIM register.
 //
 //*****************************************************************************
-#define USB_CONTIM_WTCON_M      0x000000F0  // Connect Wait
-#define USB_CONTIM_WTID_M       0x0000000F  // Wait ID
+#define USB_CONTIM_WTCON_M      0x00F0  // Connect Wait
+#define USB_CONTIM_WTID_M       0x000F  // Wait ID
 #define USB_CONTIM_WTCON_S      4
 #define USB_CONTIM_WTID_S       0
 
@@ -541,7 +509,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_VPLEN register.
 //
 //*****************************************************************************
-#define USB_VPLEN_VPLEN_M       0x000000FF  // VBUS Pulse Length
+#define USB_VPLEN_VPLEN_M       0x00FF  // VBUS Pulse Length
 #define USB_VPLEN_VPLEN_S       0
 
 //*****************************************************************************
@@ -549,7 +517,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_HSEOF register.
 //
 //*****************************************************************************
-#define USB_HSEOF_HSEOFG_M      0x000000FF  // HIgh-Speed End-of-Frame Gap
+#define USB_HSEOF_HSEOFG_M      0x00FF  // HIgh-Speed End-of-Frame Gap
 #define USB_HSEOF_HSEOFG_S      0
 
 //*****************************************************************************
@@ -557,7 +525,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_FSEOF register.
 //
 //*****************************************************************************
-#define USB_FSEOF_FSEOFG_M      0x000000FF  // Full-Speed End-of-Frame Gap
+#define USB_FSEOF_FSEOFG_M      0x00FF  // Full-Speed End-of-Frame Gap
 #define USB_FSEOF_FSEOFG_S      0
 
 //*****************************************************************************
@@ -565,449 +533,44 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_LSEOF register.
 //
 //*****************************************************************************
-#define USB_LSEOF_LSEOFG_M      0x000000FF  // Low-Speed End-of-Frame Gap
+#define USB_LSEOF_LSEOFG_M      0x00FF  // Low-Speed End-of-Frame Gap
 #define USB_LSEOF_LSEOFG_S      0
 
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXFUNCADDR0
-// register.
-//
-//*****************************************************************************
-#define USB_TXFUNCADDR0_ADDR_M  0x0000007F  // Device Address
-#define USB_TXFUNCADDR0_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBADDR0
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBADDR0_ADDR_M   0x0000007F  // Hub Address
-#define USB_TXHUBADDR0_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBPORT0
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBPORT0_PORT_M   0x0000007F  // Hub Port
-#define USB_TXHUBPORT0_PORT_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXFUNCADDR1
-// register.
-//
-//*****************************************************************************
-#define USB_TXFUNCADDR1_ADDR_M  0x0000007F  // Device Address
-#define USB_TXFUNCADDR1_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBADDR1
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBADDR1_ADDR_M   0x0000007F  // Hub Address
-#define USB_TXHUBADDR1_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBPORT1
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBPORT1_PORT_M   0x0000007F  // Hub Port
-#define USB_TXHUBPORT1_PORT_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXFUNCADDR1
-// register.
-//
-//*****************************************************************************
-#define USB_RXFUNCADDR1_ADDR_M  0x0000007F  // Device Address
-#define USB_RXFUNCADDR1_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXHUBADDR1
-// register.
-//
-//*****************************************************************************
-#define USB_RXHUBADDR1_ADDR_M   0x0000007F  // Hub Address
-#define USB_RXHUBADDR1_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXHUBPORT1
-// register.
-//
-//*****************************************************************************
-#define USB_RXHUBPORT1_PORT_M   0x0000007F  // Hub Port
-#define USB_RXHUBPORT1_PORT_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXFUNCADDR2
-// register.
-//
-//*****************************************************************************
-#define USB_TXFUNCADDR2_ADDR_M  0x0000007F  // Device Address
-#define USB_TXFUNCADDR2_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBADDR2
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBADDR2_ADDR_M   0x0000007F  // Hub Address
-#define USB_TXHUBADDR2_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBPORT2
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBPORT2_PORT_M   0x0000007F  // Hub Port
-#define USB_TXHUBPORT2_PORT_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXFUNCADDR2
-// register.
-//
-//*****************************************************************************
-#define USB_RXFUNCADDR2_ADDR_M  0x0000007F  // Device Address
-#define USB_RXFUNCADDR2_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXHUBADDR2
-// register.
-//
-//*****************************************************************************
-#define USB_RXHUBADDR2_ADDR_M   0x0000007F  // Hub Address
-#define USB_RXHUBADDR2_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXHUBPORT2
-// register.
-//
-//*****************************************************************************
-#define USB_RXHUBPORT2_PORT_M   0x0000007F  // Hub Port
-#define USB_RXHUBPORT2_PORT_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXFUNCADDR3
-// register.
-//
-//*****************************************************************************
-#define USB_TXFUNCADDR3_ADDR_M  0x0000007F  // Device Address
-#define USB_TXFUNCADDR3_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBADDR3
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBADDR3_ADDR_M   0x0000007F  // Hub Address
-#define USB_TXHUBADDR3_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBPORT3
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBPORT3_PORT_M   0x0000007F  // Hub Port
-#define USB_TXHUBPORT3_PORT_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXFUNCADDR3
-// register.
-//
-//*****************************************************************************
-#define USB_RXFUNCADDR3_ADDR_M  0x0000007F  // Device Address
-#define USB_RXFUNCADDR3_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXHUBADDR3
-// register.
-//
-//*****************************************************************************
-#define USB_RXHUBADDR3_ADDR_M   0x0000007F  // Hub Address
-#define USB_RXHUBADDR3_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXHUBPORT3
-// register.
-//
-//*****************************************************************************
-#define USB_RXHUBPORT3_PORT_M   0x0000007F  // Hub Port
-#define USB_RXHUBPORT3_PORT_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXFUNCADDR4
-// register.
-//
-//*****************************************************************************
-#define USB_TXFUNCADDR4_ADDR_M  0x0000007F  // Device Address
-#define USB_TXFUNCADDR4_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBADDR4
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBADDR4_ADDR_M   0x0000007F  // Hub Address
-#define USB_TXHUBADDR4_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBPORT4
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBPORT4_PORT_M   0x0000007F  // Hub Port
-#define USB_TXHUBPORT4_PORT_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXFUNCADDR4
-// register.
-//
-//*****************************************************************************
-#define USB_RXFUNCADDR4_ADDR_M  0x0000007F  // Device Address
-#define USB_RXFUNCADDR4_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXHUBADDR4
-// register.
-//
-//*****************************************************************************
-#define USB_RXHUBADDR4_ADDR_M   0x0000007F  // Hub Address
-#define USB_RXHUBADDR4_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXHUBPORT4
-// register.
-//
-//*****************************************************************************
-#define USB_RXHUBPORT4_PORT_M   0x0000007F  // Hub Port
-#define USB_RXHUBPORT4_PORT_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXFUNCADDR5
-// register.
-//
-//*****************************************************************************
-#define USB_TXFUNCADDR5_ADDR_M  0x0000007F  // Device Address
-#define USB_TXFUNCADDR5_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBADDR5
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBADDR5_ADDR_M   0x0000007F  // Hub Address
-#define USB_TXHUBADDR5_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBPORT5
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBPORT5_PORT_M   0x0000007F  // Hub Port
-#define USB_TXHUBPORT5_PORT_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXFUNCADDR5
-// register.
-//
-//*****************************************************************************
-#define USB_RXFUNCADDR5_ADDR_M  0x0000007F  // Device Address
-#define USB_RXFUNCADDR5_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXHUBADDR5
-// register.
-//
-//*****************************************************************************
-#define USB_RXHUBADDR5_ADDR_M   0x0000007F  // Hub Address
-#define USB_RXHUBADDR5_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXHUBPORT5
-// register.
-//
-//*****************************************************************************
-#define USB_RXHUBPORT5_PORT_M   0x0000007F  // Hub Port
-#define USB_RXHUBPORT5_PORT_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXFUNCADDR6
-// register.
-//
-//*****************************************************************************
-#define USB_TXFUNCADDR6_ADDR_M  0x0000007F  // Device Address
-#define USB_TXFUNCADDR6_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBADDR6
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBADDR6_ADDR_M   0x0000007F  // Hub Address
-#define USB_TXHUBADDR6_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBPORT6
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBPORT6_PORT_M   0x0000007F  // Hub Port
-#define USB_TXHUBPORT6_PORT_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXFUNCADDR6
-// register.
-//
-//*****************************************************************************
-#define USB_RXFUNCADDR6_ADDR_M  0x0000007F  // Device Address
-#define USB_RXFUNCADDR6_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXHUBADDR6
-// register.
-//
-//*****************************************************************************
-#define USB_RXHUBADDR6_ADDR_M   0x0000007F  // Hub Address
-#define USB_RXHUBADDR6_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXHUBPORT6
-// register.
-//
-//*****************************************************************************
-#define USB_RXHUBPORT6_PORT_M   0x0000007F  // Hub Port
-#define USB_RXHUBPORT6_PORT_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXFUNCADDR7
-// register.
-//
-//*****************************************************************************
-#define USB_TXFUNCADDR7_ADDR_M  0x0000007F  // Device Address
-#define USB_TXFUNCADDR7_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBADDR7
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBADDR7_ADDR_M   0x0000007F  // Hub Address
-#define USB_TXHUBADDR7_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXHUBPORT7
-// register.
-//
-//*****************************************************************************
-#define USB_TXHUBPORT7_PORT_M   0x0000007F  // Hub Port
-#define USB_TXHUBPORT7_PORT_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXFUNCADDR7
-// register.
-//
-//*****************************************************************************
-#define USB_RXFUNCADDR7_ADDR_M  0x0000007F  // Device Address
-#define USB_RXFUNCADDR7_ADDR_S  0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXHUBADDR7
-// register.
-//
-//*****************************************************************************
-#define USB_RXHUBADDR7_ADDR_M   0x0000007F  // Hub Address
-#define USB_RXHUBADDR7_ADDR_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXHUBPORT7
-// register.
-//
-//*****************************************************************************
-#define USB_RXHUBPORT7_PORT_M   0x0000007F  // Hub Port
-#define USB_RXHUBPORT7_PORT_S   0
-
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_CSRL0 register.
 //
 //*****************************************************************************
-#define USB_CSRL0_NAKTO         0x00000080  // NAK Timeout
-#define USB_CSRL0_SETENDC       0x00000080  // Setup End Clear
-#define USB_CSRL0_STATUS        0x00000040  // STATUS Packet
-#define USB_CSRL0_RXRDYC        0x00000040  // RXRDY Clear
-#define USB_CSRL0_REQPKT        0x00000020  // Request Packet
-#define USB_CSRL0_STALL         0x00000020  // Send Stall
-#define USB_CSRL0_SETEND        0x00000010  // Setup End
-#define USB_CSRL0_ERROR         0x00000010  // Error
-#define USB_CSRL0_DATAEND       0x00000008  // Data End
-#define USB_CSRL0_SETUP         0x00000008  // Setup Packet
-#define USB_CSRL0_STALLED       0x00000004  // Endpoint Stalled
-#define USB_CSRL0_TXRDY         0x00000002  // Transmit Packet Ready
-#define USB_CSRL0_RXRDY         0x00000001  // Receive Packet Ready
+#define USB_CSRL0_NAKTO         0x0080  // NAK Timeout
+#define USB_CSRL0_SETENDC       0x0080  // Setup End Clear
+#define USB_CSRL0_STATUS        0x0040  // STATUS Packet
+#define USB_CSRL0_RXRDYC        0x0040  // RXRDY Clear
+#define USB_CSRL0_REQPKT        0x0020  // Request Packet
+#define USB_CSRL0_STALL         0x0020  // Send Stall
+#define USB_CSRL0_SETEND        0x0010  // Setup End
+#define USB_CSRL0_ERROR         0x0010  // Error
+#define USB_CSRL0_DATAEND       0x0008  // Data End
+#define USB_CSRL0_SETUP         0x0008  // Setup Packet
+#define USB_CSRL0_STALLED       0x0004  // Endpoint Stalled
+#define USB_CSRL0_TXRDY         0x0002  // Transmit Packet Ready
+#define USB_CSRL0_RXRDY         0x0001  // Receive Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_CSRH0 register.
 //
 //*****************************************************************************
-#define USB_CSRH0_DISPING       0x00000008  // PING Disable
-#define USB_CSRH0_DTWE          0x00000004  // Data Toggle Write Enable
-#define USB_CSRH0_DT            0x00000002  // Data Toggle
-#define USB_CSRH0_FLUSH         0x00000001  // Flush FIFO
+#define USB_CSRH0_DISPING       0x0008  // PING Disable
+#define USB_CSRH0_DTWE          0x0004  // Data Toggle Write Enable
+#define USB_CSRH0_DT            0x0002  // Data Toggle
+#define USB_CSRH0_FLUSH         0x0001  // Flush FIFO
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_COUNT0 register.
 //
 //*****************************************************************************
-#define USB_COUNT0_COUNT_M      0x0000007F  // FIFO Count
+#define USB_COUNT0_COUNT_M      0x007F  // FIFO Count
 #define USB_COUNT0_COUNT_S      0
 
 //*****************************************************************************
@@ -1015,17 +578,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TYPE0 register.
 //
 //*****************************************************************************
-#define USB_TYPE0_SPEED_M       0x000000C0  // Operating Speed
-#define USB_TYPE0_SPEED_HIGH    0x00000040  // High
-#define USB_TYPE0_SPEED_FULL    0x00000080  // Full
-#define USB_TYPE0_SPEED_LOW     0x000000C0  // Low
+#define USB_TYPE0_SPEED_M       0x00C0  // Operating Speed
+#define USB_TYPE0_SPEED_HIGH    0x0040  // High
+#define USB_TYPE0_SPEED_FULL    0x0080  // Full
+#define USB_TYPE0_SPEED_LOW     0x00C0  // Low
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_NAKLMT register.
 //
 //*****************************************************************************
-#define USB_NAKLMT_NAKLMT_M     0x0000001F  // EP0 NAK Limit
+#define USB_NAKLMT_NAKLMT_M     0x001F  // EP0 NAK Limit
 #define USB_NAKLMT_NAKLMT_S     0
 
 //*****************************************************************************
@@ -1033,7 +596,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXMAXP1 register.
 //
 //*****************************************************************************
-#define USB_TXMAXP1_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_TXMAXP1_MAXLOAD_M   0x07FF  // Maximum Payload
 #define USB_TXMAXP1_MAXLOAD_S   0
 
 //*****************************************************************************
@@ -1041,37 +604,37 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXCSRL1 register.
 //
 //*****************************************************************************
-#define USB_TXCSRL1_NAKTO       0x00000080  // NAK Timeout
-#define USB_TXCSRL1_CLRDT       0x00000040  // Clear Data Toggle
-#define USB_TXCSRL1_STALLED     0x00000020  // Endpoint Stalled
-#define USB_TXCSRL1_STALL       0x00000010  // Send STALL
-#define USB_TXCSRL1_SETUP       0x00000010  // Setup Packet
-#define USB_TXCSRL1_FLUSH       0x00000008  // Flush FIFO
-#define USB_TXCSRL1_ERROR       0x00000004  // Error
-#define USB_TXCSRL1_UNDRN       0x00000004  // Underrun
-#define USB_TXCSRL1_FIFONE      0x00000002  // FIFO Not Empty
-#define USB_TXCSRL1_TXRDY       0x00000001  // Transmit Packet Ready
+#define USB_TXCSRL1_NAKTO       0x0080  // NAK Timeout
+#define USB_TXCSRL1_CLRDT       0x0040  // Clear Data Toggle
+#define USB_TXCSRL1_STALLED     0x0020  // Endpoint Stalled
+#define USB_TXCSRL1_STALL       0x0010  // Send STALL
+#define USB_TXCSRL1_SETUP       0x0010  // Setup Packet
+#define USB_TXCSRL1_FLUSH       0x0008  // Flush FIFO
+#define USB_TXCSRL1_ERROR       0x0004  // Error
+#define USB_TXCSRL1_UNDRN       0x0004  // Underrun
+#define USB_TXCSRL1_FIFONE      0x0002  // FIFO Not Empty
+#define USB_TXCSRL1_TXRDY       0x0001  // Transmit Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXCSRH1 register.
 //
 //*****************************************************************************
-#define USB_TXCSRH1_AUTOSET     0x00000080  // Auto Set
-#define USB_TXCSRH1_ISO         0x00000040  // Isochronous Transfers
-#define USB_TXCSRH1_MODE        0x00000020  // Mode
-#define USB_TXCSRH1_DMAEN       0x00000010  // DMA Request Enable
-#define USB_TXCSRH1_FDT         0x00000008  // Force Data Toggle
-#define USB_TXCSRH1_DMAMOD      0x00000004  // DMA Request Mode
-#define USB_TXCSRH1_DTWE        0x00000002  // Data Toggle Write Enable
-#define USB_TXCSRH1_DT          0x00000001  // Data Toggle
+#define USB_TXCSRH1_AUTOSET     0x0080  // Auto Set
+#define USB_TXCSRH1_ISO         0x0040  // Isochronous Transfers
+#define USB_TXCSRH1_MODE        0x0020  // Mode
+#define USB_TXCSRH1_DMAEN       0x0010  // DMA Request Enable
+#define USB_TXCSRH1_FDT         0x0008  // Force Data Toggle
+#define USB_TXCSRH1_DMAMOD      0x0004  // DMA Request Mode
+#define USB_TXCSRH1_DTWE        0x0002  // Data Toggle Write Enable
+#define USB_TXCSRH1_DT          0x0001  // Data Toggle
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXMAXP1 register.
 //
 //*****************************************************************************
-#define USB_RXMAXP1_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_RXMAXP1_MAXLOAD_M   0x07FF  // Maximum Payload
 #define USB_RXMAXP1_MAXLOAD_S   0
 
 //*****************************************************************************
@@ -1079,33 +642,33 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RXCSRL1 register.
 //
 //*****************************************************************************
-#define USB_RXCSRL1_CLRDT       0x00000080  // Clear Data Toggle
-#define USB_RXCSRL1_STALLED     0x00000040  // Endpoint Stalled
-#define USB_RXCSRL1_STALL       0x00000020  // Send STALL
-#define USB_RXCSRL1_REQPKT      0x00000020  // Request Packet
-#define USB_RXCSRL1_FLUSH       0x00000010  // Flush FIFO
-#define USB_RXCSRL1_DATAERR     0x00000008  // Data Error
-#define USB_RXCSRL1_NAKTO       0x00000008  // NAK Timeout
-#define USB_RXCSRL1_OVER        0x00000004  // Overrun
-#define USB_RXCSRL1_ERROR       0x00000004  // Error
-#define USB_RXCSRL1_FULL        0x00000002  // FIFO Full
-#define USB_RXCSRL1_RXRDY       0x00000001  // Receive Packet Ready
+#define USB_RXCSRL1_CLRDT       0x0080  // Clear Data Toggle
+#define USB_RXCSRL1_STALLED     0x0040  // Endpoint Stalled
+#define USB_RXCSRL1_STALL       0x0020  // Send STALL
+#define USB_RXCSRL1_REQPKT      0x0020  // Request Packet
+#define USB_RXCSRL1_FLUSH       0x0010  // Flush FIFO
+#define USB_RXCSRL1_DATAERR     0x0008  // Data Error
+#define USB_RXCSRL1_NAKTO       0x0008  // NAK Timeout
+#define USB_RXCSRL1_OVER        0x0004  // Overrun
+#define USB_RXCSRL1_ERROR       0x0004  // Error
+#define USB_RXCSRL1_FULL        0x0002  // FIFO Full
+#define USB_RXCSRL1_RXRDY       0x0001  // Receive Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXCSRH1 register.
 //
 //*****************************************************************************
-#define USB_RXCSRH1_AUTOCL      0x00000080  // Auto Clear
-#define USB_RXCSRH1_AUTORQ      0x00000040  // Auto Request
-#define USB_RXCSRH1_ISO         0x00000040  // Isochronous Transfers
-#define USB_RXCSRH1_DMAEN       0x00000020  // DMA Request Enable
-#define USB_RXCSRH1_DISNYET     0x00000010  // Disable NYET
-#define USB_RXCSRH1_PIDERR      0x00000010  // PID Error
-#define USB_RXCSRH1_DMAMOD      0x00000008  // DMA Request Mode
-#define USB_RXCSRH1_DTWE        0x00000004  // Data Toggle Write Enable
-#define USB_RXCSRH1_DT          0x00000002  // Data Toggle
-#define USB_RXCSRH1_INCOMPRX    0x00000001  // Incomplete RX Transmission
+#define USB_RXCSRH1_AUTOCL      0x0080  // Auto Clear
+#define USB_RXCSRH1_AUTORQ      0x0040  // Auto Request
+#define USB_RXCSRH1_ISO         0x0040  // Isochronous Transfers
+#define USB_RXCSRH1_DMAEN       0x0020  // DMA Request Enable
+#define USB_RXCSRH1_DISNYET     0x0010  // Disable NYET
+#define USB_RXCSRH1_PIDERR      0x0010  // PID Error
+#define USB_RXCSRH1_DMAMOD      0x0008  // DMA Request Mode
+#define USB_RXCSRH1_DTWE        0x0004  // Data Toggle Write Enable
+#define USB_RXCSRH1_DT          0x0002  // Data Toggle
+#define USB_RXCSRH1_INCOMPRX    0x0001  // Incomplete RX Transmission
                                             // Status
 
 //*****************************************************************************
@@ -1113,7 +676,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RXCOUNT1 register.
 //
 //*****************************************************************************
-#define USB_RXCOUNT1_COUNT_M    0x00001FFF  // Receive Packet Count
+#define USB_RXCOUNT1_COUNT_M    0x1FFF  // Receive Packet Count
 #define USB_RXCOUNT1_COUNT_S    0
 
 //*****************************************************************************
@@ -1121,17 +684,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXTYPE1 register.
 //
 //*****************************************************************************
-#define USB_TXTYPE1_SPEED_M     0x000000C0  // Operating Speed
-#define USB_TXTYPE1_SPEED_DFLT  0x00000000  // Default
-#define USB_TXTYPE1_SPEED_HIGH  0x00000040  // High
-#define USB_TXTYPE1_SPEED_FULL  0x00000080  // Full
-#define USB_TXTYPE1_SPEED_LOW   0x000000C0  // Low
-#define USB_TXTYPE1_PROTO_M     0x00000030  // Protocol
-#define USB_TXTYPE1_PROTO_CTRL  0x00000000  // Control
-#define USB_TXTYPE1_PROTO_ISOC  0x00000010  // Isochronous
-#define USB_TXTYPE1_PROTO_BULK  0x00000020  // Bulk
-#define USB_TXTYPE1_PROTO_INT   0x00000030  // Interrupt
-#define USB_TXTYPE1_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_TXTYPE1_SPEED_M     0x00C0  // Operating Speed
+#define USB_TXTYPE1_SPEED_DFLT  0x0000  // Default
+#define USB_TXTYPE1_SPEED_HIGH  0x0040  // High
+#define USB_TXTYPE1_SPEED_FULL  0x0080  // Full
+#define USB_TXTYPE1_SPEED_LOW   0x00C0  // Low
+#define USB_TXTYPE1_PROTO_M     0x0030  // Protocol
+#define USB_TXTYPE1_PROTO_CTRL  0x0000  // Control
+#define USB_TXTYPE1_PROTO_ISOC  0x0010  // Isochronous
+#define USB_TXTYPE1_PROTO_BULK  0x0020  // Bulk
+#define USB_TXTYPE1_PROTO_INT   0x0030  // Interrupt
+#define USB_TXTYPE1_TEP_M       0x000F  // Target Endpoint Number
 #define USB_TXTYPE1_TEP_S       0
 
 //*****************************************************************************
@@ -1140,31 +703,27 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_TXINTERVAL1_NAKLMT_M                                              \
-                                0x000000FF  // NAK Limit
-#define USB_TXINTERVAL1_TXPOLL_M                                              \
-                                0x000000FF  // TX Polling
-#define USB_TXINTERVAL1_TXPOLL_S                                              \
-                                0
-#define USB_TXINTERVAL1_NAKLMT_S                                              \
-                                0
+#define USB_TXINTERVAL1_NAKLMT_M 0x00FF  // NAK Limit
+#define USB_TXINTERVAL1_TXPOLL_M 0x00FF  // TX Polling
+#define USB_TXINTERVAL1_TXPOLL_S 0
+#define USB_TXINTERVAL1_NAKLMT_S 0
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXTYPE1 register.
 //
 //*****************************************************************************
-#define USB_RXTYPE1_SPEED_M     0x000000C0  // Operating Speed
-#define USB_RXTYPE1_SPEED_DFLT  0x00000000  // Default
-#define USB_RXTYPE1_SPEED_HIGH  0x00000040  // High
-#define USB_RXTYPE1_SPEED_FULL  0x00000080  // Full
-#define USB_RXTYPE1_SPEED_LOW   0x000000C0  // Low
-#define USB_RXTYPE1_PROTO_M     0x00000030  // Protocol
-#define USB_RXTYPE1_PROTO_CTRL  0x00000000  // Control
-#define USB_RXTYPE1_PROTO_ISOC  0x00000010  // Isochronous
-#define USB_RXTYPE1_PROTO_BULK  0x00000020  // Bulk
-#define USB_RXTYPE1_PROTO_INT   0x00000030  // Interrupt
-#define USB_RXTYPE1_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_RXTYPE1_SPEED_M     0x00C0  // Operating Speed
+#define USB_RXTYPE1_SPEED_DFLT  0x0000  // Default
+#define USB_RXTYPE1_SPEED_HIGH  0x0040  // High
+#define USB_RXTYPE1_SPEED_FULL  0x0080  // Full
+#define USB_RXTYPE1_SPEED_LOW   0x00C0  // Low
+#define USB_RXTYPE1_PROTO_M     0x0030  // Protocol
+#define USB_RXTYPE1_PROTO_CTRL  0x0000  // Control
+#define USB_RXTYPE1_PROTO_ISOC  0x0010  // Isochronous
+#define USB_RXTYPE1_PROTO_BULK  0x0020  // Bulk
+#define USB_RXTYPE1_PROTO_INT   0x0030  // Interrupt
+#define USB_RXTYPE1_TEP_M       0x000F  // Target Endpoint Number
 #define USB_RXTYPE1_TEP_S       0
 
 //*****************************************************************************
@@ -1173,21 +732,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RXINTERVAL1_TXPOLL_M                                              \
-                                0x000000FF  // RX Polling
-#define USB_RXINTERVAL1_NAKLMT_M                                              \
-                                0x000000FF  // NAK Limit
-#define USB_RXINTERVAL1_TXPOLL_S                                              \
-                                0
-#define USB_RXINTERVAL1_NAKLMT_S                                              \
-                                0
+#define USB_RXINTERVAL1_TXPOLL_M 0x00FF  // RX Polling
+#define USB_RXINTERVAL1_NAKLMT_M 0x00FF  // NAK Limit
+#define USB_RXINTERVAL1_TXPOLL_S 0
+#define USB_RXINTERVAL1_NAKLMT_S 0
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXMAXP2 register.
 //
 //*****************************************************************************
-#define USB_TXMAXP2_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_TXMAXP2_MAXLOAD_M   0x07FF  // Maximum Payload
 #define USB_TXMAXP2_MAXLOAD_S   0
 
 //*****************************************************************************
@@ -1195,37 +750,37 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXCSRL2 register.
 //
 //*****************************************************************************
-#define USB_TXCSRL2_NAKTO       0x00000080  // NAK Timeout
-#define USB_TXCSRL2_CLRDT       0x00000040  // Clear Data Toggle
-#define USB_TXCSRL2_STALLED     0x00000020  // Endpoint Stalled
-#define USB_TXCSRL2_SETUP       0x00000010  // Setup Packet
-#define USB_TXCSRL2_STALL       0x00000010  // Send STALL
-#define USB_TXCSRL2_FLUSH       0x00000008  // Flush FIFO
-#define USB_TXCSRL2_ERROR       0x00000004  // Error
-#define USB_TXCSRL2_UNDRN       0x00000004  // Underrun
-#define USB_TXCSRL2_FIFONE      0x00000002  // FIFO Not Empty
-#define USB_TXCSRL2_TXRDY       0x00000001  // Transmit Packet Ready
+#define USB_TXCSRL2_NAKTO       0x0080  // NAK Timeout
+#define USB_TXCSRL2_CLRDT       0x0040  // Clear Data Toggle
+#define USB_TXCSRL2_STALLED     0x0020  // Endpoint Stalled
+#define USB_TXCSRL2_SETUP       0x0010  // Setup Packet
+#define USB_TXCSRL2_STALL       0x0010  // Send STALL
+#define USB_TXCSRL2_FLUSH       0x0008  // Flush FIFO
+#define USB_TXCSRL2_ERROR       0x0004  // Error
+#define USB_TXCSRL2_UNDRN       0x0004  // Underrun
+#define USB_TXCSRL2_FIFONE      0x0002  // FIFO Not Empty
+#define USB_TXCSRL2_TXRDY       0x0001  // Transmit Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXCSRH2 register.
 //
 //*****************************************************************************
-#define USB_TXCSRH2_AUTOSET     0x00000080  // Auto Set
-#define USB_TXCSRH2_ISO         0x00000040  // Isochronous Transfers
-#define USB_TXCSRH2_MODE        0x00000020  // Mode
-#define USB_TXCSRH2_DMAEN       0x00000010  // DMA Request Enable
-#define USB_TXCSRH2_FDT         0x00000008  // Force Data Toggle
-#define USB_TXCSRH2_DMAMOD      0x00000004  // DMA Request Mode
-#define USB_TXCSRH2_DTWE        0x00000002  // Data Toggle Write Enable
-#define USB_TXCSRH2_DT          0x00000001  // Data Toggle
+#define USB_TXCSRH2_AUTOSET     0x0080  // Auto Set
+#define USB_TXCSRH2_ISO         0x0040  // Isochronous Transfers
+#define USB_TXCSRH2_MODE        0x0020  // Mode
+#define USB_TXCSRH2_DMAEN       0x0010  // DMA Request Enable
+#define USB_TXCSRH2_FDT         0x0008  // Force Data Toggle
+#define USB_TXCSRH2_DMAMOD      0x0004  // DMA Request Mode
+#define USB_TXCSRH2_DTWE        0x0002  // Data Toggle Write Enable
+#define USB_TXCSRH2_DT          0x0001  // Data Toggle
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXMAXP2 register.
 //
 //*****************************************************************************
-#define USB_RXMAXP2_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_RXMAXP2_MAXLOAD_M   0x07FF  // Maximum Payload
 #define USB_RXMAXP2_MAXLOAD_S   0
 
 //*****************************************************************************
@@ -1233,33 +788,33 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RXCSRL2 register.
 //
 //*****************************************************************************
-#define USB_RXCSRL2_CLRDT       0x00000080  // Clear Data Toggle
-#define USB_RXCSRL2_STALLED     0x00000040  // Endpoint Stalled
-#define USB_RXCSRL2_REQPKT      0x00000020  // Request Packet
-#define USB_RXCSRL2_STALL       0x00000020  // Send STALL
-#define USB_RXCSRL2_FLUSH       0x00000010  // Flush FIFO
-#define USB_RXCSRL2_DATAERR     0x00000008  // Data Error
-#define USB_RXCSRL2_NAKTO       0x00000008  // NAK Timeout
-#define USB_RXCSRL2_ERROR       0x00000004  // Error
-#define USB_RXCSRL2_OVER        0x00000004  // Overrun
-#define USB_RXCSRL2_FULL        0x00000002  // FIFO Full
-#define USB_RXCSRL2_RXRDY       0x00000001  // Receive Packet Ready
+#define USB_RXCSRL2_CLRDT       0x0080  // Clear Data Toggle
+#define USB_RXCSRL2_STALLED     0x0040  // Endpoint Stalled
+#define USB_RXCSRL2_REQPKT      0x0020  // Request Packet
+#define USB_RXCSRL2_STALL       0x0020  // Send STALL
+#define USB_RXCSRL2_FLUSH       0x0010  // Flush FIFO
+#define USB_RXCSRL2_DATAERR     0x0008  // Data Error
+#define USB_RXCSRL2_NAKTO       0x0008  // NAK Timeout
+#define USB_RXCSRL2_ERROR       0x0004  // Error
+#define USB_RXCSRL2_OVER        0x0004  // Overrun
+#define USB_RXCSRL2_FULL        0x0002  // FIFO Full
+#define USB_RXCSRL2_RXRDY       0x0001  // Receive Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXCSRH2 register.
 //
 //*****************************************************************************
-#define USB_RXCSRH2_AUTOCL      0x00000080  // Auto Clear
-#define USB_RXCSRH2_AUTORQ      0x00000040  // Auto Request
-#define USB_RXCSRH2_ISO         0x00000040  // Isochronous Transfers
-#define USB_RXCSRH2_DMAEN       0x00000020  // DMA Request Enable
-#define USB_RXCSRH2_DISNYET     0x00000010  // Disable NYET
-#define USB_RXCSRH2_PIDERR      0x00000010  // PID Error
-#define USB_RXCSRH2_DMAMOD      0x00000008  // DMA Request Mode
-#define USB_RXCSRH2_DTWE        0x00000004  // Data Toggle Write Enable
-#define USB_RXCSRH2_DT          0x00000002  // Data Toggle
-#define USB_RXCSRH2_INCOMPRX    0x00000001  // Incomplete RX Transmission
+#define USB_RXCSRH2_AUTOCL      0x0080  // Auto Clear
+#define USB_RXCSRH2_AUTORQ      0x0040  // Auto Request
+#define USB_RXCSRH2_ISO         0x0040  // Isochronous Transfers
+#define USB_RXCSRH2_DMAEN       0x0020  // DMA Request Enable
+#define USB_RXCSRH2_DISNYET     0x0010  // Disable NYET
+#define USB_RXCSRH2_PIDERR      0x0010  // PID Error
+#define USB_RXCSRH2_DMAMOD      0x0008  // DMA Request Mode
+#define USB_RXCSRH2_DTWE        0x0004  // Data Toggle Write Enable
+#define USB_RXCSRH2_DT          0x0002  // Data Toggle
+#define USB_RXCSRH2_INCOMPRX    0x0001  // Incomplete RX Transmission
                                             // Status
 
 //*****************************************************************************
@@ -1267,7 +822,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RXCOUNT2 register.
 //
 //*****************************************************************************
-#define USB_RXCOUNT2_COUNT_M    0x00001FFF  // Receive Packet Count
+#define USB_RXCOUNT2_COUNT_M    0x1FFF  // Receive Packet Count
 #define USB_RXCOUNT2_COUNT_S    0
 
 //*****************************************************************************
@@ -1275,17 +830,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXTYPE2 register.
 //
 //*****************************************************************************
-#define USB_TXTYPE2_SPEED_M     0x000000C0  // Operating Speed
-#define USB_TXTYPE2_SPEED_DFLT  0x00000000  // Default
-#define USB_TXTYPE2_SPEED_HIGH  0x00000040  // High
-#define USB_TXTYPE2_SPEED_FULL  0x00000080  // Full
-#define USB_TXTYPE2_SPEED_LOW   0x000000C0  // Low
-#define USB_TXTYPE2_PROTO_M     0x00000030  // Protocol
-#define USB_TXTYPE2_PROTO_CTRL  0x00000000  // Control
-#define USB_TXTYPE2_PROTO_ISOC  0x00000010  // Isochronous
-#define USB_TXTYPE2_PROTO_BULK  0x00000020  // Bulk
-#define USB_TXTYPE2_PROTO_INT   0x00000030  // Interrupt
-#define USB_TXTYPE2_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_TXTYPE2_SPEED_M     0x00C0  // Operating Speed
+#define USB_TXTYPE2_SPEED_DFLT  0x0000  // Default
+#define USB_TXTYPE2_SPEED_HIGH  0x0040  // High
+#define USB_TXTYPE2_SPEED_FULL  0x0080  // Full
+#define USB_TXTYPE2_SPEED_LOW   0x00C0  // Low
+#define USB_TXTYPE2_PROTO_M     0x0030  // Protocol
+#define USB_TXTYPE2_PROTO_CTRL  0x0000  // Control
+#define USB_TXTYPE2_PROTO_ISOC  0x0010  // Isochronous
+#define USB_TXTYPE2_PROTO_BULK  0x0020  // Bulk
+#define USB_TXTYPE2_PROTO_INT   0x0030  // Interrupt
+#define USB_TXTYPE2_TEP_M       0x000F  // Target Endpoint Number
 #define USB_TXTYPE2_TEP_S       0
 
 //*****************************************************************************
@@ -1294,31 +849,27 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_TXINTERVAL2_TXPOLL_M                                              \
-                                0x000000FF  // TX Polling
-#define USB_TXINTERVAL2_NAKLMT_M                                              \
-                                0x000000FF  // NAK Limit
-#define USB_TXINTERVAL2_NAKLMT_S                                              \
-                                0
-#define USB_TXINTERVAL2_TXPOLL_S                                              \
-                                0
+#define USB_TXINTERVAL2_TXPOLL_M 0x00FF  // TX Polling
+#define USB_TXINTERVAL2_NAKLMT_M 0x00FF  // NAK Limit
+#define USB_TXINTERVAL2_NAKLMT_S 0
+#define USB_TXINTERVAL2_TXPOLL_S 0
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXTYPE2 register.
 //
 //*****************************************************************************
-#define USB_RXTYPE2_SPEED_M     0x000000C0  // Operating Speed
-#define USB_RXTYPE2_SPEED_DFLT  0x00000000  // Default
-#define USB_RXTYPE2_SPEED_HIGH  0x00000040  // High
-#define USB_RXTYPE2_SPEED_FULL  0x00000080  // Full
-#define USB_RXTYPE2_SPEED_LOW   0x000000C0  // Low
-#define USB_RXTYPE2_PROTO_M     0x00000030  // Protocol
-#define USB_RXTYPE2_PROTO_CTRL  0x00000000  // Control
-#define USB_RXTYPE2_PROTO_ISOC  0x00000010  // Isochronous
-#define USB_RXTYPE2_PROTO_BULK  0x00000020  // Bulk
-#define USB_RXTYPE2_PROTO_INT   0x00000030  // Interrupt
-#define USB_RXTYPE2_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_RXTYPE2_SPEED_M     0x00C0  // Operating Speed
+#define USB_RXTYPE2_SPEED_DFLT  0x0000  // Default
+#define USB_RXTYPE2_SPEED_HIGH  0x0040  // High
+#define USB_RXTYPE2_SPEED_FULL  0x0080  // Full
+#define USB_RXTYPE2_SPEED_LOW   0x00C0  // Low
+#define USB_RXTYPE2_PROTO_M     0x0030  // Protocol
+#define USB_RXTYPE2_PROTO_CTRL  0x0000  // Control
+#define USB_RXTYPE2_PROTO_ISOC  0x0010  // Isochronous
+#define USB_RXTYPE2_PROTO_BULK  0x0020  // Bulk
+#define USB_RXTYPE2_PROTO_INT   0x0030  // Interrupt
+#define USB_RXTYPE2_TEP_M       0x000F  // Target Endpoint Number
 #define USB_RXTYPE2_TEP_S       0
 
 //*****************************************************************************
@@ -1327,21 +878,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RXINTERVAL2_TXPOLL_M                                              \
-                                0x000000FF  // RX Polling
-#define USB_RXINTERVAL2_NAKLMT_M                                              \
-                                0x000000FF  // NAK Limit
-#define USB_RXINTERVAL2_TXPOLL_S                                              \
-                                0
-#define USB_RXINTERVAL2_NAKLMT_S                                              \
-                                0
+#define USB_RXINTERVAL2_TXPOLL_M 0x00FF  // RX Polling
+#define USB_RXINTERVAL2_NAKLMT_M 0x00FF  // NAK Limit
+#define USB_RXINTERVAL2_TXPOLL_S 0
+#define USB_RXINTERVAL2_NAKLMT_S 0
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXMAXP3 register.
 //
 //*****************************************************************************
-#define USB_TXMAXP3_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_TXMAXP3_MAXLOAD_M   0x07FF  // Maximum Payload
 #define USB_TXMAXP3_MAXLOAD_S   0
 
 //*****************************************************************************
@@ -1349,37 +896,37 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXCSRL3 register.
 //
 //*****************************************************************************
-#define USB_TXCSRL3_NAKTO       0x00000080  // NAK Timeout
-#define USB_TXCSRL3_CLRDT       0x00000040  // Clear Data Toggle
-#define USB_TXCSRL3_STALLED     0x00000020  // Endpoint Stalled
-#define USB_TXCSRL3_SETUP       0x00000010  // Setup Packet
-#define USB_TXCSRL3_STALL       0x00000010  // Send STALL
-#define USB_TXCSRL3_FLUSH       0x00000008  // Flush FIFO
-#define USB_TXCSRL3_ERROR       0x00000004  // Error
-#define USB_TXCSRL3_UNDRN       0x00000004  // Underrun
-#define USB_TXCSRL3_FIFONE      0x00000002  // FIFO Not Empty
-#define USB_TXCSRL3_TXRDY       0x00000001  // Transmit Packet Ready
+#define USB_TXCSRL3_NAKTO       0x0080  // NAK Timeout
+#define USB_TXCSRL3_CLRDT       0x0040  // Clear Data Toggle
+#define USB_TXCSRL3_STALLED     0x0020  // Endpoint Stalled
+#define USB_TXCSRL3_SETUP       0x0010  // Setup Packet
+#define USB_TXCSRL3_STALL       0x0010  // Send STALL
+#define USB_TXCSRL3_FLUSH       0x0008  // Flush FIFO
+#define USB_TXCSRL3_ERROR       0x0004  // Error
+#define USB_TXCSRL3_UNDRN       0x0004  // Underrun
+#define USB_TXCSRL3_FIFONE      0x0002  // FIFO Not Empty
+#define USB_TXCSRL3_TXRDY       0x0001  // Transmit Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXCSRH3 register.
 //
 //*****************************************************************************
-#define USB_TXCSRH3_AUTOSET     0x00000080  // Auto Set
-#define USB_TXCSRH3_ISO         0x00000040  // Isochronous Transfers
-#define USB_TXCSRH3_MODE        0x00000020  // Mode
-#define USB_TXCSRH3_DMAEN       0x00000010  // DMA Request Enable
-#define USB_TXCSRH3_FDT         0x00000008  // Force Data Toggle
-#define USB_TXCSRH3_DMAMOD      0x00000004  // DMA Request Mode
-#define USB_TXCSRH3_DTWE        0x00000002  // Data Toggle Write Enable
-#define USB_TXCSRH3_DT          0x00000001  // Data Toggle
+#define USB_TXCSRH3_AUTOSET     0x0080  // Auto Set
+#define USB_TXCSRH3_ISO         0x0040  // Isochronous Transfers
+#define USB_TXCSRH3_MODE        0x0020  // Mode
+#define USB_TXCSRH3_DMAEN       0x0010  // DMA Request Enable
+#define USB_TXCSRH3_FDT         0x0008  // Force Data Toggle
+#define USB_TXCSRH3_DMAMOD      0x0004  // DMA Request Mode
+#define USB_TXCSRH3_DTWE        0x0002  // Data Toggle Write Enable
+#define USB_TXCSRH3_DT          0x0001  // Data Toggle
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXMAXP3 register.
 //
 //*****************************************************************************
-#define USB_RXMAXP3_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_RXMAXP3_MAXLOAD_M   0x07FF  // Maximum Payload
 #define USB_RXMAXP3_MAXLOAD_S   0
 
 //*****************************************************************************
@@ -1387,33 +934,33 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RXCSRL3 register.
 //
 //*****************************************************************************
-#define USB_RXCSRL3_CLRDT       0x00000080  // Clear Data Toggle
-#define USB_RXCSRL3_STALLED     0x00000040  // Endpoint Stalled
-#define USB_RXCSRL3_STALL       0x00000020  // Send STALL
-#define USB_RXCSRL3_REQPKT      0x00000020  // Request Packet
-#define USB_RXCSRL3_FLUSH       0x00000010  // Flush FIFO
-#define USB_RXCSRL3_DATAERR     0x00000008  // Data Error
-#define USB_RXCSRL3_NAKTO       0x00000008  // NAK Timeout
-#define USB_RXCSRL3_ERROR       0x00000004  // Error
-#define USB_RXCSRL3_OVER        0x00000004  // Overrun
-#define USB_RXCSRL3_FULL        0x00000002  // FIFO Full
-#define USB_RXCSRL3_RXRDY       0x00000001  // Receive Packet Ready
+#define USB_RXCSRL3_CLRDT       0x0080  // Clear Data Toggle
+#define USB_RXCSRL3_STALLED     0x0040  // Endpoint Stalled
+#define USB_RXCSRL3_STALL       0x0020  // Send STALL
+#define USB_RXCSRL3_REQPKT      0x0020  // Request Packet
+#define USB_RXCSRL3_FLUSH       0x0010  // Flush FIFO
+#define USB_RXCSRL3_DATAERR     0x0008  // Data Error
+#define USB_RXCSRL3_NAKTO       0x0008  // NAK Timeout
+#define USB_RXCSRL3_ERROR       0x0004  // Error
+#define USB_RXCSRL3_OVER        0x0004  // Overrun
+#define USB_RXCSRL3_FULL        0x0002  // FIFO Full
+#define USB_RXCSRL3_RXRDY       0x0001  // Receive Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXCSRH3 register.
 //
 //*****************************************************************************
-#define USB_RXCSRH3_AUTOCL      0x00000080  // Auto Clear
-#define USB_RXCSRH3_AUTORQ      0x00000040  // Auto Request
-#define USB_RXCSRH3_ISO         0x00000040  // Isochronous Transfers
-#define USB_RXCSRH3_DMAEN       0x00000020  // DMA Request Enable
-#define USB_RXCSRH3_DISNYET     0x00000010  // Disable NYET
-#define USB_RXCSRH3_PIDERR      0x00000010  // PID Error
-#define USB_RXCSRH3_DMAMOD      0x00000008  // DMA Request Mode
-#define USB_RXCSRH3_DTWE        0x00000004  // Data Toggle Write Enable
-#define USB_RXCSRH3_DT          0x00000002  // Data Toggle
-#define USB_RXCSRH3_INCOMPRX    0x00000001  // Incomplete RX Transmission
+#define USB_RXCSRH3_AUTOCL      0x0080  // Auto Clear
+#define USB_RXCSRH3_AUTORQ      0x0040  // Auto Request
+#define USB_RXCSRH3_ISO         0x0040  // Isochronous Transfers
+#define USB_RXCSRH3_DMAEN       0x0020  // DMA Request Enable
+#define USB_RXCSRH3_DISNYET     0x0010  // Disable NYET
+#define USB_RXCSRH3_PIDERR      0x0010  // PID Error
+#define USB_RXCSRH3_DMAMOD      0x0008  // DMA Request Mode
+#define USB_RXCSRH3_DTWE        0x0004  // Data Toggle Write Enable
+#define USB_RXCSRH3_DT          0x0002  // Data Toggle
+#define USB_RXCSRH3_INCOMPRX    0x0001  // Incomplete RX Transmission
                                             // Status
 
 //*****************************************************************************
@@ -1421,7 +968,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RXCOUNT3 register.
 //
 //*****************************************************************************
-#define USB_RXCOUNT3_COUNT_M    0x00001FFF  // Receive Packet Count
+#define USB_RXCOUNT3_COUNT_M    0x1FFF  // Receive Packet Count
 #define USB_RXCOUNT3_COUNT_S    0
 
 //*****************************************************************************
@@ -1429,17 +976,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXTYPE3 register.
 //
 //*****************************************************************************
-#define USB_TXTYPE3_SPEED_M     0x000000C0  // Operating Speed
-#define USB_TXTYPE3_SPEED_DFLT  0x00000000  // Default
-#define USB_TXTYPE3_SPEED_HIGH  0x00000040  // High
-#define USB_TXTYPE3_SPEED_FULL  0x00000080  // Full
-#define USB_TXTYPE3_SPEED_LOW   0x000000C0  // Low
-#define USB_TXTYPE3_PROTO_M     0x00000030  // Protocol
-#define USB_TXTYPE3_PROTO_CTRL  0x00000000  // Control
-#define USB_TXTYPE3_PROTO_ISOC  0x00000010  // Isochronous
-#define USB_TXTYPE3_PROTO_BULK  0x00000020  // Bulk
-#define USB_TXTYPE3_PROTO_INT   0x00000030  // Interrupt
-#define USB_TXTYPE3_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_TXTYPE3_SPEED_M     0x00C0  // Operating Speed
+#define USB_TXTYPE3_SPEED_DFLT  0x0000  // Default
+#define USB_TXTYPE3_SPEED_HIGH  0x0040  // High
+#define USB_TXTYPE3_SPEED_FULL  0x0080  // Full
+#define USB_TXTYPE3_SPEED_LOW   0x00C0  // Low
+#define USB_TXTYPE3_PROTO_M     0x0030  // Protocol
+#define USB_TXTYPE3_PROTO_CTRL  0x0000  // Control
+#define USB_TXTYPE3_PROTO_ISOC  0x0010  // Isochronous
+#define USB_TXTYPE3_PROTO_BULK  0x0020  // Bulk
+#define USB_TXTYPE3_PROTO_INT   0x0030  // Interrupt
+#define USB_TXTYPE3_TEP_M       0x000F  // Target Endpoint Number
 #define USB_TXTYPE3_TEP_S       0
 
 //*****************************************************************************
@@ -1448,31 +995,27 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_TXINTERVAL3_TXPOLL_M                                              \
-                                0x000000FF  // TX Polling
-#define USB_TXINTERVAL3_NAKLMT_M                                              \
-                                0x000000FF  // NAK Limit
-#define USB_TXINTERVAL3_TXPOLL_S                                              \
-                                0
-#define USB_TXINTERVAL3_NAKLMT_S                                              \
-                                0
+#define USB_TXINTERVAL3_TXPOLL_M 0x00FF  // TX Polling
+#define USB_TXINTERVAL3_NAKLMT_M 0x00FF  // NAK Limit
+#define USB_TXINTERVAL3_TXPOLL_S 0
+#define USB_TXINTERVAL3_NAKLMT_S 0
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXTYPE3 register.
 //
 //*****************************************************************************
-#define USB_RXTYPE3_SPEED_M     0x000000C0  // Operating Speed
-#define USB_RXTYPE3_SPEED_DFLT  0x00000000  // Default
-#define USB_RXTYPE3_SPEED_HIGH  0x00000040  // High
-#define USB_RXTYPE3_SPEED_FULL  0x00000080  // Full
-#define USB_RXTYPE3_SPEED_LOW   0x000000C0  // Low
-#define USB_RXTYPE3_PROTO_M     0x00000030  // Protocol
-#define USB_RXTYPE3_PROTO_CTRL  0x00000000  // Control
-#define USB_RXTYPE3_PROTO_ISOC  0x00000010  // Isochronous
-#define USB_RXTYPE3_PROTO_BULK  0x00000020  // Bulk
-#define USB_RXTYPE3_PROTO_INT   0x00000030  // Interrupt
-#define USB_RXTYPE3_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_RXTYPE3_SPEED_M     0x00C0  // Operating Speed
+#define USB_RXTYPE3_SPEED_DFLT  0x0000  // Default
+#define USB_RXTYPE3_SPEED_HIGH  0x0040  // High
+#define USB_RXTYPE3_SPEED_FULL  0x0080  // Full
+#define USB_RXTYPE3_SPEED_LOW   0x00C0  // Low
+#define USB_RXTYPE3_PROTO_M     0x0030  // Protocol
+#define USB_RXTYPE3_PROTO_CTRL  0x0000  // Control
+#define USB_RXTYPE3_PROTO_ISOC  0x0010  // Isochronous
+#define USB_RXTYPE3_PROTO_BULK  0x0020  // Bulk
+#define USB_RXTYPE3_PROTO_INT   0x0030  // Interrupt
+#define USB_RXTYPE3_TEP_M       0x000F  // Target Endpoint Number
 #define USB_RXTYPE3_TEP_S       0
 
 //*****************************************************************************
@@ -1481,21 +1024,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RXINTERVAL3_TXPOLL_M                                              \
-                                0x000000FF  // RX Polling
-#define USB_RXINTERVAL3_NAKLMT_M                                              \
-                                0x000000FF  // NAK Limit
-#define USB_RXINTERVAL3_TXPOLL_S                                              \
-                                0
-#define USB_RXINTERVAL3_NAKLMT_S                                              \
-                                0
+#define USB_RXINTERVAL3_TXPOLL_M 0x00FF  // RX Polling
+#define USB_RXINTERVAL3_NAKLMT_M 0x00FF  // NAK Limit
+#define USB_RXINTERVAL3_TXPOLL_S 0
+#define USB_RXINTERVAL3_NAKLMT_S 0
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXMAXP4 register.
 //
 //*****************************************************************************
-#define USB_TXMAXP4_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_TXMAXP4_MAXLOAD_M   0x07FF  // Maximum Payload
 #define USB_TXMAXP4_MAXLOAD_S   0
 
 //*****************************************************************************
@@ -1503,37 +1042,37 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXCSRL4 register.
 //
 //*****************************************************************************
-#define USB_TXCSRL4_NAKTO       0x00000080  // NAK Timeout
-#define USB_TXCSRL4_CLRDT       0x00000040  // Clear Data Toggle
-#define USB_TXCSRL4_STALLED     0x00000020  // Endpoint Stalled
-#define USB_TXCSRL4_SETUP       0x00000010  // Setup Packet
-#define USB_TXCSRL4_STALL       0x00000010  // Send STALL
-#define USB_TXCSRL4_FLUSH       0x00000008  // Flush FIFO
-#define USB_TXCSRL4_ERROR       0x00000004  // Error
-#define USB_TXCSRL4_UNDRN       0x00000004  // Underrun
-#define USB_TXCSRL4_FIFONE      0x00000002  // FIFO Not Empty
-#define USB_TXCSRL4_TXRDY       0x00000001  // Transmit Packet Ready
+#define USB_TXCSRL4_NAKTO       0x0080  // NAK Timeout
+#define USB_TXCSRL4_CLRDT       0x0040  // Clear Data Toggle
+#define USB_TXCSRL4_STALLED     0x0020  // Endpoint Stalled
+#define USB_TXCSRL4_SETUP       0x0010  // Setup Packet
+#define USB_TXCSRL4_STALL       0x0010  // Send STALL
+#define USB_TXCSRL4_FLUSH       0x0008  // Flush FIFO
+#define USB_TXCSRL4_ERROR       0x0004  // Error
+#define USB_TXCSRL4_UNDRN       0x0004  // Underrun
+#define USB_TXCSRL4_FIFONE      0x0002  // FIFO Not Empty
+#define USB_TXCSRL4_TXRDY       0x0001  // Transmit Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXCSRH4 register.
 //
 //*****************************************************************************
-#define USB_TXCSRH4_AUTOSET     0x00000080  // Auto Set
-#define USB_TXCSRH4_ISO         0x00000040  // Isochronous Transfers
-#define USB_TXCSRH4_MODE        0x00000020  // Mode
-#define USB_TXCSRH4_DMAEN       0x00000010  // DMA Request Enable
-#define USB_TXCSRH4_FDT         0x00000008  // Force Data Toggle
-#define USB_TXCSRH4_DMAMOD      0x00000004  // DMA Request Mode
-#define USB_TXCSRH4_DTWE        0x00000002  // Data Toggle Write Enable
-#define USB_TXCSRH4_DT          0x00000001  // Data Toggle
+#define USB_TXCSRH4_AUTOSET     0x0080  // Auto Set
+#define USB_TXCSRH4_ISO         0x0040  // Isochronous Transfers
+#define USB_TXCSRH4_MODE        0x0020  // Mode
+#define USB_TXCSRH4_DMAEN       0x0010  // DMA Request Enable
+#define USB_TXCSRH4_FDT         0x0008  // Force Data Toggle
+#define USB_TXCSRH4_DMAMOD      0x0004  // DMA Request Mode
+#define USB_TXCSRH4_DTWE        0x0002  // Data Toggle Write Enable
+#define USB_TXCSRH4_DT          0x0001  // Data Toggle
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXMAXP4 register.
 //
 //*****************************************************************************
-#define USB_RXMAXP4_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_RXMAXP4_MAXLOAD_M   0x07FF  // Maximum Payload
 #define USB_RXMAXP4_MAXLOAD_S   0
 
 //*****************************************************************************
@@ -1541,33 +1080,33 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RXCSRL4 register.
 //
 //*****************************************************************************
-#define USB_RXCSRL4_CLRDT       0x00000080  // Clear Data Toggle
-#define USB_RXCSRL4_STALLED     0x00000040  // Endpoint Stalled
-#define USB_RXCSRL4_STALL       0x00000020  // Send STALL
-#define USB_RXCSRL4_REQPKT      0x00000020  // Request Packet
-#define USB_RXCSRL4_FLUSH       0x00000010  // Flush FIFO
-#define USB_RXCSRL4_NAKTO       0x00000008  // NAK Timeout
-#define USB_RXCSRL4_DATAERR     0x00000008  // Data Error
-#define USB_RXCSRL4_OVER        0x00000004  // Overrun
-#define USB_RXCSRL4_ERROR       0x00000004  // Error
-#define USB_RXCSRL4_FULL        0x00000002  // FIFO Full
-#define USB_RXCSRL4_RXRDY       0x00000001  // Receive Packet Ready
+#define USB_RXCSRL4_CLRDT       0x0080  // Clear Data Toggle
+#define USB_RXCSRL4_STALLED     0x0040  // Endpoint Stalled
+#define USB_RXCSRL4_STALL       0x0020  // Send STALL
+#define USB_RXCSRL4_REQPKT      0x0020  // Request Packet
+#define USB_RXCSRL4_FLUSH       0x0010  // Flush FIFO
+#define USB_RXCSRL4_NAKTO       0x0008  // NAK Timeout
+#define USB_RXCSRL4_DATAERR     0x0008  // Data Error
+#define USB_RXCSRL4_OVER        0x0004  // Overrun
+#define USB_RXCSRL4_ERROR       0x0004  // Error
+#define USB_RXCSRL4_FULL        0x0002  // FIFO Full
+#define USB_RXCSRL4_RXRDY       0x0001  // Receive Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXCSRH4 register.
 //
 //*****************************************************************************
-#define USB_RXCSRH4_AUTOCL      0x00000080  // Auto Clear
-#define USB_RXCSRH4_AUTORQ      0x00000040  // Auto Request
-#define USB_RXCSRH4_ISO         0x00000040  // Isochronous Transfers
-#define USB_RXCSRH4_DMAEN       0x00000020  // DMA Request Enable
-#define USB_RXCSRH4_DISNYET     0x00000010  // Disable NYET
-#define USB_RXCSRH4_PIDERR      0x00000010  // PID Error
-#define USB_RXCSRH4_DMAMOD      0x00000008  // DMA Request Mode
-#define USB_RXCSRH4_DTWE        0x00000004  // Data Toggle Write Enable
-#define USB_RXCSRH4_DT          0x00000002  // Data Toggle
-#define USB_RXCSRH4_INCOMPRX    0x00000001  // Incomplete RX Transmission
+#define USB_RXCSRH4_AUTOCL      0x0080  // Auto Clear
+#define USB_RXCSRH4_AUTORQ      0x0040  // Auto Request
+#define USB_RXCSRH4_ISO         0x0040  // Isochronous Transfers
+#define USB_RXCSRH4_DMAEN       0x0020  // DMA Request Enable
+#define USB_RXCSRH4_DISNYET     0x0010  // Disable NYET
+#define USB_RXCSRH4_PIDERR      0x0010  // PID Error
+#define USB_RXCSRH4_DMAMOD      0x0008  // DMA Request Mode
+#define USB_RXCSRH4_DTWE        0x0004  // Data Toggle Write Enable
+#define USB_RXCSRH4_DT          0x0002  // Data Toggle
+#define USB_RXCSRH4_INCOMPRX    0x0001  // Incomplete RX Transmission
                                             // Status
 
 //*****************************************************************************
@@ -1575,7 +1114,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RXCOUNT4 register.
 //
 //*****************************************************************************
-#define USB_RXCOUNT4_COUNT_M    0x00001FFF  // Receive Packet Count
+#define USB_RXCOUNT4_COUNT_M    0x1FFF  // Receive Packet Count
 #define USB_RXCOUNT4_COUNT_S    0
 
 //*****************************************************************************
@@ -1583,17 +1122,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXTYPE4 register.
 //
 //*****************************************************************************
-#define USB_TXTYPE4_SPEED_M     0x000000C0  // Operating Speed
-#define USB_TXTYPE4_SPEED_DFLT  0x00000000  // Default
-#define USB_TXTYPE4_SPEED_HIGH  0x00000040  // High
-#define USB_TXTYPE4_SPEED_FULL  0x00000080  // Full
-#define USB_TXTYPE4_SPEED_LOW   0x000000C0  // Low
-#define USB_TXTYPE4_PROTO_M     0x00000030  // Protocol
-#define USB_TXTYPE4_PROTO_CTRL  0x00000000  // Control
-#define USB_TXTYPE4_PROTO_ISOC  0x00000010  // Isochronous
-#define USB_TXTYPE4_PROTO_BULK  0x00000020  // Bulk
-#define USB_TXTYPE4_PROTO_INT   0x00000030  // Interrupt
-#define USB_TXTYPE4_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_TXTYPE4_SPEED_M     0x00C0  // Operating Speed
+#define USB_TXTYPE4_SPEED_DFLT  0x0000  // Default
+#define USB_TXTYPE4_SPEED_HIGH  0x0040  // High
+#define USB_TXTYPE4_SPEED_FULL  0x0080  // Full
+#define USB_TXTYPE4_SPEED_LOW   0x00C0  // Low
+#define USB_TXTYPE4_PROTO_M     0x0030  // Protocol
+#define USB_TXTYPE4_PROTO_CTRL  0x0000  // Control
+#define USB_TXTYPE4_PROTO_ISOC  0x0010  // Isochronous
+#define USB_TXTYPE4_PROTO_BULK  0x0020  // Bulk
+#define USB_TXTYPE4_PROTO_INT   0x0030  // Interrupt
+#define USB_TXTYPE4_TEP_M       0x000F  // Target Endpoint Number
 #define USB_TXTYPE4_TEP_S       0
 
 //*****************************************************************************
@@ -1602,31 +1141,27 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_TXINTERVAL4_TXPOLL_M                                              \
-                                0x000000FF  // TX Polling
-#define USB_TXINTERVAL4_NAKLMT_M                                              \
-                                0x000000FF  // NAK Limit
-#define USB_TXINTERVAL4_NAKLMT_S                                              \
-                                0
-#define USB_TXINTERVAL4_TXPOLL_S                                              \
-                                0
+#define USB_TXINTERVAL4_TXPOLL_M 0x00FF  // TX Polling
+#define USB_TXINTERVAL4_NAKLMT_M 0x00FF  // NAK Limit
+#define USB_TXINTERVAL4_NAKLMT_S 0
+#define USB_TXINTERVAL4_TXPOLL_S 0
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXTYPE4 register.
 //
 //*****************************************************************************
-#define USB_RXTYPE4_SPEED_M     0x000000C0  // Operating Speed
-#define USB_RXTYPE4_SPEED_DFLT  0x00000000  // Default
-#define USB_RXTYPE4_SPEED_HIGH  0x00000040  // High
-#define USB_RXTYPE4_SPEED_FULL  0x00000080  // Full
-#define USB_RXTYPE4_SPEED_LOW   0x000000C0  // Low
-#define USB_RXTYPE4_PROTO_M     0x00000030  // Protocol
-#define USB_RXTYPE4_PROTO_CTRL  0x00000000  // Control
-#define USB_RXTYPE4_PROTO_ISOC  0x00000010  // Isochronous
-#define USB_RXTYPE4_PROTO_BULK  0x00000020  // Bulk
-#define USB_RXTYPE4_PROTO_INT   0x00000030  // Interrupt
-#define USB_RXTYPE4_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_RXTYPE4_SPEED_M     0x00C0  // Operating Speed
+#define USB_RXTYPE4_SPEED_DFLT  0x0000  // Default
+#define USB_RXTYPE4_SPEED_HIGH  0x0040  // High
+#define USB_RXTYPE4_SPEED_FULL  0x0080  // Full
+#define USB_RXTYPE4_SPEED_LOW   0x00C0  // Low
+#define USB_RXTYPE4_PROTO_M     0x0030  // Protocol
+#define USB_RXTYPE4_PROTO_CTRL  0x0000  // Control
+#define USB_RXTYPE4_PROTO_ISOC  0x0010  // Isochronous
+#define USB_RXTYPE4_PROTO_BULK  0x0020  // Bulk
+#define USB_RXTYPE4_PROTO_INT   0x0030  // Interrupt
+#define USB_RXTYPE4_TEP_M       0x000F  // Target Endpoint Number
 #define USB_RXTYPE4_TEP_S       0
 
 //*****************************************************************************
@@ -1635,21 +1170,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RXINTERVAL4_TXPOLL_M                                              \
-                                0x000000FF  // RX Polling
-#define USB_RXINTERVAL4_NAKLMT_M                                              \
-                                0x000000FF  // NAK Limit
-#define USB_RXINTERVAL4_NAKLMT_S                                              \
-                                0
-#define USB_RXINTERVAL4_TXPOLL_S                                              \
-                                0
+#define USB_RXINTERVAL4_TXPOLL_M 0x00FF  // RX Polling
+#define USB_RXINTERVAL4_NAKLMT_M 0x00FF  // NAK Limit
+#define USB_RXINTERVAL4_NAKLMT_S 0
+#define USB_RXINTERVAL4_TXPOLL_S 0
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXMAXP5 register.
 //
 //*****************************************************************************
-#define USB_TXMAXP5_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_TXMAXP5_MAXLOAD_M   0x07FF  // Maximum Payload
 #define USB_TXMAXP5_MAXLOAD_S   0
 
 //*****************************************************************************
@@ -1657,37 +1188,37 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXCSRL5 register.
 //
 //*****************************************************************************
-#define USB_TXCSRL5_NAKTO       0x00000080  // NAK Timeout
-#define USB_TXCSRL5_CLRDT       0x00000040  // Clear Data Toggle
-#define USB_TXCSRL5_STALLED     0x00000020  // Endpoint Stalled
-#define USB_TXCSRL5_SETUP       0x00000010  // Setup Packet
-#define USB_TXCSRL5_STALL       0x00000010  // Send STALL
-#define USB_TXCSRL5_FLUSH       0x00000008  // Flush FIFO
-#define USB_TXCSRL5_ERROR       0x00000004  // Error
-#define USB_TXCSRL5_UNDRN       0x00000004  // Underrun
-#define USB_TXCSRL5_FIFONE      0x00000002  // FIFO Not Empty
-#define USB_TXCSRL5_TXRDY       0x00000001  // Transmit Packet Ready
+#define USB_TXCSRL5_NAKTO       0x0080  // NAK Timeout
+#define USB_TXCSRL5_CLRDT       0x0040  // Clear Data Toggle
+#define USB_TXCSRL5_STALLED     0x0020  // Endpoint Stalled
+#define USB_TXCSRL5_SETUP       0x0010  // Setup Packet
+#define USB_TXCSRL5_STALL       0x0010  // Send STALL
+#define USB_TXCSRL5_FLUSH       0x0008  // Flush FIFO
+#define USB_TXCSRL5_ERROR       0x0004  // Error
+#define USB_TXCSRL5_UNDRN       0x0004  // Underrun
+#define USB_TXCSRL5_FIFONE      0x0002  // FIFO Not Empty
+#define USB_TXCSRL5_TXRDY       0x0001  // Transmit Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXCSRH5 register.
 //
 //*****************************************************************************
-#define USB_TXCSRH5_AUTOSET     0x00000080  // Auto Set
-#define USB_TXCSRH5_ISO         0x00000040  // Isochronous Transfers
-#define USB_TXCSRH5_MODE        0x00000020  // Mode
-#define USB_TXCSRH5_DMAEN       0x00000010  // DMA Request Enable
-#define USB_TXCSRH5_FDT         0x00000008  // Force Data Toggle
-#define USB_TXCSRH5_DMAMOD      0x00000004  // DMA Request Mode
-#define USB_TXCSRH5_DTWE        0x00000002  // Data Toggle Write Enable
-#define USB_TXCSRH5_DT          0x00000001  // Data Toggle
+#define USB_TXCSRH5_AUTOSET     0x0080  // Auto Set
+#define USB_TXCSRH5_ISO         0x0040  // Isochronous Transfers
+#define USB_TXCSRH5_MODE        0x0020  // Mode
+#define USB_TXCSRH5_DMAEN       0x0010  // DMA Request Enable
+#define USB_TXCSRH5_FDT         0x0008  // Force Data Toggle
+#define USB_TXCSRH5_DMAMOD      0x0004  // DMA Request Mode
+#define USB_TXCSRH5_DTWE        0x0002  // Data Toggle Write Enable
+#define USB_TXCSRH5_DT          0x0001  // Data Toggle
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXMAXP5 register.
 //
 //*****************************************************************************
-#define USB_RXMAXP5_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_RXMAXP5_MAXLOAD_M   0x07FF  // Maximum Payload
 #define USB_RXMAXP5_MAXLOAD_S   0
 
 //*****************************************************************************
@@ -1695,33 +1226,33 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RXCSRL5 register.
 //
 //*****************************************************************************
-#define USB_RXCSRL5_CLRDT       0x00000080  // Clear Data Toggle
-#define USB_RXCSRL5_STALLED     0x00000040  // Endpoint Stalled
-#define USB_RXCSRL5_STALL       0x00000020  // Send STALL
-#define USB_RXCSRL5_REQPKT      0x00000020  // Request Packet
-#define USB_RXCSRL5_FLUSH       0x00000010  // Flush FIFO
-#define USB_RXCSRL5_NAKTO       0x00000008  // NAK Timeout
-#define USB_RXCSRL5_DATAERR     0x00000008  // Data Error
-#define USB_RXCSRL5_ERROR       0x00000004  // Error
-#define USB_RXCSRL5_OVER        0x00000004  // Overrun
-#define USB_RXCSRL5_FULL        0x00000002  // FIFO Full
-#define USB_RXCSRL5_RXRDY       0x00000001  // Receive Packet Ready
+#define USB_RXCSRL5_CLRDT       0x0080  // Clear Data Toggle
+#define USB_RXCSRL5_STALLED     0x0040  // Endpoint Stalled
+#define USB_RXCSRL5_STALL       0x0020  // Send STALL
+#define USB_RXCSRL5_REQPKT      0x0020  // Request Packet
+#define USB_RXCSRL5_FLUSH       0x0010  // Flush FIFO
+#define USB_RXCSRL5_NAKTO       0x0008  // NAK Timeout
+#define USB_RXCSRL5_DATAERR     0x0008  // Data Error
+#define USB_RXCSRL5_ERROR       0x0004  // Error
+#define USB_RXCSRL5_OVER        0x0004  // Overrun
+#define USB_RXCSRL5_FULL        0x0002  // FIFO Full
+#define USB_RXCSRL5_RXRDY       0x0001  // Receive Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXCSRH5 register.
 //
 //*****************************************************************************
-#define USB_RXCSRH5_AUTOCL      0x00000080  // Auto Clear
-#define USB_RXCSRH5_AUTORQ      0x00000040  // Auto Request
-#define USB_RXCSRH5_ISO         0x00000040  // Isochronous Transfers
-#define USB_RXCSRH5_DMAEN       0x00000020  // DMA Request Enable
-#define USB_RXCSRH5_DISNYET     0x00000010  // Disable NYET
-#define USB_RXCSRH5_PIDERR      0x00000010  // PID Error
-#define USB_RXCSRH5_DMAMOD      0x00000008  // DMA Request Mode
-#define USB_RXCSRH5_DTWE        0x00000004  // Data Toggle Write Enable
-#define USB_RXCSRH5_DT          0x00000002  // Data Toggle
-#define USB_RXCSRH5_INCOMPRX    0x00000001  // Incomplete RX Transmission
+#define USB_RXCSRH5_AUTOCL      0x0080  // Auto Clear
+#define USB_RXCSRH5_AUTORQ      0x0040  // Auto Request
+#define USB_RXCSRH5_ISO         0x0040  // Isochronous Transfers
+#define USB_RXCSRH5_DMAEN       0x0020  // DMA Request Enable
+#define USB_RXCSRH5_DISNYET     0x0010  // Disable NYET
+#define USB_RXCSRH5_PIDERR      0x0010  // PID Error
+#define USB_RXCSRH5_DMAMOD      0x0008  // DMA Request Mode
+#define USB_RXCSRH5_DTWE        0x0004  // Data Toggle Write Enable
+#define USB_RXCSRH5_DT          0x0002  // Data Toggle
+#define USB_RXCSRH5_INCOMPRX    0x0001  // Incomplete RX Transmission
                                             // Status
 
 //*****************************************************************************
@@ -1729,7 +1260,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RXCOUNT5 register.
 //
 //*****************************************************************************
-#define USB_RXCOUNT5_COUNT_M    0x00001FFF  // Receive Packet Count
+#define USB_RXCOUNT5_COUNT_M    0x1FFF  // Receive Packet Count
 #define USB_RXCOUNT5_COUNT_S    0
 
 //*****************************************************************************
@@ -1737,17 +1268,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXTYPE5 register.
 //
 //*****************************************************************************
-#define USB_TXTYPE5_SPEED_M     0x000000C0  // Operating Speed
-#define USB_TXTYPE5_SPEED_DFLT  0x00000000  // Default
-#define USB_TXTYPE5_SPEED_HIGH  0x00000040  // High
-#define USB_TXTYPE5_SPEED_FULL  0x00000080  // Full
-#define USB_TXTYPE5_SPEED_LOW   0x000000C0  // Low
-#define USB_TXTYPE5_PROTO_M     0x00000030  // Protocol
-#define USB_TXTYPE5_PROTO_CTRL  0x00000000  // Control
-#define USB_TXTYPE5_PROTO_ISOC  0x00000010  // Isochronous
-#define USB_TXTYPE5_PROTO_BULK  0x00000020  // Bulk
-#define USB_TXTYPE5_PROTO_INT   0x00000030  // Interrupt
-#define USB_TXTYPE5_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_TXTYPE5_SPEED_M     0x00C0  // Operating Speed
+#define USB_TXTYPE5_SPEED_DFLT  0x0000  // Default
+#define USB_TXTYPE5_SPEED_HIGH  0x0040  // High
+#define USB_TXTYPE5_SPEED_FULL  0x0080  // Full
+#define USB_TXTYPE5_SPEED_LOW   0x00C0  // Low
+#define USB_TXTYPE5_PROTO_M     0x0030  // Protocol
+#define USB_TXTYPE5_PROTO_CTRL  0x0000  // Control
+#define USB_TXTYPE5_PROTO_ISOC  0x0010  // Isochronous
+#define USB_TXTYPE5_PROTO_BULK  0x0020  // Bulk
+#define USB_TXTYPE5_PROTO_INT   0x0030  // Interrupt
+#define USB_TXTYPE5_TEP_M       0x000F  // Target Endpoint Number
 #define USB_TXTYPE5_TEP_S       0
 
 //*****************************************************************************
@@ -1756,31 +1287,27 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_TXINTERVAL5_TXPOLL_M                                              \
-                                0x000000FF  // TX Polling
-#define USB_TXINTERVAL5_NAKLMT_M                                              \
-                                0x000000FF  // NAK Limit
-#define USB_TXINTERVAL5_NAKLMT_S                                              \
-                                0
-#define USB_TXINTERVAL5_TXPOLL_S                                              \
-                                0
+#define USB_TXINTERVAL5_TXPOLL_M 0x00FF  // TX Polling
+#define USB_TXINTERVAL5_NAKLMT_M 0x00FF  // NAK Limit
+#define USB_TXINTERVAL5_NAKLMT_S 0
+#define USB_TXINTERVAL5_TXPOLL_S 0
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXTYPE5 register.
 //
 //*****************************************************************************
-#define USB_RXTYPE5_SPEED_M     0x000000C0  // Operating Speed
-#define USB_RXTYPE5_SPEED_DFLT  0x00000000  // Default
-#define USB_RXTYPE5_SPEED_HIGH  0x00000040  // High
-#define USB_RXTYPE5_SPEED_FULL  0x00000080  // Full
-#define USB_RXTYPE5_SPEED_LOW   0x000000C0  // Low
-#define USB_RXTYPE5_PROTO_M     0x00000030  // Protocol
-#define USB_RXTYPE5_PROTO_CTRL  0x00000000  // Control
-#define USB_RXTYPE5_PROTO_ISOC  0x00000010  // Isochronous
-#define USB_RXTYPE5_PROTO_BULK  0x00000020  // Bulk
-#define USB_RXTYPE5_PROTO_INT   0x00000030  // Interrupt
-#define USB_RXTYPE5_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_RXTYPE5_SPEED_M     0x00C0  // Operating Speed
+#define USB_RXTYPE5_SPEED_DFLT  0x0000  // Default
+#define USB_RXTYPE5_SPEED_HIGH  0x0040  // High
+#define USB_RXTYPE5_SPEED_FULL  0x0080  // Full
+#define USB_RXTYPE5_SPEED_LOW   0x00C0  // Low
+#define USB_RXTYPE5_PROTO_M     0x0030  // Protocol
+#define USB_RXTYPE5_PROTO_CTRL  0x0000  // Control
+#define USB_RXTYPE5_PROTO_ISOC  0x0010  // Isochronous
+#define USB_RXTYPE5_PROTO_BULK  0x0020  // Bulk
+#define USB_RXTYPE5_PROTO_INT   0x0030  // Interrupt
+#define USB_RXTYPE5_TEP_M       0x000F  // Target Endpoint Number
 #define USB_RXTYPE5_TEP_S       0
 
 //*****************************************************************************
@@ -1789,21 +1316,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RXINTERVAL5_TXPOLL_M                                              \
-                                0x000000FF  // RX Polling
-#define USB_RXINTERVAL5_NAKLMT_M                                              \
-                                0x000000FF  // NAK Limit
-#define USB_RXINTERVAL5_TXPOLL_S                                              \
-                                0
-#define USB_RXINTERVAL5_NAKLMT_S                                              \
-                                0
+#define USB_RXINTERVAL5_TXPOLL_M 0x00FF  // RX Polling
+#define USB_RXINTERVAL5_NAKLMT_M 0x00FF  // NAK Limit
+#define USB_RXINTERVAL5_TXPOLL_S 0
+#define USB_RXINTERVAL5_NAKLMT_S 0
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXMAXP6 register.
 //
 //*****************************************************************************
-#define USB_TXMAXP6_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_TXMAXP6_MAXLOAD_M   0x07FF  // Maximum Payload
 #define USB_TXMAXP6_MAXLOAD_S   0
 
 //*****************************************************************************
@@ -1811,37 +1334,37 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXCSRL6 register.
 //
 //*****************************************************************************
-#define USB_TXCSRL6_NAKTO       0x00000080  // NAK Timeout
-#define USB_TXCSRL6_CLRDT       0x00000040  // Clear Data Toggle
-#define USB_TXCSRL6_STALLED     0x00000020  // Endpoint Stalled
-#define USB_TXCSRL6_STALL       0x00000010  // Send STALL
-#define USB_TXCSRL6_SETUP       0x00000010  // Setup Packet
-#define USB_TXCSRL6_FLUSH       0x00000008  // Flush FIFO
-#define USB_TXCSRL6_ERROR       0x00000004  // Error
-#define USB_TXCSRL6_UNDRN       0x00000004  // Underrun
-#define USB_TXCSRL6_FIFONE      0x00000002  // FIFO Not Empty
-#define USB_TXCSRL6_TXRDY       0x00000001  // Transmit Packet Ready
+#define USB_TXCSRL6_NAKTO       0x0080  // NAK Timeout
+#define USB_TXCSRL6_CLRDT       0x0040  // Clear Data Toggle
+#define USB_TXCSRL6_STALLED     0x0020  // Endpoint Stalled
+#define USB_TXCSRL6_STALL       0x0010  // Send STALL
+#define USB_TXCSRL6_SETUP       0x0010  // Setup Packet
+#define USB_TXCSRL6_FLUSH       0x0008  // Flush FIFO
+#define USB_TXCSRL6_ERROR       0x0004  // Error
+#define USB_TXCSRL6_UNDRN       0x0004  // Underrun
+#define USB_TXCSRL6_FIFONE      0x0002  // FIFO Not Empty
+#define USB_TXCSRL6_TXRDY       0x0001  // Transmit Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXCSRH6 register.
 //
 //*****************************************************************************
-#define USB_TXCSRH6_AUTOSET     0x00000080  // Auto Set
-#define USB_TXCSRH6_ISO         0x00000040  // Isochronous Transfers
-#define USB_TXCSRH6_MODE        0x00000020  // Mode
-#define USB_TXCSRH6_DMAEN       0x00000010  // DMA Request Enable
-#define USB_TXCSRH6_FDT         0x00000008  // Force Data Toggle
-#define USB_TXCSRH6_DMAMOD      0x00000004  // DMA Request Mode
-#define USB_TXCSRH6_DTWE        0x00000002  // Data Toggle Write Enable
-#define USB_TXCSRH6_DT          0x00000001  // Data Toggle
+#define USB_TXCSRH6_AUTOSET     0x0080  // Auto Set
+#define USB_TXCSRH6_ISO         0x0040  // Isochronous Transfers
+#define USB_TXCSRH6_MODE        0x0020  // Mode
+#define USB_TXCSRH6_DMAEN       0x0010  // DMA Request Enable
+#define USB_TXCSRH6_FDT         0x0008  // Force Data Toggle
+#define USB_TXCSRH6_DMAMOD      0x0004  // DMA Request Mode
+#define USB_TXCSRH6_DTWE        0x0002  // Data Toggle Write Enable
+#define USB_TXCSRH6_DT          0x0001  // Data Toggle
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXMAXP6 register.
 //
 //*****************************************************************************
-#define USB_RXMAXP6_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_RXMAXP6_MAXLOAD_M   0x07FF  // Maximum Payload
 #define USB_RXMAXP6_MAXLOAD_S   0
 
 //*****************************************************************************
@@ -1849,33 +1372,33 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RXCSRL6 register.
 //
 //*****************************************************************************
-#define USB_RXCSRL6_CLRDT       0x00000080  // Clear Data Toggle
-#define USB_RXCSRL6_STALLED     0x00000040  // Endpoint Stalled
-#define USB_RXCSRL6_REQPKT      0x00000020  // Request Packet
-#define USB_RXCSRL6_STALL       0x00000020  // Send STALL
-#define USB_RXCSRL6_FLUSH       0x00000010  // Flush FIFO
-#define USB_RXCSRL6_NAKTO       0x00000008  // NAK Timeout
-#define USB_RXCSRL6_DATAERR     0x00000008  // Data Error
-#define USB_RXCSRL6_ERROR       0x00000004  // Error
-#define USB_RXCSRL6_OVER        0x00000004  // Overrun
-#define USB_RXCSRL6_FULL        0x00000002  // FIFO Full
-#define USB_RXCSRL6_RXRDY       0x00000001  // Receive Packet Ready
+#define USB_RXCSRL6_CLRDT       0x0080  // Clear Data Toggle
+#define USB_RXCSRL6_STALLED     0x0040  // Endpoint Stalled
+#define USB_RXCSRL6_REQPKT      0x0020  // Request Packet
+#define USB_RXCSRL6_STALL       0x0020  // Send STALL
+#define USB_RXCSRL6_FLUSH       0x0010  // Flush FIFO
+#define USB_RXCSRL6_NAKTO       0x0008  // NAK Timeout
+#define USB_RXCSRL6_DATAERR     0x0008  // Data Error
+#define USB_RXCSRL6_ERROR       0x0004  // Error
+#define USB_RXCSRL6_OVER        0x0004  // Overrun
+#define USB_RXCSRL6_FULL        0x0002  // FIFO Full
+#define USB_RXCSRL6_RXRDY       0x0001  // Receive Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXCSRH6 register.
 //
 //*****************************************************************************
-#define USB_RXCSRH6_AUTOCL      0x00000080  // Auto Clear
-#define USB_RXCSRH6_AUTORQ      0x00000040  // Auto Request
-#define USB_RXCSRH6_ISO         0x00000040  // Isochronous Transfers
-#define USB_RXCSRH6_DMAEN       0x00000020  // DMA Request Enable
-#define USB_RXCSRH6_DISNYET     0x00000010  // Disable NYET
-#define USB_RXCSRH6_PIDERR      0x00000010  // PID Error
-#define USB_RXCSRH6_DMAMOD      0x00000008  // DMA Request Mode
-#define USB_RXCSRH6_DTWE        0x00000004  // Data Toggle Write Enable
-#define USB_RXCSRH6_DT          0x00000002  // Data Toggle
-#define USB_RXCSRH6_INCOMPRX    0x00000001  // Incomplete RX Transmission
+#define USB_RXCSRH6_AUTOCL      0x0080  // Auto Clear
+#define USB_RXCSRH6_AUTORQ      0x0040  // Auto Request
+#define USB_RXCSRH6_ISO         0x0040  // Isochronous Transfers
+#define USB_RXCSRH6_DMAEN       0x0020  // DMA Request Enable
+#define USB_RXCSRH6_DISNYET     0x0010  // Disable NYET
+#define USB_RXCSRH6_PIDERR      0x0010  // PID Error
+#define USB_RXCSRH6_DMAMOD      0x0008  // DMA Request Mode
+#define USB_RXCSRH6_DTWE        0x0004  // Data Toggle Write Enable
+#define USB_RXCSRH6_DT          0x0002  // Data Toggle
+#define USB_RXCSRH6_INCOMPRX    0x0001  // Incomplete RX Transmission
                                             // Status
 
 //*****************************************************************************
@@ -1883,7 +1406,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RXCOUNT6 register.
 //
 //*****************************************************************************
-#define USB_RXCOUNT6_COUNT_M    0x00001FFF  // Receive Packet Count
+#define USB_RXCOUNT6_COUNT_M    0x1FFF  // Receive Packet Count
 #define USB_RXCOUNT6_COUNT_S    0
 
 //*****************************************************************************
@@ -1891,17 +1414,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXTYPE6 register.
 //
 //*****************************************************************************
-#define USB_TXTYPE6_SPEED_M     0x000000C0  // Operating Speed
-#define USB_TXTYPE6_SPEED_DFLT  0x00000000  // Default
-#define USB_TXTYPE6_SPEED_HIGH  0x00000040  // High
-#define USB_TXTYPE6_SPEED_FULL  0x00000080  // Full
-#define USB_TXTYPE6_SPEED_LOW   0x000000C0  // Low
-#define USB_TXTYPE6_PROTO_M     0x00000030  // Protocol
-#define USB_TXTYPE6_PROTO_CTRL  0x00000000  // Control
-#define USB_TXTYPE6_PROTO_ISOC  0x00000010  // Isochronous
-#define USB_TXTYPE6_PROTO_BULK  0x00000020  // Bulk
-#define USB_TXTYPE6_PROTO_INT   0x00000030  // Interrupt
-#define USB_TXTYPE6_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_TXTYPE6_SPEED_M     0x00C0  // Operating Speed
+#define USB_TXTYPE6_SPEED_DFLT  0x0000  // Default
+#define USB_TXTYPE6_SPEED_HIGH  0x0040  // High
+#define USB_TXTYPE6_SPEED_FULL  0x0080  // Full
+#define USB_TXTYPE6_SPEED_LOW   0x00C0  // Low
+#define USB_TXTYPE6_PROTO_M     0x0030  // Protocol
+#define USB_TXTYPE6_PROTO_CTRL  0x0000  // Control
+#define USB_TXTYPE6_PROTO_ISOC  0x0010  // Isochronous
+#define USB_TXTYPE6_PROTO_BULK  0x0020  // Bulk
+#define USB_TXTYPE6_PROTO_INT   0x0030  // Interrupt
+#define USB_TXTYPE6_TEP_M       0x000F  // Target Endpoint Number
 #define USB_TXTYPE6_TEP_S       0
 
 //*****************************************************************************
@@ -1910,31 +1433,27 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_TXINTERVAL6_TXPOLL_M                                              \
-                                0x000000FF  // TX Polling
-#define USB_TXINTERVAL6_NAKLMT_M                                              \
-                                0x000000FF  // NAK Limit
-#define USB_TXINTERVAL6_TXPOLL_S                                              \
-                                0
-#define USB_TXINTERVAL6_NAKLMT_S                                              \
-                                0
+#define USB_TXINTERVAL6_TXPOLL_M 0x00FF  // TX Polling
+#define USB_TXINTERVAL6_NAKLMT_M 0x00FF  // NAK Limit
+#define USB_TXINTERVAL6_TXPOLL_S 0
+#define USB_TXINTERVAL6_NAKLMT_S 0
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXTYPE6 register.
 //
 //*****************************************************************************
-#define USB_RXTYPE6_SPEED_M     0x000000C0  // Operating Speed
-#define USB_RXTYPE6_SPEED_DFLT  0x00000000  // Default
-#define USB_RXTYPE6_SPEED_HIGH  0x00000040  // High
-#define USB_RXTYPE6_SPEED_FULL  0x00000080  // Full
-#define USB_RXTYPE6_SPEED_LOW   0x000000C0  // Low
-#define USB_RXTYPE6_PROTO_M     0x00000030  // Protocol
-#define USB_RXTYPE6_PROTO_CTRL  0x00000000  // Control
-#define USB_RXTYPE6_PROTO_ISOC  0x00000010  // Isochronous
-#define USB_RXTYPE6_PROTO_BULK  0x00000020  // Bulk
-#define USB_RXTYPE6_PROTO_INT   0x00000030  // Interrupt
-#define USB_RXTYPE6_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_RXTYPE6_SPEED_M     0x00C0  // Operating Speed
+#define USB_RXTYPE6_SPEED_DFLT  0x0000  // Default
+#define USB_RXTYPE6_SPEED_HIGH  0x0040  // High
+#define USB_RXTYPE6_SPEED_FULL  0x0080  // Full
+#define USB_RXTYPE6_SPEED_LOW   0x00C0  // Low
+#define USB_RXTYPE6_PROTO_M     0x0030  // Protocol
+#define USB_RXTYPE6_PROTO_CTRL  0x0000  // Control
+#define USB_RXTYPE6_PROTO_ISOC  0x0010  // Isochronous
+#define USB_RXTYPE6_PROTO_BULK  0x0020  // Bulk
+#define USB_RXTYPE6_PROTO_INT   0x0030  // Interrupt
+#define USB_RXTYPE6_TEP_M       0x000F  // Target Endpoint Number
 #define USB_RXTYPE6_TEP_S       0
 
 //*****************************************************************************
@@ -1943,21 +1462,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RXINTERVAL6_TXPOLL_M                                              \
-                                0x000000FF  // RX Polling
-#define USB_RXINTERVAL6_NAKLMT_M                                              \
-                                0x000000FF  // NAK Limit
-#define USB_RXINTERVAL6_NAKLMT_S                                              \
-                                0
-#define USB_RXINTERVAL6_TXPOLL_S                                              \
-                                0
+#define USB_RXINTERVAL6_TXPOLL_M 0x00FF  // RX Polling
+#define USB_RXINTERVAL6_NAKLMT_M 0x00FF  // NAK Limit
+#define USB_RXINTERVAL6_NAKLMT_S 0
+#define USB_RXINTERVAL6_TXPOLL_S 0
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXMAXP7 register.
 //
 //*****************************************************************************
-#define USB_TXMAXP7_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_TXMAXP7_MAXLOAD_M   0x07FF  // Maximum Payload
 #define USB_TXMAXP7_MAXLOAD_S   0
 
 //*****************************************************************************
@@ -1965,37 +1480,37 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXCSRL7 register.
 //
 //*****************************************************************************
-#define USB_TXCSRL7_NAKTO       0x00000080  // NAK Timeout
-#define USB_TXCSRL7_CLRDT       0x00000040  // Clear Data Toggle
-#define USB_TXCSRL7_STALLED     0x00000020  // Endpoint Stalled
-#define USB_TXCSRL7_STALL       0x00000010  // Send STALL
-#define USB_TXCSRL7_SETUP       0x00000010  // Setup Packet
-#define USB_TXCSRL7_FLUSH       0x00000008  // Flush FIFO
-#define USB_TXCSRL7_ERROR       0x00000004  // Error
-#define USB_TXCSRL7_UNDRN       0x00000004  // Underrun
-#define USB_TXCSRL7_FIFONE      0x00000002  // FIFO Not Empty
-#define USB_TXCSRL7_TXRDY       0x00000001  // Transmit Packet Ready
+#define USB_TXCSRL7_NAKTO       0x0080  // NAK Timeout
+#define USB_TXCSRL7_CLRDT       0x0040  // Clear Data Toggle
+#define USB_TXCSRL7_STALLED     0x0020  // Endpoint Stalled
+#define USB_TXCSRL7_STALL       0x0010  // Send STALL
+#define USB_TXCSRL7_SETUP       0x0010  // Setup Packet
+#define USB_TXCSRL7_FLUSH       0x0008  // Flush FIFO
+#define USB_TXCSRL7_ERROR       0x0004  // Error
+#define USB_TXCSRL7_UNDRN       0x0004  // Underrun
+#define USB_TXCSRL7_FIFONE      0x0002  // FIFO Not Empty
+#define USB_TXCSRL7_TXRDY       0x0001  // Transmit Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXCSRH7 register.
 //
 //*****************************************************************************
-#define USB_TXCSRH7_AUTOSET     0x00000080  // Auto Set
-#define USB_TXCSRH7_ISO         0x00000040  // Isochronous Transfers
-#define USB_TXCSRH7_MODE        0x00000020  // Mode
-#define USB_TXCSRH7_DMAEN       0x00000010  // DMA Request Enable
-#define USB_TXCSRH7_FDT         0x00000008  // Force Data Toggle
-#define USB_TXCSRH7_DMAMOD      0x00000004  // DMA Request Mode
-#define USB_TXCSRH7_DTWE        0x00000002  // Data Toggle Write Enable
-#define USB_TXCSRH7_DT          0x00000001  // Data Toggle
+#define USB_TXCSRH7_AUTOSET     0x0080  // Auto Set
+#define USB_TXCSRH7_ISO         0x0040  // Isochronous Transfers
+#define USB_TXCSRH7_MODE        0x0020  // Mode
+#define USB_TXCSRH7_DMAEN       0x0010  // DMA Request Enable
+#define USB_TXCSRH7_FDT         0x0008  // Force Data Toggle
+#define USB_TXCSRH7_DMAMOD      0x0004  // DMA Request Mode
+#define USB_TXCSRH7_DTWE        0x0002  // Data Toggle Write Enable
+#define USB_TXCSRH7_DT          0x0001  // Data Toggle
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXMAXP7 register.
 //
 //*****************************************************************************
-#define USB_RXMAXP7_MAXLOAD_M   0x000007FF  // Maximum Payload
+#define USB_RXMAXP7_MAXLOAD_M   0x07FF  // Maximum Payload
 #define USB_RXMAXP7_MAXLOAD_S   0
 
 //*****************************************************************************
@@ -2003,33 +1518,33 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RXCSRL7 register.
 //
 //*****************************************************************************
-#define USB_RXCSRL7_CLRDT       0x00000080  // Clear Data Toggle
-#define USB_RXCSRL7_STALLED     0x00000040  // Endpoint Stalled
-#define USB_RXCSRL7_REQPKT      0x00000020  // Request Packet
-#define USB_RXCSRL7_STALL       0x00000020  // Send STALL
-#define USB_RXCSRL7_FLUSH       0x00000010  // Flush FIFO
-#define USB_RXCSRL7_DATAERR     0x00000008  // Data Error
-#define USB_RXCSRL7_NAKTO       0x00000008  // NAK Timeout
-#define USB_RXCSRL7_ERROR       0x00000004  // Error
-#define USB_RXCSRL7_OVER        0x00000004  // Overrun
-#define USB_RXCSRL7_FULL        0x00000002  // FIFO Full
-#define USB_RXCSRL7_RXRDY       0x00000001  // Receive Packet Ready
+#define USB_RXCSRL7_CLRDT       0x0080  // Clear Data Toggle
+#define USB_RXCSRL7_STALLED     0x0040  // Endpoint Stalled
+#define USB_RXCSRL7_REQPKT      0x0020  // Request Packet
+#define USB_RXCSRL7_STALL       0x0020  // Send STALL
+#define USB_RXCSRL7_FLUSH       0x0010  // Flush FIFO
+#define USB_RXCSRL7_DATAERR     0x0008  // Data Error
+#define USB_RXCSRL7_NAKTO       0x0008  // NAK Timeout
+#define USB_RXCSRL7_ERROR       0x0004  // Error
+#define USB_RXCSRL7_OVER        0x0004  // Overrun
+#define USB_RXCSRL7_FULL        0x0002  // FIFO Full
+#define USB_RXCSRL7_RXRDY       0x0001  // Receive Packet Ready
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXCSRH7 register.
 //
 //*****************************************************************************
-#define USB_RXCSRH7_AUTOCL      0x00000080  // Auto Clear
-#define USB_RXCSRH7_ISO         0x00000040  // Isochronous Transfers
-#define USB_RXCSRH7_AUTORQ      0x00000040  // Auto Request
-#define USB_RXCSRH7_DMAEN       0x00000020  // DMA Request Enable
-#define USB_RXCSRH7_PIDERR      0x00000010  // PID Error
-#define USB_RXCSRH7_DISNYET     0x00000010  // Disable NYET
-#define USB_RXCSRH7_DMAMOD      0x00000008  // DMA Request Mode
-#define USB_RXCSRH7_DTWE        0x00000004  // Data Toggle Write Enable
-#define USB_RXCSRH7_DT          0x00000002  // Data Toggle
-#define USB_RXCSRH7_INCOMPRX    0x00000001  // Incomplete RX Transmission
+#define USB_RXCSRH7_AUTOCL      0x0080  // Auto Clear
+#define USB_RXCSRH7_ISO         0x0040  // Isochronous Transfers
+#define USB_RXCSRH7_AUTORQ      0x0040  // Auto Request
+#define USB_RXCSRH7_DMAEN       0x0020  // DMA Request Enable
+#define USB_RXCSRH7_PIDERR      0x0010  // PID Error
+#define USB_RXCSRH7_DISNYET     0x0010  // Disable NYET
+#define USB_RXCSRH7_DMAMOD      0x0008  // DMA Request Mode
+#define USB_RXCSRH7_DTWE        0x0004  // Data Toggle Write Enable
+#define USB_RXCSRH7_DT          0x0002  // Data Toggle
+#define USB_RXCSRH7_INCOMPRX    0x0001  // Incomplete RX Transmission
                                             // Status
 
 //*****************************************************************************
@@ -2037,7 +1552,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_RXCOUNT7 register.
 //
 //*****************************************************************************
-#define USB_RXCOUNT7_COUNT_M    0x00001FFF  // Receive Packet Count
+#define USB_RXCOUNT7_COUNT_M    0x1FFF  // Receive Packet Count
 #define USB_RXCOUNT7_COUNT_S    0
 
 //*****************************************************************************
@@ -2045,17 +1560,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_TXTYPE7 register.
 //
 //*****************************************************************************
-#define USB_TXTYPE7_SPEED_M     0x000000C0  // Operating Speed
-#define USB_TXTYPE7_SPEED_DFLT  0x00000000  // Default
-#define USB_TXTYPE7_SPEED_HIGH  0x00000040  // High
-#define USB_TXTYPE7_SPEED_FULL  0x00000080  // Full
-#define USB_TXTYPE7_SPEED_LOW   0x000000C0  // Low
-#define USB_TXTYPE7_PROTO_M     0x00000030  // Protocol
-#define USB_TXTYPE7_PROTO_CTRL  0x00000000  // Control
-#define USB_TXTYPE7_PROTO_ISOC  0x00000010  // Isochronous
-#define USB_TXTYPE7_PROTO_BULK  0x00000020  // Bulk
-#define USB_TXTYPE7_PROTO_INT   0x00000030  // Interrupt
-#define USB_TXTYPE7_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_TXTYPE7_SPEED_M     0x00C0  // Operating Speed
+#define USB_TXTYPE7_SPEED_DFLT  0x0000  // Default
+#define USB_TXTYPE7_SPEED_HIGH  0x0040  // High
+#define USB_TXTYPE7_SPEED_FULL  0x0080  // Full
+#define USB_TXTYPE7_SPEED_LOW   0x00C0  // Low
+#define USB_TXTYPE7_PROTO_M     0x0030  // Protocol
+#define USB_TXTYPE7_PROTO_CTRL  0x0000  // Control
+#define USB_TXTYPE7_PROTO_ISOC  0x0010  // Isochronous
+#define USB_TXTYPE7_PROTO_BULK  0x0020  // Bulk
+#define USB_TXTYPE7_PROTO_INT   0x0030  // Interrupt
+#define USB_TXTYPE7_TEP_M       0x000F  // Target Endpoint Number
 #define USB_TXTYPE7_TEP_S       0
 
 //*****************************************************************************
@@ -2064,31 +1579,27 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_TXINTERVAL7_TXPOLL_M                                              \
-                                0x000000FF  // TX Polling
-#define USB_TXINTERVAL7_NAKLMT_M                                              \
-                                0x000000FF  // NAK Limit
-#define USB_TXINTERVAL7_NAKLMT_S                                              \
-                                0
-#define USB_TXINTERVAL7_TXPOLL_S                                              \
-                                0
+#define USB_TXINTERVAL7_TXPOLL_M 0x00FF  // TX Polling
+#define USB_TXINTERVAL7_NAKLMT_M 0x00FF  // NAK Limit
+#define USB_TXINTERVAL7_NAKLMT_S 0
+#define USB_TXINTERVAL7_TXPOLL_S 0
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXTYPE7 register.
 //
 //*****************************************************************************
-#define USB_RXTYPE7_SPEED_M     0x000000C0  // Operating Speed
-#define USB_RXTYPE7_SPEED_DFLT  0x00000000  // Default
-#define USB_RXTYPE7_SPEED_HIGH  0x00000040  // High
-#define USB_RXTYPE7_SPEED_FULL  0x00000080  // Full
-#define USB_RXTYPE7_SPEED_LOW   0x000000C0  // Low
-#define USB_RXTYPE7_PROTO_M     0x00000030  // Protocol
-#define USB_RXTYPE7_PROTO_CTRL  0x00000000  // Control
-#define USB_RXTYPE7_PROTO_ISOC  0x00000010  // Isochronous
-#define USB_RXTYPE7_PROTO_BULK  0x00000020  // Bulk
-#define USB_RXTYPE7_PROTO_INT   0x00000030  // Interrupt
-#define USB_RXTYPE7_TEP_M       0x0000000F  // Target Endpoint Number
+#define USB_RXTYPE7_SPEED_M     0x00C0  // Operating Speed
+#define USB_RXTYPE7_SPEED_DFLT  0x0000  // Default
+#define USB_RXTYPE7_SPEED_HIGH  0x0040  // High
+#define USB_RXTYPE7_SPEED_FULL  0x0080  // Full
+#define USB_RXTYPE7_SPEED_LOW   0x00C0  // Low
+#define USB_RXTYPE7_PROTO_M     0x0030  // Protocol
+#define USB_RXTYPE7_PROTO_CTRL  0x0000  // Control
+#define USB_RXTYPE7_PROTO_ISOC  0x0010  // Isochronous
+#define USB_RXTYPE7_PROTO_BULK  0x0020  // Bulk
+#define USB_RXTYPE7_PROTO_INT   0x0030  // Interrupt
+#define USB_RXTYPE7_TEP_M       0x000F  // Target Endpoint Number
 #define USB_RXTYPE7_TEP_S       0
 
 //*****************************************************************************
@@ -2097,47 +1608,43 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RXINTERVAL7_TXPOLL_M                                              \
-                                0x000000FF  // RX Polling
-#define USB_RXINTERVAL7_NAKLMT_M                                              \
-                                0x000000FF  // NAK Limit
-#define USB_RXINTERVAL7_NAKLMT_S                                              \
-                                0
-#define USB_RXINTERVAL7_TXPOLL_S                                              \
-                                0
+#define USB_RXINTERVAL7_TXPOLL_M 0x00FF  // RX Polling
+#define USB_RXINTERVAL7_NAKLMT_M 0x00FF  // NAK Limit
+#define USB_RXINTERVAL7_NAKLMT_S 0
+#define USB_RXINTERVAL7_TXPOLL_S 0
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_DMAINTR register.
 //
 //*****************************************************************************
-#define USB_DMAINTR_CH7         0x00000080  // Channel 7 DMA Interrupt
-#define USB_DMAINTR_CH6         0x00000040  // Channel 6 DMA Interrupt
-#define USB_DMAINTR_CH5         0x00000020  // Channel 5 DMA Interrupt
-#define USB_DMAINTR_CH4         0x00000010  // Channel 4 DMA Interrupt
-#define USB_DMAINTR_CH3         0x00000008  // Channel 3 DMA Interrupt
-#define USB_DMAINTR_CH2         0x00000004  // Channel 2 DMA Interrupt
-#define USB_DMAINTR_CH1         0x00000002  // Channel 1 DMA Interrupt
-#define USB_DMAINTR_CH0         0x00000001  // Channel 0 DMA Interrupt
+#define USB_DMAINTR_CH7         0x0080  // Channel 7 DMA Interrupt
+#define USB_DMAINTR_CH6         0x0040  // Channel 6 DMA Interrupt
+#define USB_DMAINTR_CH5         0x0020  // Channel 5 DMA Interrupt
+#define USB_DMAINTR_CH4         0x0010  // Channel 4 DMA Interrupt
+#define USB_DMAINTR_CH3         0x0008  // Channel 3 DMA Interrupt
+#define USB_DMAINTR_CH2         0x0004  // Channel 2 DMA Interrupt
+#define USB_DMAINTR_CH1         0x0002  // Channel 1 DMA Interrupt
+#define USB_DMAINTR_CH0         0x0001  // Channel 0 DMA Interrupt
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_DMACTL0 register.
 //
 //*****************************************************************************
-#define USB_DMACTL0_BRSTM_M     0x00000600  // Burst Mode
-#define USB_DMACTL0_BRSTM_ANY   0x00000000  // Bursts of unspecified length
-#define USB_DMACTL0_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
-#define USB_DMACTL0_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+#define USB_DMACTL0_BRSTM_M     0x0600  // Burst Mode
+#define USB_DMACTL0_BRSTM_ANY   0x0000  // Bursts of unspecified length
+#define USB_DMACTL0_BRSTM_INC4  0x0200  // INCR4 or unspecified length
+#define USB_DMACTL0_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
                                             // length
-#define USB_DMACTL0_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+#define USB_DMACTL0_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
                                             // unspecified length
-#define USB_DMACTL0_ERR         0x00000100  // Bus Error Bit
-#define USB_DMACTL0_EP_M        0x000000F0  // Endpoint number
-#define USB_DMACTL0_IE          0x00000008  // DMA Interrupt Enable
-#define USB_DMACTL0_MODE        0x00000004  // DMA Transfer Mode
-#define USB_DMACTL0_DIR         0x00000002  // DMA Direction
-#define USB_DMACTL0_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL0_ERR         0x0100  // Bus Error Bit
+#define USB_DMACTL0_EP_M        0x00F0  // Endpoint number
+#define USB_DMACTL0_IE          0x0008  // DMA Interrupt Enable
+#define USB_DMACTL0_MODE        0x0004  // DMA Transfer Mode
+#define USB_DMACTL0_DIR         0x0002  // DMA Direction
+#define USB_DMACTL0_ENABLE      0x0001  // DMA Transfer Enable
 #define USB_DMACTL0_EP_S        4
 
 //*****************************************************************************
@@ -2162,19 +1669,19 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_DMACTL1 register.
 //
 //*****************************************************************************
-#define USB_DMACTL1_BRSTM_M     0x00000600  // Burst Mode
-#define USB_DMACTL1_BRSTM_ANY   0x00000000  // Bursts of unspecified length
-#define USB_DMACTL1_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
-#define USB_DMACTL1_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+#define USB_DMACTL1_BRSTM_M     0x0600  // Burst Mode
+#define USB_DMACTL1_BRSTM_ANY   0x0000  // Bursts of unspecified length
+#define USB_DMACTL1_BRSTM_INC4  0x0200  // INCR4 or unspecified length
+#define USB_DMACTL1_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
                                             // length
-#define USB_DMACTL1_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+#define USB_DMACTL1_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
                                             // unspecified length
-#define USB_DMACTL1_ERR         0x00000100  // Bus Error Bit
-#define USB_DMACTL1_EP_M        0x000000F0  // Endpoint number
-#define USB_DMACTL1_IE          0x00000008  // DMA Interrupt Enable
-#define USB_DMACTL1_MODE        0x00000004  // DMA Transfer Mode
-#define USB_DMACTL1_DIR         0x00000002  // DMA Direction
-#define USB_DMACTL1_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL1_ERR         0x0100  // Bus Error Bit
+#define USB_DMACTL1_EP_M        0x00F0  // Endpoint number
+#define USB_DMACTL1_IE          0x0008  // DMA Interrupt Enable
+#define USB_DMACTL1_MODE        0x0004  // DMA Transfer Mode
+#define USB_DMACTL1_DIR         0x0002  // DMA Direction
+#define USB_DMACTL1_ENABLE      0x0001  // DMA Transfer Enable
 #define USB_DMACTL1_EP_S        4
 
 //*****************************************************************************
@@ -2199,19 +1706,19 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_DMACTL2 register.
 //
 //*****************************************************************************
-#define USB_DMACTL2_BRSTM_M     0x00000600  // Burst Mode
-#define USB_DMACTL2_BRSTM_ANY   0x00000000  // Bursts of unspecified length
-#define USB_DMACTL2_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
-#define USB_DMACTL2_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+#define USB_DMACTL2_BRSTM_M     0x0600  // Burst Mode
+#define USB_DMACTL2_BRSTM_ANY   0x0000  // Bursts of unspecified length
+#define USB_DMACTL2_BRSTM_INC4  0x0200  // INCR4 or unspecified length
+#define USB_DMACTL2_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
                                             // length
-#define USB_DMACTL2_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+#define USB_DMACTL2_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
                                             // unspecified length
-#define USB_DMACTL2_ERR         0x00000100  // Bus Error Bit
-#define USB_DMACTL2_EP_M        0x000000F0  // Endpoint number
-#define USB_DMACTL2_IE          0x00000008  // DMA Interrupt Enable
-#define USB_DMACTL2_MODE        0x00000004  // DMA Transfer Mode
-#define USB_DMACTL2_DIR         0x00000002  // DMA Direction
-#define USB_DMACTL2_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL2_ERR         0x0100  // Bus Error Bit
+#define USB_DMACTL2_EP_M        0x00F0  // Endpoint number
+#define USB_DMACTL2_IE          0x0008  // DMA Interrupt Enable
+#define USB_DMACTL2_MODE        0x0004  // DMA Transfer Mode
+#define USB_DMACTL2_DIR         0x0002  // DMA Direction
+#define USB_DMACTL2_ENABLE      0x0001  // DMA Transfer Enable
 #define USB_DMACTL2_EP_S        4
 
 //*****************************************************************************
@@ -2236,19 +1743,19 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_DMACTL3 register.
 //
 //*****************************************************************************
-#define USB_DMACTL3_BRSTM_M     0x00000600  // Burst Mode
-#define USB_DMACTL3_BRSTM_ANY   0x00000000  // Bursts of unspecified length
-#define USB_DMACTL3_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
-#define USB_DMACTL3_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+#define USB_DMACTL3_BRSTM_M     0x0600  // Burst Mode
+#define USB_DMACTL3_BRSTM_ANY   0x0000  // Bursts of unspecified length
+#define USB_DMACTL3_BRSTM_INC4  0x0200  // INCR4 or unspecified length
+#define USB_DMACTL3_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
                                             // length
-#define USB_DMACTL3_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+#define USB_DMACTL3_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
                                             // unspecified length
-#define USB_DMACTL3_ERR         0x00000100  // Bus Error Bit
-#define USB_DMACTL3_EP_M        0x000000F0  // Endpoint number
-#define USB_DMACTL3_IE          0x00000008  // DMA Interrupt Enable
-#define USB_DMACTL3_MODE        0x00000004  // DMA Transfer Mode
-#define USB_DMACTL3_DIR         0x00000002  // DMA Direction
-#define USB_DMACTL3_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL3_ERR         0x0100  // Bus Error Bit
+#define USB_DMACTL3_EP_M        0x00F0  // Endpoint number
+#define USB_DMACTL3_IE          0x0008  // DMA Interrupt Enable
+#define USB_DMACTL3_MODE        0x0004  // DMA Transfer Mode
+#define USB_DMACTL3_DIR         0x0002  // DMA Direction
+#define USB_DMACTL3_ENABLE      0x0001  // DMA Transfer Enable
 #define USB_DMACTL3_EP_S        4
 
 //*****************************************************************************
@@ -2273,19 +1780,19 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_DMACTL4 register.
 //
 //*****************************************************************************
-#define USB_DMACTL4_BRSTM_M     0x00000600  // Burst Mode
-#define USB_DMACTL4_BRSTM_ANY   0x00000000  // Bursts of unspecified length
-#define USB_DMACTL4_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
-#define USB_DMACTL4_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+#define USB_DMACTL4_BRSTM_M     0x0600  // Burst Mode
+#define USB_DMACTL4_BRSTM_ANY   0x0000  // Bursts of unspecified length
+#define USB_DMACTL4_BRSTM_INC4  0x0200  // INCR4 or unspecified length
+#define USB_DMACTL4_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
                                             // length
-#define USB_DMACTL4_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+#define USB_DMACTL4_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
                                             // unspecified length
-#define USB_DMACTL4_ERR         0x00000100  // Bus Error Bit
-#define USB_DMACTL4_EP_M        0x000000F0  // Endpoint number
-#define USB_DMACTL4_IE          0x00000008  // DMA Interrupt Enable
-#define USB_DMACTL4_MODE        0x00000004  // DMA Transfer Mode
-#define USB_DMACTL4_DIR         0x00000002  // DMA Direction
-#define USB_DMACTL4_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL4_ERR         0x0100  // Bus Error Bit
+#define USB_DMACTL4_EP_M        0x00F0  // Endpoint number
+#define USB_DMACTL4_IE          0x0008  // DMA Interrupt Enable
+#define USB_DMACTL4_MODE        0x0004  // DMA Transfer Mode
+#define USB_DMACTL4_DIR         0x0002  // DMA Direction
+#define USB_DMACTL4_ENABLE      0x0001  // DMA Transfer Enable
 #define USB_DMACTL4_EP_S        4
 
 //*****************************************************************************
@@ -2310,19 +1817,19 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_DMACTL5 register.
 //
 //*****************************************************************************
-#define USB_DMACTL5_BRSTM_M     0x00000600  // Burst Mode
-#define USB_DMACTL5_BRSTM_ANY   0x00000000  // Bursts of unspecified length
-#define USB_DMACTL5_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
-#define USB_DMACTL5_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+#define USB_DMACTL5_BRSTM_M     0x0600  // Burst Mode
+#define USB_DMACTL5_BRSTM_ANY   0x0000  // Bursts of unspecified length
+#define USB_DMACTL5_BRSTM_INC4  0x0200  // INCR4 or unspecified length
+#define USB_DMACTL5_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
                                             // length
-#define USB_DMACTL5_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+#define USB_DMACTL5_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
                                             // unspecified length
-#define USB_DMACTL5_ERR         0x00000100  // Bus Error Bit
-#define USB_DMACTL5_EP_M        0x000000F0  // Endpoint number
-#define USB_DMACTL5_IE          0x00000008  // DMA Interrupt Enable
-#define USB_DMACTL5_MODE        0x00000004  // DMA Transfer Mode
-#define USB_DMACTL5_DIR         0x00000002  // DMA Direction
-#define USB_DMACTL5_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL5_ERR         0x0100  // Bus Error Bit
+#define USB_DMACTL5_EP_M        0x00F0  // Endpoint number
+#define USB_DMACTL5_IE          0x0008  // DMA Interrupt Enable
+#define USB_DMACTL5_MODE        0x0004  // DMA Transfer Mode
+#define USB_DMACTL5_DIR         0x0002  // DMA Direction
+#define USB_DMACTL5_ENABLE      0x0001  // DMA Transfer Enable
 #define USB_DMACTL5_EP_S        4
 
 //*****************************************************************************
@@ -2347,19 +1854,19 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_DMACTL6 register.
 //
 //*****************************************************************************
-#define USB_DMACTL6_BRSTM_M     0x00000600  // Burst Mode
-#define USB_DMACTL6_BRSTM_ANY   0x00000000  // Bursts of unspecified length
-#define USB_DMACTL6_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
-#define USB_DMACTL6_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+#define USB_DMACTL6_BRSTM_M     0x0600  // Burst Mode
+#define USB_DMACTL6_BRSTM_ANY   0x0000  // Bursts of unspecified length
+#define USB_DMACTL6_BRSTM_INC4  0x0200  // INCR4 or unspecified length
+#define USB_DMACTL6_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
                                             // length
-#define USB_DMACTL6_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+#define USB_DMACTL6_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
                                             // unspecified length
-#define USB_DMACTL6_ERR         0x00000100  // Bus Error Bit
-#define USB_DMACTL6_EP_M        0x000000F0  // Endpoint number
-#define USB_DMACTL6_IE          0x00000008  // DMA Interrupt Enable
-#define USB_DMACTL6_MODE        0x00000004  // DMA Transfer Mode
-#define USB_DMACTL6_DIR         0x00000002  // DMA Direction
-#define USB_DMACTL6_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL6_ERR         0x0100  // Bus Error Bit
+#define USB_DMACTL6_EP_M        0x00F0  // Endpoint number
+#define USB_DMACTL6_IE          0x0008  // DMA Interrupt Enable
+#define USB_DMACTL6_MODE        0x0004  // DMA Transfer Mode
+#define USB_DMACTL6_DIR         0x0002  // DMA Direction
+#define USB_DMACTL6_ENABLE      0x0001  // DMA Transfer Enable
 #define USB_DMACTL6_EP_S        4
 
 //*****************************************************************************
@@ -2384,19 +1891,19 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_DMACTL7 register.
 //
 //*****************************************************************************
-#define USB_DMACTL7_BRSTM_M     0x00000600  // Burst Mode
-#define USB_DMACTL7_BRSTM_ANY   0x00000000  // Bursts of unspecified length
-#define USB_DMACTL7_BRSTM_INC4  0x00000200  // INCR4 or unspecified length
-#define USB_DMACTL7_BRSTM_INC8  0x00000400  // INCR8, INCR4 or unspecified
+#define USB_DMACTL7_BRSTM_M     0x0600  // Burst Mode
+#define USB_DMACTL7_BRSTM_ANY   0x0000  // Bursts of unspecified length
+#define USB_DMACTL7_BRSTM_INC4  0x0200  // INCR4 or unspecified length
+#define USB_DMACTL7_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
                                             // length
-#define USB_DMACTL7_BRSTM_INC16 0x00000600  // INCR16, INCR8, INCR4 or
+#define USB_DMACTL7_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
                                             // unspecified length
-#define USB_DMACTL7_ERR         0x00000100  // Bus Error Bit
-#define USB_DMACTL7_EP_M        0x000000F0  // Endpoint number
-#define USB_DMACTL7_IE          0x00000008  // DMA Interrupt Enable
-#define USB_DMACTL7_MODE        0x00000004  // DMA Transfer Mode
-#define USB_DMACTL7_DIR         0x00000002  // DMA Direction
-#define USB_DMACTL7_ENABLE      0x00000001  // DMA Transfer Enable
+#define USB_DMACTL7_ERR         0x0100  // Bus Error Bit
+#define USB_DMACTL7_EP_M        0x00F0  // Endpoint number
+#define USB_DMACTL7_IE          0x0008  // DMA Interrupt Enable
+#define USB_DMACTL7_MODE        0x0004  // DMA Transfer Mode
+#define USB_DMACTL7_DIR         0x0002  // DMA Direction
+#define USB_DMACTL7_ENABLE      0x0001  // DMA Transfer Enable
 #define USB_DMACTL7_EP_S        4
 
 //*****************************************************************************
@@ -2422,7 +1929,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RQPKTCOUNT1_M       0x0000FFFF  // Block Transfer Packet Count
+#define USB_RQPKTCOUNT1_M       0xFFFF  // Block Transfer Packet Count
 #define USB_RQPKTCOUNT1_S       0
 
 //*****************************************************************************
@@ -2431,7 +1938,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RQPKTCOUNT2_M       0x0000FFFF  // Block Transfer Packet Count
+#define USB_RQPKTCOUNT2_M       0xFFFF  // Block Transfer Packet Count
 #define USB_RQPKTCOUNT2_S       0
 
 //*****************************************************************************
@@ -2440,7 +1947,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RQPKTCOUNT3_M       0x0000FFFF  // Block Transfer Packet Count
+#define USB_RQPKTCOUNT3_M       0xFFFF  // Block Transfer Packet Count
 #define USB_RQPKTCOUNT3_S       0
 
 //*****************************************************************************
@@ -2449,7 +1956,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RQPKTCOUNT4_COUNT_M 0x0000FFFF  // Block Transfer Packet Count
+#define USB_RQPKTCOUNT4_COUNT_M 0xFFFF  // Block Transfer Packet Count
 #define USB_RQPKTCOUNT4_COUNT_S 0
 
 //*****************************************************************************
@@ -2458,7 +1965,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RQPKTCOUNT5_COUNT_M 0x0000FFFF  // Block Transfer Packet Count
+#define USB_RQPKTCOUNT5_COUNT_M 0xFFFF  // Block Transfer Packet Count
 #define USB_RQPKTCOUNT5_COUNT_S 0
 
 //*****************************************************************************
@@ -2467,7 +1974,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RQPKTCOUNT6_COUNT_M 0x0000FFFF  // Block Transfer Packet Count
+#define USB_RQPKTCOUNT6_COUNT_M 0xFFFF  // Block Transfer Packet Count
 #define USB_RQPKTCOUNT6_COUNT_S 0
 
 //*****************************************************************************
@@ -2476,7 +1983,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RQPKTCOUNT7_COUNT_M 0x0000FFFF  // Block Transfer Packet Count
+#define USB_RQPKTCOUNT7_COUNT_M 0xFFFF  // Block Transfer Packet Count
 #define USB_RQPKTCOUNT7_COUNT_S 0
 
 //*****************************************************************************
@@ -2485,19 +1992,19 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_RXDPKTBUFDIS_EP7    0x00000080  // EP7 RX Double-Packet Buffer
+#define USB_RXDPKTBUFDIS_EP7    0x0080  // EP7 RX Double-Packet Buffer
                                             // Disable
-#define USB_RXDPKTBUFDIS_EP6    0x00000040  // EP6 RX Double-Packet Buffer
+#define USB_RXDPKTBUFDIS_EP6    0x0040  // EP6 RX Double-Packet Buffer
                                             // Disable
-#define USB_RXDPKTBUFDIS_EP5    0x00000020  // EP5 RX Double-Packet Buffer
+#define USB_RXDPKTBUFDIS_EP5    0x0020  // EP5 RX Double-Packet Buffer
                                             // Disable
-#define USB_RXDPKTBUFDIS_EP4    0x00000010  // EP4 RX Double-Packet Buffer
+#define USB_RXDPKTBUFDIS_EP4    0x0010  // EP4 RX Double-Packet Buffer
                                             // Disable
-#define USB_RXDPKTBUFDIS_EP3    0x00000008  // EP3 RX Double-Packet Buffer
+#define USB_RXDPKTBUFDIS_EP3    0x0008  // EP3 RX Double-Packet Buffer
                                             // Disable
-#define USB_RXDPKTBUFDIS_EP2    0x00000004  // EP2 RX Double-Packet Buffer
+#define USB_RXDPKTBUFDIS_EP2    0x0004  // EP2 RX Double-Packet Buffer
                                             // Disable
-#define USB_RXDPKTBUFDIS_EP1    0x00000002  // EP1 RX Double-Packet Buffer
+#define USB_RXDPKTBUFDIS_EP1    0x0002  // EP1 RX Double-Packet Buffer
                                             // Disable
 
 //*****************************************************************************
@@ -2506,19 +2013,19 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // register.
 //
 //*****************************************************************************
-#define USB_TXDPKTBUFDIS_EP7    0x00000080  // EP7 TX Double-Packet Buffer
+#define USB_TXDPKTBUFDIS_EP7    0x0080  // EP7 TX Double-Packet Buffer
                                             // Disable
-#define USB_TXDPKTBUFDIS_EP6    0x00000040  // EP6 TX Double-Packet Buffer
+#define USB_TXDPKTBUFDIS_EP6    0x0040  // EP6 TX Double-Packet Buffer
                                             // Disable
-#define USB_TXDPKTBUFDIS_EP5    0x00000020  // EP5 TX Double-Packet Buffer
+#define USB_TXDPKTBUFDIS_EP5    0x0020  // EP5 TX Double-Packet Buffer
                                             // Disable
-#define USB_TXDPKTBUFDIS_EP4    0x00000010  // EP4 TX Double-Packet Buffer
+#define USB_TXDPKTBUFDIS_EP4    0x0010  // EP4 TX Double-Packet Buffer
                                             // Disable
-#define USB_TXDPKTBUFDIS_EP3    0x00000008  // EP3 TX Double-Packet Buffer
+#define USB_TXDPKTBUFDIS_EP3    0x0008  // EP3 TX Double-Packet Buffer
                                             // Disable
-#define USB_TXDPKTBUFDIS_EP2    0x00000004  // EP2 TX Double-Packet Buffer
+#define USB_TXDPKTBUFDIS_EP2    0x0004  // EP2 TX Double-Packet Buffer
                                             // Disable
-#define USB_TXDPKTBUFDIS_EP1    0x00000002  // EP1 TX Double-Packet Buffer
+#define USB_TXDPKTBUFDIS_EP1    0x0002  // EP1 TX Double-Packet Buffer
                                             // Disable
 
 //*****************************************************************************
@@ -2526,7 +2033,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_CTO register.
 //
 //*****************************************************************************
-#define USB_CTO_CCTV_M          0x0000FFFF  // Configurable Chirp Timeout Value
+#define USB_CTO_CCTV_M          0xFFFF  // Configurable Chirp Timeout Value
 #define USB_CTO_CCTV_S          0
 
 //*****************************************************************************
@@ -2534,7 +2041,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_HHSRTN register.
 //
 //*****************************************************************************
-#define USB_HHSRTN_HHSRTN_M     0x0000FFFF  // HIgh Speed to UTM Operating
+#define USB_HHSRTN_HHSRTN_M     0xFFFF  // HIgh Speed to UTM Operating
                                             // Delay
 #define USB_HHSRTN_HHSRTN_S     0
 
@@ -2543,7 +2050,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_HSBT register.
 //
 //*****************************************************************************
-#define USB_HSBT_HSBT_M         0x0000000F  // High Speed Timeout Adder
+#define USB_HSBT_HSBT_M         0x000F  // High Speed Timeout Adder
 #define USB_HSBT_HSBT_S         0
 
 //*****************************************************************************
@@ -2551,11 +2058,11 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_LPMATTR register.
 //
 //*****************************************************************************
-#define USB_LPMATTR_ENDPT_M     0x0000F000  // Endpoint
-#define USB_LPMATTR_RMTWAK      0x00000100  // Remote Wake
-#define USB_LPMATTR_HIRD_M      0x000000F0  // Host Initiated Resume Duration
-#define USB_LPMATTR_LS_M        0x0000000F  // Link State
-#define USB_LPMATTR_LS_L1       0x00000001  // Sleep State (L1)
+#define USB_LPMATTR_ENDPT_M     0xF000  // Endpoint
+#define USB_LPMATTR_RMTWAK      0x0100  // Remote Wake
+#define USB_LPMATTR_HIRD_M      0x00F0  // Host Initiated Resume Duration
+#define USB_LPMATTR_LS_M        0x000F  // Link State
+#define USB_LPMATTR_LS_L1       0x0001  // Sleep State (L1)
 #define USB_LPMATTR_ENDPT_S     12
 #define USB_LPMATTR_HIRD_S      4
 
@@ -2564,56 +2071,56 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_LPMCNTRL register.
 //
 //*****************************************************************************
-#define USB_LPMCNTRL_NAK        0x00000010  // LPM NAK
-#define USB_LPMCNTRL_EN_M       0x0000000C  // LPM Enable
-#define USB_LPMCNTRL_EN_NONE    0x00000000  // LPM and Extended transactions
+#define USB_LPMCNTRL_NAK        0x0010  // LPM NAK
+#define USB_LPMCNTRL_EN_M       0x000C  // LPM Enable
+#define USB_LPMCNTRL_EN_NONE    0x0000  // LPM and Extended transactions
                                             // are not supported. In this case,
                                             // the USB does not respond to LPM
                                             // transactions and LPM
                                             // transactions cause a timeout
-#define USB_LPMCNTRL_EN_EXT     0x00000004  // LPM is not supported but
+#define USB_LPMCNTRL_EN_EXT     0x0004  // LPM is not supported but
                                             // extended transactions are
                                             // supported. In this case, the USB
                                             // does respond to an LPM
                                             // transaction with a STALL
-#define USB_LPMCNTRL_EN_LPMEXT  0x0000000C  // The USB supports LPM extended
+#define USB_LPMCNTRL_EN_LPMEXT  0x000C  // The USB supports LPM extended
                                             // transactions. In this case, the
                                             // USB responds with a NYET or an
                                             // ACK as determined by the value
                                             // of TXLPM and other conditions
-#define USB_LPMCNTRL_RES        0x00000002  // LPM Resume
-#define USB_LPMCNTRL_TXLPM      0x00000001  // Transmit LPM Transaction Enable
+#define USB_LPMCNTRL_RES        0x0002  // LPM Resume
+#define USB_LPMCNTRL_TXLPM      0x0001  // Transmit LPM Transaction Enable
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_LPMIM register.
 //
 //*****************************************************************************
-#define USB_LPMIM_ERR           0x00000020  // LPM Error Interrupt Mask
-#define USB_LPMIM_RES           0x00000010  // LPM Resume Interrupt Mask
-#define USB_LPMIM_NC            0x00000008  // LPM NC Interrupt Mask
-#define USB_LPMIM_ACK           0x00000004  // LPM ACK Interrupt Mask
-#define USB_LPMIM_NY            0x00000002  // LPM NY Interrupt Mask
-#define USB_LPMIM_STALL         0x00000001  // LPM STALL Interrupt Mask
+#define USB_LPMIM_ERR           0x0020  // LPM Error Interrupt Mask
+#define USB_LPMIM_RES           0x0010  // LPM Resume Interrupt Mask
+#define USB_LPMIM_NC            0x0008  // LPM NC Interrupt Mask
+#define USB_LPMIM_ACK           0x0004  // LPM ACK Interrupt Mask
+#define USB_LPMIM_NY            0x0002  // LPM NY Interrupt Mask
+#define USB_LPMIM_STALL         0x0001  // LPM STALL Interrupt Mask
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_LPMRIS register.
 //
 //*****************************************************************************
-#define USB_LPMRIS_ERR          0x00000020  // LPM Interrupt Status
-#define USB_LPMRIS_RES          0x00000010  // LPM Resume Interrupt Status
-#define USB_LPMRIS_NC           0x00000008  // LPM NC Interrupt Status
-#define USB_LPMRIS_ACK          0x00000004  // LPM ACK Interrupt Status
-#define USB_LPMRIS_NY           0x00000002  // LPM NY Interrupt Status
-#define USB_LPMRIS_LPMST        0x00000001  // LPM STALL Interrupt Status
+#define USB_LPMRIS_ERR          0x0020  // LPM Interrupt Status
+#define USB_LPMRIS_RES          0x0010  // LPM Resume Interrupt Status
+#define USB_LPMRIS_NC           0x0008  // LPM NC Interrupt Status
+#define USB_LPMRIS_ACK          0x0004  // LPM ACK Interrupt Status
+#define USB_LPMRIS_NY           0x0002  // LPM NY Interrupt Status
+#define USB_LPMRIS_LPMST        0x0001  // LPM STALL Interrupt Status
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_LPMFADDR register.
 //
 //*****************************************************************************
-#define USB_LPMFADDR_ADDR_M     0x0000007F  // LPM Function Address
+#define USB_LPMFADDR_ADDR_M     0x007F  // LPM Function Address
 #define USB_LPMFADDR_ADDR_S     0
 
 //*****************************************************************************
@@ -2621,22 +2128,22 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_EPC register.
 //
 //*****************************************************************************
-#define USB_EPC_PFLTACT_M       0x00000300  // Power Fault Action
-#define USB_EPC_PFLTACT_UNCHG   0x00000000  // Unchanged
-#define USB_EPC_PFLTACT_TRIS    0x00000100  // Tristate
-#define USB_EPC_PFLTACT_LOW     0x00000200  // Low
-#define USB_EPC_PFLTACT_HIGH    0x00000300  // High
-#define USB_EPC_PFLTAEN         0x00000040  // Power Fault Action Enable
-#define USB_EPC_PFLTSEN_HIGH    0x00000020  // Power Fault Sense
-#define USB_EPC_PFLTEN          0x00000010  // Power Fault Input Enable
-#define USB_EPC_EPENDE          0x00000004  // EPEN Drive Enable
-#define USB_EPC_EPEN_M          0x00000003  // External Power Supply Enable
+#define USB_EPC_PFLTACT_M       0x0300  // Power Fault Action
+#define USB_EPC_PFLTACT_UNCHG   0x0000  // Unchanged
+#define USB_EPC_PFLTACT_TRIS    0x0100  // Tristate
+#define USB_EPC_PFLTACT_LOW     0x0200  // Low
+#define USB_EPC_PFLTACT_HIGH    0x0300  // High
+#define USB_EPC_PFLTAEN         0x0040  // Power Fault Action Enable
+#define USB_EPC_PFLTSEN_HIGH    0x0020  // Power Fault Sense
+#define USB_EPC_PFLTEN          0x0010  // Power Fault Input Enable
+#define USB_EPC_EPENDE          0x0004  // EPEN Drive Enable
+#define USB_EPC_EPEN_M          0x0003  // External Power Supply Enable
                                             // Configuration
-#define USB_EPC_EPEN_LOW        0x00000000  // Power Enable Active Low
-#define USB_EPC_EPEN_HIGH       0x00000001  // Power Enable Active High
-#define USB_EPC_EPEN_VBLOW      0x00000002  // Power Enable High if VBUS Low
+#define USB_EPC_EPEN_LOW        0x0000  // Power Enable Active Low
+#define USB_EPC_EPEN_HIGH       0x0001  // Power Enable Active High
+#define USB_EPC_EPEN_VBLOW      0x0002  // Power Enable High if VBUS Low
                                             // (OTG only)
-#define USB_EPC_EPEN_VBHIGH     0x00000003  // Power Enable High if VBUS High
+#define USB_EPC_EPEN_VBHIGH     0x0003  // Power Enable High if VBUS High
                                             // (OTG only)
 
 //*****************************************************************************
@@ -2644,21 +2151,21 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_EPCRIS register.
 //
 //*****************************************************************************
-#define USB_EPCRIS_PF           0x00000001  // USB Power Fault Interrupt Status
+#define USB_EPCRIS_PF           0x0001  // USB Power Fault Interrupt Status
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_EPCIM register.
 //
 //*****************************************************************************
-#define USB_EPCIM_PF            0x00000001  // USB Power Fault Interrupt Mask
+#define USB_EPCIM_PF            0x0001  // USB Power Fault Interrupt Mask
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_EPCISC register.
 //
 //*****************************************************************************
-#define USB_EPCISC_PF           0x00000001  // USB Power Fault Interrupt Status
+#define USB_EPCISC_PF           0x0001  // USB Power Fault Interrupt Status
                                             // and Clear
 
 //*****************************************************************************
@@ -2666,21 +2173,21 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_DRRIS register.
 //
 //*****************************************************************************
-#define USB_DRRIS_RESUME        0x00000001  // RESUME Interrupt Status
+#define USB_DRRIS_RESUME        0x0001  // RESUME Interrupt Status
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_DRIM register.
 //
 //*****************************************************************************
-#define USB_DRIM_RESUME         0x00000001  // RESUME Interrupt Mask
+#define USB_DRIM_RESUME         0x0001  // RESUME Interrupt Mask
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_DRISC register.
 //
 //*****************************************************************************
-#define USB_DRISC_RESUME        0x00000001  // RESUME Interrupt Status and
+#define USB_DRISC_RESUME        0x0001  // RESUME Interrupt Status and
                                             // Clear
 
 //*****************************************************************************
@@ -2688,14 +2195,14 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_GPCS register.
 //
 //*****************************************************************************
-#define USB_GPCS_DEVMOD_M       0x00000007  // Device Mode
-#define USB_GPCS_DEVMOD_OTG     0x00000000  // Use USB0VBUS and USB0ID pin
-#define USB_GPCS_DEVMOD_HOST    0x00000002  // Force USB0VBUS and USB0ID low
-#define USB_GPCS_DEVMOD_DEV     0x00000003  // Force USB0VBUS and USB0ID high
+#define USB_GPCS_DEVMOD_M       0x0007  // Device Mode
+#define USB_GPCS_DEVMOD_OTG     0x0000  // Use USB0VBUS and USB0ID pin
+#define USB_GPCS_DEVMOD_HOST    0x0002  // Force USB0VBUS and USB0ID low
+#define USB_GPCS_DEVMOD_DEV     0x0003  // Force USB0VBUS and USB0ID high
 #define USB_GPCS_DEVMOD_HOSTVBUS                                              \
-                                0x00000004  // Use USB0VBUS and force USB0ID
+                                0x0004  // Use USB0VBUS and force USB0ID
                                             // low
-#define USB_GPCS_DEVMOD_DEVVBUS 0x00000005  // Use USB0VBUS and force USB0ID
+#define USB_GPCS_DEVMOD_DEVVBUS 0x0005  // Use USB0VBUS and force USB0ID
                                             // high
 
 //*****************************************************************************
@@ -2703,28 +2210,28 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_VDC register.
 //
 //*****************************************************************************
-#define USB_VDC_VBDEN           0x00000001  // VBUS Droop Enable
+#define USB_VDC_VBDEN           0x0001  // VBUS Droop Enable
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_VDCRIS register.
 //
 //*****************************************************************************
-#define USB_VDCRIS_VD           0x00000001  // VBUS Droop Raw Interrupt Status
+#define USB_VDCRIS_VD           0x0001  // VBUS Droop Raw Interrupt Status
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_VDCIM register.
 //
 //*****************************************************************************
-#define USB_VDCIM_VD            0x00000001  // VBUS Droop Interrupt Mask
+#define USB_VDCIM_VD            0x0001  // VBUS Droop Interrupt Mask
 
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_VDCISC register.
 //
 //*****************************************************************************
-#define USB_VDCISC_VD           0x00000001  // VBUS Droop Interrupt Status and
+#define USB_VDCISC_VD           0x0001  // VBUS Droop Interrupt Status and
                                             // Clear
 
 //*****************************************************************************
@@ -2732,17 +2239,17 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_PP register.
 //
 //*****************************************************************************
-#define USB_PP_ECNT_M           0x0000FF00  // Endpoint Count
-#define USB_PP_USB_M            0x000000C0  // USB Capability
-#define USB_PP_USB_DEVICE       0x00000040  // DEVICE
-#define USB_PP_USB_HOSTDEVICE   0x00000080  // HOST
-#define USB_PP_USB_OTG          0x000000C0  // OTG
-#define USB_PP_ULPI             0x00000020  // ULPI Present
-#define USB_PP_PHY              0x00000010  // PHY Present
-#define USB_PP_TYPE_M           0x0000000F  // Controller Type
-#define USB_PP_TYPE_0           0x00000000  // The first-generation USB
+#define USB_PP_ECNT_M           0xFF00  // Endpoint Count
+#define USB_PP_USB_M            0x00C0  // USB Capability
+#define USB_PP_USB_DEVICE       0x0040  // DEVICE
+#define USB_PP_USB_HOSTDEVICE   0x0080  // HOST
+#define USB_PP_USB_OTG          0x00C0  // OTG
+#define USB_PP_ULPI             0x0020  // ULPI Present
+#define USB_PP_PHY              0x0010  // PHY Present
+#define USB_PP_TYPE_M           0x000F  // Controller Type
+#define USB_PP_TYPE_0           0x0000  // The first-generation USB
                                             // controller
-#define USB_PP_TYPE_1           0x00000001  // The second-generation USB
+#define USB_PP_TYPE_1           0x0001  // The second-generation USB
                                             // controller revision
 #define USB_PP_ECNT_S           8
 
@@ -2758,9 +2265,9 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // The following are defines for the bit fields in the USB_O_CC register.
 //
 //*****************************************************************************
-#define USB_CC_CLKEN            0x00000200  // USB Clock Enable
-#define USB_CC_CSD              0x00000100  // Clock Source/Direction
-#define USB_CC_CLKDIV_M         0x0000000F  // PLL Clock Divisor
+#define USB_CC_CLKEN            0x0200  // USB Clock Enable
+#define USB_CC_CSD              0x0100  // Clock Source/Direction
+#define USB_CC_CLKDIV_M         0x000F  // PLL Clock Divisor
 #define USB_CC_CLKDIV_S         0
 
 #ifdef __cplusplus

From e9109f36ba873062812b37f2c40fc88bbf48af67 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 17 Aug 2024 16:34:24 +0700
Subject: [PATCH 168/204] refactor fifo configure/setup for dynamic and static
 fifo

---
 src/portable/mentor/musb/dcd_musb.c   | 86 +++++++++++++++++++++++----
 src/portable/mentor/musb/musb_max32.h | 39 ++++++------
 src/portable/mentor/musb/musb_ti.h    |  3 +
 src/portable/mentor/musb/musb_type.h  |  3 +-
 4 files changed, 101 insertions(+), 30 deletions(-)

diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index 36690c9526..e9d9078284 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -41,7 +41,6 @@ _Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
 // Following symbols must be defined by port header
 // - musb_dcd_int_enable/disable/clear/get_enable
 // - musb_dcd_int_handler_enter/exit
-// - musb_dcd_setup_fifo: Configuration of the EP's FIFO
 #if defined(TUP_USBIP_MUSB_TI)
   #include "musb_ti.h"
 #elif defined(TUP_USBIP_MUSB_ADI)
@@ -88,19 +87,78 @@ typedef struct
  *------------------------------------------------------------------*/
 static dcd_data_t _dcd;
 
+#if MUSB_CFG_DYNAMIC_FIFO
+
+// musb is configured to use dynamic FIFO sizing.
+// FF Size is encodded: 1 << (fifo_size[3:0] + 3) = 8 << fifo_size[3:0]
+// FF Address is 8*ff_addr[12:0]
+// First 64 bytes are reserved for EP0
+static uint32_t alloced_fifo_bytes;
+
 TU_ATTR_ALWAYS_INLINE static inline void fifo_reset(musb_regs_t* musb, unsigned epnum, unsigned dir_in) {
-  musb->index = epnum;
   const uint8_t is_rx = 1 - dir_in;
-
-#if MUSB_CFG_DYNAMIC_FIFO
+  musb->index = epnum;
   musb->fifo_size[is_rx] = 0;
   musb->fifo_addr[is_rx] = 0;
-#elif defined(TUP_USBIP_MUSB_ADI)
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool fifo_configure(musb_regs_t* musb, unsigned epnum, unsigned dir_in, unsigned mps) {
+  // ffsize is log2(mps) - 3 (round up)
+  uint8_t ffsize = 28 - tu_min8(28, __builtin_clz(mps));
+  // round up to the next power of 2
+  if ((8u << ffsize) < mps) {
+    ++ffsize;
+    mps = 8 << ffsize;
+  }
+
+  TU_ASSERT(alloced_fifo_bytes + mps <= MUSB_CFG_DYNAMIC_FIFO_SIZE);
+  const uint8_t is_rx = 1 - dir_in;
+  musb->index = epnum;
+  musb->fifo_addr[is_rx] = alloced_fifo_bytes / 8;
+  musb->fifo_size[is_rx] = ffsize;
+
+  alloced_fifo_bytes += mps;
+
+  return true;
+}
+
+#else
+TU_ATTR_ALWAYS_INLINE static inline void fifo_reset(musb_regs_t* musb, unsigned epnum, unsigned dir_in) {
+  const uint8_t is_rx = 1 - dir_in;
+  musb->index = epnum;
+
+  #if defined(TUP_USBIP_MUSB_ADI)
   // Analog have custom double buffered in csrh register, disable it
   musb->indexed_csr.maxp_csr[is_rx].csrh |= MUSB_CSRH_DISABLE_DOUBLE_PACKET(is_rx);
+  #else
+  // disable double bufeffered in extended register
+  #endif
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool fifo_configure(musb_regs_t* musb, unsigned epnum, unsigned dir_in, unsigned mps) {
+  (void) mps;
+  const uint8_t is_rx = 1 - dir_in;
+  musb->index = epnum;
+
+  uint8_t csrh = 0;
+
+#if defined(TUP_USBIP_MUSB_ADI)
+  csrh = MUSB_CSRH_DISABLE_DOUBLE_PACKET(is_rx);
 #endif
+
+#if MUSB_CFG_SHARED_FIFO
+  if (dir_in) {
+    csrh |= MUSB_CSRH_TX_MODE;
+  }
+#endif
+
+  musb->indexed_csr.maxp_csr[is_rx].csrh |= csrh;
+
+  return true;
 }
 
+#endif
+
 static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
 {
   volatile hw_fifo_t *reg = (volatile hw_fifo_t*)fifo;
@@ -463,6 +521,11 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
 // faddr = 0, index = 0, flushes all ep fifos, clears all ep csr, enabled all ep interrupts
 static void process_bus_reset(uint8_t rhport) {
   musb_regs_t* musb = MUSB_REGS(rhport);
+
+#if MUSB_CFG_DYNAMIC_FIFO
+  alloced_fifo_bytes = CFG_TUD_ENDPOINT0_SIZE;
+#endif
+
   /* When bmRequestType is REQUEST_TYPE_INVALID(0xFF), a control transfer state is SETUP or STATUS stage. */
   _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
   _dcd.status_out = 0;
@@ -594,8 +657,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   pipe->length    = 0;
   pipe->remaining = 0;
 
-  musb_regs_t* musb_regs = MUSB_REGS(rhport);
-  musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epn);
+  musb_regs_t* musb = MUSB_REGS(rhport);
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb, epn);
 
   const uint8_t is_rx = 1 - dir_in;
   ep_csr->maxp_csr[is_rx].maxp = mps;
@@ -606,10 +669,10 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
     csrl |= MUSB_CSRL_FLUSH_FIFO(is_rx);
   }
   ep_csr->maxp_csr[is_rx].csrl = csrl;
-  musb_regs->intren_ep[is_rx] |= TU_BIT(epn);
+  musb->intren_ep[is_rx] |= TU_BIT(epn);
 
   /* Setup FIFO */
-  musb_dcd_setup_fifo(rhport, epn, dir_in, mps);
+  fifo_configure(musb, epn, dir_in, mps);
 
   return true;
 }
@@ -619,6 +682,7 @@ void dcd_edpt_close_all(uint8_t rhport)
   musb_regs_t* musb = MUSB_REGS(rhport);
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
+
   musb->intr_txen = 1; /* Enable only EP0 */
   musb->intr_rxen = 0;
   for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
@@ -640,13 +704,15 @@ void dcd_edpt_close_all(uint8_t rhport)
 
     fifo_reset(musb, i, 0);
     fifo_reset(musb, i, 1);
-
   }
+  alloced_fifo_bytes = CFG_TUD_ENDPOINT0_SIZE;
+
   if (ie) musb_dcd_int_enable(rhport);
 }
 
 void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
 {
+  // FIXME: we should implement iso_alloc() and iso_activate()
   unsigned const epn    = tu_edpt_number(ep_addr);
   unsigned const dir_in = tu_edpt_dir(ep_addr);
   musb_regs_t* musb = MUSB_REGS(rhport);
diff --git a/src/portable/mentor/musb/musb_max32.h b/src/portable/mentor/musb/musb_max32.h
index 73f63ee2ed..1320239c92 100644
--- a/src/portable/mentor/musb/musb_max32.h
+++ b/src/portable/mentor/musb/musb_max32.h
@@ -34,7 +34,8 @@ extern "C" {
 #include "mxc_device.h"
 #include "usbhs_regs.h"
 
-#define MUSB_CFG_DYNAMIC_FIFO  0
+#define MUSB_CFG_SHARED_FIFO   1 // shared FIFO for TX and RX endpoints
+#define MUSB_CFG_DYNAMIC_FIFO  0 // dynamic EP FIFO sizing
 
 const uintptr_t MUSB_BASES[] = { MXC_BASE_USBHS };
 
@@ -141,24 +142,24 @@ static inline void musb_dcd_phy_init(uint8_t rhport) {
   hs_phy->m31_phy_ponrst = 1;
 }
 
-static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in, unsigned mps) {
-  (void) mps;
-
-  //Most likely the caller has already grabbed the right register block. But
-  //as a precaution save and restore the register bank anyways
-  unsigned saved_index = musb_periph_inst[rhport]->index;
-
-  musb_periph_inst[rhport]->index = epnum;
-
-  //Disable double buffering
-  if (dir_in) {
-    musb_periph_inst[rhport]->incsru |= (MXC_F_USBHS_INCSRU_DPKTBUFDIS | MXC_F_USBHS_INCSRU_MODE);
-  } else {
-    musb_periph_inst[rhport]->outcsru |= (MXC_F_USBHS_OUTCSRU_DPKTBUFDIS);
-  }
-
-  musb_periph_inst[rhport]->index = saved_index;
-}
+// static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in, unsigned mps) {
+//   (void) mps;
+//
+//   //Most likely the caller has already grabbed the right register block. But
+//   //as a precaution save and restore the register bank anyways
+//   unsigned saved_index = musb_periph_inst[rhport]->index;
+//
+//   musb_periph_inst[rhport]->index = epnum;
+//
+//   //Disable double buffering
+//   if (dir_in) {
+//     musb_periph_inst[rhport]->incsru |= (MXC_F_USBHS_INCSRU_DPKTBUFDIS | MXC_F_USBHS_INCSRU_MODE);
+//   } else {
+//     musb_periph_inst[rhport]->outcsru |= (MXC_F_USBHS_OUTCSRU_DPKTBUFDIS);
+//   }
+//
+//   musb_periph_inst[rhport]->index = saved_index;
+// }
 
 #endif // CFG_TUD_ENABLED
 
diff --git a/src/portable/mentor/musb/musb_ti.h b/src/portable/mentor/musb/musb_ti.h
index e43b3d3c0b..7c15b61ad7 100644
--- a/src/portable/mentor/musb/musb_ti.h
+++ b/src/portable/mentor/musb/musb_ti.h
@@ -42,6 +42,7 @@
   #error "Unsupported MCUs"
 #endif
 
+#define MUSB_CFG_SHARED_FIFO 0
 #define MUSB_CFG_DYNAMIC_FIFO  1
 #define MUSB_CFG_DYNAMIC_FIFO_SIZE 4096
 
@@ -91,6 +92,7 @@ static inline void musb_dcd_int_handler_exit(uint8_t rhport) {
   //Nothing to do for this part
 }
 
+#if 0
 typedef struct {
   uint_fast16_t beg; /* offset of including first element */
   uint_fast16_t end; /* offset of excluding the last element */
@@ -224,6 +226,7 @@ static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned
     musb_periph_inst[rhport]->RXFIFOSZ  = size_in_log2_minus3;
   }
 }
+#endif
 
 #endif // CFG_TUD_ENABLED
 
diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index ee01872708..08f26edbd4 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -261,7 +261,7 @@ typedef struct TU_ATTR_PACKED {
 
   //------------- Non-Indexed Endpoint CSRs -------------//
   // TI tm4c can access this directly, but should use indexed_csr for portability
-  musb_ep_csr_t ep_csr[16];        // 0x100-0x1FF: EP0-15 CSR
+  musb_ep_csr_t abs_csr[16];        // 0x100-0x1FF: EP0-15 CSR
 } musb_regs_t;
 
 TU_VERIFY_STATIC(sizeof(musb_regs_t) == 0x200, "size is not correct");
@@ -307,6 +307,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 
 // 0x13, 0x17: TX/RX CSRH
 #define MUSB_CSRH_DISABLE_DOUBLE_PACKET(_rx) (1u << 1)
+#define MUSB_CSRH_TX_MODE                    (1u << 5) // 1 = TX, 0 = RX. only relevant for SHARED FIFO
 
 
 //*****************************************************************************

From 993473312b390b722d8693c23310b306997f8c2b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 17 Aug 2024 17:09:38 +0700
Subject: [PATCH 169/204] minor update

---
 src/portable/mentor/musb/dcd_musb.c   | 31 ++++++++++++++++-----------
 src/portable/mentor/musb/musb_max32.h | 24 ++++-----------------
 src/portable/mentor/musb/musb_ti.h    |  5 -----
 3 files changed, 22 insertions(+), 38 deletions(-)

diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index e9d9078284..3dcb9cdf1f 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -29,6 +29,9 @@
 
 #if CFG_TUD_ENABLED && defined(TUP_USBIP_MUSB)
 
+#define MUSB_DEBUG 2
+#define MUSB_REGS(rhport)   ((musb_regs_t*) MUSB_BASES[rhport])
+
 #if __GNUC__ > 8 && defined(__ARM_FEATURE_UNALIGNED)
 /* GCC warns that an address may be unaligned, even though
  * the target CPU has the capability for unaligned memory access. */
@@ -49,10 +52,6 @@ _Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
   #error "Unsupported MCU"
 #endif
 
-#define MUSB_REGS(rhport)   ((musb_regs_t*) MUSB_BASES[rhport])
-
-#define MUSB_DEBUG 2
-
 /*------------------------------------------------------------------
  * MACRO TYPEDEF CONSTANT ENUM DECLARATION
  *------------------------------------------------------------------*/
@@ -60,9 +59,9 @@ _Pragma("GCC diagnostic ignored \"-Waddress-of-packed-member\"");
 #define REQUEST_TYPE_INVALID  (0xFFu)
 
 typedef union {
-  uint8_t   u8;
-  uint16_t  u16;
-  uint32_t  u32;
+  volatile uint8_t   u8;
+  volatile uint16_t  u16;
+  volatile uint32_t  u32;
 } hw_fifo_t;
 
 typedef struct TU_ATTR_PACKED
@@ -223,11 +222,12 @@ static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigne
 
 static void process_setup_packet(uint8_t rhport) {
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
+
+  // Read setup packet
   uint32_t *p = (void*)&_dcd.setup_packet;
   volatile uint32_t *fifo_ptr = &musb_regs->fifo[0];
-
-  p[0]        = *fifo_ptr;
-  p[1]        = *fifo_ptr;
+  p[0] = *fifo_ptr;
+  p[1] = *fifo_ptr;
 
   _dcd.pipe0.buf       = NULL;
   _dcd.pipe0.length    = 0;
@@ -407,6 +407,7 @@ static void process_ep0(uint8_t rhport)
   uint_fast8_t csrl = ep_csr->csr0l;
 
   // TU_LOG1(" EP0 ep_csr->csr0l = %x\r\n", csrl);
+  // 21.1.5: endpoint 0 service routine as peripheral
 
   if (csrl & USB_CSRL0_STALLED) {
     /* Returned STALL packet to HOST. */
@@ -705,7 +706,10 @@ void dcd_edpt_close_all(uint8_t rhport)
     fifo_reset(musb, i, 0);
     fifo_reset(musb, i, 1);
   }
+
+#if MUSB_CFG_DYNAMIC_FIFO
   alloced_fifo_bytes = CFG_TUD_ENDPOINT0_SIZE;
+#endif
 
   if (ie) musb_dcd_int_enable(rhport);
 }
@@ -822,10 +826,12 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
  * ISR
  *-------------------------------------------------------------------*/
 void dcd_int_handler(uint8_t rhport) {
+  musb_regs_t* musb_regs = MUSB_REGS(rhport);
+  const uint8_t saved_index = musb_regs->index; // save endpoint index
+
   //Part specific ISR setup/entry
   musb_dcd_int_handler_enter(rhport);
 
-  musb_regs_t* musb_regs = MUSB_REGS(rhport);
   uint_fast8_t intr_usb = musb_regs->intr_usb; // a read will clear this interrupt status
   uint_fast8_t intr_tx = musb_regs->intr_tx; // a read will clear this interrupt status
   uint_fast8_t intr_rx = musb_regs->intr_rx; // a read will clear this interrupt status
@@ -865,8 +871,7 @@ void dcd_int_handler(uint8_t rhport) {
     intr_rx &= ~TU_BIT(num);
   }
 
-  //Part specific ISR exit
-  musb_dcd_int_handler_exit(rhport);
+  musb_regs->index = saved_index; // restore endpoint index
 }
 
 #endif
diff --git a/src/portable/mentor/musb/musb_max32.h b/src/portable/mentor/musb/musb_max32.h
index 1320239c92..38e80f6806 100644
--- a/src/portable/mentor/musb/musb_max32.h
+++ b/src/portable/mentor/musb/musb_max32.h
@@ -42,11 +42,6 @@ const uintptr_t MUSB_BASES[] = { MXC_BASE_USBHS };
 #if CFG_TUD_ENABLED
 #define USBHS_M31_CLOCK_RECOVERY
 
-// Mapping of peripheral instances to port. Currently just 1.
-static mxc_usbhs_regs_t* const musb_periph_inst[] = {
-    MXC_USBHS
-};
-
 // Mapping of IRQ numbers to port. Currently just 1.
 static const IRQn_Type musb_irqs[] = {
     USB_IRQn
@@ -77,31 +72,21 @@ static inline void musb_dcd_int_clear(uint8_t rhport) {
   NVIC_ClearPendingIRQ(musb_irqs[rhport]);
 }
 
-//Used to save and restore user's register map when interrupt occurs
-static volatile unsigned isr_saved_index = 0;
-
 static inline void musb_dcd_int_handler_enter(uint8_t rhport) {
+  mxc_usbhs_regs_t* hs_phy = MXC_USBHS;
   uint32_t mxm_int, mxm_int_en, mxm_is;
 
-  //save current register index
-  isr_saved_index = musb_periph_inst[rhport]->index;
-
   //Handle PHY specific events
-  mxm_int = musb_periph_inst[rhport]->mxm_int;
-  mxm_int_en = musb_periph_inst[rhport]->mxm_int_en;
+  mxm_int = hs_phy->mxm_int;
+  mxm_int_en = hs_phy->mxm_int_en;
   mxm_is = mxm_int & mxm_int_en;
-  musb_periph_inst[rhport]->mxm_int = mxm_is;
+  hs_phy->mxm_int = mxm_is;
 
   if (mxm_is & MXC_F_USBHS_MXM_INT_NOVBUS) {
     dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true);
   }
 }
 
-static inline void musb_dcd_int_handler_exit(uint8_t rhport) {
-  //restore register index
-  musb_periph_inst[rhport]->index = isr_saved_index;
-}
-
 static inline void musb_dcd_phy_init(uint8_t rhport) {
   (void) rhport;
   mxc_usbhs_regs_t* hs_phy = MXC_USBHS;
@@ -120,7 +105,6 @@ static inline void musb_dcd_phy_init(uint8_t rhport) {
   hs_phy->m31_phy_xcfgi_95_64 = 0x1 << (72 - 64);
   hs_phy->m31_phy_xcfgi_127_96 = 0;
 
-
   #ifdef USBHS_M31_CLOCK_RECOVERY
   hs_phy->m31_phy_noncry_rstb = 1;
   hs_phy->m31_phy_noncry_en = 1;
diff --git a/src/portable/mentor/musb/musb_ti.h b/src/portable/mentor/musb/musb_ti.h
index 7c15b61ad7..680bebde7c 100644
--- a/src/portable/mentor/musb/musb_ti.h
+++ b/src/portable/mentor/musb/musb_ti.h
@@ -87,11 +87,6 @@ static inline void musb_dcd_int_handler_enter(uint8_t rhport) {
   //Nothing to do for this part
 }
 
-static inline void musb_dcd_int_handler_exit(uint8_t rhport) {
-  (void)rhport;
-  //Nothing to do for this part
-}
-
 #if 0
 typedef struct {
   uint_fast16_t beg; /* offset of including first element */

From a6bee747b6f550e4fdb144c7db4aad70fee5ac69 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 17 Aug 2024 18:07:36 +0700
Subject: [PATCH 170/204] define and use TUD_ENDPOINT_EXCLUSIVE_NUMBER

---
 .../cdc_dual_ports/src/usb_descriptors.c      | 30 +++------
 examples/device/cdc_msc/src/usb_descriptors.c | 27 +-------
 .../cdc_msc_freertos/src/usb_descriptors.c    | 28 ++++-----
 .../device/cdc_uac2/src/usb_descriptors.c     | 25 +-------
 .../src/usb_descriptors.c                     | 31 +--------
 .../device/midi_test/src/usb_descriptors.c    | 30 +++++----
 .../device/msc_dual_lun/src/usb_descriptors.c | 27 +++-----
 .../net_lwip_webserver/src/usb_descriptors.c  | 15 +++--
 .../device/uac2_headset/src/usb_descriptors.c | 26 +++-----
 .../uac2_speaker_fb/src/usb_descriptors.c     | 11 +---
 .../webusb_serial/src/usb_descriptors.c       | 63 ++++++++++---------
 src/common/tusb_mcu.h                         | 13 ++--
 12 files changed, 113 insertions(+), 213 deletions(-)

diff --git a/examples/device/cdc_dual_ports/src/usb_descriptors.c b/examples/device/cdc_dual_ports/src/usb_descriptors.c
index 808d784111..ca4fe279b6 100644
--- a/examples/device/cdc_dual_ports/src/usb_descriptors.c
+++ b/examples/device/cdc_dual_ports/src/usb_descriptors.c
@@ -98,31 +98,19 @@ enum
   #define EPNUM_CDC_1_OUT     0x05
   #define EPNUM_CDC_1_IN      0x85
 
-#elif CFG_TUSB_MCU == OPT_MCU_SAMG || CFG_TUSB_MCU ==  OPT_MCU_SAMX7X
-  // SAMG & SAME70 don't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_CDC_0_NOTIF   0x81
+#elif CFG_TUSB_MCU == OPT_MCU_CXD56
+  // CXD56 USB driver has fixed endpoint type (bulk/interrupt/iso) and direction (IN/OUT) by its number
+  // 0 control (IN/OUT), 1 Bulk (IN), 2 Bulk (OUT), 3 In (IN), 4 Bulk (IN), 5 Bulk (OUT), 6 In (IN)
+  #define EPNUM_CDC_0_NOTIF   0x83
   #define EPNUM_CDC_0_OUT     0x02
-  #define EPNUM_CDC_0_IN      0x83
+  #define EPNUM_CDC_0_IN      0x81
 
-  #define EPNUM_CDC_1_NOTIF   0x84
+  #define EPNUM_CDC_1_NOTIF   0x86
   #define EPNUM_CDC_1_OUT     0x05
-  #define EPNUM_CDC_1_IN      0x86
-
-#elif CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X
-  // FT9XX doesn't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_CDC_0_NOTIF   0x81
-  #define EPNUM_CDC_0_OUT     0x02
-  #define EPNUM_CDC_0_IN      0x83
-
-  #define EPNUM_CDC_1_NOTIF   0x84
-  #define EPNUM_CDC_1_OUT     0x05
-  #define EPNUM_CDC_1_IN      0x86
+  #define EPNUM_CDC_1_IN      0x84
 
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
-      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
-  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+  // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_0_NOTIF   0x81
   #define EPNUM_CDC_0_OUT     0x02
diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c
index fac7cce8f6..4789f5a9ba 100644
--- a/examples/device/cdc_msc/src/usb_descriptors.c
+++ b/examples/device/cdc_msc/src/usb_descriptors.c
@@ -93,19 +93,7 @@ enum {
   #define EPNUM_MSC_OUT     0x05
   #define EPNUM_MSC_IN      0x85
 
-#elif CFG_TUSB_MCU == OPT_MCU_SAMG || CFG_TUSB_MCU == OPT_MCU_SAMX7X
-  // SAMG & SAME70 don't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_CDC_NOTIF   0x81
-  #define EPNUM_CDC_OUT     0x02
-  #define EPNUM_CDC_IN      0x83
-
-  #define EPNUM_MSC_OUT     0x04
-  #define EPNUM_MSC_IN      0x85
-
 #elif CFG_TUSB_MCU == OPT_MCU_CXD56
-  // CXD56 doesn't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
   // CXD56 USB driver has fixed endpoint type (bulk/interrupt/iso) and direction (IN/OUT) by its number
   // 0 control (IN/OUT), 1 Bulk (IN), 2 Bulk (OUT), 3 In (IN), 4 Bulk (IN), 5 Bulk (OUT), 6 In (IN)
   #define EPNUM_CDC_NOTIF   0x83
@@ -115,19 +103,8 @@ enum {
   #define EPNUM_MSC_OUT     0x05
   #define EPNUM_MSC_IN      0x84
 
-#elif CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X
-  // FT9XX doesn't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_CDC_NOTIF   0x81
-  #define EPNUM_CDC_OUT     0x02
-  #define EPNUM_CDC_IN      0x83
-
-  #define EPNUM_MSC_OUT     0x04
-  #define EPNUM_MSC_IN      0x85
-
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
-      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
-  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+  // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_NOTIF   0x81
   #define EPNUM_CDC_OUT     0x02
diff --git a/examples/device/cdc_msc_freertos/src/usb_descriptors.c b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
index 917b73e10a..7f9338753f 100644
--- a/examples/device/cdc_msc_freertos/src/usb_descriptors.c
+++ b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
@@ -42,8 +42,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
-{
+tusb_desc_device_t const desc_device = {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = USB_BCD,
@@ -69,8 +68,7 @@ tusb_desc_device_t const desc_device =
 
 // Invoked when received GET DEVICE DESCRIPTOR
 // Application return pointer to descriptor
-uint8_t const * tud_descriptor_device_cb(void)
-{
+uint8_t const *tud_descriptor_device_cb(void) {
   return (uint8_t const *) &desc_device;
 }
 
@@ -78,8 +76,7 @@ uint8_t const * tud_descriptor_device_cb(void)
 // Configuration Descriptor
 //--------------------------------------------------------------------+
 
-enum
-{
+enum {
   ITF_NUM_CDC = 0,
   ITF_NUM_CDC_DATA,
   ITF_NUM_MSC,
@@ -96,19 +93,18 @@ enum
   #define EPNUM_MSC_OUT     0x05
   #define EPNUM_MSC_IN      0x85
 
-#elif CFG_TUSB_MCU == OPT_MCU_SAMG
-  // SAMG doesn't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_CDC_NOTIF   0x81
+#elif CFG_TUSB_MCU == OPT_MCU_CXD56
+  // CXD56 USB driver has fixed endpoint type (bulk/interrupt/iso) and direction (IN/OUT) by its number
+  // 0 control (IN/OUT), 1 Bulk (IN), 2 Bulk (OUT), 3 In (IN), 4 Bulk (IN), 5 Bulk (OUT), 6 In (IN)
+  #define EPNUM_CDC_NOTIF   0x83
   #define EPNUM_CDC_OUT     0x02
-  #define EPNUM_CDC_IN      0x83
+  #define EPNUM_CDC_IN      0x81
 
-  #define EPNUM_MSC_OUT     0x04
-  #define EPNUM_MSC_IN      0x85
+  #define EPNUM_MSC_OUT     0x05
+  #define EPNUM_MSC_IN      0x84
 
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
-      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
-  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+  // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_NOTIF   0x81
   #define EPNUM_CDC_OUT     0x02
diff --git a/examples/device/cdc_uac2/src/usb_descriptors.c b/examples/device/cdc_uac2/src/usb_descriptors.c
index ab1a2ee839..6384f722ae 100644
--- a/examples/device/cdc_uac2/src/usb_descriptors.c
+++ b/examples/device/cdc_uac2/src/usb_descriptors.c
@@ -97,29 +97,8 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_CDC_OUT     0x02
   #define EPNUM_CDC_IN      0x82
 
-#elif CFG_TUSB_MCU == OPT_MCU_SAMG  || CFG_TUSB_MCU ==  OPT_MCU_SAMX7X
-  // SAMG & SAME70 don't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_AUDIO_IN    0x01
-  #define EPNUM_AUDIO_OUT   0x02
-
-  #define EPNUM_CDC_NOTIF   0x83
-  #define EPNUM_CDC_OUT     0x04
-  #define EPNUM_CDC_IN      0x85
-
-#elif CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X
-  // FT9XX doesn't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_AUDIO_IN    0x01
-  #define EPNUM_AUDIO_OUT   0x02
-
-  #define EPNUM_CDC_NOTIF   0x83
-  #define EPNUM_CDC_OUT     0x04
-  #define EPNUM_CDC_IN      0x85
-
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
-      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
-  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+  // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_AUDIO_IN    0x01
   #define EPNUM_AUDIO_OUT   0x02
diff --git a/examples/device/dynamic_configuration/src/usb_descriptors.c b/examples/device/dynamic_configuration/src/usb_descriptors.c
index 20f2371559..7be3d7da52 100644
--- a/examples/device/dynamic_configuration/src/usb_descriptors.c
+++ b/examples/device/dynamic_configuration/src/usb_descriptors.c
@@ -132,35 +132,8 @@ enum
   #define EPNUM_1_MSC_OUT     0x02
   #define EPNUM_1_MSC_IN      0x82
 
-#elif CFG_TUSB_MCU == OPT_MCU_SAMG
-  // SAMG doesn't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_0_CDC_NOTIF   0x81
-  #define EPNUM_0_CDC_OUT     0x02
-  #define EPNUM_0_CDC_IN      0x83
-
-  #define EPNUM_0_MIDI_OUT    0x04
-  #define EPNUM_0_MIDI_IN     0x85
-
-  #define EPNUM_1_MSC_OUT     0x01
-  #define EPNUM_1_MSC_IN      0x82
-
-#elif CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X
-  // FT9XX doesn't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_0_CDC_NOTIF   0x81
-  #define EPNUM_0_CDC_OUT     0x02
-  #define EPNUM_0_CDC_IN      0x83
-
-  #define EPNUM_0_MIDI_OUT    0x04
-  #define EPNUM_0_MIDI_IN     0x85
-
-  #define EPNUM_1_MSC_OUT     0x01
-  #define EPNUM_1_MSC_IN      0x82
-
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
-      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
-  // FT9XX doesn't support a same endpoint number with different direction IN and OUT
+#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+  // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_0_CDC_NOTIF   0x81
   #define EPNUM_0_CDC_OUT     0x02
diff --git a/examples/device/midi_test/src/usb_descriptors.c b/examples/device/midi_test/src/usb_descriptors.c
index 41e6e18186..3511f7eba0 100644
--- a/examples/device/midi_test/src/usb_descriptors.c
+++ b/examples/device/midi_test/src/usb_descriptors.c
@@ -84,20 +84,24 @@ enum
 #if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX
   // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
   // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
-  #define EPNUM_MIDI_OUT   0x02
-  #define EPNUM_MIDI_IN   0x02
-#elif CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X
-  // On Bridgetek FT9xx endpoint numbers must be unique...
-  #define EPNUM_MIDI_OUT   0x02
-  #define EPNUM_MIDI_IN   0x03
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
-      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
-  // On MAX32 endpoint numbers must be unique...
-  #define EPNUM_MIDI_OUT   0x02
-  #define EPNUM_MIDI_IN   0x03
+  #define EPNUM_MIDI_OUT  0x02
+  #define EPNUM_MIDI_IN   0x82
+
+#elif CFG_TUSB_MCU == OPT_MCU_CXD56
+  // CXD56 USB driver has fixed endpoint type (bulk/interrupt/iso) and direction (IN/OUT) by its number
+  // 0 control (IN/OUT), 1 Bulk (IN), 2 Bulk (OUT), 3 In (IN), 4 Bulk (IN), 5 Bulk (OUT), 6 In (IN)
+  #define EPNUM_MIDI_OUT  0x02
+  #define EPNUM_MIDI_IN   0x81
+
+#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+  // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_MIDI_OUT  0x01
+  #define EPNUM_MIDI_IN   0x82
+
 #else
-  #define EPNUM_MIDI_OUT   0x01
-  #define EPNUM_MIDI_IN   0x01
+  #define EPNUM_MIDI_OUT  0x01
+  #define EPNUM_MIDI_IN   0x81
 #endif
 
 uint8_t const desc_fs_configuration[] =
diff --git a/examples/device/msc_dual_lun/src/usb_descriptors.c b/examples/device/msc_dual_lun/src/usb_descriptors.c
index c55bab0d89..bc2f2577c9 100644
--- a/examples/device/msc_dual_lun/src/usb_descriptors.c
+++ b/examples/device/msc_dual_lun/src/usb_descriptors.c
@@ -85,24 +85,17 @@ enum
   #define EPNUM_MSC_OUT   0x02
   #define EPNUM_MSC_IN    0x82
 
-#elif CFG_TUSB_MCU == OPT_MCU_SAMG
-  // SAMG doesn't support a same endpoint number with different direction IN and OUT
-  //  e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_MSC_OUT   0x01
-  #define EPNUM_MSC_IN    0x82
-
-#elif CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X
-  // FT9XX doesn't support a same endpoint number with different direction IN and OUT
+#elif CFG_TUSB_MCU == OPT_MCU_CXD56
+  // CXD56 USB driver has fixed endpoint type (bulk/interrupt/iso) and direction (IN/OUT) by its number
+  // 0 control (IN/OUT), 1 Bulk (IN), 2 Bulk (OUT), 3 In (IN), 4 Bulk (IN), 5 Bulk (OUT), 6 In (IN)
+  #define EPNUM_MSC_OUT  0x02
+  #define EPNUM_MSC_IN   0x81
+
+#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+  // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_MSC_OUT   0x01
-  #define EPNUM_MSC_IN    0x82
-
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
-      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
-  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_MSC_OUT   0x01
-  #define EPNUM_MSC_IN    0x82
+  #define EPNUM_MSC_OUT  0x01
+  #define EPNUM_MSC_IN   0x82
 
 #else
   #define EPNUM_MSC_OUT   0x01
diff --git a/examples/device/net_lwip_webserver/src/usb_descriptors.c b/examples/device/net_lwip_webserver/src/usb_descriptors.c
index 012e1bcd84..2a3061162b 100644
--- a/examples/device/net_lwip_webserver/src/usb_descriptors.c
+++ b/examples/device/net_lwip_webserver/src/usb_descriptors.c
@@ -113,16 +113,15 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_NET_OUT     0x02
   #define EPNUM_NET_IN      0x82
 
-#elif CFG_TUSB_MCU == OPT_MCU_SAMG  || CFG_TUSB_MCU ==  OPT_MCU_SAMX7X
-  // SAMG & SAME70 don't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_NET_NOTIF   0x81
+#elif CFG_TUSB_MCU == OPT_MCU_CXD56
+  // CXD56 USB driver has fixed endpoint type (bulk/interrupt/iso) and direction (IN/OUT) by its number
+  // 0 control (IN/OUT), 1 Bulk (IN), 2 Bulk (OUT), 3 In (IN), 4 Bulk (IN), 5 Bulk (OUT), 6 In (IN)
+  #define EPNUM_NET_NOTIF   0x83
   #define EPNUM_NET_OUT     0x02
-  #define EPNUM_NET_IN      0x83
+  #define EPNUM_NET_IN      0x81
 
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
-      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
-  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+  // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_NET_NOTIF   0x81
   #define EPNUM_NET_OUT     0x02
diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c
index a042ad206f..e8dc5ec151 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.c
+++ b/examples/device/uac2_headset/src/usb_descriptors.c
@@ -84,29 +84,21 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_AUDIO_OUT   0x03
   #define EPNUM_AUDIO_INT   0x01
 
+#elif CFG_TUSB_MCU == OPT_MCU_CXD56
+  // CXD56 USB driver has fixed endpoint type (bulk/interrupt/iso) and direction (IN/OUT) by its number
+  // 0 control (IN/OUT), 1 Bulk (IN), 2 Bulk (OUT), 3 In (IN), 4 Bulk (IN), 5 Bulk (OUT), 6 In (IN)
+  // #define EPNUM_AUDIO_IN    0x01
+  // #define EPNUM_AUDIO_OUT   0x02
+  // #define EPNUM_AUDIO_INT   0x03
+
 #elif CFG_TUSB_MCU == OPT_MCU_NRF5X
   // ISO endpoints for NRF5x are fixed to 0x08 (0x88)
   #define EPNUM_AUDIO_IN    0x08
   #define EPNUM_AUDIO_OUT   0x08
   #define EPNUM_AUDIO_INT   0x01
 
-#elif CFG_TUSB_MCU == OPT_MCU_SAMG  || CFG_TUSB_MCU ==  OPT_MCU_SAMX7X
-  // SAMG & SAME70 don't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_AUDIO_IN    0x01
-  #define EPNUM_AUDIO_OUT   0x02
-  #define EPNUM_AUDIO_INT   0x03
-
-#elif CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X
-  // FT9XX doesn't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_AUDIO_IN    0x01
-  #define EPNUM_AUDIO_OUT   0x02
-  #define EPNUM_AUDIO_INT   0x03
-
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
-      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
-  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+  // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_AUDIO_IN    0x01
   #define EPNUM_AUDIO_OUT   0x02
diff --git a/examples/device/uac2_speaker_fb/src/usb_descriptors.c b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
index 31c5e116d2..aadeb7e8a9 100644
--- a/examples/device/uac2_speaker_fb/src/usb_descriptors.c
+++ b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
@@ -131,15 +131,8 @@ uint8_t const * tud_hid_descriptor_report_cb(uint8_t itf)
   #define EPNUM_AUDIO_OUT   0x08
   #define EPNUM_DEBUG       0x01
 
-#elif CFG_TUSB_MCU == OPT_MCU_SAMG  || CFG_TUSB_MCU ==  OPT_MCU_SAMX7X
-  // SAMG & SAME70 don't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_AUDIO_FB    0x01
-  #define EPNUM_AUDIO_OUT   0x02
-  #define EPNUM_DEBUG       0x03
-
-#elif CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X
-  // FT9XX doesn't support a same endpoint number with different direction IN and OUT
+#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+  // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_AUDIO_FB    0x01
   #define EPNUM_AUDIO_OUT   0x02
diff --git a/examples/device/webusb_serial/src/usb_descriptors.c b/examples/device/webusb_serial/src/usb_descriptors.c
index ae1051af61..2ff6d9ced8 100644
--- a/examples/device/webusb_serial/src/usb_descriptors.c
+++ b/examples/device/webusb_serial/src/usb_descriptors.c
@@ -87,37 +87,40 @@ enum
 #if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX
   // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
   // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
-  #define EPNUM_CDC_IN     2
-  #define EPNUM_CDC_OUT    2
-  #define EPNUM_VENDOR_IN  5
-  #define EPNUM_VENDOR_OUT 5
-#elif CFG_TUSB_MCU == OPT_MCU_SAMG || CFG_TUSB_MCU ==  OPT_MCU_SAMX7X
-  // SAMG & SAME70 don't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_CDC_IN     2
-  #define EPNUM_CDC_OUT    3
-  #define EPNUM_VENDOR_IN  4
-  #define EPNUM_VENDOR_OUT 5
-#elif CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X
-  // FT9XX doesn't support a same endpoint number with different direction IN and OUT
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_CDC_IN     2
-  #define EPNUM_CDC_OUT    3
-  #define EPNUM_VENDOR_IN  4
-  #define EPNUM_VENDOR_OUT 5
-#elif CFG_TUSB_MCU == OPT_MCU_MAX32690 || CFG_TUSB_MCU == OPT_MCU_MAX32650 || \
-      CFG_TUSB_MCU == OPT_MCU_MAX32666 || CFG_TUSB_MCU == OPT_MCU_MAX78002
-  // MAX32 doesn't support a same endpoint number with different direction IN and OUT
+  #define EPNUM_CDC_NOTIF  0x81
+  #define EPNUM_CDC_OUT    0x02
+  #define EPNUM_CDC_IN     0x82
+
+  #define EPNUM_VENDOR_OUT 0x05
+  #define EPNUM_VENDOR_IN  0x85
+
+#elif CFG_TUSB_MCU == OPT_MCU_CXD56
+  // CXD56 USB driver has fixed endpoint type (bulk/interrupt/iso) and direction (IN/OUT) by its number
+  // 0 control (IN/OUT), 1 Bulk (IN), 2 Bulk (OUT), 3 In (IN), 4 Bulk (IN), 5 Bulk (OUT), 6 In (IN)
+  #define EPNUM_CDC_NOTIF   0x83
+  #define EPNUM_CDC_OUT     0x02
+  #define EPNUM_CDC_IN      0x81
+
+  #define EPNUM_VENDOR_OUT  0x05
+  #define EPNUM_VENDOR_IN   0x84
+
+#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+  // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_CDC_IN     2
-  #define EPNUM_CDC_OUT    3
-  #define EPNUM_VENDOR_IN  4
-  #define EPNUM_VENDOR_OUT 5
+  #define EPNUM_CDC_NOTIF   0x81
+  #define EPNUM_CDC_OUT     0x02
+  #define EPNUM_CDC_IN      0x83
+
+  #define EPNUM_VENDOR_OUT  0x04
+  #define EPNUM_VENDOR_IN   0x85
+
 #else
-  #define EPNUM_CDC_IN     2
-  #define EPNUM_CDC_OUT    2
-  #define EPNUM_VENDOR_IN  3
-  #define EPNUM_VENDOR_OUT 3
+  #define EPNUM_CDC_NOTIF   0x81
+  #define EPNUM_CDC_OUT     0x02
+  #define EPNUM_CDC_IN      0x82
+
+  #define EPNUM_VENDOR_OUT  0x03
+  #define EPNUM_VENDOR_IN   0x83
 #endif
 
 uint8_t const desc_configuration[] =
@@ -126,7 +129,7 @@ uint8_t const desc_configuration[] =
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
   // Interface number, string index, EP notification address and size, EP data address (out, in) and size.
-  TUD_CDC_DESCRIPTOR(ITF_NUM_CDC, 4, 0x81, 8, EPNUM_CDC_OUT, 0x80 | EPNUM_CDC_IN, TUD_OPT_HIGH_SPEED ? 512 : 64),
+  TUD_CDC_DESCRIPTOR(ITF_NUM_CDC, 4, EPNUM_CDC_NOTIF, 8, EPNUM_CDC_OUT, 0x80 | EPNUM_CDC_IN, TUD_OPT_HIGH_SPEED ? 512 : 64),
 
   // Interface number, string index, EP Out & IN address, EP size
   TUD_VENDOR_DESCRIPTOR(ITF_NUM_VENDOR, 5, EPNUM_VENDOR_OUT, 0x80 | EPNUM_VENDOR_IN, TUD_OPT_HIGH_SPEED ? 512 : 64)
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 0180fc466f..b7cbd83df7 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -138,21 +138,21 @@
 
 #elif TU_CHECK_MCU(OPT_MCU_SAMG)
   #define TUP_DCD_ENDPOINT_MAX    6
-  #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
+  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
 
 #elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
   #define TUP_DCD_ENDPOINT_MAX    10
   #define TUP_RHPORT_HIGHSPEED    1
-  #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
+  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
 
 #elif TU_CHECK_MCU(OPT_MCU_PIC32MZ)
   #define TUP_DCD_ENDPOINT_MAX    8
-  #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
+  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
 
 #elif TU_CHECK_MCU(OPT_MCU_PIC32MX, OPT_MCU_PIC32MM, OPT_MCU_PIC32MK) || \
       TU_CHECK_MCU(OPT_MCU_PIC24, OPT_MCU_DSPIC33)
   #define TUP_DCD_ENDPOINT_MAX    16
-  #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
+  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
 
 //--------------------------------------------------------------------+
 // ST
@@ -299,7 +299,7 @@
 #elif TU_CHECK_MCU(OPT_MCU_CXD56)
   #define TUP_DCD_ENDPOINT_MAX    7
   #define TUP_RHPORT_HIGHSPEED    1
-  #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
+  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
 
 //--------------------------------------------------------------------+
 // TI
@@ -400,10 +400,12 @@
 #elif TU_CHECK_MCU(OPT_MCU_FT90X)
   #define TUP_DCD_ENDPOINT_MAX    8
   #define TUP_RHPORT_HIGHSPEED    1
+  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
 
 #elif TU_CHECK_MCU(OPT_MCU_FT93X)
   #define TUP_DCD_ENDPOINT_MAX    16
   #define TUP_RHPORT_HIGHSPEED    1
+  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
 
 //--------------------------------------------------------------------+
 // Allwinner
@@ -478,6 +480,7 @@
   #define TUP_USBIP_MUSB_ADI
   #define TUP_DCD_ENDPOINT_MAX    12
   #define TUP_RHPORT_HIGHSPEED    1
+  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
 
 #endif
 

From 123830c1f00813d86d0405dc7a5624ccb1220a31 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 17 Aug 2024 19:06:19 +0700
Subject: [PATCH 171/204] remove unused register def

---
 src/portable/mentor/musb/musb_type.h | 1594 +-------------------------
 1 file changed, 59 insertions(+), 1535 deletions(-)

diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index 08f26edbd4..619eb01081 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -262,9 +262,37 @@ typedef struct TU_ATTR_PACKED {
   //------------- Non-Indexed Endpoint CSRs -------------//
   // TI tm4c can access this directly, but should use indexed_csr for portability
   musb_ep_csr_t abs_csr[16];        // 0x100-0x1FF: EP0-15 CSR
+
+  //------------- DMA -------------//
+  __IO uint8_t dma_intr;             // 0x200: DMA_INTR
+  __R  uint8_t rsv_0x201_0x203[3];   // 0x201-0x203: Reserved
+  struct {
+    __IO uint16_t cntl;             // 0x204: DMA_CNTL
+    __IO uint16_t rsv_0x206;        // 0x206: Reserved
+    __IO uint32_t addr;             // 0x208: DMA_ADDR
+    __IO uint32_t count;            // 0x20C: DMA_COUNT
+    __IO uint32_t rsv_0x210;        // 0x210: Reserved
+  }dma[8];
+  __R  uint32_t rsv_0x284_0x2FF[31]; // 0x284-0x2FF: Reserved
+
+  //------------- Extended -------------//
+  __R uint32_t rsv_0x300;           // 0x300: Reserved
+  struct {
+    __IO uint16_t count;            // 0x304: REQ_PACKET_COUNT
+    __R  uint16_t rsv_0x306;        // 0x306: Reserved
+  }req_packet[15];
+
+  __IO uint16_t rx_doulbe_packet_disable; // 0x340: RX_DOUBLE_PACKET_DISABLE
+  __IO uint16_t tx_double_packet_disable; // 0x342: TX_DOUBLE_PACKET_DISABLE
+
+  __IO uint16_t chirp_timeout;            // 0x344: CHIRP_TIMEOUT
+  __IO uint16_t hs_to_utm;                // 0x346: HS_TO_UTM delay
+  __IO uint16_t hs_timeout_adder;         // 0x348: HS_TIMEOUT_ADDER
+
+  __R uint8_t rsv_34A_34f[6];             // 0x34A-0x34F: Reserved
 } musb_regs_t;
 
-TU_VERIFY_STATIC(sizeof(musb_regs_t) == 0x200, "size is not correct");
+TU_VERIFY_STATIC(sizeof(musb_regs_t) == 0x350, "size is not correct");
 
 //--------------------------------------------------------------------+
 // Helper
@@ -566,14 +594,6 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 #define USB_CSRH0_DT            0x0002  // Data Toggle
 #define USB_CSRH0_FLUSH         0x0001  // Flush FIFO
 
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_COUNT0 register.
-//
-//*****************************************************************************
-#define USB_COUNT0_COUNT_M      0x007F  // FIFO Count
-#define USB_COUNT0_COUNT_S      0
-
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TYPE0 register.
@@ -592,14 +612,6 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 #define USB_NAKLMT_NAKLMT_M     0x001F  // EP0 NAK Limit
 #define USB_NAKLMT_NAKLMT_S     0
 
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXMAXP1 register.
-//
-//*****************************************************************************
-#define USB_TXMAXP1_MAXLOAD_M   0x07FF  // Maximum Payload
-#define USB_TXMAXP1_MAXLOAD_S   0
-
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_TXCSRL1 register.
@@ -630,14 +642,6 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 #define USB_TXCSRH1_DTWE        0x0002  // Data Toggle Write Enable
 #define USB_TXCSRH1_DT          0x0001  // Data Toggle
 
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXMAXP1 register.
-//
-//*****************************************************************************
-#define USB_RXMAXP1_MAXLOAD_M   0x07FF  // Maximum Payload
-#define USB_RXMAXP1_MAXLOAD_S   0
-
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the USB_O_RXCSRL1 register.
@@ -669,16 +673,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 #define USB_RXCSRH1_DMAMOD      0x0008  // DMA Request Mode
 #define USB_RXCSRH1_DTWE        0x0004  // Data Toggle Write Enable
 #define USB_RXCSRH1_DT          0x0002  // Data Toggle
-#define USB_RXCSRH1_INCOMPRX    0x0001  // Incomplete RX Transmission
-                                            // Status
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCOUNT1 register.
-//
-//*****************************************************************************
-#define USB_RXCOUNT1_COUNT_M    0x1FFF  // Receive Packet Count
-#define USB_RXCOUNT1_COUNT_S    0
+#define USB_RXCSRH1_INCOMPRX    0x0001  // Incomplete RX Transmission Status
 
 //*****************************************************************************
 //
@@ -740,1537 +735,66 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_TXMAXP2 register.
-//
-//*****************************************************************************
-#define USB_TXMAXP2_MAXLOAD_M   0x07FF  // Maximum Payload
-#define USB_TXMAXP2_MAXLOAD_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXCSRL2 register.
-//
-//*****************************************************************************
-#define USB_TXCSRL2_NAKTO       0x0080  // NAK Timeout
-#define USB_TXCSRL2_CLRDT       0x0040  // Clear Data Toggle
-#define USB_TXCSRL2_STALLED     0x0020  // Endpoint Stalled
-#define USB_TXCSRL2_SETUP       0x0010  // Setup Packet
-#define USB_TXCSRL2_STALL       0x0010  // Send STALL
-#define USB_TXCSRL2_FLUSH       0x0008  // Flush FIFO
-#define USB_TXCSRL2_ERROR       0x0004  // Error
-#define USB_TXCSRL2_UNDRN       0x0004  // Underrun
-#define USB_TXCSRL2_FIFONE      0x0002  // FIFO Not Empty
-#define USB_TXCSRL2_TXRDY       0x0001  // Transmit Packet Ready
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXCSRH2 register.
-//
-//*****************************************************************************
-#define USB_TXCSRH2_AUTOSET     0x0080  // Auto Set
-#define USB_TXCSRH2_ISO         0x0040  // Isochronous Transfers
-#define USB_TXCSRH2_MODE        0x0020  // Mode
-#define USB_TXCSRH2_DMAEN       0x0010  // DMA Request Enable
-#define USB_TXCSRH2_FDT         0x0008  // Force Data Toggle
-#define USB_TXCSRH2_DMAMOD      0x0004  // DMA Request Mode
-#define USB_TXCSRH2_DTWE        0x0002  // Data Toggle Write Enable
-#define USB_TXCSRH2_DT          0x0001  // Data Toggle
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXMAXP2 register.
-//
-//*****************************************************************************
-#define USB_RXMAXP2_MAXLOAD_M   0x07FF  // Maximum Payload
-#define USB_RXMAXP2_MAXLOAD_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCSRL2 register.
-//
-//*****************************************************************************
-#define USB_RXCSRL2_CLRDT       0x0080  // Clear Data Toggle
-#define USB_RXCSRL2_STALLED     0x0040  // Endpoint Stalled
-#define USB_RXCSRL2_REQPKT      0x0020  // Request Packet
-#define USB_RXCSRL2_STALL       0x0020  // Send STALL
-#define USB_RXCSRL2_FLUSH       0x0010  // Flush FIFO
-#define USB_RXCSRL2_DATAERR     0x0008  // Data Error
-#define USB_RXCSRL2_NAKTO       0x0008  // NAK Timeout
-#define USB_RXCSRL2_ERROR       0x0004  // Error
-#define USB_RXCSRL2_OVER        0x0004  // Overrun
-#define USB_RXCSRL2_FULL        0x0002  // FIFO Full
-#define USB_RXCSRL2_RXRDY       0x0001  // Receive Packet Ready
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCSRH2 register.
-//
-//*****************************************************************************
-#define USB_RXCSRH2_AUTOCL      0x0080  // Auto Clear
-#define USB_RXCSRH2_AUTORQ      0x0040  // Auto Request
-#define USB_RXCSRH2_ISO         0x0040  // Isochronous Transfers
-#define USB_RXCSRH2_DMAEN       0x0020  // DMA Request Enable
-#define USB_RXCSRH2_DISNYET     0x0010  // Disable NYET
-#define USB_RXCSRH2_PIDERR      0x0010  // PID Error
-#define USB_RXCSRH2_DMAMOD      0x0008  // DMA Request Mode
-#define USB_RXCSRH2_DTWE        0x0004  // Data Toggle Write Enable
-#define USB_RXCSRH2_DT          0x0002  // Data Toggle
-#define USB_RXCSRH2_INCOMPRX    0x0001  // Incomplete RX Transmission
-                                            // Status
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCOUNT2 register.
-//
-//*****************************************************************************
-#define USB_RXCOUNT2_COUNT_M    0x1FFF  // Receive Packet Count
-#define USB_RXCOUNT2_COUNT_S    0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXTYPE2 register.
-//
-//*****************************************************************************
-#define USB_TXTYPE2_SPEED_M     0x00C0  // Operating Speed
-#define USB_TXTYPE2_SPEED_DFLT  0x0000  // Default
-#define USB_TXTYPE2_SPEED_HIGH  0x0040  // High
-#define USB_TXTYPE2_SPEED_FULL  0x0080  // Full
-#define USB_TXTYPE2_SPEED_LOW   0x00C0  // Low
-#define USB_TXTYPE2_PROTO_M     0x0030  // Protocol
-#define USB_TXTYPE2_PROTO_CTRL  0x0000  // Control
-#define USB_TXTYPE2_PROTO_ISOC  0x0010  // Isochronous
-#define USB_TXTYPE2_PROTO_BULK  0x0020  // Bulk
-#define USB_TXTYPE2_PROTO_INT   0x0030  // Interrupt
-#define USB_TXTYPE2_TEP_M       0x000F  // Target Endpoint Number
-#define USB_TXTYPE2_TEP_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXINTERVAL2
-// register.
-//
-//*****************************************************************************
-#define USB_TXINTERVAL2_TXPOLL_M 0x00FF  // TX Polling
-#define USB_TXINTERVAL2_NAKLMT_M 0x00FF  // NAK Limit
-#define USB_TXINTERVAL2_NAKLMT_S 0
-#define USB_TXINTERVAL2_TXPOLL_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXTYPE2 register.
-//
-//*****************************************************************************
-#define USB_RXTYPE2_SPEED_M     0x00C0  // Operating Speed
-#define USB_RXTYPE2_SPEED_DFLT  0x0000  // Default
-#define USB_RXTYPE2_SPEED_HIGH  0x0040  // High
-#define USB_RXTYPE2_SPEED_FULL  0x0080  // Full
-#define USB_RXTYPE2_SPEED_LOW   0x00C0  // Low
-#define USB_RXTYPE2_PROTO_M     0x0030  // Protocol
-#define USB_RXTYPE2_PROTO_CTRL  0x0000  // Control
-#define USB_RXTYPE2_PROTO_ISOC  0x0010  // Isochronous
-#define USB_RXTYPE2_PROTO_BULK  0x0020  // Bulk
-#define USB_RXTYPE2_PROTO_INT   0x0030  // Interrupt
-#define USB_RXTYPE2_TEP_M       0x000F  // Target Endpoint Number
-#define USB_RXTYPE2_TEP_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXINTERVAL2
-// register.
-//
-//*****************************************************************************
-#define USB_RXINTERVAL2_TXPOLL_M 0x00FF  // RX Polling
-#define USB_RXINTERVAL2_NAKLMT_M 0x00FF  // NAK Limit
-#define USB_RXINTERVAL2_TXPOLL_S 0
-#define USB_RXINTERVAL2_NAKLMT_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXMAXP3 register.
-//
-//*****************************************************************************
-#define USB_TXMAXP3_MAXLOAD_M   0x07FF  // Maximum Payload
-#define USB_TXMAXP3_MAXLOAD_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXCSRL3 register.
-//
-//*****************************************************************************
-#define USB_TXCSRL3_NAKTO       0x0080  // NAK Timeout
-#define USB_TXCSRL3_CLRDT       0x0040  // Clear Data Toggle
-#define USB_TXCSRL3_STALLED     0x0020  // Endpoint Stalled
-#define USB_TXCSRL3_SETUP       0x0010  // Setup Packet
-#define USB_TXCSRL3_STALL       0x0010  // Send STALL
-#define USB_TXCSRL3_FLUSH       0x0008  // Flush FIFO
-#define USB_TXCSRL3_ERROR       0x0004  // Error
-#define USB_TXCSRL3_UNDRN       0x0004  // Underrun
-#define USB_TXCSRL3_FIFONE      0x0002  // FIFO Not Empty
-#define USB_TXCSRL3_TXRDY       0x0001  // Transmit Packet Ready
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXCSRH3 register.
-//
-//*****************************************************************************
-#define USB_TXCSRH3_AUTOSET     0x0080  // Auto Set
-#define USB_TXCSRH3_ISO         0x0040  // Isochronous Transfers
-#define USB_TXCSRH3_MODE        0x0020  // Mode
-#define USB_TXCSRH3_DMAEN       0x0010  // DMA Request Enable
-#define USB_TXCSRH3_FDT         0x0008  // Force Data Toggle
-#define USB_TXCSRH3_DMAMOD      0x0004  // DMA Request Mode
-#define USB_TXCSRH3_DTWE        0x0002  // Data Toggle Write Enable
-#define USB_TXCSRH3_DT          0x0001  // Data Toggle
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXMAXP3 register.
-//
-//*****************************************************************************
-#define USB_RXMAXP3_MAXLOAD_M   0x07FF  // Maximum Payload
-#define USB_RXMAXP3_MAXLOAD_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCSRL3 register.
-//
-//*****************************************************************************
-#define USB_RXCSRL3_CLRDT       0x0080  // Clear Data Toggle
-#define USB_RXCSRL3_STALLED     0x0040  // Endpoint Stalled
-#define USB_RXCSRL3_STALL       0x0020  // Send STALL
-#define USB_RXCSRL3_REQPKT      0x0020  // Request Packet
-#define USB_RXCSRL3_FLUSH       0x0010  // Flush FIFO
-#define USB_RXCSRL3_DATAERR     0x0008  // Data Error
-#define USB_RXCSRL3_NAKTO       0x0008  // NAK Timeout
-#define USB_RXCSRL3_ERROR       0x0004  // Error
-#define USB_RXCSRL3_OVER        0x0004  // Overrun
-#define USB_RXCSRL3_FULL        0x0002  // FIFO Full
-#define USB_RXCSRL3_RXRDY       0x0001  // Receive Packet Ready
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCSRH3 register.
-//
-//*****************************************************************************
-#define USB_RXCSRH3_AUTOCL      0x0080  // Auto Clear
-#define USB_RXCSRH3_AUTORQ      0x0040  // Auto Request
-#define USB_RXCSRH3_ISO         0x0040  // Isochronous Transfers
-#define USB_RXCSRH3_DMAEN       0x0020  // DMA Request Enable
-#define USB_RXCSRH3_DISNYET     0x0010  // Disable NYET
-#define USB_RXCSRH3_PIDERR      0x0010  // PID Error
-#define USB_RXCSRH3_DMAMOD      0x0008  // DMA Request Mode
-#define USB_RXCSRH3_DTWE        0x0004  // Data Toggle Write Enable
-#define USB_RXCSRH3_DT          0x0002  // Data Toggle
-#define USB_RXCSRH3_INCOMPRX    0x0001  // Incomplete RX Transmission
-                                            // Status
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCOUNT3 register.
-//
-//*****************************************************************************
-#define USB_RXCOUNT3_COUNT_M    0x1FFF  // Receive Packet Count
-#define USB_RXCOUNT3_COUNT_S    0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXTYPE3 register.
-//
-//*****************************************************************************
-#define USB_TXTYPE3_SPEED_M     0x00C0  // Operating Speed
-#define USB_TXTYPE3_SPEED_DFLT  0x0000  // Default
-#define USB_TXTYPE3_SPEED_HIGH  0x0040  // High
-#define USB_TXTYPE3_SPEED_FULL  0x0080  // Full
-#define USB_TXTYPE3_SPEED_LOW   0x00C0  // Low
-#define USB_TXTYPE3_PROTO_M     0x0030  // Protocol
-#define USB_TXTYPE3_PROTO_CTRL  0x0000  // Control
-#define USB_TXTYPE3_PROTO_ISOC  0x0010  // Isochronous
-#define USB_TXTYPE3_PROTO_BULK  0x0020  // Bulk
-#define USB_TXTYPE3_PROTO_INT   0x0030  // Interrupt
-#define USB_TXTYPE3_TEP_M       0x000F  // Target Endpoint Number
-#define USB_TXTYPE3_TEP_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXINTERVAL3
-// register.
-//
-//*****************************************************************************
-#define USB_TXINTERVAL3_TXPOLL_M 0x00FF  // TX Polling
-#define USB_TXINTERVAL3_NAKLMT_M 0x00FF  // NAK Limit
-#define USB_TXINTERVAL3_TXPOLL_S 0
-#define USB_TXINTERVAL3_NAKLMT_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXTYPE3 register.
-//
-//*****************************************************************************
-#define USB_RXTYPE3_SPEED_M     0x00C0  // Operating Speed
-#define USB_RXTYPE3_SPEED_DFLT  0x0000  // Default
-#define USB_RXTYPE3_SPEED_HIGH  0x0040  // High
-#define USB_RXTYPE3_SPEED_FULL  0x0080  // Full
-#define USB_RXTYPE3_SPEED_LOW   0x00C0  // Low
-#define USB_RXTYPE3_PROTO_M     0x0030  // Protocol
-#define USB_RXTYPE3_PROTO_CTRL  0x0000  // Control
-#define USB_RXTYPE3_PROTO_ISOC  0x0010  // Isochronous
-#define USB_RXTYPE3_PROTO_BULK  0x0020  // Bulk
-#define USB_RXTYPE3_PROTO_INT   0x0030  // Interrupt
-#define USB_RXTYPE3_TEP_M       0x000F  // Target Endpoint Number
-#define USB_RXTYPE3_TEP_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXINTERVAL3
-// register.
-//
-//*****************************************************************************
-#define USB_RXINTERVAL3_TXPOLL_M 0x00FF  // RX Polling
-#define USB_RXINTERVAL3_NAKLMT_M 0x00FF  // NAK Limit
-#define USB_RXINTERVAL3_TXPOLL_S 0
-#define USB_RXINTERVAL3_NAKLMT_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXMAXP4 register.
-//
-//*****************************************************************************
-#define USB_TXMAXP4_MAXLOAD_M   0x07FF  // Maximum Payload
-#define USB_TXMAXP4_MAXLOAD_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXCSRL4 register.
-//
-//*****************************************************************************
-#define USB_TXCSRL4_NAKTO       0x0080  // NAK Timeout
-#define USB_TXCSRL4_CLRDT       0x0040  // Clear Data Toggle
-#define USB_TXCSRL4_STALLED     0x0020  // Endpoint Stalled
-#define USB_TXCSRL4_SETUP       0x0010  // Setup Packet
-#define USB_TXCSRL4_STALL       0x0010  // Send STALL
-#define USB_TXCSRL4_FLUSH       0x0008  // Flush FIFO
-#define USB_TXCSRL4_ERROR       0x0004  // Error
-#define USB_TXCSRL4_UNDRN       0x0004  // Underrun
-#define USB_TXCSRL4_FIFONE      0x0002  // FIFO Not Empty
-#define USB_TXCSRL4_TXRDY       0x0001  // Transmit Packet Ready
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXCSRH4 register.
-//
-//*****************************************************************************
-#define USB_TXCSRH4_AUTOSET     0x0080  // Auto Set
-#define USB_TXCSRH4_ISO         0x0040  // Isochronous Transfers
-#define USB_TXCSRH4_MODE        0x0020  // Mode
-#define USB_TXCSRH4_DMAEN       0x0010  // DMA Request Enable
-#define USB_TXCSRH4_FDT         0x0008  // Force Data Toggle
-#define USB_TXCSRH4_DMAMOD      0x0004  // DMA Request Mode
-#define USB_TXCSRH4_DTWE        0x0002  // Data Toggle Write Enable
-#define USB_TXCSRH4_DT          0x0001  // Data Toggle
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXMAXP4 register.
-//
-//*****************************************************************************
-#define USB_RXMAXP4_MAXLOAD_M   0x07FF  // Maximum Payload
-#define USB_RXMAXP4_MAXLOAD_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCSRL4 register.
-//
-//*****************************************************************************
-#define USB_RXCSRL4_CLRDT       0x0080  // Clear Data Toggle
-#define USB_RXCSRL4_STALLED     0x0040  // Endpoint Stalled
-#define USB_RXCSRL4_STALL       0x0020  // Send STALL
-#define USB_RXCSRL4_REQPKT      0x0020  // Request Packet
-#define USB_RXCSRL4_FLUSH       0x0010  // Flush FIFO
-#define USB_RXCSRL4_NAKTO       0x0008  // NAK Timeout
-#define USB_RXCSRL4_DATAERR     0x0008  // Data Error
-#define USB_RXCSRL4_OVER        0x0004  // Overrun
-#define USB_RXCSRL4_ERROR       0x0004  // Error
-#define USB_RXCSRL4_FULL        0x0002  // FIFO Full
-#define USB_RXCSRL4_RXRDY       0x0001  // Receive Packet Ready
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCSRH4 register.
-//
-//*****************************************************************************
-#define USB_RXCSRH4_AUTOCL      0x0080  // Auto Clear
-#define USB_RXCSRH4_AUTORQ      0x0040  // Auto Request
-#define USB_RXCSRH4_ISO         0x0040  // Isochronous Transfers
-#define USB_RXCSRH4_DMAEN       0x0020  // DMA Request Enable
-#define USB_RXCSRH4_DISNYET     0x0010  // Disable NYET
-#define USB_RXCSRH4_PIDERR      0x0010  // PID Error
-#define USB_RXCSRH4_DMAMOD      0x0008  // DMA Request Mode
-#define USB_RXCSRH4_DTWE        0x0004  // Data Toggle Write Enable
-#define USB_RXCSRH4_DT          0x0002  // Data Toggle
-#define USB_RXCSRH4_INCOMPRX    0x0001  // Incomplete RX Transmission
-                                            // Status
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCOUNT4 register.
-//
-//*****************************************************************************
-#define USB_RXCOUNT4_COUNT_M    0x1FFF  // Receive Packet Count
-#define USB_RXCOUNT4_COUNT_S    0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXTYPE4 register.
-//
-//*****************************************************************************
-#define USB_TXTYPE4_SPEED_M     0x00C0  // Operating Speed
-#define USB_TXTYPE4_SPEED_DFLT  0x0000  // Default
-#define USB_TXTYPE4_SPEED_HIGH  0x0040  // High
-#define USB_TXTYPE4_SPEED_FULL  0x0080  // Full
-#define USB_TXTYPE4_SPEED_LOW   0x00C0  // Low
-#define USB_TXTYPE4_PROTO_M     0x0030  // Protocol
-#define USB_TXTYPE4_PROTO_CTRL  0x0000  // Control
-#define USB_TXTYPE4_PROTO_ISOC  0x0010  // Isochronous
-#define USB_TXTYPE4_PROTO_BULK  0x0020  // Bulk
-#define USB_TXTYPE4_PROTO_INT   0x0030  // Interrupt
-#define USB_TXTYPE4_TEP_M       0x000F  // Target Endpoint Number
-#define USB_TXTYPE4_TEP_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXINTERVAL4
-// register.
-//
-//*****************************************************************************
-#define USB_TXINTERVAL4_TXPOLL_M 0x00FF  // TX Polling
-#define USB_TXINTERVAL4_NAKLMT_M 0x00FF  // NAK Limit
-#define USB_TXINTERVAL4_NAKLMT_S 0
-#define USB_TXINTERVAL4_TXPOLL_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXTYPE4 register.
-//
-//*****************************************************************************
-#define USB_RXTYPE4_SPEED_M     0x00C0  // Operating Speed
-#define USB_RXTYPE4_SPEED_DFLT  0x0000  // Default
-#define USB_RXTYPE4_SPEED_HIGH  0x0040  // High
-#define USB_RXTYPE4_SPEED_FULL  0x0080  // Full
-#define USB_RXTYPE4_SPEED_LOW   0x00C0  // Low
-#define USB_RXTYPE4_PROTO_M     0x0030  // Protocol
-#define USB_RXTYPE4_PROTO_CTRL  0x0000  // Control
-#define USB_RXTYPE4_PROTO_ISOC  0x0010  // Isochronous
-#define USB_RXTYPE4_PROTO_BULK  0x0020  // Bulk
-#define USB_RXTYPE4_PROTO_INT   0x0030  // Interrupt
-#define USB_RXTYPE4_TEP_M       0x000F  // Target Endpoint Number
-#define USB_RXTYPE4_TEP_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXINTERVAL4
-// register.
-//
-//*****************************************************************************
-#define USB_RXINTERVAL4_TXPOLL_M 0x00FF  // RX Polling
-#define USB_RXINTERVAL4_NAKLMT_M 0x00FF  // NAK Limit
-#define USB_RXINTERVAL4_NAKLMT_S 0
-#define USB_RXINTERVAL4_TXPOLL_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXMAXP5 register.
-//
-//*****************************************************************************
-#define USB_TXMAXP5_MAXLOAD_M   0x07FF  // Maximum Payload
-#define USB_TXMAXP5_MAXLOAD_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXCSRL5 register.
-//
-//*****************************************************************************
-#define USB_TXCSRL5_NAKTO       0x0080  // NAK Timeout
-#define USB_TXCSRL5_CLRDT       0x0040  // Clear Data Toggle
-#define USB_TXCSRL5_STALLED     0x0020  // Endpoint Stalled
-#define USB_TXCSRL5_SETUP       0x0010  // Setup Packet
-#define USB_TXCSRL5_STALL       0x0010  // Send STALL
-#define USB_TXCSRL5_FLUSH       0x0008  // Flush FIFO
-#define USB_TXCSRL5_ERROR       0x0004  // Error
-#define USB_TXCSRL5_UNDRN       0x0004  // Underrun
-#define USB_TXCSRL5_FIFONE      0x0002  // FIFO Not Empty
-#define USB_TXCSRL5_TXRDY       0x0001  // Transmit Packet Ready
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXCSRH5 register.
-//
-//*****************************************************************************
-#define USB_TXCSRH5_AUTOSET     0x0080  // Auto Set
-#define USB_TXCSRH5_ISO         0x0040  // Isochronous Transfers
-#define USB_TXCSRH5_MODE        0x0020  // Mode
-#define USB_TXCSRH5_DMAEN       0x0010  // DMA Request Enable
-#define USB_TXCSRH5_FDT         0x0008  // Force Data Toggle
-#define USB_TXCSRH5_DMAMOD      0x0004  // DMA Request Mode
-#define USB_TXCSRH5_DTWE        0x0002  // Data Toggle Write Enable
-#define USB_TXCSRH5_DT          0x0001  // Data Toggle
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXMAXP5 register.
-//
-//*****************************************************************************
-#define USB_RXMAXP5_MAXLOAD_M   0x07FF  // Maximum Payload
-#define USB_RXMAXP5_MAXLOAD_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCSRL5 register.
-//
-//*****************************************************************************
-#define USB_RXCSRL5_CLRDT       0x0080  // Clear Data Toggle
-#define USB_RXCSRL5_STALLED     0x0040  // Endpoint Stalled
-#define USB_RXCSRL5_STALL       0x0020  // Send STALL
-#define USB_RXCSRL5_REQPKT      0x0020  // Request Packet
-#define USB_RXCSRL5_FLUSH       0x0010  // Flush FIFO
-#define USB_RXCSRL5_NAKTO       0x0008  // NAK Timeout
-#define USB_RXCSRL5_DATAERR     0x0008  // Data Error
-#define USB_RXCSRL5_ERROR       0x0004  // Error
-#define USB_RXCSRL5_OVER        0x0004  // Overrun
-#define USB_RXCSRL5_FULL        0x0002  // FIFO Full
-#define USB_RXCSRL5_RXRDY       0x0001  // Receive Packet Ready
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCSRH5 register.
-//
-//*****************************************************************************
-#define USB_RXCSRH5_AUTOCL      0x0080  // Auto Clear
-#define USB_RXCSRH5_AUTORQ      0x0040  // Auto Request
-#define USB_RXCSRH5_ISO         0x0040  // Isochronous Transfers
-#define USB_RXCSRH5_DMAEN       0x0020  // DMA Request Enable
-#define USB_RXCSRH5_DISNYET     0x0010  // Disable NYET
-#define USB_RXCSRH5_PIDERR      0x0010  // PID Error
-#define USB_RXCSRH5_DMAMOD      0x0008  // DMA Request Mode
-#define USB_RXCSRH5_DTWE        0x0004  // Data Toggle Write Enable
-#define USB_RXCSRH5_DT          0x0002  // Data Toggle
-#define USB_RXCSRH5_INCOMPRX    0x0001  // Incomplete RX Transmission
-                                            // Status
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCOUNT5 register.
+// The following are defines for the bit fields in the USB_O_DMACTL0 register.
 //
 //*****************************************************************************
-#define USB_RXCOUNT5_COUNT_M    0x1FFF  // Receive Packet Count
-#define USB_RXCOUNT5_COUNT_S    0
+#define USB_DMACTL0_BRSTM_M     0x0600  // Burst Mode
+#define USB_DMACTL0_BRSTM_ANY   0x0000  // Bursts of unspecified length
+#define USB_DMACTL0_BRSTM_INC4  0x0200  // INCR4 or unspecified length
+#define USB_DMACTL0_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
+                                            // length
+#define USB_DMACTL0_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
+                                            // unspecified length
+#define USB_DMACTL0_ERR         0x0100  // Bus Error Bit
+#define USB_DMACTL0_EP_M        0x00F0  // Endpoint number
+#define USB_DMACTL0_IE          0x0008  // DMA Interrupt Enable
+#define USB_DMACTL0_MODE        0x0004  // DMA Transfer Mode
+#define USB_DMACTL0_DIR         0x0002  // DMA Direction
+#define USB_DMACTL0_ENABLE      0x0001  // DMA Transfer Enable
+#define USB_DMACTL0_EP_S        4
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_TXTYPE5 register.
+// The following are defines for the bit fields in the USB_O_DMAADDR0 register.
 //
 //*****************************************************************************
-#define USB_TXTYPE5_SPEED_M     0x00C0  // Operating Speed
-#define USB_TXTYPE5_SPEED_DFLT  0x0000  // Default
-#define USB_TXTYPE5_SPEED_HIGH  0x0040  // High
-#define USB_TXTYPE5_SPEED_FULL  0x0080  // Full
-#define USB_TXTYPE5_SPEED_LOW   0x00C0  // Low
-#define USB_TXTYPE5_PROTO_M     0x0030  // Protocol
-#define USB_TXTYPE5_PROTO_CTRL  0x0000  // Control
-#define USB_TXTYPE5_PROTO_ISOC  0x0010  // Isochronous
-#define USB_TXTYPE5_PROTO_BULK  0x0020  // Bulk
-#define USB_TXTYPE5_PROTO_INT   0x0030  // Interrupt
-#define USB_TXTYPE5_TEP_M       0x000F  // Target Endpoint Number
-#define USB_TXTYPE5_TEP_S       0
+#define USB_DMAADDR0_ADDR_M     0xFFFFFFFC  // DMA Address
+#define USB_DMAADDR0_ADDR_S     2
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_TXINTERVAL5
+// The following are defines for the bit fields in the USB_O_DMACOUNT0
 // register.
 //
 //*****************************************************************************
-#define USB_TXINTERVAL5_TXPOLL_M 0x00FF  // TX Polling
-#define USB_TXINTERVAL5_NAKLMT_M 0x00FF  // NAK Limit
-#define USB_TXINTERVAL5_NAKLMT_S 0
-#define USB_TXINTERVAL5_TXPOLL_S 0
+#define USB_DMACOUNT0_COUNT_M   0xFFFFFFFC  // DMA Count
+#define USB_DMACOUNT0_COUNT_S   2
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_RXTYPE5 register.
+// The following are defines for the bit fields in the USB_O_CTO register.
 //
 //*****************************************************************************
-#define USB_RXTYPE5_SPEED_M     0x00C0  // Operating Speed
-#define USB_RXTYPE5_SPEED_DFLT  0x0000  // Default
-#define USB_RXTYPE5_SPEED_HIGH  0x0040  // High
-#define USB_RXTYPE5_SPEED_FULL  0x0080  // Full
-#define USB_RXTYPE5_SPEED_LOW   0x00C0  // Low
-#define USB_RXTYPE5_PROTO_M     0x0030  // Protocol
-#define USB_RXTYPE5_PROTO_CTRL  0x0000  // Control
-#define USB_RXTYPE5_PROTO_ISOC  0x0010  // Isochronous
-#define USB_RXTYPE5_PROTO_BULK  0x0020  // Bulk
-#define USB_RXTYPE5_PROTO_INT   0x0030  // Interrupt
-#define USB_RXTYPE5_TEP_M       0x000F  // Target Endpoint Number
-#define USB_RXTYPE5_TEP_S       0
+#define USB_CTO_CCTV_M          0xFFFF  // Configurable Chirp Timeout Value
+#define USB_CTO_CCTV_S          0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_RXINTERVAL5
-// register.
+// The following are defines for the bit fields in the USB_O_HHSRTN register.
 //
 //*****************************************************************************
-#define USB_RXINTERVAL5_TXPOLL_M 0x00FF  // RX Polling
-#define USB_RXINTERVAL5_NAKLMT_M 0x00FF  // NAK Limit
-#define USB_RXINTERVAL5_TXPOLL_S 0
-#define USB_RXINTERVAL5_NAKLMT_S 0
+#define USB_HHSRTN_HHSRTN_M     0xFFFF  // HIgh Speed to UTM Operating
+                                            // Delay
+#define USB_HHSRTN_HHSRTN_S     0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_TXMAXP6 register.
-//
-//*****************************************************************************
-#define USB_TXMAXP6_MAXLOAD_M   0x07FF  // Maximum Payload
-#define USB_TXMAXP6_MAXLOAD_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXCSRL6 register.
-//
-//*****************************************************************************
-#define USB_TXCSRL6_NAKTO       0x0080  // NAK Timeout
-#define USB_TXCSRL6_CLRDT       0x0040  // Clear Data Toggle
-#define USB_TXCSRL6_STALLED     0x0020  // Endpoint Stalled
-#define USB_TXCSRL6_STALL       0x0010  // Send STALL
-#define USB_TXCSRL6_SETUP       0x0010  // Setup Packet
-#define USB_TXCSRL6_FLUSH       0x0008  // Flush FIFO
-#define USB_TXCSRL6_ERROR       0x0004  // Error
-#define USB_TXCSRL6_UNDRN       0x0004  // Underrun
-#define USB_TXCSRL6_FIFONE      0x0002  // FIFO Not Empty
-#define USB_TXCSRL6_TXRDY       0x0001  // Transmit Packet Ready
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXCSRH6 register.
-//
-//*****************************************************************************
-#define USB_TXCSRH6_AUTOSET     0x0080  // Auto Set
-#define USB_TXCSRH6_ISO         0x0040  // Isochronous Transfers
-#define USB_TXCSRH6_MODE        0x0020  // Mode
-#define USB_TXCSRH6_DMAEN       0x0010  // DMA Request Enable
-#define USB_TXCSRH6_FDT         0x0008  // Force Data Toggle
-#define USB_TXCSRH6_DMAMOD      0x0004  // DMA Request Mode
-#define USB_TXCSRH6_DTWE        0x0002  // Data Toggle Write Enable
-#define USB_TXCSRH6_DT          0x0001  // Data Toggle
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXMAXP6 register.
-//
-//*****************************************************************************
-#define USB_RXMAXP6_MAXLOAD_M   0x07FF  // Maximum Payload
-#define USB_RXMAXP6_MAXLOAD_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCSRL6 register.
-//
-//*****************************************************************************
-#define USB_RXCSRL6_CLRDT       0x0080  // Clear Data Toggle
-#define USB_RXCSRL6_STALLED     0x0040  // Endpoint Stalled
-#define USB_RXCSRL6_REQPKT      0x0020  // Request Packet
-#define USB_RXCSRL6_STALL       0x0020  // Send STALL
-#define USB_RXCSRL6_FLUSH       0x0010  // Flush FIFO
-#define USB_RXCSRL6_NAKTO       0x0008  // NAK Timeout
-#define USB_RXCSRL6_DATAERR     0x0008  // Data Error
-#define USB_RXCSRL6_ERROR       0x0004  // Error
-#define USB_RXCSRL6_OVER        0x0004  // Overrun
-#define USB_RXCSRL6_FULL        0x0002  // FIFO Full
-#define USB_RXCSRL6_RXRDY       0x0001  // Receive Packet Ready
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCSRH6 register.
-//
-//*****************************************************************************
-#define USB_RXCSRH6_AUTOCL      0x0080  // Auto Clear
-#define USB_RXCSRH6_AUTORQ      0x0040  // Auto Request
-#define USB_RXCSRH6_ISO         0x0040  // Isochronous Transfers
-#define USB_RXCSRH6_DMAEN       0x0020  // DMA Request Enable
-#define USB_RXCSRH6_DISNYET     0x0010  // Disable NYET
-#define USB_RXCSRH6_PIDERR      0x0010  // PID Error
-#define USB_RXCSRH6_DMAMOD      0x0008  // DMA Request Mode
-#define USB_RXCSRH6_DTWE        0x0004  // Data Toggle Write Enable
-#define USB_RXCSRH6_DT          0x0002  // Data Toggle
-#define USB_RXCSRH6_INCOMPRX    0x0001  // Incomplete RX Transmission
-                                            // Status
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCOUNT6 register.
-//
-//*****************************************************************************
-#define USB_RXCOUNT6_COUNT_M    0x1FFF  // Receive Packet Count
-#define USB_RXCOUNT6_COUNT_S    0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXTYPE6 register.
-//
-//*****************************************************************************
-#define USB_TXTYPE6_SPEED_M     0x00C0  // Operating Speed
-#define USB_TXTYPE6_SPEED_DFLT  0x0000  // Default
-#define USB_TXTYPE6_SPEED_HIGH  0x0040  // High
-#define USB_TXTYPE6_SPEED_FULL  0x0080  // Full
-#define USB_TXTYPE6_SPEED_LOW   0x00C0  // Low
-#define USB_TXTYPE6_PROTO_M     0x0030  // Protocol
-#define USB_TXTYPE6_PROTO_CTRL  0x0000  // Control
-#define USB_TXTYPE6_PROTO_ISOC  0x0010  // Isochronous
-#define USB_TXTYPE6_PROTO_BULK  0x0020  // Bulk
-#define USB_TXTYPE6_PROTO_INT   0x0030  // Interrupt
-#define USB_TXTYPE6_TEP_M       0x000F  // Target Endpoint Number
-#define USB_TXTYPE6_TEP_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXINTERVAL6
-// register.
-//
-//*****************************************************************************
-#define USB_TXINTERVAL6_TXPOLL_M 0x00FF  // TX Polling
-#define USB_TXINTERVAL6_NAKLMT_M 0x00FF  // NAK Limit
-#define USB_TXINTERVAL6_TXPOLL_S 0
-#define USB_TXINTERVAL6_NAKLMT_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXTYPE6 register.
-//
-//*****************************************************************************
-#define USB_RXTYPE6_SPEED_M     0x00C0  // Operating Speed
-#define USB_RXTYPE6_SPEED_DFLT  0x0000  // Default
-#define USB_RXTYPE6_SPEED_HIGH  0x0040  // High
-#define USB_RXTYPE6_SPEED_FULL  0x0080  // Full
-#define USB_RXTYPE6_SPEED_LOW   0x00C0  // Low
-#define USB_RXTYPE6_PROTO_M     0x0030  // Protocol
-#define USB_RXTYPE6_PROTO_CTRL  0x0000  // Control
-#define USB_RXTYPE6_PROTO_ISOC  0x0010  // Isochronous
-#define USB_RXTYPE6_PROTO_BULK  0x0020  // Bulk
-#define USB_RXTYPE6_PROTO_INT   0x0030  // Interrupt
-#define USB_RXTYPE6_TEP_M       0x000F  // Target Endpoint Number
-#define USB_RXTYPE6_TEP_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXINTERVAL6
-// register.
-//
-//*****************************************************************************
-#define USB_RXINTERVAL6_TXPOLL_M 0x00FF  // RX Polling
-#define USB_RXINTERVAL6_NAKLMT_M 0x00FF  // NAK Limit
-#define USB_RXINTERVAL6_NAKLMT_S 0
-#define USB_RXINTERVAL6_TXPOLL_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXMAXP7 register.
-//
-//*****************************************************************************
-#define USB_TXMAXP7_MAXLOAD_M   0x07FF  // Maximum Payload
-#define USB_TXMAXP7_MAXLOAD_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXCSRL7 register.
-//
-//*****************************************************************************
-#define USB_TXCSRL7_NAKTO       0x0080  // NAK Timeout
-#define USB_TXCSRL7_CLRDT       0x0040  // Clear Data Toggle
-#define USB_TXCSRL7_STALLED     0x0020  // Endpoint Stalled
-#define USB_TXCSRL7_STALL       0x0010  // Send STALL
-#define USB_TXCSRL7_SETUP       0x0010  // Setup Packet
-#define USB_TXCSRL7_FLUSH       0x0008  // Flush FIFO
-#define USB_TXCSRL7_ERROR       0x0004  // Error
-#define USB_TXCSRL7_UNDRN       0x0004  // Underrun
-#define USB_TXCSRL7_FIFONE      0x0002  // FIFO Not Empty
-#define USB_TXCSRL7_TXRDY       0x0001  // Transmit Packet Ready
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXCSRH7 register.
-//
-//*****************************************************************************
-#define USB_TXCSRH7_AUTOSET     0x0080  // Auto Set
-#define USB_TXCSRH7_ISO         0x0040  // Isochronous Transfers
-#define USB_TXCSRH7_MODE        0x0020  // Mode
-#define USB_TXCSRH7_DMAEN       0x0010  // DMA Request Enable
-#define USB_TXCSRH7_FDT         0x0008  // Force Data Toggle
-#define USB_TXCSRH7_DMAMOD      0x0004  // DMA Request Mode
-#define USB_TXCSRH7_DTWE        0x0002  // Data Toggle Write Enable
-#define USB_TXCSRH7_DT          0x0001  // Data Toggle
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXMAXP7 register.
-//
-//*****************************************************************************
-#define USB_RXMAXP7_MAXLOAD_M   0x07FF  // Maximum Payload
-#define USB_RXMAXP7_MAXLOAD_S   0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCSRL7 register.
-//
-//*****************************************************************************
-#define USB_RXCSRL7_CLRDT       0x0080  // Clear Data Toggle
-#define USB_RXCSRL7_STALLED     0x0040  // Endpoint Stalled
-#define USB_RXCSRL7_REQPKT      0x0020  // Request Packet
-#define USB_RXCSRL7_STALL       0x0020  // Send STALL
-#define USB_RXCSRL7_FLUSH       0x0010  // Flush FIFO
-#define USB_RXCSRL7_DATAERR     0x0008  // Data Error
-#define USB_RXCSRL7_NAKTO       0x0008  // NAK Timeout
-#define USB_RXCSRL7_ERROR       0x0004  // Error
-#define USB_RXCSRL7_OVER        0x0004  // Overrun
-#define USB_RXCSRL7_FULL        0x0002  // FIFO Full
-#define USB_RXCSRL7_RXRDY       0x0001  // Receive Packet Ready
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCSRH7 register.
-//
-//*****************************************************************************
-#define USB_RXCSRH7_AUTOCL      0x0080  // Auto Clear
-#define USB_RXCSRH7_ISO         0x0040  // Isochronous Transfers
-#define USB_RXCSRH7_AUTORQ      0x0040  // Auto Request
-#define USB_RXCSRH7_DMAEN       0x0020  // DMA Request Enable
-#define USB_RXCSRH7_PIDERR      0x0010  // PID Error
-#define USB_RXCSRH7_DISNYET     0x0010  // Disable NYET
-#define USB_RXCSRH7_DMAMOD      0x0008  // DMA Request Mode
-#define USB_RXCSRH7_DTWE        0x0004  // Data Toggle Write Enable
-#define USB_RXCSRH7_DT          0x0002  // Data Toggle
-#define USB_RXCSRH7_INCOMPRX    0x0001  // Incomplete RX Transmission
-                                            // Status
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXCOUNT7 register.
-//
-//*****************************************************************************
-#define USB_RXCOUNT7_COUNT_M    0x1FFF  // Receive Packet Count
-#define USB_RXCOUNT7_COUNT_S    0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXTYPE7 register.
-//
-//*****************************************************************************
-#define USB_TXTYPE7_SPEED_M     0x00C0  // Operating Speed
-#define USB_TXTYPE7_SPEED_DFLT  0x0000  // Default
-#define USB_TXTYPE7_SPEED_HIGH  0x0040  // High
-#define USB_TXTYPE7_SPEED_FULL  0x0080  // Full
-#define USB_TXTYPE7_SPEED_LOW   0x00C0  // Low
-#define USB_TXTYPE7_PROTO_M     0x0030  // Protocol
-#define USB_TXTYPE7_PROTO_CTRL  0x0000  // Control
-#define USB_TXTYPE7_PROTO_ISOC  0x0010  // Isochronous
-#define USB_TXTYPE7_PROTO_BULK  0x0020  // Bulk
-#define USB_TXTYPE7_PROTO_INT   0x0030  // Interrupt
-#define USB_TXTYPE7_TEP_M       0x000F  // Target Endpoint Number
-#define USB_TXTYPE7_TEP_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXINTERVAL7
-// register.
-//
-//*****************************************************************************
-#define USB_TXINTERVAL7_TXPOLL_M 0x00FF  // TX Polling
-#define USB_TXINTERVAL7_NAKLMT_M 0x00FF  // NAK Limit
-#define USB_TXINTERVAL7_NAKLMT_S 0
-#define USB_TXINTERVAL7_TXPOLL_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXTYPE7 register.
-//
-//*****************************************************************************
-#define USB_RXTYPE7_SPEED_M     0x00C0  // Operating Speed
-#define USB_RXTYPE7_SPEED_DFLT  0x0000  // Default
-#define USB_RXTYPE7_SPEED_HIGH  0x0040  // High
-#define USB_RXTYPE7_SPEED_FULL  0x0080  // Full
-#define USB_RXTYPE7_SPEED_LOW   0x00C0  // Low
-#define USB_RXTYPE7_PROTO_M     0x0030  // Protocol
-#define USB_RXTYPE7_PROTO_CTRL  0x0000  // Control
-#define USB_RXTYPE7_PROTO_ISOC  0x0010  // Isochronous
-#define USB_RXTYPE7_PROTO_BULK  0x0020  // Bulk
-#define USB_RXTYPE7_PROTO_INT   0x0030  // Interrupt
-#define USB_RXTYPE7_TEP_M       0x000F  // Target Endpoint Number
-#define USB_RXTYPE7_TEP_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXINTERVAL7
-// register.
-//
-//*****************************************************************************
-#define USB_RXINTERVAL7_TXPOLL_M 0x00FF  // RX Polling
-#define USB_RXINTERVAL7_NAKLMT_M 0x00FF  // NAK Limit
-#define USB_RXINTERVAL7_NAKLMT_S 0
-#define USB_RXINTERVAL7_TXPOLL_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMAINTR register.
-//
-//*****************************************************************************
-#define USB_DMAINTR_CH7         0x0080  // Channel 7 DMA Interrupt
-#define USB_DMAINTR_CH6         0x0040  // Channel 6 DMA Interrupt
-#define USB_DMAINTR_CH5         0x0020  // Channel 5 DMA Interrupt
-#define USB_DMAINTR_CH4         0x0010  // Channel 4 DMA Interrupt
-#define USB_DMAINTR_CH3         0x0008  // Channel 3 DMA Interrupt
-#define USB_DMAINTR_CH2         0x0004  // Channel 2 DMA Interrupt
-#define USB_DMAINTR_CH1         0x0002  // Channel 1 DMA Interrupt
-#define USB_DMAINTR_CH0         0x0001  // Channel 0 DMA Interrupt
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACTL0 register.
-//
-//*****************************************************************************
-#define USB_DMACTL0_BRSTM_M     0x0600  // Burst Mode
-#define USB_DMACTL0_BRSTM_ANY   0x0000  // Bursts of unspecified length
-#define USB_DMACTL0_BRSTM_INC4  0x0200  // INCR4 or unspecified length
-#define USB_DMACTL0_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
-                                            // length
-#define USB_DMACTL0_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
-                                            // unspecified length
-#define USB_DMACTL0_ERR         0x0100  // Bus Error Bit
-#define USB_DMACTL0_EP_M        0x00F0  // Endpoint number
-#define USB_DMACTL0_IE          0x0008  // DMA Interrupt Enable
-#define USB_DMACTL0_MODE        0x0004  // DMA Transfer Mode
-#define USB_DMACTL0_DIR         0x0002  // DMA Direction
-#define USB_DMACTL0_ENABLE      0x0001  // DMA Transfer Enable
-#define USB_DMACTL0_EP_S        4
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMAADDR0 register.
-//
-//*****************************************************************************
-#define USB_DMAADDR0_ADDR_M     0xFFFFFFFC  // DMA Address
-#define USB_DMAADDR0_ADDR_S     2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACOUNT0
-// register.
-//
-//*****************************************************************************
-#define USB_DMACOUNT0_COUNT_M   0xFFFFFFFC  // DMA Count
-#define USB_DMACOUNT0_COUNT_S   2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACTL1 register.
-//
-//*****************************************************************************
-#define USB_DMACTL1_BRSTM_M     0x0600  // Burst Mode
-#define USB_DMACTL1_BRSTM_ANY   0x0000  // Bursts of unspecified length
-#define USB_DMACTL1_BRSTM_INC4  0x0200  // INCR4 or unspecified length
-#define USB_DMACTL1_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
-                                            // length
-#define USB_DMACTL1_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
-                                            // unspecified length
-#define USB_DMACTL1_ERR         0x0100  // Bus Error Bit
-#define USB_DMACTL1_EP_M        0x00F0  // Endpoint number
-#define USB_DMACTL1_IE          0x0008  // DMA Interrupt Enable
-#define USB_DMACTL1_MODE        0x0004  // DMA Transfer Mode
-#define USB_DMACTL1_DIR         0x0002  // DMA Direction
-#define USB_DMACTL1_ENABLE      0x0001  // DMA Transfer Enable
-#define USB_DMACTL1_EP_S        4
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMAADDR1 register.
-//
-//*****************************************************************************
-#define USB_DMAADDR1_ADDR_M     0xFFFFFFFC  // DMA Address
-#define USB_DMAADDR1_ADDR_S     2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACOUNT1
-// register.
-//
-//*****************************************************************************
-#define USB_DMACOUNT1_COUNT_M   0xFFFFFFFC  // DMA Count
-#define USB_DMACOUNT1_COUNT_S   2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACTL2 register.
-//
-//*****************************************************************************
-#define USB_DMACTL2_BRSTM_M     0x0600  // Burst Mode
-#define USB_DMACTL2_BRSTM_ANY   0x0000  // Bursts of unspecified length
-#define USB_DMACTL2_BRSTM_INC4  0x0200  // INCR4 or unspecified length
-#define USB_DMACTL2_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
-                                            // length
-#define USB_DMACTL2_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
-                                            // unspecified length
-#define USB_DMACTL2_ERR         0x0100  // Bus Error Bit
-#define USB_DMACTL2_EP_M        0x00F0  // Endpoint number
-#define USB_DMACTL2_IE          0x0008  // DMA Interrupt Enable
-#define USB_DMACTL2_MODE        0x0004  // DMA Transfer Mode
-#define USB_DMACTL2_DIR         0x0002  // DMA Direction
-#define USB_DMACTL2_ENABLE      0x0001  // DMA Transfer Enable
-#define USB_DMACTL2_EP_S        4
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMAADDR2 register.
-//
-//*****************************************************************************
-#define USB_DMAADDR2_ADDR_M     0xFFFFFFFC  // DMA Address
-#define USB_DMAADDR2_ADDR_S     2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACOUNT2
-// register.
-//
-//*****************************************************************************
-#define USB_DMACOUNT2_COUNT_M   0xFFFFFFFC  // DMA Count
-#define USB_DMACOUNT2_COUNT_S   2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACTL3 register.
-//
-//*****************************************************************************
-#define USB_DMACTL3_BRSTM_M     0x0600  // Burst Mode
-#define USB_DMACTL3_BRSTM_ANY   0x0000  // Bursts of unspecified length
-#define USB_DMACTL3_BRSTM_INC4  0x0200  // INCR4 or unspecified length
-#define USB_DMACTL3_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
-                                            // length
-#define USB_DMACTL3_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
-                                            // unspecified length
-#define USB_DMACTL3_ERR         0x0100  // Bus Error Bit
-#define USB_DMACTL3_EP_M        0x00F0  // Endpoint number
-#define USB_DMACTL3_IE          0x0008  // DMA Interrupt Enable
-#define USB_DMACTL3_MODE        0x0004  // DMA Transfer Mode
-#define USB_DMACTL3_DIR         0x0002  // DMA Direction
-#define USB_DMACTL3_ENABLE      0x0001  // DMA Transfer Enable
-#define USB_DMACTL3_EP_S        4
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMAADDR3 register.
-//
-//*****************************************************************************
-#define USB_DMAADDR3_ADDR_M     0xFFFFFFFC  // DMA Address
-#define USB_DMAADDR3_ADDR_S     2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACOUNT3
-// register.
-//
-//*****************************************************************************
-#define USB_DMACOUNT3_COUNT_M   0xFFFFFFFC  // DMA Count
-#define USB_DMACOUNT3_COUNT_S   2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACTL4 register.
-//
-//*****************************************************************************
-#define USB_DMACTL4_BRSTM_M     0x0600  // Burst Mode
-#define USB_DMACTL4_BRSTM_ANY   0x0000  // Bursts of unspecified length
-#define USB_DMACTL4_BRSTM_INC4  0x0200  // INCR4 or unspecified length
-#define USB_DMACTL4_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
-                                            // length
-#define USB_DMACTL4_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
-                                            // unspecified length
-#define USB_DMACTL4_ERR         0x0100  // Bus Error Bit
-#define USB_DMACTL4_EP_M        0x00F0  // Endpoint number
-#define USB_DMACTL4_IE          0x0008  // DMA Interrupt Enable
-#define USB_DMACTL4_MODE        0x0004  // DMA Transfer Mode
-#define USB_DMACTL4_DIR         0x0002  // DMA Direction
-#define USB_DMACTL4_ENABLE      0x0001  // DMA Transfer Enable
-#define USB_DMACTL4_EP_S        4
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMAADDR4 register.
-//
-//*****************************************************************************
-#define USB_DMAADDR4_ADDR_M     0xFFFFFFFC  // DMA Address
-#define USB_DMAADDR4_ADDR_S     2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACOUNT4
-// register.
-//
-//*****************************************************************************
-#define USB_DMACOUNT4_COUNT_M   0xFFFFFFFC  // DMA Count
-#define USB_DMACOUNT4_COUNT_S   2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACTL5 register.
-//
-//*****************************************************************************
-#define USB_DMACTL5_BRSTM_M     0x0600  // Burst Mode
-#define USB_DMACTL5_BRSTM_ANY   0x0000  // Bursts of unspecified length
-#define USB_DMACTL5_BRSTM_INC4  0x0200  // INCR4 or unspecified length
-#define USB_DMACTL5_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
-                                            // length
-#define USB_DMACTL5_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
-                                            // unspecified length
-#define USB_DMACTL5_ERR         0x0100  // Bus Error Bit
-#define USB_DMACTL5_EP_M        0x00F0  // Endpoint number
-#define USB_DMACTL5_IE          0x0008  // DMA Interrupt Enable
-#define USB_DMACTL5_MODE        0x0004  // DMA Transfer Mode
-#define USB_DMACTL5_DIR         0x0002  // DMA Direction
-#define USB_DMACTL5_ENABLE      0x0001  // DMA Transfer Enable
-#define USB_DMACTL5_EP_S        4
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMAADDR5 register.
-//
-//*****************************************************************************
-#define USB_DMAADDR5_ADDR_M     0xFFFFFFFC  // DMA Address
-#define USB_DMAADDR5_ADDR_S     2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACOUNT5
-// register.
-//
-//*****************************************************************************
-#define USB_DMACOUNT5_COUNT_M   0xFFFFFFFC  // DMA Count
-#define USB_DMACOUNT5_COUNT_S   2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACTL6 register.
-//
-//*****************************************************************************
-#define USB_DMACTL6_BRSTM_M     0x0600  // Burst Mode
-#define USB_DMACTL6_BRSTM_ANY   0x0000  // Bursts of unspecified length
-#define USB_DMACTL6_BRSTM_INC4  0x0200  // INCR4 or unspecified length
-#define USB_DMACTL6_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
-                                            // length
-#define USB_DMACTL6_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
-                                            // unspecified length
-#define USB_DMACTL6_ERR         0x0100  // Bus Error Bit
-#define USB_DMACTL6_EP_M        0x00F0  // Endpoint number
-#define USB_DMACTL6_IE          0x0008  // DMA Interrupt Enable
-#define USB_DMACTL6_MODE        0x0004  // DMA Transfer Mode
-#define USB_DMACTL6_DIR         0x0002  // DMA Direction
-#define USB_DMACTL6_ENABLE      0x0001  // DMA Transfer Enable
-#define USB_DMACTL6_EP_S        4
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMAADDR6 register.
-//
-//*****************************************************************************
-#define USB_DMAADDR6_ADDR_M     0xFFFFFFFC  // DMA Address
-#define USB_DMAADDR6_ADDR_S     2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACOUNT6
-// register.
-//
-//*****************************************************************************
-#define USB_DMACOUNT6_COUNT_M   0xFFFFFFFC  // DMA Count
-#define USB_DMACOUNT6_COUNT_S   2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACTL7 register.
-//
-//*****************************************************************************
-#define USB_DMACTL7_BRSTM_M     0x0600  // Burst Mode
-#define USB_DMACTL7_BRSTM_ANY   0x0000  // Bursts of unspecified length
-#define USB_DMACTL7_BRSTM_INC4  0x0200  // INCR4 or unspecified length
-#define USB_DMACTL7_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
-                                            // length
-#define USB_DMACTL7_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
-                                            // unspecified length
-#define USB_DMACTL7_ERR         0x0100  // Bus Error Bit
-#define USB_DMACTL7_EP_M        0x00F0  // Endpoint number
-#define USB_DMACTL7_IE          0x0008  // DMA Interrupt Enable
-#define USB_DMACTL7_MODE        0x0004  // DMA Transfer Mode
-#define USB_DMACTL7_DIR         0x0002  // DMA Direction
-#define USB_DMACTL7_ENABLE      0x0001  // DMA Transfer Enable
-#define USB_DMACTL7_EP_S        4
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMAADDR7 register.
-//
-//*****************************************************************************
-#define USB_DMAADDR7_ADDR_M     0xFFFFFFFC  // DMA Address
-#define USB_DMAADDR7_ADDR_S     2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DMACOUNT7
-// register.
-//
-//*****************************************************************************
-#define USB_DMACOUNT7_COUNT_M   0xFFFFFFFC  // DMA Count
-#define USB_DMACOUNT7_COUNT_S   2
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RQPKTCOUNT1
-// register.
-//
-//*****************************************************************************
-#define USB_RQPKTCOUNT1_M       0xFFFF  // Block Transfer Packet Count
-#define USB_RQPKTCOUNT1_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RQPKTCOUNT2
-// register.
-//
-//*****************************************************************************
-#define USB_RQPKTCOUNT2_M       0xFFFF  // Block Transfer Packet Count
-#define USB_RQPKTCOUNT2_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RQPKTCOUNT3
-// register.
-//
-//*****************************************************************************
-#define USB_RQPKTCOUNT3_M       0xFFFF  // Block Transfer Packet Count
-#define USB_RQPKTCOUNT3_S       0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RQPKTCOUNT4
-// register.
-//
-//*****************************************************************************
-#define USB_RQPKTCOUNT4_COUNT_M 0xFFFF  // Block Transfer Packet Count
-#define USB_RQPKTCOUNT4_COUNT_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RQPKTCOUNT5
-// register.
-//
-//*****************************************************************************
-#define USB_RQPKTCOUNT5_COUNT_M 0xFFFF  // Block Transfer Packet Count
-#define USB_RQPKTCOUNT5_COUNT_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RQPKTCOUNT6
-// register.
-//
-//*****************************************************************************
-#define USB_RQPKTCOUNT6_COUNT_M 0xFFFF  // Block Transfer Packet Count
-#define USB_RQPKTCOUNT6_COUNT_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RQPKTCOUNT7
-// register.
-//
-//*****************************************************************************
-#define USB_RQPKTCOUNT7_COUNT_M 0xFFFF  // Block Transfer Packet Count
-#define USB_RQPKTCOUNT7_COUNT_S 0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_RXDPKTBUFDIS
-// register.
-//
-//*****************************************************************************
-#define USB_RXDPKTBUFDIS_EP7    0x0080  // EP7 RX Double-Packet Buffer
-                                            // Disable
-#define USB_RXDPKTBUFDIS_EP6    0x0040  // EP6 RX Double-Packet Buffer
-                                            // Disable
-#define USB_RXDPKTBUFDIS_EP5    0x0020  // EP5 RX Double-Packet Buffer
-                                            // Disable
-#define USB_RXDPKTBUFDIS_EP4    0x0010  // EP4 RX Double-Packet Buffer
-                                            // Disable
-#define USB_RXDPKTBUFDIS_EP3    0x0008  // EP3 RX Double-Packet Buffer
-                                            // Disable
-#define USB_RXDPKTBUFDIS_EP2    0x0004  // EP2 RX Double-Packet Buffer
-                                            // Disable
-#define USB_RXDPKTBUFDIS_EP1    0x0002  // EP1 RX Double-Packet Buffer
-                                            // Disable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_TXDPKTBUFDIS
-// register.
-//
-//*****************************************************************************
-#define USB_TXDPKTBUFDIS_EP7    0x0080  // EP7 TX Double-Packet Buffer
-                                            // Disable
-#define USB_TXDPKTBUFDIS_EP6    0x0040  // EP6 TX Double-Packet Buffer
-                                            // Disable
-#define USB_TXDPKTBUFDIS_EP5    0x0020  // EP5 TX Double-Packet Buffer
-                                            // Disable
-#define USB_TXDPKTBUFDIS_EP4    0x0010  // EP4 TX Double-Packet Buffer
-                                            // Disable
-#define USB_TXDPKTBUFDIS_EP3    0x0008  // EP3 TX Double-Packet Buffer
-                                            // Disable
-#define USB_TXDPKTBUFDIS_EP2    0x0004  // EP2 TX Double-Packet Buffer
-                                            // Disable
-#define USB_TXDPKTBUFDIS_EP1    0x0002  // EP1 TX Double-Packet Buffer
-                                            // Disable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_CTO register.
-//
-//*****************************************************************************
-#define USB_CTO_CCTV_M          0xFFFF  // Configurable Chirp Timeout Value
-#define USB_CTO_CCTV_S          0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_HHSRTN register.
-//
-//*****************************************************************************
-#define USB_HHSRTN_HHSRTN_M     0xFFFF  // HIgh Speed to UTM Operating
-                                            // Delay
-#define USB_HHSRTN_HHSRTN_S     0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_HSBT register.
+// The following are defines for the bit fields in the USB_O_HSBT register.
 //
 //*****************************************************************************
 #define USB_HSBT_HSBT_M         0x000F  // High Speed Timeout Adder
 #define USB_HSBT_HSBT_S         0
 
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_LPMATTR register.
-//
-//*****************************************************************************
-#define USB_LPMATTR_ENDPT_M     0xF000  // Endpoint
-#define USB_LPMATTR_RMTWAK      0x0100  // Remote Wake
-#define USB_LPMATTR_HIRD_M      0x00F0  // Host Initiated Resume Duration
-#define USB_LPMATTR_LS_M        0x000F  // Link State
-#define USB_LPMATTR_LS_L1       0x0001  // Sleep State (L1)
-#define USB_LPMATTR_ENDPT_S     12
-#define USB_LPMATTR_HIRD_S      4
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_LPMCNTRL register.
-//
-//*****************************************************************************
-#define USB_LPMCNTRL_NAK        0x0010  // LPM NAK
-#define USB_LPMCNTRL_EN_M       0x000C  // LPM Enable
-#define USB_LPMCNTRL_EN_NONE    0x0000  // LPM and Extended transactions
-                                            // are not supported. In this case,
-                                            // the USB does not respond to LPM
-                                            // transactions and LPM
-                                            // transactions cause a timeout
-#define USB_LPMCNTRL_EN_EXT     0x0004  // LPM is not supported but
-                                            // extended transactions are
-                                            // supported. In this case, the USB
-                                            // does respond to an LPM
-                                            // transaction with a STALL
-#define USB_LPMCNTRL_EN_LPMEXT  0x000C  // The USB supports LPM extended
-                                            // transactions. In this case, the
-                                            // USB responds with a NYET or an
-                                            // ACK as determined by the value
-                                            // of TXLPM and other conditions
-#define USB_LPMCNTRL_RES        0x0002  // LPM Resume
-#define USB_LPMCNTRL_TXLPM      0x0001  // Transmit LPM Transaction Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_LPMIM register.
-//
-//*****************************************************************************
-#define USB_LPMIM_ERR           0x0020  // LPM Error Interrupt Mask
-#define USB_LPMIM_RES           0x0010  // LPM Resume Interrupt Mask
-#define USB_LPMIM_NC            0x0008  // LPM NC Interrupt Mask
-#define USB_LPMIM_ACK           0x0004  // LPM ACK Interrupt Mask
-#define USB_LPMIM_NY            0x0002  // LPM NY Interrupt Mask
-#define USB_LPMIM_STALL         0x0001  // LPM STALL Interrupt Mask
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_LPMRIS register.
-//
-//*****************************************************************************
-#define USB_LPMRIS_ERR          0x0020  // LPM Interrupt Status
-#define USB_LPMRIS_RES          0x0010  // LPM Resume Interrupt Status
-#define USB_LPMRIS_NC           0x0008  // LPM NC Interrupt Status
-#define USB_LPMRIS_ACK          0x0004  // LPM ACK Interrupt Status
-#define USB_LPMRIS_NY           0x0002  // LPM NY Interrupt Status
-#define USB_LPMRIS_LPMST        0x0001  // LPM STALL Interrupt Status
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_LPMFADDR register.
-//
-//*****************************************************************************
-#define USB_LPMFADDR_ADDR_M     0x007F  // LPM Function Address
-#define USB_LPMFADDR_ADDR_S     0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_EPC register.
-//
-//*****************************************************************************
-#define USB_EPC_PFLTACT_M       0x0300  // Power Fault Action
-#define USB_EPC_PFLTACT_UNCHG   0x0000  // Unchanged
-#define USB_EPC_PFLTACT_TRIS    0x0100  // Tristate
-#define USB_EPC_PFLTACT_LOW     0x0200  // Low
-#define USB_EPC_PFLTACT_HIGH    0x0300  // High
-#define USB_EPC_PFLTAEN         0x0040  // Power Fault Action Enable
-#define USB_EPC_PFLTSEN_HIGH    0x0020  // Power Fault Sense
-#define USB_EPC_PFLTEN          0x0010  // Power Fault Input Enable
-#define USB_EPC_EPENDE          0x0004  // EPEN Drive Enable
-#define USB_EPC_EPEN_M          0x0003  // External Power Supply Enable
-                                            // Configuration
-#define USB_EPC_EPEN_LOW        0x0000  // Power Enable Active Low
-#define USB_EPC_EPEN_HIGH       0x0001  // Power Enable Active High
-#define USB_EPC_EPEN_VBLOW      0x0002  // Power Enable High if VBUS Low
-                                            // (OTG only)
-#define USB_EPC_EPEN_VBHIGH     0x0003  // Power Enable High if VBUS High
-                                            // (OTG only)
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_EPCRIS register.
-//
-//*****************************************************************************
-#define USB_EPCRIS_PF           0x0001  // USB Power Fault Interrupt Status
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_EPCIM register.
-//
-//*****************************************************************************
-#define USB_EPCIM_PF            0x0001  // USB Power Fault Interrupt Mask
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_EPCISC register.
-//
-//*****************************************************************************
-#define USB_EPCISC_PF           0x0001  // USB Power Fault Interrupt Status
-                                            // and Clear
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DRRIS register.
-//
-//*****************************************************************************
-#define USB_DRRIS_RESUME        0x0001  // RESUME Interrupt Status
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DRIM register.
-//
-//*****************************************************************************
-#define USB_DRIM_RESUME         0x0001  // RESUME Interrupt Mask
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_DRISC register.
-//
-//*****************************************************************************
-#define USB_DRISC_RESUME        0x0001  // RESUME Interrupt Status and
-                                            // Clear
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_GPCS register.
-//
-//*****************************************************************************
-#define USB_GPCS_DEVMOD_M       0x0007  // Device Mode
-#define USB_GPCS_DEVMOD_OTG     0x0000  // Use USB0VBUS and USB0ID pin
-#define USB_GPCS_DEVMOD_HOST    0x0002  // Force USB0VBUS and USB0ID low
-#define USB_GPCS_DEVMOD_DEV     0x0003  // Force USB0VBUS and USB0ID high
-#define USB_GPCS_DEVMOD_HOSTVBUS                                              \
-                                0x0004  // Use USB0VBUS and force USB0ID
-                                            // low
-#define USB_GPCS_DEVMOD_DEVVBUS 0x0005  // Use USB0VBUS and force USB0ID
-                                            // high
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_VDC register.
-//
-//*****************************************************************************
-#define USB_VDC_VBDEN           0x0001  // VBUS Droop Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_VDCRIS register.
-//
-//*****************************************************************************
-#define USB_VDCRIS_VD           0x0001  // VBUS Droop Raw Interrupt Status
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_VDCIM register.
-//
-//*****************************************************************************
-#define USB_VDCIM_VD            0x0001  // VBUS Droop Interrupt Mask
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_VDCISC register.
-//
-//*****************************************************************************
-#define USB_VDCISC_VD           0x0001  // VBUS Droop Interrupt Status and
-                                            // Clear
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_PP register.
-//
-//*****************************************************************************
-#define USB_PP_ECNT_M           0xFF00  // Endpoint Count
-#define USB_PP_USB_M            0x00C0  // USB Capability
-#define USB_PP_USB_DEVICE       0x0040  // DEVICE
-#define USB_PP_USB_HOSTDEVICE   0x0080  // HOST
-#define USB_PP_USB_OTG          0x00C0  // OTG
-#define USB_PP_ULPI             0x0020  // ULPI Present
-#define USB_PP_PHY              0x0010  // PHY Present
-#define USB_PP_TYPE_M           0x000F  // Controller Type
-#define USB_PP_TYPE_0           0x0000  // The first-generation USB
-                                            // controller
-#define USB_PP_TYPE_1           0x0001  // The second-generation USB
-                                            // controller revision
-#define USB_PP_ECNT_S           8
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_PC register.
-//
-//*****************************************************************************
-#define USB_PC_ULPIEN           0x00010000  // ULPI Enable
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the USB_O_CC register.
-//
-//*****************************************************************************
-#define USB_CC_CLKEN            0x0200  // USB Clock Enable
-#define USB_CC_CSD              0x0100  // Clock Source/Direction
-#define USB_CC_CLKDIV_M         0x000F  // PLL Clock Divisor
-#define USB_CC_CLKDIV_S         0
-
 #ifdef __cplusplus
  }
 #endif

From fe7ffc8edaad069955d6ededb3fc77084338256c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 17 Aug 2024 19:08:48 +0700
Subject: [PATCH 172/204] rename register bit definition to prevent conflict

---
 src/portable/mentor/musb/dcd_musb.c  |  98 ++---
 src/portable/mentor/musb/musb_type.h | 518 +++++++++++++--------------
 2 files changed, 308 insertions(+), 308 deletions(-)

diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index 3dcb9cdf1f..3fd4d953af 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -240,7 +240,7 @@ static void process_setup_packet(uint8_t rhport) {
   /* Clear RX FIFO and reverse the transaction direction */
   if (len && dir_in) {
     musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, 0);
-    ep_csr->csr0l = USB_CSRL0_RXRDYC;
+    ep_csr->csr0l = MUSB_CSRL0_RXRDYC;
   }
 }
 
@@ -272,7 +272,7 @@ static bool handle_xfer_in(uint8_t rhport, uint_fast8_t ep_addr)
     }
     pipe->remaining = rem - len;
   }
-  ep_csr->tx_csrl = USB_TXCSRL1_TXRDY;
+  ep_csr->tx_csrl = MUSB_TXCSRL1_TXRDY;
   // TU_LOG1(" TXCSRL%d = %x %d\r\n", epnum, ep_csr->tx_csrl, rem - len);
   return false;
 }
@@ -286,7 +286,7 @@ static bool handle_xfer_out(uint8_t rhport, uint_fast8_t ep_addr)
   musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epnum);
   // TU_LOG1(" RXCSRL%d = %x\r\n", epnum_minus1 + 1, ep_csr->rx_csrl);
 
-  TU_ASSERT(ep_csr->rx_csrl & USB_RXCSRL1_RXRDY);
+  TU_ASSERT(ep_csr->rx_csrl & MUSB_RXCSRL1_RXRDY);
 
   const unsigned mps = ep_csr->rx_maxp;
   const unsigned rem = pipe->remaining;
@@ -327,7 +327,7 @@ static bool edpt_n_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16
   } else {
     musb_regs_t* musb_regs = MUSB_REGS(rhport);
     musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epnum);
-    if (ep_csr->rx_csrl & USB_RXCSRL1_RXRDY) ep_csr->rx_csrl = 0;
+    if (ep_csr->rx_csrl & MUSB_RXCSRL1_RXRDY) ep_csr->rx_csrl = 0;
   }
   return true;
 }
@@ -377,9 +377,9 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
         _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID; /* Change to STATUS/SETUP stage */
         _dcd.status_out = 1;
         /* Flush TX FIFO and reverse the transaction direction. */
-        ep_csr->csr0l = USB_CSRL0_TXRDY | USB_CSRL0_DATAEND;
+        ep_csr->csr0l = MUSB_CSRL0_TXRDY | MUSB_CSRL0_DATAEND;
       } else {
-        ep_csr->csr0l = USB_CSRL0_TXRDY; /* Flush TX FIFO to return ACK. */
+        ep_csr->csr0l = MUSB_CSRL0_TXRDY; /* Flush TX FIFO to return ACK. */
       }
       // TU_LOG1(" IN ep_csr->csr0l = %x\r\n", ep_csr->csr0l);
     } else {
@@ -387,7 +387,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
       _dcd.pipe0.buf       = buffer;
       _dcd.pipe0.length    = len;
       _dcd.pipe0.remaining = len;
-      ep_csr->csr0l = USB_CSRL0_RXRDYC; /* Clear RX FIFO to return ACK. */
+      ep_csr->csr0l = MUSB_CSRL0_RXRDYC; /* Clear RX FIFO to return ACK. */
     }
   } else if (dir_in) {
     // TU_LOG1(" STATUS IN ep_csr->csr0l  = %x\r\n", ep_csr->csr0l);
@@ -395,7 +395,7 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
     _dcd.pipe0.length    = 0;
     _dcd.pipe0.remaining = 0;
     /* Clear RX FIFO and reverse the transaction direction */
-    ep_csr->csr0l = USB_CSRL0_RXRDYC | USB_CSRL0_DATAEND;
+    ep_csr->csr0l = MUSB_CSRL0_RXRDYC | MUSB_CSRL0_DATAEND;
   }
   return true;
 }
@@ -409,16 +409,16 @@ static void process_ep0(uint8_t rhport)
   // TU_LOG1(" EP0 ep_csr->csr0l = %x\r\n", csrl);
   // 21.1.5: endpoint 0 service routine as peripheral
 
-  if (csrl & USB_CSRL0_STALLED) {
+  if (csrl & MUSB_CSRL0_STALLED) {
     /* Returned STALL packet to HOST. */
     ep_csr->csr0l = 0; /* Clear STALL */
     return;
   }
 
   unsigned req = _dcd.setup_packet.bmRequestType;
-  if (csrl & USB_CSRL0_SETEND) {
+  if (csrl & MUSB_CSRL0_SETEND) {
     TU_LOG1("   ABORT by the next packets\r\n");
-    ep_csr->csr0l = USB_CSRL0_SETENDC;
+    ep_csr->csr0l = MUSB_CSRL0_SETENDC;
     if (req != REQUEST_TYPE_INVALID && _dcd.pipe0.buf) {
       /* DATA stage was aborted by receiving STATUS or SETUP packet. */
       _dcd.pipe0.buf = NULL;
@@ -429,10 +429,10 @@ static void process_ep0(uint8_t rhport)
                               XFER_RESULT_SUCCESS, true);
     }
     req = REQUEST_TYPE_INVALID;
-    if (!(csrl & USB_CSRL0_RXRDY)) return; /* Received SETUP packet */
+    if (!(csrl & MUSB_CSRL0_RXRDY)) return; /* Received SETUP packet */
   }
 
-  if (csrl & USB_CSRL0_RXRDY) {
+  if (csrl & MUSB_CSRL0_RXRDY) {
     /* Received SETUP or DATA OUT packet */
     if (req == REQUEST_TYPE_INVALID) {
       /* SETUP */
@@ -496,15 +496,15 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
   musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epn);
   if (dir_in) {
     // TU_LOG1(" TX CSRL%d = %x\r\n", epn, ep_csr->tx_csrl);
-    if (ep_csr->tx_csrl & USB_TXCSRL1_STALLED) {
-      ep_csr->tx_csrl &= ~(USB_TXCSRL1_STALLED | USB_TXCSRL1_UNDRN);
+    if (ep_csr->tx_csrl & MUSB_TXCSRL1_STALLED) {
+      ep_csr->tx_csrl &= ~(MUSB_TXCSRL1_STALLED | MUSB_TXCSRL1_UNDRN);
       return;
     }
     completed = handle_xfer_in(rhport, ep_addr);
   } else {
     // TU_LOG1(" RX CSRL%d = %x\r\n", epn, ep_csr->rx_csrl);
-    if (ep_csr->rx_csrl & USB_RXCSRL1_STALLED) {
-      ep_csr->rx_csrl &= ~(USB_RXCSRL1_STALLED | USB_RXCSRL1_OVER);
+    if (ep_csr->rx_csrl & MUSB_RXCSRL1_STALLED) {
+      ep_csr->rx_csrl &= ~(MUSB_RXCSRL1_STALLED | MUSB_RXCSRL1_OVER);
       return;
     }
     completed = handle_xfer_out(rhport, ep_addr);
@@ -541,7 +541,7 @@ static void process_bus_reset(uint8_t rhport) {
     fifo_reset(musb, i, 0);
     fifo_reset(musb, i, 1);
   }
-  dcd_event_bus_reset(rhport, (musb->power & USB_POWER_HSMODE) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL, true);
+  dcd_event_bus_reset(rhport, (musb->power & MUSB_POWER_HSMODE) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL, true);
 }
 
 /*------------------------------------------------------------------
@@ -576,7 +576,7 @@ void dcd_init(uint8_t rhport) {
   print_musb_info(musb_regs);
 #endif
 
-  musb_regs->intr_usben |= USB_IE_SUSPND;
+  musb_regs->intr_usben |= MUSB_IE_SUSPND;
   musb_dcd_int_clear(rhport);
   musb_dcd_phy_init(rhport);
   dcd_connect(rhport);
@@ -601,33 +601,33 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
   _dcd.pipe0.length    = 0;
   _dcd.pipe0.remaining = 0;
   /* Clear RX FIFO to return ACK. */
-  ep_csr->csr0l = USB_CSRL0_RXRDYC | USB_CSRL0_DATAEND;
+  ep_csr->csr0l = MUSB_CSRL0_RXRDYC | MUSB_CSRL0_DATAEND;
 }
 
 // Wake up host
 void dcd_remote_wakeup(uint8_t rhport) {
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
-  musb_regs->power |= USB_POWER_RESUME;
+  musb_regs->power |= MUSB_POWER_RESUME;
 
   unsigned cnt = SystemCoreClock / 1000;
   while (cnt--) __NOP();
 
-  musb_regs->power &= ~USB_POWER_RESUME;
+  musb_regs->power &= ~MUSB_POWER_RESUME;
 }
 
 // Connect by enabling internal pull-up resistor on D+/D-
 void dcd_connect(uint8_t rhport)
 {
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
-  musb_regs->power |= TUD_OPT_HIGH_SPEED ? USB_POWER_HSENAB : 0;
-  musb_regs->power |= USB_POWER_SOFTCONN;
+  musb_regs->power |= TUD_OPT_HIGH_SPEED ? MUSB_POWER_HSENAB : 0;
+  musb_regs->power |= MUSB_POWER_SOFTCONN;
 }
 
 // Disconnect by disabling internal pull-up resistor on D+/D-
 void dcd_disconnect(uint8_t rhport)
 {
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
-  musb_regs->power &= ~USB_POWER_SOFTCONN;
+  musb_regs->power &= ~MUSB_POWER_SOFTCONN;
 }
 
 void dcd_sof_enable(uint8_t rhport, bool en)
@@ -663,7 +663,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
 
   const uint8_t is_rx = 1 - dir_in;
   ep_csr->maxp_csr[is_rx].maxp = mps;
-  ep_csr->maxp_csr[is_rx].csrh = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_RXCSRH1_ISO : 0;
+  ep_csr->maxp_csr[is_rx].csrh = (xfer == TUSB_XFER_ISOCHRONOUS) ? MUSB_RXCSRH1_ISO : 0;
 
   uint8_t csrl = MUSB_CSRL_CLEAR_DATA_TOGGLE(is_rx);
   if (ep_csr->maxp_csr[is_rx].csrl & MUSB_CSRL_PACKET_READY(is_rx)) {
@@ -690,17 +690,17 @@ void dcd_edpt_close_all(uint8_t rhport)
     musb_ep_csr_t* ep_csr = get_ep_csr(musb, i);
     ep_csr->tx_maxp = 0;
     ep_csr->tx_csrh = 0;
-    if (ep_csr->tx_csrl & USB_TXCSRL1_TXRDY)
-      ep_csr->tx_csrl = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
+    if (ep_csr->tx_csrl & MUSB_TXCSRL1_TXRDY)
+      ep_csr->tx_csrl = MUSB_TXCSRL1_CLRDT | MUSB_TXCSRL1_FLUSH;
     else
-      ep_csr->tx_csrl = USB_TXCSRL1_CLRDT;
+      ep_csr->tx_csrl = MUSB_TXCSRL1_CLRDT;
 
     ep_csr->rx_maxp = 0;
     ep_csr->rx_csrh = 0;
-    if (ep_csr->rx_csrl & USB_RXCSRL1_RXRDY) {
-      ep_csr->rx_csrl = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
+    if (ep_csr->rx_csrl & MUSB_RXCSRL1_RXRDY) {
+      ep_csr->rx_csrl = MUSB_RXCSRL1_CLRDT | MUSB_RXCSRL1_FLUSH;
     } else {
-      ep_csr->rx_csrl = USB_RXCSRL1_CLRDT;
+      ep_csr->rx_csrl = MUSB_RXCSRL1_CLRDT;
     }
 
     fifo_reset(musb, i, 0);
@@ -727,19 +727,19 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
     musb->intr_txen  &= ~TU_BIT(epn);
     ep_csr->tx_maxp = 0;
     ep_csr->tx_csrh = 0;
-    if (ep_csr->tx_csrl & USB_TXCSRL1_TXRDY) {
-      ep_csr->tx_csrl = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
+    if (ep_csr->tx_csrl & MUSB_TXCSRL1_TXRDY) {
+      ep_csr->tx_csrl = MUSB_TXCSRL1_CLRDT | MUSB_TXCSRL1_FLUSH;
     } else {
-      ep_csr->tx_csrl = USB_TXCSRL1_CLRDT;
+      ep_csr->tx_csrl = MUSB_TXCSRL1_CLRDT;
     }
   } else {
     musb->intr_rxen  &= ~TU_BIT(epn);
     ep_csr->rx_maxp = 0;
     ep_csr->rx_csrh = 0;
-    if (ep_csr->rx_csrl & USB_RXCSRL1_RXRDY) {
-      ep_csr->rx_csrl = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
+    if (ep_csr->rx_csrl & MUSB_RXCSRL1_RXRDY) {
+      ep_csr->rx_csrl = MUSB_RXCSRL1_CLRDT | MUSB_RXCSRL1_FLUSH;
     } else {
-      ep_csr->rx_csrl = USB_RXCSRL1_CLRDT;
+      ep_csr->rx_csrl = MUSB_RXCSRL1_CLRDT;
     }
   }
   fifo_reset(musb, epn, dir_in);
@@ -792,14 +792,14 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
     if (!ep_addr) { /* Ignore EP80 */
       _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
       _dcd.pipe0.buf = NULL;
-      ep_csr->csr0l = USB_CSRL0_STALL;
+      ep_csr->csr0l = MUSB_CSRL0_STALL;
     }
   } else {
     if (tu_edpt_dir(ep_addr)) { /* IN */
-      ep_csr->tx_csrl = USB_TXCSRL1_STALL;
+      ep_csr->tx_csrl = MUSB_TXCSRL1_STALL;
     } else { /* OUT */
-      TU_ASSERT(!(ep_csr->rx_csrl & USB_RXCSRL1_RXRDY),);
-      ep_csr->rx_csrl = USB_RXCSRL1_STALL;
+      TU_ASSERT(!(ep_csr->rx_csrl & MUSB_RXCSRL1_RXRDY),);
+      ep_csr->rx_csrl = MUSB_RXCSRL1_STALL;
     }
   }
   if (ie) musb_dcd_int_enable(rhport);
@@ -815,9 +815,9 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
   if (tu_edpt_dir(ep_addr)) { /* IN */
-    ep_csr->tx_csrl = USB_TXCSRL1_CLRDT;
+    ep_csr->tx_csrl = MUSB_TXCSRL1_CLRDT;
   } else { /* OUT */
-    ep_csr->rx_csrl = USB_RXCSRL1_CLRDT;
+    ep_csr->rx_csrl = MUSB_RXCSRL1_CLRDT;
   }
   if (ie) musb_dcd_int_enable(rhport);
 }
@@ -838,18 +838,18 @@ void dcd_int_handler(uint8_t rhport) {
   // TU_LOG1("D%2x T%2x R%2x\r\n", is, txis, rxis);
 
   intr_usb &= musb_regs->intr_usben; /* Clear disabled interrupts */
-  if (intr_usb & USB_IS_DISCON) {
+  if (intr_usb & MUSB_IS_DISCON) {
   }
-  if (intr_usb & USB_IS_SOF) {
+  if (intr_usb & MUSB_IS_SOF) {
     dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
   }
-  if (intr_usb & USB_IS_RESET) {
+  if (intr_usb & MUSB_IS_RESET) {
     process_bus_reset(rhport);
   }
-  if (intr_usb & USB_IS_RESUME) {
+  if (intr_usb & MUSB_IS_RESUME) {
     dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
   }
-  if (intr_usb & USB_IS_SUSPEND) {
+  if (intr_usb & MUSB_IS_SUSPEND) {
     dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
   }
 
diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index 619eb01081..3415f74b54 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -307,14 +307,14 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 //--------------------------------------------------------------------+
 
 // 0x01: Power
-#define USB_POWER_ISOUP         0x0080  // Isochronous Update
-#define USB_POWER_SOFTCONN      0x0040  // Soft Connect/Disconnect
-#define USB_POWER_HSENAB        0x0020  // High Speed Enable
-#define USB_POWER_HSMODE        0x0010  // High Speed Enable
-#define USB_POWER_RESET         0x0008  // RESET Signaling
-#define USB_POWER_RESUME        0x0004  // RESUME Signaling
-#define USB_POWER_SUSPEND       0x0002  // SUSPEND Mode
-#define USB_POWER_PWRDNPHY      0x0001  // Power Down PHY
+#define MUSB_POWER_ISOUP         0x0080  // Isochronous Update
+#define MUSB_POWER_SOFTCONN      0x0040  // Soft Connect/Disconnect
+#define MUSB_POWER_HSENAB        0x0020  // High Speed Enable
+#define MUSB_POWER_HSMODE        0x0010  // High Speed Enable
+#define MUSB_POWER_RESET         0x0008  // RESET Signaling
+#define MUSB_POWER_RESUME        0x0004  // RESUME Signaling
+#define MUSB_POWER_SUSPEND       0x0002  // SUSPEND Mode
+#define MUSB_POWER_PWRDNPHY      0x0001  // Power Down PHY
 
 // Interrupt TX/RX Status and Enable: each bit is for an endpoint
 
@@ -340,460 +340,460 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_IS register.
+// The following are defines for the bit fields in the MUSB_O_IS register.
 //
 //*****************************************************************************
-#define USB_IS_VBUSERR          0x0080  // VBUS Error (OTG only)
-#define USB_IS_SESREQ           0x0040  // SESSION REQUEST (OTG only)
-#define USB_IS_DISCON           0x0020  // Session Disconnect (OTG only)
-#define USB_IS_CONN             0x0010  // Session Connect
-#define USB_IS_SOF              0x0008  // Start of Frame
-#define USB_IS_BABBLE           0x0004  // Babble Detected
-#define USB_IS_RESET            0x0004  // RESET Signaling Detected
-#define USB_IS_RESUME           0x0002  // RESUME Signaling Detected
-#define USB_IS_SUSPEND          0x0001  // SUSPEND Signaling Detected
+#define MUSB_IS_VBUSERR          0x0080  // VBUS Error (OTG only)
+#define MUSB_IS_SESREQ           0x0040  // SESSION REQUEST (OTG only)
+#define MUSB_IS_DISCON           0x0020  // Session Disconnect (OTG only)
+#define MUSB_IS_CONN             0x0010  // Session Connect
+#define MUSB_IS_SOF              0x0008  // Start of Frame
+#define MUSB_IS_BABBLE           0x0004  // Babble Detected
+#define MUSB_IS_RESET            0x0004  // RESET Signaling Detected
+#define MUSB_IS_RESUME           0x0002  // RESUME Signaling Detected
+#define MUSB_IS_SUSPEND          0x0001  // SUSPEND Signaling Detected
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_IE register.
+// The following are defines for the bit fields in the MUSB_O_IE register.
 //
 //*****************************************************************************
-#define USB_IE_VBUSERR          0x0080  // Enable VBUS Error Interrupt (OTG only)
-#define USB_IE_SESREQ           0x0040  // Enable Session Request (OTG only)
-#define USB_IE_DISCON           0x0020  // Enable Disconnect Interrupt
-#define USB_IE_CONN             0x0010  // Enable Connect Interrupt
-#define USB_IE_SOF              0x0008  // Enable Start-of-Frame Interrupt
-#define USB_IE_BABBLE           0x0004  // Enable Babble Interrupt
-#define USB_IE_RESET            0x0004  // Enable RESET Interrupt
-#define USB_IE_RESUME           0x0002  // Enable RESUME Interrupt
-#define USB_IE_SUSPND           0x0001  // Enable SUSPEND Interrupt
+#define MUSB_IE_VBUSERR          0x0080  // Enable VBUS Error Interrupt (OTG only)
+#define MUSB_IE_SESREQ           0x0040  // Enable Session Request (OTG only)
+#define MUSB_IE_DISCON           0x0020  // Enable Disconnect Interrupt
+#define MUSB_IE_CONN             0x0010  // Enable Connect Interrupt
+#define MUSB_IE_SOF              0x0008  // Enable Start-of-Frame Interrupt
+#define MUSB_IE_BABBLE           0x0004  // Enable Babble Interrupt
+#define MUSB_IE_RESET            0x0004  // Enable RESET Interrupt
+#define MUSB_IE_RESUME           0x0002  // Enable RESUME Interrupt
+#define MUSB_IE_SUSPND           0x0001  // Enable SUSPEND Interrupt
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_FRAME register.
+// The following are defines for the bit fields in the MUSB_O_FRAME register.
 //
 //*****************************************************************************
-#define USB_FRAME_M             0x07FF  // Frame Number
-#define USB_FRAME_S             0
+#define MUSB_FRAME_M             0x07FF  // Frame Number
+#define MUSB_FRAME_S             0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_TEST register.
+// The following are defines for the bit fields in the MUSB_O_TEST register.
 //
 //*****************************************************************************
-#define USB_TEST_FORCEH         0x0080  // Force Host Mode
-#define USB_TEST_FIFOACC        0x0040  // FIFO Access
-#define USB_TEST_FORCEFS        0x0020  // Force Full-Speed Mode
-#define USB_TEST_FORCEHS        0x0010  // Force High-Speed Mode
-#define USB_TEST_TESTPKT        0x0008  // Test Packet Mode Enable
-#define USB_TEST_TESTK          0x0004  // Test_K Mode Enable
-#define USB_TEST_TESTJ          0x0002  // Test_J Mode Enable
-#define USB_TEST_TESTSE0NAK     0x0001  // Test_SE0_NAK Test Mode Enable
+#define MUSB_TEST_FORCEH         0x0080  // Force Host Mode
+#define MUSB_TEST_FIFOACC        0x0040  // FIFO Access
+#define MUSB_TEST_FORCEFS        0x0020  // Force Full-Speed Mode
+#define MUSB_TEST_FORCEHS        0x0010  // Force High-Speed Mode
+#define MUSB_TEST_TESTPKT        0x0008  // Test Packet Mode Enable
+#define MUSB_TEST_TESTK          0x0004  // Test_K Mode Enable
+#define MUSB_TEST_TESTJ          0x0002  // Test_J Mode Enable
+#define MUSB_TEST_TESTSE0NAK     0x0001  // Test_SE0_NAK Test Mode Enable
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_DEVCTL register.
+// The following are defines for the bit fields in the MUSB_O_DEVCTL register.
 //
 //*****************************************************************************
-#define USB_DEVCTL_DEV          0x0080  // Device Mode (OTG only)
-#define USB_DEVCTL_FSDEV        0x0040  // Full-Speed Device Detected
-#define USB_DEVCTL_LSDEV        0x0020  // Low-Speed Device Detected
-#define USB_DEVCTL_VBUS_M       0x0018  // VBUS Level (OTG only)
-#define USB_DEVCTL_VBUS_NONE    0x0000  // Below SessionEnd
-#define USB_DEVCTL_VBUS_SEND    0x0008  // Above SessionEnd, below AValid
-#define USB_DEVCTL_VBUS_AVALID  0x0010  // Above AValid, below VBUSValid
-#define USB_DEVCTL_VBUS_VALID   0x0018  // Above VBUSValid
-#define USB_DEVCTL_HOST         0x0004  // Host Mode
-#define USB_DEVCTL_HOSTREQ      0x0002  // Host Request (OTG only)
-#define USB_DEVCTL_SESSION      0x0001  // Session Start/End (OTG only)
+#define MUSB_DEVCTL_DEV          0x0080  // Device Mode (OTG only)
+#define MUSB_DEVCTL_FSDEV        0x0040  // Full-Speed Device Detected
+#define MUSB_DEVCTL_LSDEV        0x0020  // Low-Speed Device Detected
+#define MUSB_DEVCTL_VBUS_M       0x0018  // VBUS Level (OTG only)
+#define MUSB_DEVCTL_VBUS_NONE    0x0000  // Below SessionEnd
+#define MUSB_DEVCTL_VBUS_SEND    0x0008  // Above SessionEnd, below AValid
+#define MUSB_DEVCTL_VBUS_AVALID  0x0010  // Above AValid, below VBUSValid
+#define MUSB_DEVCTL_VBUS_VALID   0x0018  // Above VBUSValid
+#define MUSB_DEVCTL_HOST         0x0004  // Host Mode
+#define MUSB_DEVCTL_HOSTREQ      0x0002  // Host Request (OTG only)
+#define MUSB_DEVCTL_SESSION      0x0001  // Session Start/End (OTG only)
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_CCONF register.
+// The following are defines for the bit fields in the MUSB_O_CCONF register.
 //
 //*****************************************************************************
-#define USB_CCONF_TXEDMA        0x0002  // TX Early DMA Enable
-#define USB_CCONF_RXEDMA        0x0001  // TX Early DMA Enable
+#define MUSB_CCONF_TXEDMA        0x0002  // TX Early DMA Enable
+#define MUSB_CCONF_RXEDMA        0x0001  // TX Early DMA Enable
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_TXFIFOSZ register.
+// The following are defines for the bit fields in the MUSB_O_TXFIFOSZ register.
 //
 //*****************************************************************************
-#define USB_TXFIFOSZ_DPB        0x0010  // Double Packet Buffer Support
-#define USB_TXFIFOSZ_SIZE_M     0x000F  // Max Packet Size
-#define USB_TXFIFOSZ_SIZE_8     0x0000  // 8
-#define USB_TXFIFOSZ_SIZE_16    0x0001  // 16
-#define USB_TXFIFOSZ_SIZE_32    0x0002  // 32
-#define USB_TXFIFOSZ_SIZE_64    0x0003  // 64
-#define USB_TXFIFOSZ_SIZE_128   0x0004  // 128
-#define USB_TXFIFOSZ_SIZE_256   0x0005  // 256
-#define USB_TXFIFOSZ_SIZE_512   0x0006  // 512
-#define USB_TXFIFOSZ_SIZE_1024  0x0007  // 1024
-#define USB_TXFIFOSZ_SIZE_2048  0x0008  // 2048
+#define MUSB_TXFIFOSZ_DPB        0x0010  // Double Packet Buffer Support
+#define MUSB_TXFIFOSZ_SIZE_M     0x000F  // Max Packet Size
+#define MUSB_TXFIFOSZ_SIZE_8     0x0000  // 8
+#define MUSB_TXFIFOSZ_SIZE_16    0x0001  // 16
+#define MUSB_TXFIFOSZ_SIZE_32    0x0002  // 32
+#define MUSB_TXFIFOSZ_SIZE_64    0x0003  // 64
+#define MUSB_TXFIFOSZ_SIZE_128   0x0004  // 128
+#define MUSB_TXFIFOSZ_SIZE_256   0x0005  // 256
+#define MUSB_TXFIFOSZ_SIZE_512   0x0006  // 512
+#define MUSB_TXFIFOSZ_SIZE_1024  0x0007  // 1024
+#define MUSB_TXFIFOSZ_SIZE_2048  0x0008  // 2048
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_RXFIFOSZ register.
+// The following are defines for the bit fields in the MUSB_O_RXFIFOSZ register.
 //
 //*****************************************************************************
-#define USB_RXFIFOSZ_DPB        0x0010  // Double Packet Buffer Support
-#define USB_RXFIFOSZ_SIZE_M     0x000F  // Max Packet Size
-#define USB_RXFIFOSZ_SIZE_8     0x0000  // 8
-#define USB_RXFIFOSZ_SIZE_16    0x0001  // 16
-#define USB_RXFIFOSZ_SIZE_32    0x0002  // 32
-#define USB_RXFIFOSZ_SIZE_64    0x0003  // 64
-#define USB_RXFIFOSZ_SIZE_128   0x0004  // 128
-#define USB_RXFIFOSZ_SIZE_256   0x0005  // 256
-#define USB_RXFIFOSZ_SIZE_512   0x0006  // 512
-#define USB_RXFIFOSZ_SIZE_1024  0x0007  // 1024
-#define USB_RXFIFOSZ_SIZE_2048  0x0008  // 2048
+#define MUSB_RXFIFOSZ_DPB        0x0010  // Double Packet Buffer Support
+#define MUSB_RXFIFOSZ_SIZE_M     0x000F  // Max Packet Size
+#define MUSB_RXFIFOSZ_SIZE_8     0x0000  // 8
+#define MUSB_RXFIFOSZ_SIZE_16    0x0001  // 16
+#define MUSB_RXFIFOSZ_SIZE_32    0x0002  // 32
+#define MUSB_RXFIFOSZ_SIZE_64    0x0003  // 64
+#define MUSB_RXFIFOSZ_SIZE_128   0x0004  // 128
+#define MUSB_RXFIFOSZ_SIZE_256   0x0005  // 256
+#define MUSB_RXFIFOSZ_SIZE_512   0x0006  // 512
+#define MUSB_RXFIFOSZ_SIZE_1024  0x0007  // 1024
+#define MUSB_RXFIFOSZ_SIZE_2048  0x0008  // 2048
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_TXFIFOADD
+// The following are defines for the bit fields in the MUSB_O_TXFIFOADD
 // register.
 //
 //*****************************************************************************
-#define USB_TXFIFOADD_ADDR_M    0x01FF  // Transmit/Receive Start Address
-#define USB_TXFIFOADD_ADDR_S    0
+#define MUSB_TXFIFOADD_ADDR_M    0x01FF  // Transmit/Receive Start Address
+#define MUSB_TXFIFOADD_ADDR_S    0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_RXFIFOADD
+// The following are defines for the bit fields in the MUSB_O_RXFIFOADD
 // register.
 //
 //*****************************************************************************
-#define USB_RXFIFOADD_ADDR_M    0x01FF  // Transmit/Receive Start Address
-#define USB_RXFIFOADD_ADDR_S    0
+#define MUSB_RXFIFOADD_ADDR_M    0x01FF  // Transmit/Receive Start Address
+#define MUSB_RXFIFOADD_ADDR_S    0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_ULPIVBUSCTL
+// The following are defines for the bit fields in the MUSB_O_ULPIVBUSCTL
 // register.
 //
 //*****************************************************************************
-#define USB_ULPIVBUSCTL_USEEXTVBUSIND  0x0002  // Use External VBUS Indicator
-#define USB_ULPIVBUSCTL_USEEXTVBUS     0x0001  // Use External VBUS
+#define MUSB_ULPIVBUSCTL_USEEXTVBUSIND  0x0002  // Use External VBUS Indicator
+#define MUSB_ULPIVBUSCTL_USEEXTVBUS     0x0001  // Use External VBUS
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_ULPIREGDATA
+// The following are defines for the bit fields in the MUSB_O_ULPIREGDATA
 // register.
 //
 //*****************************************************************************
-#define USB_ULPIREGDATA_REGDATA_M      0x00FF  // Register Data
-#define USB_ULPIREGDATA_REGDATA_S      0
+#define MUSB_ULPIREGDATA_REGDATA_M      0x00FF  // Register Data
+#define MUSB_ULPIREGDATA_REGDATA_S      0
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_ULPIREGADDR
+// The following are defines for the bit fields in the MUSB_O_ULPIREGADDR
 // register.
 //
 //*****************************************************************************
-#define USB_ULPIREGADDR_ADDR_M  0x00FF  // Register Address
-#define USB_ULPIREGADDR_ADDR_S  0
+#define MUSB_ULPIREGADDR_ADDR_M  0x00FF  // Register Address
+#define MUSB_ULPIREGADDR_ADDR_S  0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_ULPIREGCTL
+// The following are defines for the bit fields in the MUSB_O_ULPIREGCTL
 // register.
 //
 //*****************************************************************************
-#define USB_ULPIREGCTL_RDWR     0x0004  // Read/Write Control
-#define USB_ULPIREGCTL_REGCMPLT 0x0002  // Register Access Complete
-#define USB_ULPIREGCTL_REGACC   0x0001  // Initiate Register Access
+#define MUSB_ULPIREGCTL_RDWR     0x0004  // Read/Write Control
+#define MUSB_ULPIREGCTL_REGCMPLT 0x0002  // Register Access Complete
+#define MUSB_ULPIREGCTL_REGACC   0x0001  // Initiate Register Access
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_EPINFO register.
+// The following are defines for the bit fields in the MUSB_O_EPINFO register.
 //
 //*****************************************************************************
-#define USB_EPINFO_RXEP_M       0x00F0  // RX Endpoints
-#define USB_EPINFO_TXEP_M       0x000F  // TX Endpoints
-#define USB_EPINFO_RXEP_S       4
-#define USB_EPINFO_TXEP_S       0
+#define MUSB_EPINFO_RXEP_M       0x00F0  // RX Endpoints
+#define MUSB_EPINFO_TXEP_M       0x000F  // TX Endpoints
+#define MUSB_EPINFO_RXEP_S       4
+#define MUSB_EPINFO_TXEP_S       0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_RAMINFO register.
+// The following are defines for the bit fields in the MUSB_O_RAMINFO register.
 //
 //*****************************************************************************
-#define USB_RAMINFO_DMACHAN_M   0x00F0  // DMA Channels
-#define USB_RAMINFO_RAMBITS_M   0x000F  // RAM Address Bus Width
-#define USB_RAMINFO_DMACHAN_S   4
-#define USB_RAMINFO_RAMBITS_S   0
+#define MUSB_RAMINFO_DMACHAN_M   0x00F0  // DMA Channels
+#define MUSB_RAMINFO_RAMBITS_M   0x000F  // RAM Address Bus Width
+#define MUSB_RAMINFO_DMACHAN_S   4
+#define MUSB_RAMINFO_RAMBITS_S   0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_CONTIM register.
+// The following are defines for the bit fields in the MUSB_O_CONTIM register.
 //
 //*****************************************************************************
-#define USB_CONTIM_WTCON_M      0x00F0  // Connect Wait
-#define USB_CONTIM_WTID_M       0x000F  // Wait ID
-#define USB_CONTIM_WTCON_S      4
-#define USB_CONTIM_WTID_S       0
+#define MUSB_CONTIM_WTCON_M      0x00F0  // Connect Wait
+#define MUSB_CONTIM_WTID_M       0x000F  // Wait ID
+#define MUSB_CONTIM_WTCON_S      4
+#define MUSB_CONTIM_WTID_S       0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_VPLEN register.
+// The following are defines for the bit fields in the MUSB_O_VPLEN register.
 //
 //*****************************************************************************
-#define USB_VPLEN_VPLEN_M       0x00FF  // VBUS Pulse Length
-#define USB_VPLEN_VPLEN_S       0
+#define MUSB_VPLEN_VPLEN_M       0x00FF  // VBUS Pulse Length
+#define MUSB_VPLEN_VPLEN_S       0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_HSEOF register.
+// The following are defines for the bit fields in the MUSB_O_HSEOF register.
 //
 //*****************************************************************************
-#define USB_HSEOF_HSEOFG_M      0x00FF  // HIgh-Speed End-of-Frame Gap
-#define USB_HSEOF_HSEOFG_S      0
+#define MUSB_HSEOF_HSEOFG_M      0x00FF  // HIgh-Speed End-of-Frame Gap
+#define MUSB_HSEOF_HSEOFG_S      0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_FSEOF register.
+// The following are defines for the bit fields in the MUSB_O_FSEOF register.
 //
 //*****************************************************************************
-#define USB_FSEOF_FSEOFG_M      0x00FF  // Full-Speed End-of-Frame Gap
-#define USB_FSEOF_FSEOFG_S      0
+#define MUSB_FSEOF_FSEOFG_M      0x00FF  // Full-Speed End-of-Frame Gap
+#define MUSB_FSEOF_FSEOFG_S      0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_LSEOF register.
+// The following are defines for the bit fields in the MUSB_O_LSEOF register.
 //
 //*****************************************************************************
-#define USB_LSEOF_LSEOFG_M      0x00FF  // Low-Speed End-of-Frame Gap
-#define USB_LSEOF_LSEOFG_S      0
+#define MUSB_LSEOF_LSEOFG_M      0x00FF  // Low-Speed End-of-Frame Gap
+#define MUSB_LSEOF_LSEOFG_S      0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_CSRL0 register.
+// The following are defines for the bit fields in the MUSB_O_CSRL0 register.
 //
 //*****************************************************************************
-#define USB_CSRL0_NAKTO         0x0080  // NAK Timeout
-#define USB_CSRL0_SETENDC       0x0080  // Setup End Clear
-#define USB_CSRL0_STATUS        0x0040  // STATUS Packet
-#define USB_CSRL0_RXRDYC        0x0040  // RXRDY Clear
-#define USB_CSRL0_REQPKT        0x0020  // Request Packet
-#define USB_CSRL0_STALL         0x0020  // Send Stall
-#define USB_CSRL0_SETEND        0x0010  // Setup End
-#define USB_CSRL0_ERROR         0x0010  // Error
-#define USB_CSRL0_DATAEND       0x0008  // Data End
-#define USB_CSRL0_SETUP         0x0008  // Setup Packet
-#define USB_CSRL0_STALLED       0x0004  // Endpoint Stalled
-#define USB_CSRL0_TXRDY         0x0002  // Transmit Packet Ready
-#define USB_CSRL0_RXRDY         0x0001  // Receive Packet Ready
+#define MUSB_CSRL0_NAKTO         0x0080  // NAK Timeout
+#define MUSB_CSRL0_SETENDC       0x0080  // Setup End Clear
+#define MUSB_CSRL0_STATUS        0x0040  // STATUS Packet
+#define MUSB_CSRL0_RXRDYC        0x0040  // RXRDY Clear
+#define MUSB_CSRL0_REQPKT        0x0020  // Request Packet
+#define MUSB_CSRL0_STALL         0x0020  // Send Stall
+#define MUSB_CSRL0_SETEND        0x0010  // Setup End
+#define MUSB_CSRL0_ERROR         0x0010  // Error
+#define MUSB_CSRL0_DATAEND       0x0008  // Data End
+#define MUSB_CSRL0_SETUP         0x0008  // Setup Packet
+#define MUSB_CSRL0_STALLED       0x0004  // Endpoint Stalled
+#define MUSB_CSRL0_TXRDY         0x0002  // Transmit Packet Ready
+#define MUSB_CSRL0_RXRDY         0x0001  // Receive Packet Ready
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_CSRH0 register.
+// The following are defines for the bit fields in the MUSB_O_CSRH0 register.
 //
 //*****************************************************************************
-#define USB_CSRH0_DISPING       0x0008  // PING Disable
-#define USB_CSRH0_DTWE          0x0004  // Data Toggle Write Enable
-#define USB_CSRH0_DT            0x0002  // Data Toggle
-#define USB_CSRH0_FLUSH         0x0001  // Flush FIFO
+#define MUSB_CSRH0_DISPING       0x0008  // PING Disable
+#define MUSB_CSRH0_DTWE          0x0004  // Data Toggle Write Enable
+#define MUSB_CSRH0_DT            0x0002  // Data Toggle
+#define MUSB_CSRH0_FLUSH         0x0001  // Flush FIFO
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_TYPE0 register.
+// The following are defines for the bit fields in the MUSB_O_TYPE0 register.
 //
 //*****************************************************************************
-#define USB_TYPE0_SPEED_M       0x00C0  // Operating Speed
-#define USB_TYPE0_SPEED_HIGH    0x0040  // High
-#define USB_TYPE0_SPEED_FULL    0x0080  // Full
-#define USB_TYPE0_SPEED_LOW     0x00C0  // Low
+#define MUSB_TYPE0_SPEED_M       0x00C0  // Operating Speed
+#define MUSB_TYPE0_SPEED_HIGH    0x0040  // High
+#define MUSB_TYPE0_SPEED_FULL    0x0080  // Full
+#define MUSB_TYPE0_SPEED_LOW     0x00C0  // Low
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_NAKLMT register.
+// The following are defines for the bit fields in the MUSB_O_NAKLMT register.
 //
 //*****************************************************************************
-#define USB_NAKLMT_NAKLMT_M     0x001F  // EP0 NAK Limit
-#define USB_NAKLMT_NAKLMT_S     0
+#define MUSB_NAKLMT_NAKLMT_M     0x001F  // EP0 NAK Limit
+#define MUSB_NAKLMT_NAKLMT_S     0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_TXCSRL1 register.
+// The following are defines for the bit fields in the MUSB_O_TXCSRL1 register.
 //
 //*****************************************************************************
-#define USB_TXCSRL1_NAKTO       0x0080  // NAK Timeout
-#define USB_TXCSRL1_CLRDT       0x0040  // Clear Data Toggle
-#define USB_TXCSRL1_STALLED     0x0020  // Endpoint Stalled
-#define USB_TXCSRL1_STALL       0x0010  // Send STALL
-#define USB_TXCSRL1_SETUP       0x0010  // Setup Packet
-#define USB_TXCSRL1_FLUSH       0x0008  // Flush FIFO
-#define USB_TXCSRL1_ERROR       0x0004  // Error
-#define USB_TXCSRL1_UNDRN       0x0004  // Underrun
-#define USB_TXCSRL1_FIFONE      0x0002  // FIFO Not Empty
-#define USB_TXCSRL1_TXRDY       0x0001  // Transmit Packet Ready
+#define MUSB_TXCSRL1_NAKTO       0x0080  // NAK Timeout
+#define MUSB_TXCSRL1_CLRDT       0x0040  // Clear Data Toggle
+#define MUSB_TXCSRL1_STALLED     0x0020  // Endpoint Stalled
+#define MUSB_TXCSRL1_STALL       0x0010  // Send STALL
+#define MUSB_TXCSRL1_SETUP       0x0010  // Setup Packet
+#define MUSB_TXCSRL1_FLUSH       0x0008  // Flush FIFO
+#define MUSB_TXCSRL1_ERROR       0x0004  // Error
+#define MUSB_TXCSRL1_UNDRN       0x0004  // Underrun
+#define MUSB_TXCSRL1_FIFONE      0x0002  // FIFO Not Empty
+#define MUSB_TXCSRL1_TXRDY       0x0001  // Transmit Packet Ready
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_TXCSRH1 register.
+// The following are defines for the bit fields in the MUSB_O_TXCSRH1 register.
 //
 //*****************************************************************************
-#define USB_TXCSRH1_AUTOSET     0x0080  // Auto Set
-#define USB_TXCSRH1_ISO         0x0040  // Isochronous Transfers
-#define USB_TXCSRH1_MODE        0x0020  // Mode
-#define USB_TXCSRH1_DMAEN       0x0010  // DMA Request Enable
-#define USB_TXCSRH1_FDT         0x0008  // Force Data Toggle
-#define USB_TXCSRH1_DMAMOD      0x0004  // DMA Request Mode
-#define USB_TXCSRH1_DTWE        0x0002  // Data Toggle Write Enable
-#define USB_TXCSRH1_DT          0x0001  // Data Toggle
+#define MUSB_TXCSRH1_AUTOSET     0x0080  // Auto Set
+#define MUSB_TXCSRH1_ISO         0x0040  // Isochronous Transfers
+#define MUSB_TXCSRH1_MODE        0x0020  // Mode
+#define MUSB_TXCSRH1_DMAEN       0x0010  // DMA Request Enable
+#define MUSB_TXCSRH1_FDT         0x0008  // Force Data Toggle
+#define MUSB_TXCSRH1_DMAMOD      0x0004  // DMA Request Mode
+#define MUSB_TXCSRH1_DTWE        0x0002  // Data Toggle Write Enable
+#define MUSB_TXCSRH1_DT          0x0001  // Data Toggle
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_RXCSRL1 register.
+// The following are defines for the bit fields in the MUSB_O_RXCSRL1 register.
 //
 //*****************************************************************************
-#define USB_RXCSRL1_CLRDT       0x0080  // Clear Data Toggle
-#define USB_RXCSRL1_STALLED     0x0040  // Endpoint Stalled
-#define USB_RXCSRL1_STALL       0x0020  // Send STALL
-#define USB_RXCSRL1_REQPKT      0x0020  // Request Packet
-#define USB_RXCSRL1_FLUSH       0x0010  // Flush FIFO
-#define USB_RXCSRL1_DATAERR     0x0008  // Data Error
-#define USB_RXCSRL1_NAKTO       0x0008  // NAK Timeout
-#define USB_RXCSRL1_OVER        0x0004  // Overrun
-#define USB_RXCSRL1_ERROR       0x0004  // Error
-#define USB_RXCSRL1_FULL        0x0002  // FIFO Full
-#define USB_RXCSRL1_RXRDY       0x0001  // Receive Packet Ready
+#define MUSB_RXCSRL1_CLRDT       0x0080  // Clear Data Toggle
+#define MUSB_RXCSRL1_STALLED     0x0040  // Endpoint Stalled
+#define MUSB_RXCSRL1_STALL       0x0020  // Send STALL
+#define MUSB_RXCSRL1_REQPKT      0x0020  // Request Packet
+#define MUSB_RXCSRL1_FLUSH       0x0010  // Flush FIFO
+#define MUSB_RXCSRL1_DATAERR     0x0008  // Data Error
+#define MUSB_RXCSRL1_NAKTO       0x0008  // NAK Timeout
+#define MUSB_RXCSRL1_OVER        0x0004  // Overrun
+#define MUSB_RXCSRL1_ERROR       0x0004  // Error
+#define MUSB_RXCSRL1_FULL        0x0002  // FIFO Full
+#define MUSB_RXCSRL1_RXRDY       0x0001  // Receive Packet Ready
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_RXCSRH1 register.
+// The following are defines for the bit fields in the MUSB_O_RXCSRH1 register.
 //
 //*****************************************************************************
-#define USB_RXCSRH1_AUTOCL      0x0080  // Auto Clear
-#define USB_RXCSRH1_AUTORQ      0x0040  // Auto Request
-#define USB_RXCSRH1_ISO         0x0040  // Isochronous Transfers
-#define USB_RXCSRH1_DMAEN       0x0020  // DMA Request Enable
-#define USB_RXCSRH1_DISNYET     0x0010  // Disable NYET
-#define USB_RXCSRH1_PIDERR      0x0010  // PID Error
-#define USB_RXCSRH1_DMAMOD      0x0008  // DMA Request Mode
-#define USB_RXCSRH1_DTWE        0x0004  // Data Toggle Write Enable
-#define USB_RXCSRH1_DT          0x0002  // Data Toggle
-#define USB_RXCSRH1_INCOMPRX    0x0001  // Incomplete RX Transmission Status
+#define MUSB_RXCSRH1_AUTOCL      0x0080  // Auto Clear
+#define MUSB_RXCSRH1_AUTORQ      0x0040  // Auto Request
+#define MUSB_RXCSRH1_ISO         0x0040  // Isochronous Transfers
+#define MUSB_RXCSRH1_DMAEN       0x0020  // DMA Request Enable
+#define MUSB_RXCSRH1_DISNYET     0x0010  // Disable NYET
+#define MUSB_RXCSRH1_PIDERR      0x0010  // PID Error
+#define MUSB_RXCSRH1_DMAMOD      0x0008  // DMA Request Mode
+#define MUSB_RXCSRH1_DTWE        0x0004  // Data Toggle Write Enable
+#define MUSB_RXCSRH1_DT          0x0002  // Data Toggle
+#define MUSB_RXCSRH1_INCOMPRX    0x0001  // Incomplete RX Transmission Status
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_TXTYPE1 register.
+// The following are defines for the bit fields in the MUSB_O_TXTYPE1 register.
 //
 //*****************************************************************************
-#define USB_TXTYPE1_SPEED_M     0x00C0  // Operating Speed
-#define USB_TXTYPE1_SPEED_DFLT  0x0000  // Default
-#define USB_TXTYPE1_SPEED_HIGH  0x0040  // High
-#define USB_TXTYPE1_SPEED_FULL  0x0080  // Full
-#define USB_TXTYPE1_SPEED_LOW   0x00C0  // Low
-#define USB_TXTYPE1_PROTO_M     0x0030  // Protocol
-#define USB_TXTYPE1_PROTO_CTRL  0x0000  // Control
-#define USB_TXTYPE1_PROTO_ISOC  0x0010  // Isochronous
-#define USB_TXTYPE1_PROTO_BULK  0x0020  // Bulk
-#define USB_TXTYPE1_PROTO_INT   0x0030  // Interrupt
-#define USB_TXTYPE1_TEP_M       0x000F  // Target Endpoint Number
-#define USB_TXTYPE1_TEP_S       0
+#define MUSB_TXTYPE1_SPEED_M     0x00C0  // Operating Speed
+#define MUSB_TXTYPE1_SPEED_DFLT  0x0000  // Default
+#define MUSB_TXTYPE1_SPEED_HIGH  0x0040  // High
+#define MUSB_TXTYPE1_SPEED_FULL  0x0080  // Full
+#define MUSB_TXTYPE1_SPEED_LOW   0x00C0  // Low
+#define MUSB_TXTYPE1_PROTO_M     0x0030  // Protocol
+#define MUSB_TXTYPE1_PROTO_CTRL  0x0000  // Control
+#define MUSB_TXTYPE1_PROTO_ISOC  0x0010  // Isochronous
+#define MUSB_TXTYPE1_PROTO_BULK  0x0020  // Bulk
+#define MUSB_TXTYPE1_PROTO_INT   0x0030  // Interrupt
+#define MUSB_TXTYPE1_TEP_M       0x000F  // Target Endpoint Number
+#define MUSB_TXTYPE1_TEP_S       0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_TXINTERVAL1
+// The following are defines for the bit fields in the MUSB_O_TXINTERVAL1
 // register.
 //
 //*****************************************************************************
-#define USB_TXINTERVAL1_NAKLMT_M 0x00FF  // NAK Limit
-#define USB_TXINTERVAL1_TXPOLL_M 0x00FF  // TX Polling
-#define USB_TXINTERVAL1_TXPOLL_S 0
-#define USB_TXINTERVAL1_NAKLMT_S 0
+#define MUSB_TXINTERVAL1_NAKLMT_M 0x00FF  // NAK Limit
+#define MUSB_TXINTERVAL1_TXPOLL_M 0x00FF  // TX Polling
+#define MUSB_TXINTERVAL1_TXPOLL_S 0
+#define MUSB_TXINTERVAL1_NAKLMT_S 0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_RXTYPE1 register.
+// The following are defines for the bit fields in the MUSB_O_RXTYPE1 register.
 //
 //*****************************************************************************
-#define USB_RXTYPE1_SPEED_M     0x00C0  // Operating Speed
-#define USB_RXTYPE1_SPEED_DFLT  0x0000  // Default
-#define USB_RXTYPE1_SPEED_HIGH  0x0040  // High
-#define USB_RXTYPE1_SPEED_FULL  0x0080  // Full
-#define USB_RXTYPE1_SPEED_LOW   0x00C0  // Low
-#define USB_RXTYPE1_PROTO_M     0x0030  // Protocol
-#define USB_RXTYPE1_PROTO_CTRL  0x0000  // Control
-#define USB_RXTYPE1_PROTO_ISOC  0x0010  // Isochronous
-#define USB_RXTYPE1_PROTO_BULK  0x0020  // Bulk
-#define USB_RXTYPE1_PROTO_INT   0x0030  // Interrupt
-#define USB_RXTYPE1_TEP_M       0x000F  // Target Endpoint Number
-#define USB_RXTYPE1_TEP_S       0
+#define MUSB_RXTYPE1_SPEED_M     0x00C0  // Operating Speed
+#define MUSB_RXTYPE1_SPEED_DFLT  0x0000  // Default
+#define MUSB_RXTYPE1_SPEED_HIGH  0x0040  // High
+#define MUSB_RXTYPE1_SPEED_FULL  0x0080  // Full
+#define MUSB_RXTYPE1_SPEED_LOW   0x00C0  // Low
+#define MUSB_RXTYPE1_PROTO_M     0x0030  // Protocol
+#define MUSB_RXTYPE1_PROTO_CTRL  0x0000  // Control
+#define MUSB_RXTYPE1_PROTO_ISOC  0x0010  // Isochronous
+#define MUSB_RXTYPE1_PROTO_BULK  0x0020  // Bulk
+#define MUSB_RXTYPE1_PROTO_INT   0x0030  // Interrupt
+#define MUSB_RXTYPE1_TEP_M       0x000F  // Target Endpoint Number
+#define MUSB_RXTYPE1_TEP_S       0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_RXINTERVAL1
+// The following are defines for the bit fields in the MUSB_O_RXINTERVAL1
 // register.
 //
 //*****************************************************************************
-#define USB_RXINTERVAL1_TXPOLL_M 0x00FF  // RX Polling
-#define USB_RXINTERVAL1_NAKLMT_M 0x00FF  // NAK Limit
-#define USB_RXINTERVAL1_TXPOLL_S 0
-#define USB_RXINTERVAL1_NAKLMT_S 0
+#define MUSB_RXINTERVAL1_TXPOLL_M 0x00FF  // RX Polling
+#define MUSB_RXINTERVAL1_NAKLMT_M 0x00FF  // NAK Limit
+#define MUSB_RXINTERVAL1_TXPOLL_S 0
+#define MUSB_RXINTERVAL1_NAKLMT_S 0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_DMACTL0 register.
+// The following are defines for the bit fields in the MUSB_O_DMACTL0 register.
 //
 //*****************************************************************************
-#define USB_DMACTL0_BRSTM_M     0x0600  // Burst Mode
-#define USB_DMACTL0_BRSTM_ANY   0x0000  // Bursts of unspecified length
-#define USB_DMACTL0_BRSTM_INC4  0x0200  // INCR4 or unspecified length
-#define USB_DMACTL0_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
+#define MUSB_DMACTL0_BRSTM_M     0x0600  // Burst Mode
+#define MUSB_DMACTL0_BRSTM_ANY   0x0000  // Bursts of unspecified length
+#define MUSB_DMACTL0_BRSTM_INC4  0x0200  // INCR4 or unspecified length
+#define MUSB_DMACTL0_BRSTM_INC8  0x0400  // INCR8, INCR4 or unspecified
                                             // length
-#define USB_DMACTL0_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
+#define MUSB_DMACTL0_BRSTM_INC16 0x0600  // INCR16, INCR8, INCR4 or
                                             // unspecified length
-#define USB_DMACTL0_ERR         0x0100  // Bus Error Bit
-#define USB_DMACTL0_EP_M        0x00F0  // Endpoint number
-#define USB_DMACTL0_IE          0x0008  // DMA Interrupt Enable
-#define USB_DMACTL0_MODE        0x0004  // DMA Transfer Mode
-#define USB_DMACTL0_DIR         0x0002  // DMA Direction
-#define USB_DMACTL0_ENABLE      0x0001  // DMA Transfer Enable
-#define USB_DMACTL0_EP_S        4
+#define MUSB_DMACTL0_ERR         0x0100  // Bus Error Bit
+#define MUSB_DMACTL0_EP_M        0x00F0  // Endpoint number
+#define MUSB_DMACTL0_IE          0x0008  // DMA Interrupt Enable
+#define MUSB_DMACTL0_MODE        0x0004  // DMA Transfer Mode
+#define MUSB_DMACTL0_DIR         0x0002  // DMA Direction
+#define MUSB_DMACTL0_ENABLE      0x0001  // DMA Transfer Enable
+#define MUSB_DMACTL0_EP_S        4
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_DMAADDR0 register.
+// The following are defines for the bit fields in the MUSB_O_DMAADDR0 register.
 //
 //*****************************************************************************
-#define USB_DMAADDR0_ADDR_M     0xFFFFFFFC  // DMA Address
-#define USB_DMAADDR0_ADDR_S     2
+#define MUSB_DMAADDR0_ADDR_M     0xFFFFFFFC  // DMA Address
+#define MUSB_DMAADDR0_ADDR_S     2
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_DMACOUNT0
+// The following are defines for the bit fields in the MUSB_O_DMACOUNT0
 // register.
 //
 //*****************************************************************************
-#define USB_DMACOUNT0_COUNT_M   0xFFFFFFFC  // DMA Count
-#define USB_DMACOUNT0_COUNT_S   2
+#define MUSB_DMACOUNT0_COUNT_M   0xFFFFFFFC  // DMA Count
+#define MUSB_DMACOUNT0_COUNT_S   2
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_CTO register.
+// The following are defines for the bit fields in the MUSB_O_CTO register.
 //
 //*****************************************************************************
-#define USB_CTO_CCTV_M          0xFFFF  // Configurable Chirp Timeout Value
-#define USB_CTO_CCTV_S          0
+#define MUSB_CTO_CCTV_M          0xFFFF  // Configurable Chirp Timeout Value
+#define MUSB_CTO_CCTV_S          0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_HHSRTN register.
+// The following are defines for the bit fields in the MUSB_O_HHSRTN register.
 //
 //*****************************************************************************
-#define USB_HHSRTN_HHSRTN_M     0xFFFF  // HIgh Speed to UTM Operating
+#define MUSB_HHSRTN_HHSRTN_M     0xFFFF  // HIgh Speed to UTM Operating
                                             // Delay
-#define USB_HHSRTN_HHSRTN_S     0
+#define MUSB_HHSRTN_HHSRTN_S     0
 
 //*****************************************************************************
 //
-// The following are defines for the bit fields in the USB_O_HSBT register.
+// The following are defines for the bit fields in the MUSB_O_HSBT register.
 //
 //*****************************************************************************
-#define USB_HSBT_HSBT_M         0x000F  // High Speed Timeout Adder
-#define USB_HSBT_HSBT_S         0
+#define MUSB_HSBT_HSBT_M         0x000F  // High Speed Timeout Adder
+#define MUSB_HSBT_HSBT_S         0
 
 #ifdef __cplusplus
  }

From 76eb2f506642968b2b0079326483905e79d20d2f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 18 Aug 2024 16:34:58 +0700
Subject: [PATCH 173/204] more musb update

---
 src/portable/mentor/musb/dcd_musb.c   | 79 ++++++++++++++-------------
 src/portable/mentor/musb/musb_max32.h | 12 ++--
 src/portable/mentor/musb/musb_type.h  | 14 +++--
 3 files changed, 54 insertions(+), 51 deletions(-)

diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index 3fd4d953af..585480772f 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -643,8 +643,7 @@ void dcd_sof_enable(uint8_t rhport, bool en)
 //--------------------------------------------------------------------+
 
 // Configure endpoint's registers according to descriptor
-bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
-{
+bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) {
   const unsigned ep_addr = ep_desc->bEndpointAddress;
   const unsigned epn     = tu_edpt_number(ep_addr);
   const unsigned dir_in  = tu_edpt_dir(ep_addr);
@@ -662,22 +661,30 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   musb_ep_csr_t* ep_csr = get_ep_csr(musb, epn);
 
   const uint8_t is_rx = 1 - dir_in;
-  ep_csr->maxp_csr[is_rx].maxp = mps;
-  ep_csr->maxp_csr[is_rx].csrh = (xfer == TUSB_XFER_ISOCHRONOUS) ? MUSB_RXCSRH1_ISO : 0;
+  musb_ep_maxp_csr_t* maxp_csr = &ep_csr->maxp_csr[is_rx];
+  maxp_csr->maxp = mps;
+  maxp_csr->csrh = (xfer == TUSB_XFER_ISOCHRONOUS) ? MUSB_RXCSRH1_ISO : 0;
 
+  // flush and reset data toggle
   uint8_t csrl = MUSB_CSRL_CLEAR_DATA_TOGGLE(is_rx);
-  if (ep_csr->maxp_csr[is_rx].csrl & MUSB_CSRL_PACKET_READY(is_rx)) {
+  if (maxp_csr->csrl & MUSB_CSRL_PACKET_READY(is_rx)) {
     csrl |= MUSB_CSRL_FLUSH_FIFO(is_rx);
   }
-  ep_csr->maxp_csr[is_rx].csrl = csrl;
+  maxp_csr->csrl = csrl;
+
   musb->intren_ep[is_rx] |= TU_BIT(epn);
 
-  /* Setup FIFO */
   fifo_configure(musb, epn, dir_in, mps);
 
   return true;
 }
 
+// bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+// }
+//
+// bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
+// }
+
 void dcd_edpt_close_all(uint8_t rhport)
 {
   musb_regs_t* musb = MUSB_REGS(rhport);
@@ -688,23 +695,20 @@ void dcd_edpt_close_all(uint8_t rhport)
   musb->intr_rxen = 0;
   for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
     musb_ep_csr_t* ep_csr = get_ep_csr(musb, i);
-    ep_csr->tx_maxp = 0;
-    ep_csr->tx_csrh = 0;
-    if (ep_csr->tx_csrl & MUSB_TXCSRL1_TXRDY)
-      ep_csr->tx_csrl = MUSB_TXCSRL1_CLRDT | MUSB_TXCSRL1_FLUSH;
-    else
-      ep_csr->tx_csrl = MUSB_TXCSRL1_CLRDT;
+    for (unsigned d = 0; d < 2; d++) {
+      musb_ep_maxp_csr_t* maxp_csr = &ep_csr->maxp_csr[d];
+      maxp_csr->maxp = 0;
+      maxp_csr->csrh = 0;
+
+      // flush and reset data toggle
+      uint8_t csrl = MUSB_CSRL_CLEAR_DATA_TOGGLE(d);
+      if (maxp_csr->csrl & MUSB_CSRL_PACKET_READY(is_rx)) {
+        csrl |= MUSB_CSRL_FLUSH_FIFO(d);
+      }
+      maxp_csr->csrl = csrl;
 
-    ep_csr->rx_maxp = 0;
-    ep_csr->rx_csrh = 0;
-    if (ep_csr->rx_csrl & MUSB_RXCSRL1_RXRDY) {
-      ep_csr->rx_csrl = MUSB_RXCSRL1_CLRDT | MUSB_RXCSRL1_FLUSH;
-    } else {
-      ep_csr->rx_csrl = MUSB_RXCSRL1_CLRDT;
+      fifo_reset(musb, i, 1-d);
     }
-
-    fifo_reset(musb, i, 0);
-    fifo_reset(musb, i, 1);
   }
 
 #if MUSB_CFG_DYNAMIC_FIFO
@@ -755,12 +759,14 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
   unsigned const epnum = tu_edpt_number(ep_addr);
   unsigned const ie = musb_dcd_get_int_enable(rhport);
   musb_dcd_int_disable(rhport);
+
   if (epnum) {
     _dcd.pipe_buf_is_fifo[tu_edpt_dir(ep_addr)] &= ~TU_BIT(epnum - 1);
     ret = edpt_n_xfer(rhport, ep_addr, buffer, total_bytes);
   } else {
     ret = edpt0_xfer(rhport, ep_addr, buffer, total_bytes);
   }
+
   if (ie) musb_dcd_int_enable(rhport);
   return ret;
 }
@@ -783,11 +789,13 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_
 
 // Stall endpoint
 void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
-  unsigned const epn = tu_edpt_number(ep_addr);
   unsigned const ie = musb_dcd_get_int_enable(rhport);
+  musb_dcd_int_disable(rhport);
+
+  unsigned const epn = tu_edpt_number(ep_addr);
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
   musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epn);
-  musb_dcd_int_disable(rhport);
+
   if (0 == epn) {
     if (!ep_addr) { /* Ignore EP80 */
       _dcd.setup_packet.bmRequestType = REQUEST_TYPE_INVALID;
@@ -795,13 +803,10 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
       ep_csr->csr0l = MUSB_CSRL0_STALL;
     }
   } else {
-    if (tu_edpt_dir(ep_addr)) { /* IN */
-      ep_csr->tx_csrl = MUSB_TXCSRL1_STALL;
-    } else { /* OUT */
-      TU_ASSERT(!(ep_csr->rx_csrl & MUSB_RXCSRL1_RXRDY),);
-      ep_csr->rx_csrl = MUSB_RXCSRL1_STALL;
-    }
+    const uint8_t is_rx = 1 - tu_edpt_dir(ep_addr);
+    ep_csr->maxp_csr[is_rx].csrl = MUSB_CSRL_SEND_STALL(is_rx);
   }
+
   if (ie) musb_dcd_int_enable(rhport);
 }
 
@@ -809,16 +814,16 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
 void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 {
   (void)rhport;
+  unsigned const ie = musb_dcd_get_int_enable(rhport);
+  musb_dcd_int_disable(rhport);
+
   unsigned const epn = tu_edpt_number(ep_addr);
   musb_regs_t* musb_regs = MUSB_REGS(rhport);
   musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epn);
-  unsigned const ie = musb_dcd_get_int_enable(rhport);
-  musb_dcd_int_disable(rhport);
-  if (tu_edpt_dir(ep_addr)) { /* IN */
-    ep_csr->tx_csrl = MUSB_TXCSRL1_CLRDT;
-  } else { /* OUT */
-    ep_csr->rx_csrl = MUSB_RXCSRL1_CLRDT;
-  }
+  const uint8_t is_rx = 1 - tu_edpt_dir(ep_addr);
+
+  ep_csr->maxp_csr[is_rx].csrl = MUSB_CSRL_CLEAR_DATA_TOGGLE(is_rx);
+
   if (ie) musb_dcd_int_enable(rhport);
 }
 
diff --git a/src/portable/mentor/musb/musb_max32.h b/src/portable/mentor/musb/musb_max32.h
index 38e80f6806..35849b5f83 100644
--- a/src/portable/mentor/musb/musb_max32.h
+++ b/src/portable/mentor/musb/musb_max32.h
@@ -47,18 +47,15 @@ static const IRQn_Type musb_irqs[] = {
     USB_IRQn
 };
 
-TU_ATTR_ALWAYS_INLINE
-static inline void musb_dcd_int_enable(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void musb_dcd_int_enable(uint8_t rhport) {
   NVIC_EnableIRQ(musb_irqs[rhport]);
 }
 
-TU_ATTR_ALWAYS_INLINE
-static inline void musb_dcd_int_disable(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void musb_dcd_int_disable(uint8_t rhport) {
   NVIC_DisableIRQ(musb_irqs[rhport]);
 }
 
-TU_ATTR_ALWAYS_INLINE
-static inline unsigned musb_dcd_get_int_enable(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline unsigned musb_dcd_get_int_enable(uint8_t rhport) {
   #ifdef NVIC_GetEnableIRQ // only defined in CMSIS 5
   return NVIC_GetEnableIRQ(musb_irqs[rhport]);
   #else
@@ -67,8 +64,7 @@ static inline unsigned musb_dcd_get_int_enable(uint8_t rhport) {
   #endif
 }
 
-TU_ATTR_ALWAYS_INLINE
-static inline void musb_dcd_int_clear(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void musb_dcd_int_clear(uint8_t rhport) {
   NVIC_ClearPendingIRQ(musb_irqs[rhport]);
 }
 
diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index 3415f74b54..f8a66accef 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -83,6 +83,12 @@
   #define __R  volatile const
 #endif
 
+typedef struct TU_ATTR_PACKED {
+  __IO uint16_t maxp;          // 0x00, 0x04: MAXP
+  __IO uint8_t  csrl;          // 0x02, 0x06: CSRL
+  __IO uint8_t  csrh;          // 0x03, 0x07: CSRH
+}musb_ep_maxp_csr_t;
+
 // 0: TX (device IN, host OUT)
 // 1: RX (device OUT, host IN)
 typedef struct TU_ATTR_PACKED {
@@ -103,11 +109,7 @@ typedef struct TU_ATTR_PACKED {
       __IO uint8_t  rx_csrh;       // 0x07: RX CSRH
     };
 
-    struct {
-      __IO uint16_t maxp;          // 0x00: MAXP
-      __IO uint8_t  csrl;          // 0x02: CSRL
-      __IO uint8_t  csrh;          // 0x03: CSRH
-    }maxp_csr[2];
+    musb_ep_maxp_csr_t maxp_csr[2];
   };
 
   union {
@@ -330,7 +332,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 #define MUSB_CSRL_PACKET_READY(_rx)      (1u << 0)
 #define MUSB_CSRL_FLUSH_FIFO(_rx)        (1u << ((_rx) ? 4 : 3))
 #define MUSB_CSRL_SEND_STALL(_rx)        (1u << ((_rx) ? 5 : 4))
-#define MUSB_CSRL_SENT_STALL(_rx)        (1u << ((_rx) ? 6 : 5))
+#define MUSB_CSRL_STALLED(_rx)           (1u << ((_rx) ? 6 : 5))
 #define MUSB_CSRL_CLEAR_DATA_TOGGLE(_rx) (1u << ((_rx) ? 7 : 6))
 
 // 0x13, 0x17: TX/RX CSRH

From e345380723051ac3342a724660e877d7b2dad2fb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 18 Aug 2024 17:15:07 +0700
Subject: [PATCH 174/204] add flash_openocd_adi() for use with max32 add
 feather max32666 to the hil pool

---
 hw/bsp/family_support.cmake  | 19 +++++++++++++++++++
 hw/bsp/max32650/family.cmake |  2 ++
 hw/bsp/max32666/family.cmake | 16 ++--------------
 test/hil/hil_test.py         | 12 +++++++++++-
 test/hil/rpi.json            |  7 +++++++
 5 files changed, 41 insertions(+), 15 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 4a31f6218d..1df8a6f531 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -480,6 +480,25 @@ function(family_flash_openocd_wch TARGET)
 endfunction()
 
 
+# Add flash openocd adi (Analog Devices) target
+# included with msdk or compiled from release branch of https://github.com/analogdevicesinc/openocd
+function(family_flash_openocd_adi TARGET)
+  if (DEFINED $ENV{MAXIM_PATH})
+    # use openocd from msdk
+    set(OPENOCD ENV{MAXIM_PATH}/Tools/OpenOCD/openocd)
+    set(OPENOCD_OPTION2 "-s ENV{MAXIM_PATH}/Tools/OpenOCD/scripts")
+  else()
+    # compiled from source
+    if (NOT DEFINED OPENOCD_ADI_PATH)
+      set(OPENOCD_ADI_PATH $ENV{HOME}/app/openocd_adi)
+    endif ()
+    set(OPENOCD ${OPENOCD_ADI_PATH}/src/openocd)
+    set(OPENOCD_OPTION2 "-s ${OPENOCD_ADI_PATH}/tcl")
+  endif ()
+
+  family_flash_openocd(${TARGET})
+endfunction()
+
 # Add flash with https://github.com/ch32-rs/wlink
 function(family_flash_wlink_rs TARGET)
   if (NOT DEFINED WLINK_RS)
diff --git a/hw/bsp/max32650/family.cmake b/hw/bsp/max32650/family.cmake
index 8c4f286a2b..e05bd7652a 100644
--- a/hw/bsp/max32650/family.cmake
+++ b/hw/bsp/max32650/family.cmake
@@ -14,6 +14,7 @@ set(LD_FILE_Clang ${LD_FILE_GNU})
 set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 set(JLINK_DEVICE max32650)
+set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -f target/max32650.cfg")
 
 set(FAMILY_MCUS MAX32650 CACHE INTERNAL "")
 
@@ -150,6 +151,7 @@ function(family_configure_example TARGET RTOS)
 
   # Add the optional MSDK OpenOCD flashing
   family_flash_msdk(${TARGET})
+  family_flash_openocd_adi(${TARGET})
 endfunction()
 
 function(family_flash_msdk TARGET)
diff --git a/hw/bsp/max32666/family.cmake b/hw/bsp/max32666/family.cmake
index 4a3f1a428c..fb8c322954 100644
--- a/hw/bsp/max32666/family.cmake
+++ b/hw/bsp/max32666/family.cmake
@@ -15,6 +15,7 @@ set(LD_FILE_Clang ${LD_FILE_GNU})
 set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 set(JLINK_DEVICE max32666)
+set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -f target/max32665.cfg")
 
 set(FAMILY_MCUS MAX32666 CACHE INTERNAL "")
 
@@ -142,18 +143,5 @@ function(family_configure_example TARGET RTOS)
 
   # Flashing
   family_flash_jlink(${TARGET})
-  family_flash_msdk(${TARGET})
-endfunction()
-
-# Add flash msdk target
-function(family_flash_msdk TARGET)
-  set(MAXIM_PATH "$ENV{MAXIM_PATH}")
-
-  add_custom_target(${TARGET}-msdk
-    DEPENDS ${TARGET}
-    COMMAND ${MAXIM_PATH}/Tools/OpenOCD/openocd -s ${MAXIM_PATH}/Tools/OpenOCD/scripts
-		        -f interface/cmsis-dap.cfg -f target/max32665.cfg
-		        -c "program $<TARGET_FILE:${TARGET}> verify; init; reset; exit"
-    VERBATIM
-    )
+  family_flash_openocd_adi(${TARGET})
 endfunction()
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 1d5f98e5ca..e5900c616d 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -173,10 +173,20 @@ def flash_openocd_wch(board, firmware):
         with open(f_wch, 'w') as file:
             file.write(cfg_content)
 
-    ret = run_cmd(f'openocd_wch -c "adapter serial {board["flasher_sn"]}" -f {f_wch} -c "program {firmware}.elf reset exit"')
+    ret = run_cmd(f'openocd_wch -c "adapter serial {board["flasher_sn"]}" -f {f_wch} '
+                  f'-c "program {firmware}.elf reset exit"')
     return ret
 
 
+def flash_openocd_adi(board, firmware):
+    openocd_adi_script_path = f'{os.getenv("HOME")}/app/openocd_adi/tcl'
+    if not os.path.exists(openocd_adi_script_path):
+        openocd_adi_script_path = '/home/pi/openocd_adi/tcl'
+
+    ret = run_cmd(f'openocd_adi -c "adapter serial {board["flasher_sn"]}" -s {openocd_adi_script_path} '
+                  f'{board["flasher_args"]} -c "program {firmware}.elf reset exit"')
+    return ret
+
 def flash_wlink_rs(board, firmware):
     # wlink use index for probe selection and lacking usb serial support
     ret = run_cmd(f'wlink flash {firmware}.elf')
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index b7d36c543d..a10fa76bda 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -14,6 +14,13 @@
             "flasher_sn": "E6614C311B597D32",
             "flasher_args": "-f interface/cmsis-dap.cfg -f target/atsame5x.cfg -c \"adapter speed 5000\""
         },
+        {
+            "name": "max32666fthr",
+            "uid": "0C81464124010B20FF0A08CC2C",
+            "flasher": "openocd_adi",
+            "flasher_sn": "040917023bffc88100000000000000000000000097969906",
+            "flasher_args": "-f interface/cmsis-dap.cfg -f target/max32665.cfg"
+        },
         {
             "name": "lpcxpresso11u37",
             "uid": "17121919",

From 8fdd8d9a7b83bfb79ac9a02142592d7ee4948b83 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 19 Aug 2024 11:59:41 +0700
Subject: [PATCH 175/204] implement dcd_edpt_iso_alloc/dcd_edpt_iso_activate
 for musb. video_capture example with iso kind of work but not smoothly. audio
 example does not seems to work as expected

---
 hw/bsp/max32690/family.cmake         |   1 +
 src/common/tusb_mcu.h                |   3 +-
 src/device/dcd.h                     |  15 +-
 src/device/usbd.c                    |  18 ++-
 src/portable/mentor/musb/dcd_musb.c  | 198 +++++++++++++++------------
 src/portable/mentor/musb/musb_ti.h   | 145 +-------------------
 src/portable/mentor/musb/musb_type.h |  56 +-------
 7 files changed, 147 insertions(+), 289 deletions(-)

diff --git a/hw/bsp/max32690/family.cmake b/hw/bsp/max32690/family.cmake
index 58647e4320..736ca8eac2 100644
--- a/hw/bsp/max32690/family.cmake
+++ b/hw/bsp/max32690/family.cmake
@@ -15,6 +15,7 @@ set(LD_FILE_Clang ${LD_FILE_GNU})
 set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 set(JLINK_DEVICE max32690)
+set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -f target/max32690.cfg")
 
 set(FAMILY_MCUS MAX32690 CACHE INTERNAL "")
 
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index b7cbd83df7..e86f55c1dc 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -518,7 +518,8 @@
   #define TU_ATTR_FAST_FUNC
 #endif
 
-#if defined(TUP_USBIP_DWC2) || defined(TUP_USBIP_FSDEV)
+// USBIP that support ISO alloc & activate API
+#if defined(TUP_USBIP_DWC2) || defined(TUP_USBIP_FSDEV) || defined(TUP_USBIP_MUSB)
   #define TUP_DCD_EDPT_ISO_ALLOC
 #endif
 
diff --git a/src/device/dcd.h b/src/device/dcd.h
index 41e0fbee32..66fae08026 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -157,10 +157,6 @@ bool dcd_edpt_open            (uint8_t rhport, tusb_desc_endpoint_t const * desc
 // required for multiple configuration support.
 void dcd_edpt_close_all       (uint8_t rhport);
 
-// Close an endpoint.
-// Since it is weak, caller must TU_ASSERT this function's existence before calling it.
-void dcd_edpt_close           (uint8_t rhport, uint8_t ep_addr) TU_ATTR_WEAK;
-
 // Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack
 bool dcd_edpt_xfer            (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes);
 
@@ -175,12 +171,19 @@ void dcd_edpt_stall           (uint8_t rhport, uint8_t ep_addr);
 // This API never calls with control endpoints, since it is auto cleared when receiving setup packet
 void dcd_edpt_clear_stall     (uint8_t rhport, uint8_t ep_addr);
 
+#ifdef TUP_DCD_EDPT_ISO_ALLOC
 // Allocate packet buffer used by ISO endpoints
 // Some MCU need manual packet buffer allocation, we allocate the largest size to avoid clustering
-TU_ATTR_WEAK bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size);
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size);
 
 // Configure and enable an ISO endpoint according to descriptor
-TU_ATTR_WEAK bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep);
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep);
+
+#else
+// Close an endpoint.
+void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr);
+
+#endif
 
 //--------------------------------------------------------------------+
 // Event API (implemented by stack)
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 7089e9cf1d..d6f69fc243 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -1418,6 +1418,10 @@ bool usbd_edpt_stalled(uint8_t rhport, uint8_t ep_addr) {
  * In progress transfers on this EP may be delivered after this call.
  */
 void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
+#ifdef TUP_DCD_EDPT_ISO_ALLOC
+  (void) rhport; (void) ep_addr;
+  // ISO alloc/activate Should be used instead
+#else
   rhport = _usbd_rhport;
 
   TU_ASSERT(dcd_edpt_close, /**/);
@@ -1430,6 +1434,7 @@ void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
   _usbd_dev.ep_status[epnum][dir].stalled = 0;
   _usbd_dev.ep_status[epnum][dir].busy = 0;
   _usbd_dev.ep_status[epnum][dir].claimed = 0;
+#endif
 
   return;
 }
@@ -1452,21 +1457,24 @@ void usbd_sof_enable(uint8_t rhport, sof_consumer_t consumer, bool en) {
 }
 
 bool usbd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+#ifdef TUP_DCD_EDPT_ISO_ALLOC
   rhport = _usbd_rhport;
 
-  TU_ASSERT(dcd_edpt_iso_alloc);
   TU_ASSERT(tu_edpt_number(ep_addr) < CFG_TUD_ENDPPOINT_MAX);
-
   return dcd_edpt_iso_alloc(rhport, ep_addr, largest_packet_size);
+#else
+  (void) rhport; (void) ep_addr; (void) largest_packet_size;
+  return false;
+#endif
 }
 
 bool usbd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const* desc_ep) {
+#ifdef TUP_DCD_EDPT_ISO_ALLOC
   rhport = _usbd_rhport;
 
   uint8_t const epnum = tu_edpt_number(desc_ep->bEndpointAddress);
   uint8_t const dir = tu_edpt_dir(desc_ep->bEndpointAddress);
 
-  TU_ASSERT(dcd_edpt_iso_activate);
   TU_ASSERT(epnum < CFG_TUD_ENDPPOINT_MAX);
   TU_ASSERT(tu_edpt_validate(desc_ep, (tusb_speed_t) _usbd_dev.speed));
 
@@ -1474,6 +1482,10 @@ bool usbd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const* desc_ep)
   _usbd_dev.ep_status[epnum][dir].busy = 0;
   _usbd_dev.ep_status[epnum][dir].claimed = 0;
   return dcd_edpt_iso_activate(rhport, desc_ep);
+#else
+  (void) rhport; (void) desc_ep;
+  return false;
+#endif
 }
 
 #endif
diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index 585480772f..dc2753ea66 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -94,64 +94,71 @@ static dcd_data_t _dcd;
 // First 64 bytes are reserved for EP0
 static uint32_t alloced_fifo_bytes;
 
-TU_ATTR_ALWAYS_INLINE static inline void fifo_reset(musb_regs_t* musb, unsigned epnum, unsigned dir_in) {
+// ffsize is log2(mps) - 3 (round up)
+TU_ATTR_ALWAYS_INLINE static inline uint8_t hwfifo_byte2size(uint16_t nbytes) {
+  uint8_t ffsize = 28 - tu_min8(28, __builtin_clz(nbytes));
+  // round up to the next power of 2
+  if ((8u << ffsize) < nbytes) {
+    ++ffsize;
+  }
+
+  return ffsize;
+}
+
+// index register is already set
+TU_ATTR_ALWAYS_INLINE static inline void hwfifo_reset(musb_regs_t* musb, unsigned epnum, unsigned dir_in) {
+  (void) epnum;
   const uint8_t is_rx = 1 - dir_in;
-  musb->index = epnum;
   musb->fifo_size[is_rx] = 0;
   musb->fifo_addr[is_rx] = 0;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline bool fifo_configure(musb_regs_t* musb, unsigned epnum, unsigned dir_in, unsigned mps) {
-  // ffsize is log2(mps) - 3 (round up)
-  uint8_t ffsize = 28 - tu_min8(28, __builtin_clz(mps));
-  // round up to the next power of 2
-  if ((8u << ffsize) < mps) {
-    ++ffsize;
-    mps = 8 << ffsize;
+// index register is already set
+TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsigned epnum, unsigned dir_in, unsigned mps, bool double_packet) {
+  (void) epnum;
+  uint8_t ffsize = hwfifo_byte2size(mps);
+  mps = 8 << ffsize; // round up to the next power of 2
+
+  if (double_packet) {
+    ffsize |= MUSB_FIFOSZ_DOUBLE_PACKET;
+    mps <<= 1;
   }
 
   TU_ASSERT(alloced_fifo_bytes + mps <= MUSB_CFG_DYNAMIC_FIFO_SIZE);
   const uint8_t is_rx = 1 - dir_in;
-  musb->index = epnum;
+
   musb->fifo_addr[is_rx] = alloced_fifo_bytes / 8;
   musb->fifo_size[is_rx] = ffsize;
 
   alloced_fifo_bytes += mps;
-
   return true;
 }
 
 #else
-TU_ATTR_ALWAYS_INLINE static inline void fifo_reset(musb_regs_t* musb, unsigned epnum, unsigned dir_in) {
-  const uint8_t is_rx = 1 - dir_in;
-  musb->index = epnum;
 
-  #if defined(TUP_USBIP_MUSB_ADI)
-  // Analog have custom double buffered in csrh register, disable it
-  musb->indexed_csr.maxp_csr[is_rx].csrh |= MUSB_CSRH_DISABLE_DOUBLE_PACKET(is_rx);
-  #else
-  // disable double bufeffered in extended register
-  #endif
+// index register is already set
+TU_ATTR_ALWAYS_INLINE static inline void hwfifo_reset(musb_regs_t* musb, unsigned epnum, unsigned dir_in) {
+  (void) musb; (void) epnum; (void) dir_in;
+  // nothing to do for static FIFO
 }
 
-TU_ATTR_ALWAYS_INLINE static inline bool fifo_configure(musb_regs_t* musb, unsigned epnum, unsigned dir_in, unsigned mps) {
-  (void) mps;
-  const uint8_t is_rx = 1 - dir_in;
-  musb->index = epnum;
-
-  uint8_t csrh = 0;
-
-#if defined(TUP_USBIP_MUSB_ADI)
-  csrh = MUSB_CSRH_DISABLE_DOUBLE_PACKET(is_rx);
-#endif
+// index register is already set
+TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsigned epnum, unsigned dir_in, unsigned mps,
+                                                       bool double_packet) {
+  (void) epnum; (void) dir_in; (void) mps;
 
-#if MUSB_CFG_SHARED_FIFO
-  if (dir_in) {
-    csrh |= MUSB_CSRH_TX_MODE;
+  if (!double_packet) {
+    #if defined(TUP_USBIP_MUSB_ADI)
+    const uint8_t is_rx = 1 - dir_in;
+    musb->indexed_csr.maxp_csr[is_rx].csrh |= MUSB_CSRH_DISABLE_DOUBLE_PACKET(is_rx);
+    #else
+    if (is_rx) {
+      musb->rx_doulbe_packet_disable |= 1u << epnum;
+    } else {
+      musb->tx_double_packet_disable |= 1u << epnum;
+    }
+    #endif
   }
-#endif
-
-  musb->indexed_csr.maxp_csr[is_rx].csrh |= csrh;
 
   return true;
 }
@@ -538,8 +545,9 @@ static void process_bus_reset(uint8_t rhport) {
 
   /* Clear FIFO settings */
   for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
-    fifo_reset(musb, i, 0);
-    fifo_reset(musb, i, 1);
+    musb->index = i;
+    hwfifo_reset(musb, i, 0);
+    hwfifo_reset(musb, i, 1);
   }
   dcd_event_bus_reset(rhport, (musb->power & MUSB_POWER_HSMODE) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL, true);
 }
@@ -641,17 +649,18 @@ void dcd_sof_enable(uint8_t rhport, bool en)
 //--------------------------------------------------------------------+
 // Endpoint API
 //--------------------------------------------------------------------+
+// static void edpt_setup(musb_regs_t* musb, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_size){
+//   const unsigned epn     = tu_edpt_number(ep_addr);
+//   const unsigned dir_in  = tu_edpt_dir(ep_addr);
+// }
 
 // Configure endpoint's registers according to descriptor
 bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) {
   const unsigned ep_addr = ep_desc->bEndpointAddress;
   const unsigned epn     = tu_edpt_number(ep_addr);
   const unsigned dir_in  = tu_edpt_dir(ep_addr);
-  const unsigned xfer    = ep_desc->bmAttributes.xfer;
   const unsigned mps     = tu_edpt_packet_size(ep_desc);
 
-  TU_ASSERT(epn < TUP_DCD_ENDPOINT_MAX);
-
   pipe_state_t *pipe = &_dcd.pipe[dir_in][epn - 1];
   pipe->buf       = NULL;
   pipe->length    = 0;
@@ -659,11 +668,16 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) {
 
   musb_regs_t* musb = MUSB_REGS(rhport);
   musb_ep_csr_t* ep_csr = get_ep_csr(musb, epn);
-
   const uint8_t is_rx = 1 - dir_in;
   musb_ep_maxp_csr_t* maxp_csr = &ep_csr->maxp_csr[is_rx];
+
   maxp_csr->maxp = mps;
-  maxp_csr->csrh = (xfer == TUSB_XFER_ISOCHRONOUS) ? MUSB_RXCSRH1_ISO : 0;
+  maxp_csr->csrh = 0;
+#if MUSB_CFG_SHARED_FIFO
+  if (dir_in) {
+    maxp_csr->csrh |= MUSB_CSRH_TX_MODE;
+  }
+#endif
 
   // flush and reset data toggle
   uint8_t csrl = MUSB_CSRL_CLEAR_DATA_TOGGLE(is_rx);
@@ -672,18 +686,65 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) {
   }
   maxp_csr->csrl = csrl;
 
+  TU_ASSERT(hwfifo_config(musb, epn, dir_in, mps, false));
   musb->intren_ep[is_rx] |= TU_BIT(epn);
 
-  fifo_configure(musb, epn, dir_in, mps);
-
   return true;
 }
 
-// bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
-// }
-//
-// bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
-// }
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  const unsigned epn    = tu_edpt_number(ep_addr);
+  const unsigned dir_in = tu_edpt_dir(ep_addr);
+  musb_regs_t* musb = MUSB_REGS(rhport);
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb, epn);
+  const uint8_t is_rx = 1 - dir_in;
+  ep_csr->maxp_csr[is_rx].csrh = 0;
+  return hwfifo_config(musb, epn, dir_in, largest_packet_size, true);
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc ) {
+  const unsigned ep_addr = ep_desc->bEndpointAddress;
+  const unsigned epn     = tu_edpt_number(ep_addr);
+  const unsigned dir_in  = tu_edpt_dir(ep_addr);
+  const unsigned mps     = tu_edpt_packet_size(ep_desc);
+
+  unsigned const ie = musb_dcd_get_int_enable(rhport);
+  musb_dcd_int_disable(rhport);
+
+  pipe_state_t *pipe = &_dcd.pipe[dir_in][epn - 1];
+  pipe->buf       = NULL;
+  pipe->length    = 0;
+  pipe->remaining = 0;
+
+  musb_regs_t* musb = MUSB_REGS(rhport);
+  musb_ep_csr_t* ep_csr = get_ep_csr(musb, epn);
+  const uint8_t is_rx = 1 - dir_in;
+  musb_ep_maxp_csr_t* maxp_csr = &ep_csr->maxp_csr[is_rx];
+
+  maxp_csr->maxp = mps;
+  maxp_csr->csrh |= MUSB_CSRH_ISO;
+#if MUSB_CFG_SHARED_FIFO
+  if (dir_in) {
+    maxp_csr->csrh |= MUSB_CSRH_TX_MODE;
+  }
+#endif
+
+  // flush fifo
+  if (maxp_csr->csrl & MUSB_CSRL_PACKET_READY(is_rx)) {
+    maxp_csr->csrl = MUSB_CSRL_FLUSH_FIFO(is_rx);
+  }
+
+#if MUSB_CFG_DYNAMIC_FIFO
+  // fifo space is already allocated, keep the address and just change packet size
+  musb->fifo_size[is_rx] = hwfifo_byte2size(mps) | MUSB_FIFOSZ_DOUBLE_PACKET;
+#endif
+
+  musb->intren_ep[is_rx] |= TU_BIT(epn);
+
+  if (ie) musb_dcd_int_enable(rhport);
+
+  return true;
+}
 
 void dcd_edpt_close_all(uint8_t rhport)
 {
@@ -707,7 +768,7 @@ void dcd_edpt_close_all(uint8_t rhport)
       }
       maxp_csr->csrl = csrl;
 
-      fifo_reset(musb, i, 1-d);
+      hwfifo_reset(musb, i, 1-d);
     }
   }
 
@@ -718,38 +779,6 @@ void dcd_edpt_close_all(uint8_t rhport)
   if (ie) musb_dcd_int_enable(rhport);
 }
 
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
-{
-  // FIXME: we should implement iso_alloc() and iso_activate()
-  unsigned const epn    = tu_edpt_number(ep_addr);
-  unsigned const dir_in = tu_edpt_dir(ep_addr);
-  musb_regs_t* musb = MUSB_REGS(rhport);
-  musb_ep_csr_t* ep_csr = get_ep_csr(musb, epn);
-  unsigned const ie = musb_dcd_get_int_enable(rhport);
-  musb_dcd_int_disable(rhport);
-  if (dir_in) {
-    musb->intr_txen  &= ~TU_BIT(epn);
-    ep_csr->tx_maxp = 0;
-    ep_csr->tx_csrh = 0;
-    if (ep_csr->tx_csrl & MUSB_TXCSRL1_TXRDY) {
-      ep_csr->tx_csrl = MUSB_TXCSRL1_CLRDT | MUSB_TXCSRL1_FLUSH;
-    } else {
-      ep_csr->tx_csrl = MUSB_TXCSRL1_CLRDT;
-    }
-  } else {
-    musb->intr_rxen  &= ~TU_BIT(epn);
-    ep_csr->rx_maxp = 0;
-    ep_csr->rx_csrh = 0;
-    if (ep_csr->rx_csrl & MUSB_RXCSRL1_RXRDY) {
-      ep_csr->rx_csrl = MUSB_RXCSRL1_CLRDT | MUSB_RXCSRL1_FLUSH;
-    } else {
-      ep_csr->rx_csrl = MUSB_RXCSRL1_CLRDT;
-    }
-  }
-  fifo_reset(musb, epn, dir_in);
-  if (ie) musb_dcd_int_enable(rhport);
-}
-
 // Submit a transfer, When complete dcd_event_xfer_complete() is invoked to notify the stack
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
 {
@@ -771,7 +800,8 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
   return ret;
 }
 
-// Submit a transfer where is managed by FIFO, When complete dcd_event_xfer_complete() is invoked to notify the stack - optional, however, must be listed in usbd.c
+// Submit a transfer where is managed by FIFO, When complete dcd_event_xfer_complete() is invoked to notify the stack
+// - optional, however, must be listed in usbd.c
 bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
 {
   (void)rhport;
diff --git a/src/portable/mentor/musb/musb_ti.h b/src/portable/mentor/musb/musb_ti.h
index 680bebde7c..d17e836ee9 100644
--- a/src/portable/mentor/musb/musb_ti.h
+++ b/src/portable/mentor/musb/musb_ti.h
@@ -42,8 +42,8 @@
   #error "Unsupported MCUs"
 #endif
 
-#define MUSB_CFG_SHARED_FIFO 0
-#define MUSB_CFG_DYNAMIC_FIFO  1
+#define MUSB_CFG_SHARED_FIFO       0
+#define MUSB_CFG_DYNAMIC_FIFO      1
 #define MUSB_CFG_DYNAMIC_FIFO_SIZE 4096
 
 const uintptr_t MUSB_BASES[] = { USB0_BASE };
@@ -51,11 +51,6 @@ const uintptr_t MUSB_BASES[] = { USB0_BASE };
 // Header supports both device and host modes. Only include what's necessary
 #if CFG_TUD_ENABLED
 
-// Mapping of peripheral instances to port. Currently just 1.
-static USB0_Type* const musb_periph_inst[] = {
-    USB0
-};
-
 // Mapping of IRQ numbers to port. Currently just 1.
 static const IRQn_Type  musb_irqs[] = {
     USB0_IRQn
@@ -87,142 +82,6 @@ static inline void musb_dcd_int_handler_enter(uint8_t rhport) {
   //Nothing to do for this part
 }
 
-#if 0
-typedef struct {
-  uint_fast16_t beg; /* offset of including first element */
-  uint_fast16_t end; /* offset of excluding the last element */
-} free_block_t;
-
-static inline free_block_t *find_containing_block(free_block_t *beg, free_block_t *end, uint_fast16_t addr) {
-  free_block_t *cur = beg;
-  for (; cur < end && ((addr < cur->beg) || (cur->end <= addr)); ++cur) ;
-  return cur;
-}
-
-static inline int update_free_block_list(free_block_t *blks, unsigned num, uint_fast16_t addr, uint_fast16_t size) {
-  free_block_t *p = find_containing_block(blks, blks + num, addr);
-  TU_ASSERT(p != blks + num, -2);
-  if (p->beg == addr) {
-    /* Shrink block */
-    p->beg = addr + size;
-    if (p->beg != p->end) return 0;
-    /* remove block */
-    free_block_t *end = blks + num;
-    while (p + 1 < end) {
-      *p = *(p + 1);
-      ++p;
-    }
-    return -1;
-  } else {
-    /* Split into 2 blocks */
-    free_block_t tmp = {
-      .beg = addr + size,
-      .end = p->end
-    };
-    p->end = addr;
-    if (p->beg == p->end) {
-      if (tmp.beg != tmp.end) {
-        *p = tmp;
-        return 0;
-      }
-      /* remove block */
-      free_block_t *end = blks + num;
-      while (p + 1 < end) {
-        *p = *(p + 1);
-        ++p;
-      }
-      return -1;
-    }
-    if (tmp.beg == tmp.end) return 0;
-    blks[num] = tmp;
-    return 1;
-  }
-}
-
-static inline unsigned free_block_size(free_block_t const *blk) {
-  return blk->end - blk->beg;
-}
-
-#if 0
-static inline void print_block_list(free_block_t const *blk, unsigned num)
-{
-  TU_LOG1("*************\r\n");
-  for (unsigned i = 0; i < num; ++i) {
-    TU_LOG1(" Blk%u %u %u\r\n", i, blk->beg, blk->end);
-    ++blk;
-  }
-}
-#else
-#define print_block_list(a,b)
-#endif
-
-static unsigned find_free_memory(uint8_t rhport, uint_fast16_t size_in_log2_minus3)
-{
-  free_block_t free_blocks[2 * (TUP_DCD_ENDPOINT_MAX - 1)];
-  unsigned num_blocks = 1;
-
-  /* Initialize free memory block list */
-  free_blocks[0].beg = 64 / 8;
-  free_blocks[0].end = (4 << 10) / 8; /* 4KiB / 8 bytes */
-  for (int i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
-    uint_fast16_t addr;
-    int num;
-    musb_periph_inst[rhport]->EPIDX = i;
-    addr = musb_periph_inst[rhport]->TXFIFOADD;
-    if (addr) {
-      unsigned sz  = musb_periph_inst[rhport]->TXFIFOSZ;
-      unsigned sft = (sz & USB_TXFIFOSZ_SIZE_M) + ((sz & USB_TXFIFOSZ_DPB) ? 1: 0);
-      num = update_free_block_list(free_blocks, num_blocks, addr, 1 << sft);
-      TU_ASSERT(-2 < num, 0);
-      num_blocks += num;
-      print_block_list(free_blocks, num_blocks);
-    }
-    addr = musb_periph_inst[rhport]->RXFIFOADD;
-    if (addr) {
-      unsigned sz  = musb_periph_inst[rhport]->RXFIFOSZ;
-      unsigned sft = (sz & USB_RXFIFOSZ_SIZE_M) + ((sz & USB_RXFIFOSZ_DPB) ? 1: 0);
-      num = update_free_block_list(free_blocks, num_blocks, addr, 1 << sft);
-      TU_ASSERT(-2 < num, 0);
-      num_blocks += num;
-      print_block_list(free_blocks, num_blocks);
-    }
-  }
-  print_block_list(free_blocks, num_blocks);
-
-  /* Find the best fit memory block */
-  uint_fast16_t size_in_8byte_unit = 1 << size_in_log2_minus3;
-  free_block_t const *min = NULL;
-  uint_fast16_t    min_sz = 0xFFFFu;
-  free_block_t const *end = &free_blocks[num_blocks];
-  for (free_block_t const *cur = &free_blocks[0]; cur < end; ++cur) {
-    uint_fast16_t sz = free_block_size(cur);
-    if (sz < size_in_8byte_unit) continue;
-    if (size_in_8byte_unit == sz) return cur->beg;
-    if (sz < min_sz) min = cur;
-  }
-  TU_ASSERT(min, 0);
-  return min->beg;
-}
-
-
-static inline void musb_dcd_setup_fifo(uint8_t rhport, unsigned epnum, unsigned dir_in, unsigned mps)
-{
-  int size_in_log2_minus3 = 28 - TU_MIN(28, __CLZ((uint32_t)mps));
-  if ((8u << size_in_log2_minus3) < mps) ++size_in_log2_minus3;
-  unsigned addr = find_free_memory(rhport, size_in_log2_minus3);
-  TU_ASSERT(addr,);
-
-  musb_periph_inst[rhport]->EPIDX = epnum;
-  if (dir_in) {
-    musb_periph_inst[rhport]->TXFIFOADD = addr;
-    musb_periph_inst[rhport]->TXFIFOSZ  = size_in_log2_minus3;
-  } else {
-    musb_periph_inst[rhport]->RXFIFOADD = addr;
-    musb_periph_inst[rhport]->RXFIFOSZ  = size_in_log2_minus3;
-  }
-}
-#endif
-
 #endif // CFG_TUD_ENABLED
 
 #ifdef __cplusplus
diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index f8a66accef..4e448c0eda 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -338,6 +338,10 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 // 0x13, 0x17: TX/RX CSRH
 #define MUSB_CSRH_DISABLE_DOUBLE_PACKET(_rx) (1u << 1)
 #define MUSB_CSRH_TX_MODE                    (1u << 5) // 1 = TX, 0 = RX. only relevant for SHARED FIFO
+#define MUSB_CSRH_ISO                        (1u << 6)
+
+// 0x62, 0x63: TXFIFO_SZ, RXFIFO_SZ
+#define MUSB_FIFOSZ_DOUBLE_PACKET            (1u << 4)
 
 
 //*****************************************************************************
@@ -417,58 +421,6 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 #define MUSB_CCONF_TXEDMA        0x0002  // TX Early DMA Enable
 #define MUSB_CCONF_RXEDMA        0x0001  // TX Early DMA Enable
 
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the MUSB_O_TXFIFOSZ register.
-//
-//*****************************************************************************
-#define MUSB_TXFIFOSZ_DPB        0x0010  // Double Packet Buffer Support
-#define MUSB_TXFIFOSZ_SIZE_M     0x000F  // Max Packet Size
-#define MUSB_TXFIFOSZ_SIZE_8     0x0000  // 8
-#define MUSB_TXFIFOSZ_SIZE_16    0x0001  // 16
-#define MUSB_TXFIFOSZ_SIZE_32    0x0002  // 32
-#define MUSB_TXFIFOSZ_SIZE_64    0x0003  // 64
-#define MUSB_TXFIFOSZ_SIZE_128   0x0004  // 128
-#define MUSB_TXFIFOSZ_SIZE_256   0x0005  // 256
-#define MUSB_TXFIFOSZ_SIZE_512   0x0006  // 512
-#define MUSB_TXFIFOSZ_SIZE_1024  0x0007  // 1024
-#define MUSB_TXFIFOSZ_SIZE_2048  0x0008  // 2048
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the MUSB_O_RXFIFOSZ register.
-//
-//*****************************************************************************
-#define MUSB_RXFIFOSZ_DPB        0x0010  // Double Packet Buffer Support
-#define MUSB_RXFIFOSZ_SIZE_M     0x000F  // Max Packet Size
-#define MUSB_RXFIFOSZ_SIZE_8     0x0000  // 8
-#define MUSB_RXFIFOSZ_SIZE_16    0x0001  // 16
-#define MUSB_RXFIFOSZ_SIZE_32    0x0002  // 32
-#define MUSB_RXFIFOSZ_SIZE_64    0x0003  // 64
-#define MUSB_RXFIFOSZ_SIZE_128   0x0004  // 128
-#define MUSB_RXFIFOSZ_SIZE_256   0x0005  // 256
-#define MUSB_RXFIFOSZ_SIZE_512   0x0006  // 512
-#define MUSB_RXFIFOSZ_SIZE_1024  0x0007  // 1024
-#define MUSB_RXFIFOSZ_SIZE_2048  0x0008  // 2048
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the MUSB_O_TXFIFOADD
-// register.
-//
-//*****************************************************************************
-#define MUSB_TXFIFOADD_ADDR_M    0x01FF  // Transmit/Receive Start Address
-#define MUSB_TXFIFOADD_ADDR_S    0
-
-//*****************************************************************************
-//
-// The following are defines for the bit fields in the MUSB_O_RXFIFOADD
-// register.
-//
-//*****************************************************************************
-#define MUSB_RXFIFOADD_ADDR_M    0x01FF  // Transmit/Receive Start Address
-#define MUSB_RXFIFOADD_ADDR_S    0
-
 //*****************************************************************************
 //
 // The following are defines for the bit fields in the MUSB_O_ULPIVBUSCTL

From 0c9d7a21858d246dfaadb78122c27c6e4099109c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 19 Aug 2024 12:38:45 +0700
Subject: [PATCH 176/204] add hwfifo_flush()

---
 src/portable/mentor/musb/dcd_musb.c | 72 +++++++++++++----------------
 1 file changed, 31 insertions(+), 41 deletions(-)

diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index dc2753ea66..a40b3dc079 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -81,11 +81,13 @@ typedef struct
   uint16_t     pipe_buf_is_fifo[2]; /* Bitmap. Each bit means whether 1:TU_FIFO or 0:POD. */
 } dcd_data_t;
 
-/*------------------------------------------------------------------
- * INTERNAL OBJECT & FUNCTION DECLARATION
- *------------------------------------------------------------------*/
 static dcd_data_t _dcd;
 
+//--------------------------------------------------------------------
+// HW FIFO Helper
+// Note: Index register is already set by caller
+//--------------------------------------------------------------------
+
 #if MUSB_CFG_DYNAMIC_FIFO
 
 // musb is configured to use dynamic FIFO sizing.
@@ -97,24 +99,20 @@ static uint32_t alloced_fifo_bytes;
 // ffsize is log2(mps) - 3 (round up)
 TU_ATTR_ALWAYS_INLINE static inline uint8_t hwfifo_byte2size(uint16_t nbytes) {
   uint8_t ffsize = 28 - tu_min8(28, __builtin_clz(nbytes));
-  // round up to the next power of 2
   if ((8u << ffsize) < nbytes) {
     ++ffsize;
   }
-
   return ffsize;
 }
 
-// index register is already set
-TU_ATTR_ALWAYS_INLINE static inline void hwfifo_reset(musb_regs_t* musb, unsigned epnum, unsigned dir_in) {
+TU_ATTR_ALWAYS_INLINE static inline void hwfifo_reset(musb_regs_t* musb, unsigned epnum, unsigned is_rx) {
   (void) epnum;
-  const uint8_t is_rx = 1 - dir_in;
   musb->fifo_size[is_rx] = 0;
   musb->fifo_addr[is_rx] = 0;
 }
 
-// index register is already set
-TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsigned epnum, unsigned dir_in, unsigned mps, bool double_packet) {
+TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsigned epnum, unsigned is_rx, unsigned mps,
+                                                       bool double_packet) {
   (void) epnum;
   uint8_t ffsize = hwfifo_byte2size(mps);
   mps = 8 << ffsize; // round up to the next power of 2
@@ -125,8 +123,6 @@ TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsign
   }
 
   TU_ASSERT(alloced_fifo_bytes + mps <= MUSB_CFG_DYNAMIC_FIFO_SIZE);
-  const uint8_t is_rx = 1 - dir_in;
-
   musb->fifo_addr[is_rx] = alloced_fifo_bytes / 8;
   musb->fifo_size[is_rx] = ffsize;
 
@@ -136,20 +132,16 @@ TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsign
 
 #else
 
-// index register is already set
-TU_ATTR_ALWAYS_INLINE static inline void hwfifo_reset(musb_regs_t* musb, unsigned epnum, unsigned dir_in) {
-  (void) musb; (void) epnum; (void) dir_in;
+TU_ATTR_ALWAYS_INLINE static inline void hwfifo_reset(musb_regs_t* musb, unsigned epnum, unsigned is_rx) {
+  (void) musb; (void) epnum; (void) is_rx;
   // nothing to do for static FIFO
 }
 
-// index register is already set
-TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsigned epnum, unsigned dir_in, unsigned mps,
+TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsigned epnum, unsigned is_rx, unsigned mps,
                                                        bool double_packet) {
-  (void) epnum; (void) dir_in; (void) mps;
-
+  (void) epnum; (void) mps;
   if (!double_packet) {
     #if defined(TUP_USBIP_MUSB_ADI)
-    const uint8_t is_rx = 1 - dir_in;
     musb->indexed_csr.maxp_csr[is_rx].csrh |= MUSB_CSRH_DISABLE_DOUBLE_PACKET(is_rx);
     #else
     if (is_rx) {
@@ -165,6 +157,19 @@ TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsign
 
 #endif
 
+// Flush FIFO and clear data toggle
+TU_ATTR_ALWAYS_INLINE static inline void hwfifo_flush(musb_regs_t* musb, unsigned epnum, unsigned is_rx, bool clear_dtog) {
+  (void) epnum;
+  const uint8_t csrl_dtog = clear_dtog ? MUSB_CSRL_CLEAR_DATA_TOGGLE(is_rx) : 0;
+  musb_ep_maxp_csr_t* maxp_csr = &musb->indexed_csr.maxp_csr[is_rx];
+  // may need to flush twice for double packet
+  for (unsigned i=0; i<2; i++) {
+    if (maxp_csr->csrl & MUSB_CSRL_PACKET_READY(is_rx)) {
+      maxp_csr->csrl = MUSB_CSRL_FLUSH_FIFO(is_rx) | csrl_dtog;
+    }
+  }
+}
+
 static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
 {
   volatile hw_fifo_t *reg = (volatile hw_fifo_t*)fifo;
@@ -679,14 +684,9 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) {
   }
 #endif
 
-  // flush and reset data toggle
-  uint8_t csrl = MUSB_CSRL_CLEAR_DATA_TOGGLE(is_rx);
-  if (maxp_csr->csrl & MUSB_CSRL_PACKET_READY(is_rx)) {
-    csrl |= MUSB_CSRL_FLUSH_FIFO(is_rx);
-  }
-  maxp_csr->csrl = csrl;
+  hwfifo_flush(musb, epn, is_rx, true);
 
-  TU_ASSERT(hwfifo_config(musb, epn, dir_in, mps, false));
+  TU_ASSERT(hwfifo_config(musb, epn, is_rx, mps, false));
   musb->intren_ep[is_rx] |= TU_BIT(epn);
 
   return true;
@@ -699,7 +699,7 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
   musb_ep_csr_t* ep_csr = get_ep_csr(musb, epn);
   const uint8_t is_rx = 1 - dir_in;
   ep_csr->maxp_csr[is_rx].csrh = 0;
-  return hwfifo_config(musb, epn, dir_in, largest_packet_size, true);
+  return hwfifo_config(musb, epn, is_rx, largest_packet_size, true);
 }
 
 bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc ) {
@@ -729,10 +729,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc )
   }
 #endif
 
-  // flush fifo
-  if (maxp_csr->csrl & MUSB_CSRL_PACKET_READY(is_rx)) {
-    maxp_csr->csrl = MUSB_CSRL_FLUSH_FIFO(is_rx);
-  }
+  hwfifo_flush(musb, epn, is_rx, true);
 
 #if MUSB_CFG_DYNAMIC_FIFO
   // fifo space is already allocated, keep the address and just change packet size
@@ -758,17 +755,10 @@ void dcd_edpt_close_all(uint8_t rhport)
     musb_ep_csr_t* ep_csr = get_ep_csr(musb, i);
     for (unsigned d = 0; d < 2; d++) {
       musb_ep_maxp_csr_t* maxp_csr = &ep_csr->maxp_csr[d];
+      hwfifo_flush(musb, i, d, true);
+      hwfifo_reset(musb, i, d);
       maxp_csr->maxp = 0;
       maxp_csr->csrh = 0;
-
-      // flush and reset data toggle
-      uint8_t csrl = MUSB_CSRL_CLEAR_DATA_TOGGLE(d);
-      if (maxp_csr->csrl & MUSB_CSRL_PACKET_READY(is_rx)) {
-        csrl |= MUSB_CSRL_FLUSH_FIFO(d);
-      }
-      maxp_csr->csrl = csrl;
-
-      hwfifo_reset(musb, i, 1-d);
     }
   }
 

From 635bdc1fcea1d4d9972d4c9960a32250b0245186 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 19 Aug 2024 13:20:16 +0700
Subject: [PATCH 177/204] fix ci build

---
 src/device/dcd.h  | 2 +-
 src/device/usbd.c | 1 -
 test/hil/rpi.json | 2 +-
 3 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/src/device/dcd.h b/src/device/dcd.h
index 66fae08026..d1d4e48976 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -181,7 +181,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep)
 
 #else
 // Close an endpoint.
-void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr);
+void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) TU_ATTR_WEAK;
 
 #endif
 
diff --git a/src/device/usbd.c b/src/device/usbd.c
index d6f69fc243..67faf0da76 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -1424,7 +1424,6 @@ void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
 #else
   rhport = _usbd_rhport;
 
-  TU_ASSERT(dcd_edpt_close, /**/);
   TU_LOG_USBD("  CLOSING Endpoint: 0x%02X\r\n", ep_addr);
 
   uint8_t const epnum = tu_edpt_number(ep_addr);
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index a10fa76bda..e90e435d8e 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -18,7 +18,7 @@
             "name": "max32666fthr",
             "uid": "0C81464124010B20FF0A08CC2C",
             "flasher": "openocd_adi",
-            "flasher_sn": "040917023bffc88100000000000000000000000097969906",
+            "flasher_sn": "042217023bffc88100000000000000000000000097969906",
             "flasher_args": "-f interface/cmsis-dap.cfg -f target/max32665.cfg"
         },
         {

From 088486186f514578a02d6b6c7f39e0ad74f56118 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 19 Aug 2024 19:05:33 +0700
Subject: [PATCH 178/204] rename TUD_ENDPOINT_EXCLUSIVE_NUMBER to
 TUD_ENDPOINT_ONE_DIRECTION_ONLY

---
 .../device/cdc_dual_ports/src/usb_descriptors.c  |  2 +-
 examples/device/cdc_msc/src/usb_descriptors.c    |  2 +-
 .../cdc_msc_freertos/src/usb_descriptors.c       |  2 +-
 examples/device/cdc_uac2/src/usb_descriptors.c   |  2 +-
 .../dynamic_configuration/src/usb_descriptors.c  |  2 +-
 examples/device/midi_test/src/usb_descriptors.c  |  2 +-
 .../device/msc_dual_lun/src/usb_descriptors.c    |  2 +-
 .../net_lwip_webserver/src/usb_descriptors.c     |  2 +-
 .../device/uac2_headset/src/usb_descriptors.c    |  2 +-
 .../device/uac2_speaker_fb/src/usb_descriptors.c |  2 +-
 examples/device/video_capture/src/tusb_config.h  |  2 +-
 .../device/video_capture/src/usb_descriptors.c   |  2 ++
 .../device/webusb_serial/src/usb_descriptors.c   |  2 +-
 src/common/tusb_mcu.h                            | 16 ++++++++--------
 14 files changed, 22 insertions(+), 20 deletions(-)

diff --git a/examples/device/cdc_dual_ports/src/usb_descriptors.c b/examples/device/cdc_dual_ports/src/usb_descriptors.c
index ca4fe279b6..7776eb9585 100644
--- a/examples/device/cdc_dual_ports/src/usb_descriptors.c
+++ b/examples/device/cdc_dual_ports/src/usb_descriptors.c
@@ -109,7 +109,7 @@ enum
   #define EPNUM_CDC_1_OUT     0x05
   #define EPNUM_CDC_1_IN      0x84
 
-#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_0_NOTIF   0x81
diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c
index 4789f5a9ba..4b6b88041e 100644
--- a/examples/device/cdc_msc/src/usb_descriptors.c
+++ b/examples/device/cdc_msc/src/usb_descriptors.c
@@ -103,7 +103,7 @@ enum {
   #define EPNUM_MSC_OUT     0x05
   #define EPNUM_MSC_IN      0x84
 
-#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_NOTIF   0x81
diff --git a/examples/device/cdc_msc_freertos/src/usb_descriptors.c b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
index 7f9338753f..405a57fe45 100644
--- a/examples/device/cdc_msc_freertos/src/usb_descriptors.c
+++ b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
@@ -103,7 +103,7 @@ enum {
   #define EPNUM_MSC_OUT     0x05
   #define EPNUM_MSC_IN      0x84
 
-#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_NOTIF   0x81
diff --git a/examples/device/cdc_uac2/src/usb_descriptors.c b/examples/device/cdc_uac2/src/usb_descriptors.c
index 6384f722ae..9f7255d8a3 100644
--- a/examples/device/cdc_uac2/src/usb_descriptors.c
+++ b/examples/device/cdc_uac2/src/usb_descriptors.c
@@ -97,7 +97,7 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_CDC_OUT     0x02
   #define EPNUM_CDC_IN      0x82
 
-#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_AUDIO_IN    0x01
diff --git a/examples/device/dynamic_configuration/src/usb_descriptors.c b/examples/device/dynamic_configuration/src/usb_descriptors.c
index 7be3d7da52..0a20492883 100644
--- a/examples/device/dynamic_configuration/src/usb_descriptors.c
+++ b/examples/device/dynamic_configuration/src/usb_descriptors.c
@@ -132,7 +132,7 @@ enum
   #define EPNUM_1_MSC_OUT     0x02
   #define EPNUM_1_MSC_IN      0x82
 
-#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_0_CDC_NOTIF   0x81
diff --git a/examples/device/midi_test/src/usb_descriptors.c b/examples/device/midi_test/src/usb_descriptors.c
index 3511f7eba0..3870eaaf0e 100644
--- a/examples/device/midi_test/src/usb_descriptors.c
+++ b/examples/device/midi_test/src/usb_descriptors.c
@@ -93,7 +93,7 @@ enum
   #define EPNUM_MIDI_OUT  0x02
   #define EPNUM_MIDI_IN   0x81
 
-#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_MIDI_OUT  0x01
diff --git a/examples/device/msc_dual_lun/src/usb_descriptors.c b/examples/device/msc_dual_lun/src/usb_descriptors.c
index bc2f2577c9..efb9a966d4 100644
--- a/examples/device/msc_dual_lun/src/usb_descriptors.c
+++ b/examples/device/msc_dual_lun/src/usb_descriptors.c
@@ -91,7 +91,7 @@ enum
   #define EPNUM_MSC_OUT  0x02
   #define EPNUM_MSC_IN   0x81
 
-#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_MSC_OUT  0x01
diff --git a/examples/device/net_lwip_webserver/src/usb_descriptors.c b/examples/device/net_lwip_webserver/src/usb_descriptors.c
index 2a3061162b..d061f50763 100644
--- a/examples/device/net_lwip_webserver/src/usb_descriptors.c
+++ b/examples/device/net_lwip_webserver/src/usb_descriptors.c
@@ -120,7 +120,7 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_NET_OUT     0x02
   #define EPNUM_NET_IN      0x81
 
-#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_NET_NOTIF   0x81
diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c
index e8dc5ec151..bc9160d5e0 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.c
+++ b/examples/device/uac2_headset/src/usb_descriptors.c
@@ -97,7 +97,7 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_AUDIO_OUT   0x08
   #define EPNUM_AUDIO_INT   0x01
 
-#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_AUDIO_IN    0x01
diff --git a/examples/device/uac2_speaker_fb/src/usb_descriptors.c b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
index aadeb7e8a9..ee1b92225a 100644
--- a/examples/device/uac2_speaker_fb/src/usb_descriptors.c
+++ b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
@@ -131,7 +131,7 @@ uint8_t const * tud_hid_descriptor_report_cb(uint8_t itf)
   #define EPNUM_AUDIO_OUT   0x08
   #define EPNUM_DEBUG       0x01
 
-#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_AUDIO_FB    0x01
diff --git a/examples/device/video_capture/src/tusb_config.h b/examples/device/video_capture/src/tusb_config.h
index 21483a2da7..3a6daa3d31 100644
--- a/examples/device/video_capture/src/tusb_config.h
+++ b/examples/device/video_capture/src/tusb_config.h
@@ -106,7 +106,7 @@
 #define CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE  256
 
 // use bulk endpoint for streaming interface
-#define CFG_TUD_VIDEO_STREAMING_BULK 1
+ #define CFG_TUD_VIDEO_STREAMING_BULK 0
 
 //#define CFG_EXAMPLE_VIDEO_READONLY
 //#define CFG_EXAMPLE_VIDEO_DISABLE_MJPEG
diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c
index 5011bee183..b3e19b0f05 100644
--- a/examples/device/video_capture/src/usb_descriptors.c
+++ b/examples/device/video_capture/src/usb_descriptors.c
@@ -118,6 +118,8 @@ enum {
 #elif TU_CHECK_MCU(OPT_MCU_NRF5X)
   // nRF5x ISO can only be endpoint 8
   #define EPNUM_VIDEO_IN    (CFG_TUD_VIDEO_STREAMING_BULK ? 0x81 : 0x88)
+#elif TU_CHECK_MCU(OPT_MCU_MAX32650, OPT_MCU_MAX32666, OPT_MCU_MAX32690, OPT_MCU_MAX78002)
+  #define EPNUM_VIDEO_IN    0x81
 #else
   #define EPNUM_VIDEO_IN    0x81
 #endif
diff --git a/examples/device/webusb_serial/src/usb_descriptors.c b/examples/device/webusb_serial/src/usb_descriptors.c
index 2ff6d9ced8..2b69a5b560 100644
--- a/examples/device/webusb_serial/src/usb_descriptors.c
+++ b/examples/device/webusb_serial/src/usb_descriptors.c
@@ -104,7 +104,7 @@ enum
   #define EPNUM_VENDOR_OUT  0x05
   #define EPNUM_VENDOR_IN   0x84
 
-#elif defined(TUD_ENDPOINT_EXCLUSIVE_NUMBER)
+#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
   // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_NOTIF   0x81
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index e86f55c1dc..52debf0792 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -138,21 +138,21 @@
 
 #elif TU_CHECK_MCU(OPT_MCU_SAMG)
   #define TUP_DCD_ENDPOINT_MAX    6
-  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
 #elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
   #define TUP_DCD_ENDPOINT_MAX    10
   #define TUP_RHPORT_HIGHSPEED    1
-  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
 #elif TU_CHECK_MCU(OPT_MCU_PIC32MZ)
   #define TUP_DCD_ENDPOINT_MAX    8
-  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
 #elif TU_CHECK_MCU(OPT_MCU_PIC32MX, OPT_MCU_PIC32MM, OPT_MCU_PIC32MK) || \
       TU_CHECK_MCU(OPT_MCU_PIC24, OPT_MCU_DSPIC33)
   #define TUP_DCD_ENDPOINT_MAX    16
-  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
 //--------------------------------------------------------------------+
 // ST
@@ -299,7 +299,7 @@
 #elif TU_CHECK_MCU(OPT_MCU_CXD56)
   #define TUP_DCD_ENDPOINT_MAX    7
   #define TUP_RHPORT_HIGHSPEED    1
-  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
 //--------------------------------------------------------------------+
 // TI
@@ -400,12 +400,12 @@
 #elif TU_CHECK_MCU(OPT_MCU_FT90X)
   #define TUP_DCD_ENDPOINT_MAX    8
   #define TUP_RHPORT_HIGHSPEED    1
-  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
 #elif TU_CHECK_MCU(OPT_MCU_FT93X)
   #define TUP_DCD_ENDPOINT_MAX    16
   #define TUP_RHPORT_HIGHSPEED    1
-  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
 //--------------------------------------------------------------------+
 // Allwinner
@@ -480,7 +480,7 @@
   #define TUP_USBIP_MUSB_ADI
   #define TUP_DCD_ENDPOINT_MAX    12
   #define TUP_RHPORT_HIGHSPEED    1
-  #define TUD_ENDPOINT_EXCLUSIVE_NUMBER
+  #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
 
 #endif
 

From 215832397b1593e2df5609f92c9346c133a03774 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 19 Aug 2024 19:07:47 +0700
Subject: [PATCH 179/204] update doc, re-enable metro m7 for hil, only build
 make windows/macos on PR

---
 .github/workflows/build.yml  |   5 +-
 README.rst                   |   4 +-
 docs/reference/supported.rst | 277 +++++++++++++++++------------------
 test/hil/rpi.json            |  15 +-
 4 files changed, 149 insertions(+), 152 deletions(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index fde9400a7f..e4204ca3d0 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -66,7 +66,7 @@ jobs:
       build-system: 'cmake'
       toolchain: ${{ matrix.toolchain }}
       build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)[matrix.toolchain].family) }}
-      one-per-family: ${{ github.event_name != 'pull_request' }}
+      one-per-family: ${{ github.event_name == 'push' }}
 
   # ---------------------------------------
   # Build CMake arm-gcc
@@ -103,12 +103,13 @@ jobs:
       build-system: 'make'
       toolchain: ${{ matrix.toolchain }}
       build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)[matrix.toolchain].family) }}
-      one-per-family: ${{ github.event_name != 'pull_request' }}
+      one-per-family: ${{ github.event_name == 'push' }}
 
   # ---------------------------------------
   # Build Make on Windows/MacOS
   # ---------------------------------------
   make-os:
+    if: github.event_name == 'pull_request'
     uses: ./.github/workflows/build_util.yml
     strategy:
       fail-fast: false
diff --git a/README.rst b/README.rst
index 422f232710..6dd0e27146 100644
--- a/README.rst
+++ b/README.rst
@@ -109,7 +109,9 @@ Following CPUs are supported, check out `Supported Devices`_ for comprehensive l
 +==============+============================================================+
 | Allwinner    | F1C100s/F1C200s                                            |
 +--------------+------------------------------------------------------------+
-| Analog       | MAX3421E (usb host shield)                                 |
+| Analog       | max32: 650, 666, 690. max78002                             |
+|              |                                                            |
+|              | max3421e (host)                                            |
 +--------------+------------------------------------------------------------+
 | Brigetek     | FT90x                                                      |
 +--------------+------------------------------------------------------------+
diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst
index edb6b69ca3..2bfa1b8d0b 100644
--- a/docs/reference/supported.rst
+++ b/docs/reference/supported.rst
@@ -5,147 +5,142 @@ Supported Devices
 Supported MCUs
 ==============
 
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| Manufacturer | Family                | Device | Host | Highspeed | Driver            | Note         |
-+==============+=======================+========+======+===========+===================+==============+
-| Allwinner    | F1C100s/F1C200s       | ✔      |      | ✔         | sunxi             | musb variant |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| Analog       | MAX3421E              |        | ✔    | ✖         | max3421           | via SPI      |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| Brigetek     | FT90x                 | ✔      |      | ✔         | ft9xx             |              |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| Broadcom     | BCM2711, BCM2837      | ✔      |      | ✔         | dwc2              |              |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| Dialog       | DA1469x               | ✔      | ✖    | ✖         | da146xx           |              |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| Espressif    | ESP32 S2, S3          | ✔      |      | ✖         | dwc2 or esp32sx   |              |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| GigaDevice   | GD32VF103             | ✔      |      | ✖         | dwc2              |              |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| Infineon     | XMC4500               | ✔      |      | ✖         | dwc2              |              |
-+--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+
-| MicroChip    | SAM | D11, D21        | ✔      |      | ✖         | samd              |              |
-|              |     +-----------------+--------+------+-----------+-------------------+--------------+
-|              |     | D51, E5x        | ✔      |      | ✖         | samd              |              |
-|              |     +-----------------+--------+------+-----------+-------------------+--------------+
-|              |     | G55             | ✔      |      | ✖         | samg              |              |
-|              |     +-----------------+--------+------+-----------+-------------------+--------------+
-|              |     | L21, L22        | ✔      |      | ✖         | samd              |              |
-|              |     +-----------------+--------+------+-----------+-------------------+--------------+
-|              |     | E70,S70,V70,V71 | ✔      |      | ✔         | samx7x            |              |
-|              +-----+-----------------+--------+------+-----------+-------------------+--------------+
-|              | PIC | 24              | ✔      |      |           | pic               | ci_fs variant|
-|              |     +-----------------+--------+------+-----------+-------------------+--------------+
-|              |     | 32 mm, mk, mx   | ✔      |      |           | pic               | ci_fs variant|
-|              |     +-----------------+--------+------+-----------+-------------------+--------------+
-|              |     | dsPIC33         | ✔      |      |           | pic               | ci_fs variant|
-|              |     +-----------------+--------+------+-----------+-------------------+--------------+
-|              |     | 32mz            | ✔      |      |           | pic32mz           | musb variant |
-+--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+
-| Mind Montion | mm32                  | ✔      |      | ✖         | mm32f327x_otg     | ci_fs variant|
-+--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+
-| NordicSemi   | nRF52833, nRF52840    | ✔      | ✖    | ✖         | nrf5x             |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | nRF5340               | ✔      | ✖    | ✖         | nrf5x             |              |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| Nuvoton      | NUC120                | ✔      | ✖    | ✖         | nuc120            |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | NUC121/NUC125         | ✔      | ✖    | ✖         | nuc121            |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | NUC126                | ✔      | ✖    | ✖         | nuc121            |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | NUC505                | ✔      |      | ✔         | nuc505            |              |
-+--------------+---------+-------------+--------+------+-----------+-------------------+--------------+
-| NXP          | iMXRT   | RT10xx      | ✔      | ✔    | ✔         | ci_hs             |              |
-|              |         +-------------+--------+------+-----------+-------------------+--------------+
-|              |         | RT11xx      | ✔      | ✔    | ✔         | ci_hs             |              |
-|              +---------+-------------+--------+------+-----------+-------------------+--------------+
-|              | Kinetis | KL          | ✔      | ⚠    | ✖         | ci_fs, khci       |              |
-|              |         +-------------+--------+------+-----------+-------------------+--------------+
-|              |         | K32L2       | ✔      |      | ✖         | khci              | ci_fs variant|
-|              +---------+-------------+--------+------+-----------+-------------------+--------------+
-|              | LPC     | 11u, 13, 15 | ✔      | ✖    | ✖         | lpc_ip3511        |              |
-|              |         +-------------+--------+------+-----------+-------------------+--------------+
-|              |         | 17, 40      | ✔      | ⚠    | ✖         | lpc17_40          |              |
-|              |         +-------------+--------+------+-----------+-------------------+--------------+
-|              |         | 18, 43      | ✔      | ✔    | ✔         | ci_hs             |              |
-|              |         +-------------+--------+------+-----------+-------------------+--------------+
-|              |         | 51u         | ✔      | ✖    | ✖         | lpc_ip3511        |              |
-|              |         +-------------+--------+------+-----------+-------------------+--------------+
-|              |         | 54          | ✔      |      | ✔         | lpc_ip3511        |              |
-|              |         +-------------+--------+------+-----------+-------------------+--------------+
-|              |         | 55          | ✔      |      | ✔         | lpc_ip3511        |              |
-|              +---------+-------------+--------+------+-----------+-------------------+--------------+
-|              | MCX     | N9          | ✔      |      | ✔         | ci_fs, ci_hs      |              |
-+--------------+---------+-------------+--------+------+-----------+-------------------+--------------+
-| Raspberry Pi | RP2040                | ✔      | ✔    | ✖         | rp2040, pio_usb   |              |
-+--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+
-| Renesas      | RX  | 63N, 65N, 72N   | ✔      | ✔    | ✖         | rusb2             |              |
-|              +-----+-----------------+--------+------+-----------+-------------------+--------------+
-|              | RA  | 4M1, 4M3, 6M1   | ✔      | ✔    | ✖         | rusb2             |              |
-|              |     +-----------------+--------+------+-----------+-------------------+--------------+
-|              |     | 6M5             | ✔      | ✔    | ✔         | rusb2             |              |
-+--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+
-| Silabs       | EFM32GG12             | ✔      |      | ✖         | dwc2              |              |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| Sony         | CXD56                 | ✔      | ✖    | ✔         | cxd56             |              |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| ST STM32     | F0                    | ✔      | ✖    | ✖         | stm32_fsdev       |              |
-|              +----+------------------+--------+------+-----------+-------------------+--------------+
-|              | F1 | 102, 103         | ✔      | ✖    | ✖         | stm32_fsdev       |              |
-|              |    +------------------+--------+------+-----------+-------------------+--------------+
-|              |    | 105, 107         | ✔      |      | ✖         | dwc2              |              |
-|              +----+------------------+--------+------+-----------+-------------------+--------------+
-|              | F2                    | ✔      |      | ✔         | dwc2              |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | F3                    | ✔      | ✖    | ✖         | stm32_fsdev       |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | F4                    | ✔      |      | ✔         | dwc2              |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | F7                    | ✔      |      | ✔         | dwc2              |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | G0                    | ✔      |      | ✖         | stm32_fsdev       |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | G4                    | ✔      | ✖    | ✖         | stm32_fsdev       |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | H5                    | ✔      |      | ✖         | stm32_fsdev       |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | H7                    | ✔      |      | ✔         | dwc2              |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | L0                    | ✔      | ✖    | ✖         | stm32_fsdev       |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | L1                    | ✔      | ✖    | ✖         | stm32_fsdev       |              |
-|              +----+------------------+--------+------+-----------+-------------------+--------------+
-|              | L4 | 4x2, 4x3         | ✔      | ✖    | ✖         | stm32_fsdev       |              |
-|              |    +------------------+--------+------+-----------+-------------------+--------------+
-|              |    | 4x5, 4x6         | ✔      |      | ✖         | dwc2              |              |
-|              +----+------------------+--------+------+-----------+-------------------+--------------+
-|              | L4+                   | ✔      |      | ✖         | dwc2              |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | L5                    | ✔      | ✖    | ✖         | stm32_fsdev       |              |
-|              +----+------------------+--------+------+-----------+-------------------+--------------+
-|              | U5 | 535, 545         | ✔      |      | ✖         | stm32_fsdev       |              |
-|              |    +------------------+--------+------+-----------+-------------------+--------------+
-|              |    | 575, 585         | ✔      |      | ✖         | dwc2              |              |
-|              |    +------------------+--------+------+-----------+-------------------+--------------+
-|              |    | 59x,5Ax,5Fx,5Gx  | ✔      |      | ✔         | dwc2              |              |
-|              +----+------------------+--------+------+-----------+-------------------+--------------+
-|              | WBx5                  | ✔      | ✖    | ✖         | stm32_fsdev       |              |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| TI           | MSP430                | ✔      | ✖    | ✖         | msp430x5xx        |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | MSP432E4              | ✔      |      | ✖         | musb              |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | TM4C123               | ✔      |      | ✖         | musb              |              |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| ValentyUSB   | eptri                 | ✔      | ✖    | ✖         | eptri             |              |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| WCH          | CH32F20x              | ✔      |      | ✔         | ch32f205          |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | CH32V20x              | ✔      |      | ✖         | ch32v20x          |              |
-|              +-----------------------+--------+------+-----------+-------------------+--------------+
-|              | CH32V307              | ✔      |      | ✔         | ch32v307          |              |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
+| Manufacturer | Family                      | Device | Host | Highspeed | Driver            | Note              |
++==============+=============================+========+======+===========+===================+===================+
+| Allwinner    | F1C100s/F1C200s             | ✔      |      | ✔         | sunxi             | musb variant      |
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
+| Analog       | MAX3421E                    |        | ✔    | ✖         | max3421           | via SPI           |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | MAX32 650, 666, 690,        | ✔      |      | ✔         | musb              | 1-dir ep          |
+|              | MAX78002                    |        |      |           |                   |                   |
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
+| Brigetek     | FT90x                       | ✔      |      | ✔         | ft9xx             | 1-dir ep          |
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
+| Broadcom     | BCM2711, BCM2837            | ✔      |      | ✔         | dwc2              |                   |
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
+| Dialog       | DA1469x                     | ✔      | ✖    | ✖         | da146xx           |                   |
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
+| Espressif    | ESP32 S2, S3                | ✔      |      | ✖         | dwc2 or esp32sx   |                   |
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
+| GigaDevice   | GD32VF103                   | ✔      |      | ✖         | dwc2              |                   |
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
+| Infineon     | XMC4500                     | ✔      |      | ✖         | dwc2              |                   |
++--------------+-----+-----------------------+--------+------+-----------+-------------------+-------------------+
+| MicroChip    | SAM | D11, D21, L21, L22    | ✔      |      | ✖         | samd              |                   |
+|              |     +-----------------------+--------+------+-----------+-------------------+-------------------+
+|              |     | D51, E5x              | ✔      |      | ✖         | samd              |                   |
+|              |     +-----------------------+--------+------+-----------+-------------------+-------------------+
+|              |     | G55                   | ✔      |      | ✖         | samg              | 1-dir ep          |
+|              |     +-----------------------+--------+------+-----------+-------------------+-------------------+
+|              |     | E70,S70,V70,V71       | ✔      |      | ✔         | samx7x            | 1-dir ep          |
+|              +-----+-----------------------+--------+------+-----------+-------------------+-------------------+
+|              | PIC | 24                    | ✔      |      |           | pic               | ci_fs variant     |
+|              |     +-----------------------+--------+------+-----------+-------------------+-------------------+
+|              |     | 32 mm, mk, mx         | ✔      |      |           | pic               | ci_fs variant     |
+|              |     +-----------------------+--------+------+-----------+-------------------+-------------------+
+|              |     | dsPIC33               | ✔      |      |           | pic               | ci_fs variant     |
+|              |     +-----------------------+--------+------+-----------+-------------------+-------------------+
+|              |     | 32mz                  | ✔      |      |           | pic32mz           | musb variant      |
++--------------+-----+-----------------------+--------+------+-----------+-------------------+-------------------+
+| Mind Montion | mm32                        | ✔      |      | ✖         | mm32f327x_otg     | ci_fs variant     |
++--------------+-----+-----------------------+--------+------+-----------+-------------------+-------------------+
+| NordicSemi   | nRF 52833, 52840, 5340      | ✔      | ✖    | ✖         | nrf5x             | only ep8 is ISO   |
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
+| Nuvoton      | NUC120                      | ✔      | ✖    | ✖         | nuc120            |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | NUC121/NUC125               | ✔      | ✖    | ✖         | nuc121            |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | NUC126                      | ✔      | ✖    | ✖         | nuc121            |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | NUC505                      | ✔      |      | ✔         | nuc505            |                   |
++--------------+---------+-------------------+--------+------+-----------+-------------------+-------------------+
+| NXP          | iMXRT   | RT 10xx, 11xx     | ✔      | ✔    | ✔         | ci_hs             |                   |
+|              +---------+-------------------+--------+------+-----------+-------------------+-------------------+
+|              | Kinetis | KL                | ✔      | ⚠    | ✖         | ci_fs, khci       |                   |
+|              |         +-------------------+--------+------+-----------+-------------------+-------------------+
+|              |         | K32L2             | ✔      |      | ✖         | khci              | ci_fs variant     |
+|              +---------+-------------------+--------+------+-----------+-------------------+-------------------+
+|              | LPC     | 11u, 13, 15       | ✔      | ✖    | ✖         | lpc_ip3511        |                   |
+|              |         +-------------------+--------+------+-----------+-------------------+-------------------+
+|              |         | 17, 40            | ✔      | ⚠    | ✖         | lpc17_40          |                   |
+|              |         +-------------------+--------+------+-----------+-------------------+-------------------+
+|              |         | 18, 43            | ✔      | ✔    | ✔         | ci_hs             |                   |
+|              |         +-------------------+--------+------+-----------+-------------------+-------------------+
+|              |         | 51u               | ✔      | ✖    | ✖         | lpc_ip3511        |                   |
+|              |         +-------------------+--------+------+-----------+-------------------+-------------------+
+|              |         | 54, 55            | ✔      |      | ✔         | lpc_ip3511        |                   |
+|              +---------+-------------------+--------+------+-----------+-------------------+-------------------+
+|              | MCX     | N9                | ✔      |      | ✔         | ci_fs, ci_hs      |                   |
++--------------+---------+-------------------+--------+------+-----------+-------------------+-------------------+
+| Raspberry Pi | RP2040, RP2350              | ✔      | ✔    | ✖         | rp2040, pio_usb   |                   |
++--------------+-----+-----------------------+--------+------+-----------+-------------------+-------------------+
+| Renesas      | RX  | 63N, 65N, 72N         | ✔      | ✔    | ✖         | rusb2             |                   |
+|              +-----+-----------------------+--------+------+-----------+-------------------+-------------------+
+|              | RA  | 4M1, 4M3, 6M1         | ✔      | ✔    | ✖         | rusb2             |                   |
+|              |     +-----------------------+--------+------+-----------+-------------------+-------------------+
+|              |     | 6M5                   | ✔      | ✔    | ✔         | rusb2             |                   |
++--------------+-----+-----------------------+--------+------+-----------+-------------------+-------------------+
+| Silabs       | EFM32GG12                   | ✔      |      | ✖         | dwc2              |                   |
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
+| Sony         | CXD56                       | ✔      | ✖    | ✔         | cxd56             |                   |
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
+| ST STM32     | F0                          | ✔      | ✖    | ✖         | stm32_fsdev       |                   |
+|              +----+------------------------+--------+------+-----------+-------------------+-------------------+
+|              | F1 | 102, 103               | ✔      | ✖    | ✖         | stm32_fsdev       |                   |
+|              |    +------------------------+--------+------+-----------+-------------------+-------------------+
+|              |    | 105, 107               | ✔      |      | ✖         | dwc2              |                   |
+|              +----+------------------------+--------+------+-----------+-------------------+-------------------+
+|              | F2                          | ✔      |      | ✔         | dwc2              |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | F3                          | ✔      | ✖    | ✖         | stm32_fsdev       |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | F4                          | ✔      |      | ✔         | dwc2              |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | F7                          | ✔      |      | ✔         | dwc2              |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | G0                          | ✔      |      | ✖         | stm32_fsdev       |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | G4                          | ✔      | ✖    | ✖         | stm32_fsdev       |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | H5                          | ✔      |      | ✖         | stm32_fsdev       |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | H7                          | ✔      |      | ✔         | dwc2              |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | L0                          | ✔      | ✖    | ✖         | stm32_fsdev       |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | L1                          | ✔      | ✖    | ✖         | stm32_fsdev       |                   |
+|              +----+------------------------+--------+------+-----------+-------------------+-------------------+
+|              | L4 | 4x2, 4x3               | ✔      | ✖    | ✖         | stm32_fsdev       |                   |
+|              |    +------------------------+--------+------+-----------+-------------------+-------------------+
+|              |    | 4x5, 4x6               | ✔      |      | ✖         | dwc2              |                   |
+|              +----+------------------------+--------+------+-----------+-------------------+-------------------+
+|              | L4+                         | ✔      |      | ✖         | dwc2              |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | L5                          | ✔      | ✖    | ✖         | stm32_fsdev       |                   |
+|              +----+------------------------+--------+------+-----------+-------------------+-------------------+
+|              | U5 | 535, 545               | ✔      |      | ✖         | stm32_fsdev       |                   |
+|              |    +------------------------+--------+------+-----------+-------------------+-------------------+
+|              |    | 575, 585               | ✔      |      | ✖         | dwc2              |                   |
+|              |    +------------------------+--------+------+-----------+-------------------+-------------------+
+|              |    | 59x,5Ax,5Fx,5Gx        | ✔      |      | ✔         | dwc2              |                   |
+|              +----+------------------------+--------+------+-----------+-------------------+-------------------+
+|              | WBx5                        | ✔      | ✖    | ✖         | stm32_fsdev       |                   |
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
+| TI           | MSP430                      | ✔      | ✖    | ✖         | msp430x5xx        |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | MSP432E4                    | ✔      |      | ✖         | musb              |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | TM4C123                     | ✔      |      | ✖         | musb              |                   |
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
+| ValentyUSB   | eptri                       | ✔      | ✖    | ✖         | eptri             |                   |
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
+| WCH          | CH32F20x                    | ✔      |      | ✔         | ch32f205          |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | CH32V20x                    | ✔      |      | ✖         | ch32v20x          |                   |
+|              +-----------------------------+--------+------+-----------+-------------------+-------------------+
+|              | CH32V307                    | ✔      |      | ✔         | ch32v307          |                   |
++--------------+-----------------------------+--------+------+-----------+-------------------+-------------------+
 
 
 Table Legend
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index e90e435d8e..b87b80300b 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -14,6 +14,13 @@
             "flasher_sn": "E6614C311B597D32",
             "flasher_args": "-f interface/cmsis-dap.cfg -f target/atsame5x.cfg -c \"adapter speed 5000\""
         },
+        {
+            "name": "metro_m7_1011",
+            "uid": "9CE8715DD71137363E00005002004200",
+            "flasher": "jlink",
+            "flasher_sn": "000611000000",
+            "flasher_args": "-device MIMXRT1011xxx5A"
+        },
         {
             "name": "max32666fthr",
             "uid": "0C81464124010B20FF0A08CC2C",
@@ -60,14 +67,6 @@
         }
     ],
     "boards-skip": [
-        {
-            "name": "metro_m7_1011",
-            "uid": "9CE8715DD71137363E00005002004200",
-            "flasher": "jlink",
-            "flasher_sn": "000611000000",
-            "flasher_args": "-device MIMXRT1011xxx5A",
-            "comment": "not running reliably in bulk with other boards, probably power, flashing etc .."
-        },
         {
             "name": "nanoch32v203",
             "uid": "CDAB277B0FBC03E339E339E3",

From ea4f9ceb58f0aa6acc86bbe3083596a98b5355fd Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 19 Aug 2024 20:08:55 +0700
Subject: [PATCH 180/204] remove weak from dcd_edpt_close() for port without
 TUP_DCD_EDPT_ISO_ALLOC

---
 src/device/dcd.h                            |  2 +-
 src/portable/microchip/samg/dcd_samg.c      |  5 +++++
 src/portable/nxp/lpc17_40/dcd_lpc17_40.c    |  5 +++++
 src/portable/template/dcd_template.c        | 16 ++++++++++++++++
 src/portable/ti/msp430x5xx/dcd_msp430x5xx.c |  5 +++++
 src/portable/valentyusb/eptri/dcd_eptri.c   |  5 +++++
 6 files changed, 37 insertions(+), 1 deletion(-)

diff --git a/src/device/dcd.h b/src/device/dcd.h
index d1d4e48976..3ef5188fc7 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -181,7 +181,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep)
 
 #else
 // Close an endpoint.
-void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr) TU_ATTR_WEAK;
+void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr);
 
 #endif
 
diff --git a/src/portable/microchip/samg/dcd_samg.c b/src/portable/microchip/samg/dcd_samg.c
index e3fa51e316..a154319378 100644
--- a/src/portable/microchip/samg/dcd_samg.c
+++ b/src/portable/microchip/samg/dcd_samg.c
@@ -277,6 +277,11 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   return true;
 }
 
+void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
+  (void) rhport; (void) ep_addr;
+  // TODO implement dcd_edpt_close()
+}
+
 void dcd_edpt_close_all (uint8_t rhport)
 {
   (void) rhport;
diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
index b880c28709..75b29faf37 100644
--- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
+++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
@@ -335,6 +335,11 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
   return true;
 }
 
+void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
+  (void) rhport; (void) ep_addr;
+  // TODO implement dcd_edpt_close()
+}
+
 void dcd_edpt_close_all (uint8_t rhport)
 {
   (void) rhport;
diff --git a/src/portable/template/dcd_template.c b/src/portable/template/dcd_template.c
index 12d610bd65..25ee507c1b 100644
--- a/src/portable/template/dcd_template.c
+++ b/src/portable/template/dcd_template.c
@@ -102,6 +102,22 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   return false;
 }
 
+// Allocate packet buffer used by ISO endpoints
+// Some MCU need manual packet buffer allocation, we allocate the largest size to avoid clustering
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void) rhport;
+  (void) ep_addr;
+  (void) largest_packet_size;
+  return false;
+}
+
+// Configure and enable an ISO endpoint according to descriptor
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) {
+  (void) rhport;
+  (void) desc_ep;
+  return false;
+}
+
 void dcd_edpt_close_all (uint8_t rhport)
 {
   (void) rhport;
diff --git a/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c b/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c
index 8005f5f7be..6b60bc657c 100644
--- a/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c
+++ b/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c
@@ -332,6 +332,11 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
   return true;
 }
 
+void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
+  (void) rhport; (void) ep_addr;
+  // TODO implement dcd_edpt_close()
+}
+
 void dcd_edpt_close_all (uint8_t rhport)
 {
   (void) rhport;
diff --git a/src/portable/valentyusb/eptri/dcd_eptri.c b/src/portable/valentyusb/eptri/dcd_eptri.c
index 58628a8bb5..8f40e33493 100644
--- a/src/portable/valentyusb/eptri/dcd_eptri.c
+++ b/src/portable/valentyusb/eptri/dcd_eptri.c
@@ -436,6 +436,11 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
   return true;
 }
 
+void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) {
+  (void) rhport; (void) ep_addr;
+  // TODO implement dcd_edpt_close()
+}
+
 void dcd_edpt_close_all (uint8_t rhport)
 {
   (void) rhport;

From 0541598d07fd57e4ad0067abe85c4c7a71b3756a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 19 Aug 2024 20:09:32 +0700
Subject: [PATCH 181/204] mimxrt1015_evk does not work reliably in hil pool
 (like metro m7).

---
 test/hil/hil_test.py |  6 +++---
 test/hil/rpi.json    | 14 +++++++-------
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index e5900c616d..09c30bf526 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -436,11 +436,11 @@ def main():
     else:
         config_boards = [e for e in config['boards'] if e['name'] in boards]
 
-    err_count_list = 0
+    err_count_list = []
     with Pool(processes=os.cpu_count()) as pool:
         err_count_list = pool.map(test_board, config_boards)
-
-    sys.exit(sum(err_count_list))
+    err_count = sum(err_count_list)
+    sys.exit(err_count)
 
 
 if __name__ == '__main__':
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index b87b80300b..49d2d82860 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -14,13 +14,6 @@
             "flasher_sn": "E6614C311B597D32",
             "flasher_args": "-f interface/cmsis-dap.cfg -f target/atsame5x.cfg -c \"adapter speed 5000\""
         },
-        {
-            "name": "metro_m7_1011",
-            "uid": "9CE8715DD71137363E00005002004200",
-            "flasher": "jlink",
-            "flasher_sn": "000611000000",
-            "flasher_args": "-device MIMXRT1011xxx5A"
-        },
         {
             "name": "max32666fthr",
             "uid": "0C81464124010B20FF0A08CC2C",
@@ -67,6 +60,13 @@
         }
     ],
     "boards-skip": [
+        {
+            "name": "mimxrt1015_evk",
+            "uid": "DC28F865D2111D228D00B0543A70463C",
+            "flasher": "jlink",
+            "flasher_sn": "000726284213",
+            "flasher_args": "-device MIMXRT1015DAF5A"
+        },
         {
             "name": "nanoch32v203",
             "uid": "CDAB277B0FBC03E339E339E3",

From 61187008285d70d700e30e5f11636240ae4845d0 Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Wed, 21 Aug 2024 19:09:37 +0700
Subject: [PATCH 182/204] update circle ci to build make (#2769)

* update build.py script to work with circleci
* build make with circle ci
* build vm for esp only
* nrf imxrt with large resource
* nrf imxrt with large resource
* remove 2 of nrf boards
---
 .circleci/config.yml                          |  46 ++++-
 .circleci/config2.yml                         | 162 +++++++++++++----
 .github/workflows/build.yml                   |  46 +----
 .github/workflows/build_util.yml              |   7 +-
 .github/workflows/ci_set_matrix.py            |   9 +-
 .../boards/nrf52840_mdk_dongle/board.cmake    |   5 -
 hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h |  52 ------
 .../nrf/boards/nrf52840_mdk_dongle/board.mk   |  15 --
 .../nrf52840_mdk_dongle.ld                    |  13 --
 .../nrf/boards/raytac_mdbt50q_rx/board.cmake  |   4 -
 hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h   |  52 ------
 hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.mk  |   7 -
 tools/build.py                                | 171 ++++++++++--------
 tools/build_utils.py                          |  35 ----
 14 files changed, 274 insertions(+), 350 deletions(-)
 delete mode 100644 hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.cmake
 delete mode 100644 hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h
 delete mode 100644 hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk
 delete mode 100644 hw/bsp/nrf/boards/nrf52840_mdk_dongle/nrf52840_mdk_dongle.ld
 delete mode 100644 hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.cmake
 delete mode 100644 hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h
 delete mode 100644 hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.mk

diff --git a/.circleci/config.yml b/.circleci/config.yml
index 4d541a595e..8769926b16 100644
--- a/.circleci/config.yml
+++ b/.circleci/config.yml
@@ -18,16 +18,52 @@ jobs:
             MATRIX_JSON=$(python .github/workflows/ci_set_matrix.py)
             echo "MATRIX_JSON=$MATRIX_JSON"
 
-            TOOLCHAIN_LIST=("arm-clang" "arm-gcc")
-            for toolchain in "${TOOLCHAIN_LIST[@]}"; do
+            BUILDSYSTEM_TOOLCHAIN=(
+              "cmake arm-clang"
+              "make aarch64-gcc"
+              "make arm-gcc"
+              "make msp430-gcc"
+              "make riscv-gcc"
+              # "make rx-gcc" llvm-gcc-renesas.com seems to be down
+              "cmake esp-idf"
+            )
+
+            RESOURCE_LARGE='["nrf", "imxrt"]'
+
+            for e in "${BUILDSYSTEM_TOOLCHAIN[@]}"; do
+              e_arr=($e)
+              build_system="${e_arr[0]}"
+              toolchain="${e_arr[1]}"
               FAMILY=$(echo $MATRIX_JSON | jq -r ".\"$toolchain\".family")
-              echo "${toolchain}_FAMILY=$FAMILY"
-              echo "      - build:" >> .circleci/config2.yml
+              echo "FAMILY_${toolchain}=$FAMILY"
+
+              # FAMILY_LARGE = FAMILY - RESOURCE_LARGE
+              # Separate large from medium+ resources
+              FAMILY_LARGE=$(jq -n --argjson family "$FAMILY" --argjson resource "$RESOURCE_LARGE" '$family | map(select(IN($resource[])))')
+              FAMILY=$(jq -n --argjson family "$FAMILY" --argjson resource "$RESOURCE_LARGE" '$family | map(select(IN($resource[]) | not))')
+
+              if [[ $toolchain == esp-idf ]]; then
+                echo "      - build-vm:" >> .circleci/config2.yml
+              else
+                echo "      - build:" >> .circleci/config2.yml
+              fi
               echo "          matrix:" >> .circleci/config2.yml
               echo "            parameters:" >> .circleci/config2.yml
+              echo "              build-system: ['$build_system']" >> .circleci/config2.yml
               echo "              toolchain: ['$toolchain']" >> .circleci/config2.yml
-              echo "              build-system: ['cmake']" >> .circleci/config2.yml
               echo "              family: $FAMILY" >> .circleci/config2.yml
+              #echo "              resource_class: ['medium+']" >> .circleci/config2.yml
+
+              # add large resources
+              if [ "$(echo $FAMILY_LARGE | jq 'length')" -gt 0 ]; then
+                echo "      - build:" >> .circleci/config2.yml
+                echo "          matrix:" >> .circleci/config2.yml
+                echo "            parameters:" >> .circleci/config2.yml
+                echo "              build-system: ['$build_system']" >> .circleci/config2.yml
+                echo "              toolchain: ['$toolchain']" >> .circleci/config2.yml
+                echo "              family: $FAMILY_LARGE" >> .circleci/config2.yml
+                echo "              resource_class: ['large']" >> .circleci/config2.yml
+              fi
             done
 
       - continuation/continue:
diff --git a/.circleci/config2.yml b/.circleci/config2.yml
index ea7fccaffe..cd844c33f8 100644
--- a/.circleci/config2.yml
+++ b/.circleci/config2.yml
@@ -5,44 +5,124 @@ commands:
     parameters:
         toolchain:
             type: string
+
     steps:
       - run:
-          name: Install Toolchain
+          name: Set toolchain url and key
           command: |
             TOOLCHAIN_JSON='{
+              "aarch64-gcc": "https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz",
               "arm-clang": "https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm/releases/download/release-17.0.1/LLVMEmbeddedToolchainForArm-17.0.1-Linux-x86_64.tar.xz",
-              "arm-gcc": "https://github.com/xpack-dev-tools/arm-none-eabi-gcc-xpack/releases/download/v12.3.1-1.1/xpack-arm-none-eabi-gcc-12.3.1-1.1-linux-x64.tar.gz"
+              "arm-gcc": "https://github.com/xpack-dev-tools/arm-none-eabi-gcc-xpack/releases/download/v12.3.1-1.1/xpack-arm-none-eabi-gcc-12.3.1-1.1-linux-x64.tar.gz",
+              "msp430-gcc": "http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/9_2_0_0/export/msp430-gcc-9.2.0.50_linux64.tar.bz2",
+              "riscv-gcc": "https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v13.2.0-2/xpack-riscv-none-elf-gcc-13.2.0-2-linux-x64.tar.gz",
+              "rx-gcc": "https://llvm-gcc-renesas.com/downloads/get.php?f=rx/8.3.0.202004-gnurx/gcc-8.3.0.202004-GNURX-ELF.run"
             }'
             toolchain_url=$(echo $TOOLCHAIN_JSON | jq -r '.["<< parameters.toolchain >>"]')
-            echo "toolchain_url=$toolchain_url"
 
-            # download and extract toolchain
-            mkdir -p ~/cache/<< parameters.toolchain >>
-            wget $toolchain_url -O toolchain.tar.gz
-            tar -C ~/cache/<< parameters.toolchain >> -xaf toolchain.tar.gz
+            # only cache if not a github link
+            if [[ $toolchain_url != "https://github.com"* ]]; then
+              echo "<< parameters.toolchain >>-$toolchain_url" > toolchain_key
+            fi
+            echo "export toolchain_url=$toolchain_url" >> $BASH_ENV
+
+      - restore_cache:
+          name: Restore Toolchain Cache
+          key: deps-{{ checksum "toolchain_key" }}
+          paths:
+            - ~/cache/<< parameters.toolchain >>
+
+      - run:
+          name: Install Toolchain
+          command: |
+            # download if folder does not exist (not cached)
+            if [ ! -d ~/cache/<< parameters.toolchain >> ]; then
+              mkdir -p ~/cache/<< parameters.toolchain >>
+              wget --progress=dot:giga $toolchain_url -O toolchain.tar.gz
+              if [[ << parameters.toolchain >> == rx-gcc ]]; then
+                mv toolchain.tar.gz toolchain.run
+                chmod +x toolchain.run
+                ./toolchain.run -p ~/cache/<< parameters.toolchain >>/gnurx -y
+              else
+                tar -C ~/cache/<< parameters.toolchain >> -xaf toolchain.tar.gz
+              fi
+            fi
 
             # Add toolchain to PATH
             echo "export PATH=$PATH:`echo ~/cache/<< parameters.toolchain >>/*/bin`" >> $BASH_ENV
 
-  get-deps:
+      - save_cache:
+          name: Save Toolchain Cache
+          key: deps-{{ checksum "toolchain_key" }}
+          paths:
+            - ~/cache/<< parameters.toolchain >>
+
+  build:
     parameters:
+      build-system:
+        type: string
+      toolchain:
+        type: string
       family:
         type: string
+
     steps:
+      - checkout
+      - when:
+          condition:
+            not:
+              equal: [esp-idf, << parameters.toolchain >>]
+          steps:
+            - setup-toolchain:
+                toolchain: << parameters.toolchain >>
+
       - run:
           name: Get Dependencies
           command: |
             python tools/get_deps.py << parameters.family >>
 
+            # Install ninja  if cmake build system
+            if [ << parameters.build-system >> == "cmake" ]; then
+              NINJA_URL=https://github.com/ninja-build/ninja/releases/download/v1.12.1/ninja-linux.zip
+              wget $NINJA_URL -O ninja-linux.zip
+              unzip ninja-linux.zip -d ~/bin
+            fi
+
             # Install Pico SDK
             if [ << parameters.family >> == "rp2040" ]; then
               git clone --depth 1 https://github.com/raspberrypi/pico-sdk.git ~/pico-sdk
               echo "export PICO_SDK_PATH=~/pico-sdk" >> $BASH_ENV
             fi
 
+      - run:
+          name: Build
+          command: |
+            if [ << parameters.toolchain >> == esp-idf ]; then
+              docker run --rm -v $PWD:/project -w /project espressif/idf:v5.1.1 python tools/build.py << parameters.family >>
+            else
+              # Only build one board per family for non PRs i.e commit to master
+              ONE_PER_FAMILY=""
+              if [ -z "$CIRCLE_PULL_REQUEST" ]; then
+                ONE_PER_FAMILY="--one-per-family"
+              fi
+
+              # Toolchain option default is gcc
+              if [ << parameters.toolchain >> == arm-clang ]; then
+                TOOLCHAIN_OPTION="--toolchain clang"
+              elif [ << parameters.toolchain >> == arm-gcc ]; then
+                TOOLCHAIN_OPTION="--toolchain gcc"
+              fi
+
+              python tools/build.py $ONE_PER_FAMILY -s << parameters.build-system >> $TOOLCHAIN_OPTION << parameters.family >>
+            fi
+
 jobs:
+  # Build using docker
   build:
     parameters:
+      resource_class:
+        type: string
+        default: medium+
       build-system:
         type: string
       toolchain:
@@ -52,40 +132,36 @@ jobs:
 
     docker:
       - image: cimg/base:current
-    resource_class: medium+
+    resource_class: << parameters.resource_class >>
+
     steps:
-      - checkout
-      - when:
-          condition: << parameters.build-system >> == 'cmake'
-          steps:
-            - run:
-                name: Install Ninja
-                command: |
-                  # Install Ninja
-                  NINJA_URL=https://github.com/ninja-build/ninja/releases/download/v1.12.1/ninja-linux.zip
-                  wget $NINJA_URL -O ninja-linux.zip
-                  unzip ninja-linux.zip -d ~/bin
-      - setup-toolchain:
+      - build:
+          build-system: << parameters.build-system >>
           toolchain: << parameters.toolchain >>
-      - get-deps:
           family: << parameters.family >>
-      - run:
-          name: Build
-          command: |
-            # Only build one board per family for non PRs i.e commit to master
-            ONE_PER_FAMILY=""
-            if [ -z "$CIRCLE_PULL_REQUEST" ]; then
-              ONE_PER_FAMILY="--one-per-family"
-            fi
 
-            # Toolchain option default is gcc
-            if [ "<< parameters.toolchain >>" == "arm-clang" ]; then
-              TOOLCHAIN_OPTION="--toolchain clang"
-            elif [ "<< parameters.toolchain >>" == "arm-gcc" ]; then
-              TOOLCHAIN_OPTION="--toolchain gcc"
-            fi
+  # Build using VM
+  build-vm:
+    parameters:
+      resource_class:
+        type: string
+        default: large
+      build-system:
+        type: string
+      toolchain:
+        type: string
+      family:
+        type: string
 
-            python tools/build.py $ONE_PER_FAMILY -s << parameters.build-system >> $TOOLCHAIN_OPTION << parameters.family >>
+    machine:
+      image: ubuntu-2404:current
+    resource_class: << parameters.resource_class >>
+
+    steps:
+      - build:
+          build-system: << parameters.build-system >>
+          toolchain: << parameters.toolchain >>
+          family: << parameters.family >>
 
 workflows:
   build:
@@ -93,6 +169,14 @@ workflows:
 #      - build:
 #          matrix:
 #            parameters:
-#              toolchain: ['arm-clang']
+#              toolchain: [ 'arm-gcc' ]
+#              build-system: [ 'cmake' ]
+#              family: [ 'nrf' ]
+#              resource_class: ['large']
+#      - build-vm:
+#          matrix:
+#            parameters:
+#              toolchain: ['esp-idf']
 #              build-system: ['cmake']
-#              family: ['imxrt']
+#              family: ['-bespressif_kaluga_1']
+#              resource_class: ['large']
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index e4204ca3d0..6ca9885f87 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -51,7 +51,6 @@ jobs:
   # Build CMake
   # ---------------------------------------
   cmake:
-    # if: false
     needs: set-matrix
     uses: ./.github/workflows/build_util.yml
     strategy:
@@ -60,6 +59,7 @@ jobs:
         toolchain:
           # - 'arm-clang' is built by circle-ci in PR
           - 'aarch64-gcc'
+          - 'arm-gcc'
           - 'msp430-gcc'
           - 'riscv-gcc'
     with:
@@ -69,41 +69,28 @@ jobs:
       one-per-family: ${{ github.event_name == 'push' }}
 
   # ---------------------------------------
-  # Build CMake arm-gcc
-  # only build with push, for PR: all board is built by circle-ci
-  # ---------------------------------------
-  cmake-arm-gcc:
-    if: github.event_name == 'push'
-    needs: set-matrix
-    uses: ./.github/workflows/build_util.yml
-    with:
-      build-system: 'cmake'
-      toolchain: 'arm-gcc'
-      build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)['arm-gcc'].family) }}
-      one-per-family: true
-
-  # ---------------------------------------
-  # Build Make
+  # Build Make (built by circle-ci in PR, only build on push here)
   # ---------------------------------------
   make:
-    # if: false
+    if: github.event_name == 'push'
     needs: set-matrix
     uses: ./.github/workflows/build_util.yml
     strategy:
       fail-fast: false
       matrix:
         toolchain:
-          # 'arm-clang' would be built by circle-ci
-          - 'aarch64-gcc'
+          # 'arm-clang'
           - 'arm-gcc'
+          - 'aarch64-gcc'
           - 'msp430-gcc'
           - 'riscv-gcc'
           - 'rx-gcc'
+          - 'esp-idf' # buid-system is ignored
     with:
       build-system: 'make'
       toolchain: ${{ matrix.toolchain }}
       build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)[matrix.toolchain].family) }}
-      one-per-family: ${{ github.event_name == 'push' }}
+      one-per-family: true
 
   # ---------------------------------------
   # Build Make on Windows/MacOS
@@ -122,29 +109,10 @@ jobs:
       build-args: '["stm32h7"]'
       one-per-family: true
 
-  # ---------------------------------------
-  # Build Espressif
-  # ---------------------------------------
-  espressif:
-    # if: false
-    uses: ./.github/workflows/build_util.yml
-    strategy:
-      fail-fast: false
-      matrix:
-        board:
-          - 'espressif_kaluga_1'
-          - 'espressif_s3_devkitm'
-    with:
-      build-system: 'cmake'
-      toolchain: 'esp-idf'
-      toolchain_version: 'v5.1.1'
-      build-args: '["-b${{ matrix.board }}"]'
-
   # ---------------------------------------
   # Build IAR on HFP self-hosted
   # ---------------------------------------
   arm-iar:
-    # if: false
     if: github.repository_owner == 'hathach'
     needs: set-matrix
     runs-on: [self-hosted, Linux, X64, hifiphile]
diff --git a/.github/workflows/build_util.yml b/.github/workflows/build_util.yml
index e983f06d16..ff98aef2d4 100644
--- a/.github/workflows/build_util.yml
+++ b/.github/workflows/build_util.yml
@@ -9,9 +9,6 @@ on:
       toolchain:
         required: true
         type: string
-      toolchain_version:
-        required: false
-        type: string
       build-args:
         required: true
         type: string
@@ -40,7 +37,7 @@ jobs:
         uses: ./.github/actions/setup_toolchain
         with:
           toolchain: ${{ inputs.toolchain }}
-          toolchain_version: ${{ inputs.toolchain_version }}
+          toolchain_version: 'v5.1.1'
 
       - name: Get Dependencies
         uses: ./.github/actions/get_deps
@@ -60,7 +57,7 @@ jobs:
       - name: Build
         run: |
           if [ "${{ inputs.toolchain }}" == "esp-idf" ]; then
-            docker run --rm -v $PWD:/project -w /project espressif/idf:${{ inputs.toolchain_version }} python3 tools/build.py ${{ matrix.arg }}
+            docker run --rm -v $PWD:/project -w /project espressif/idf:v5.1.1 python tools/build.py ${{ matrix.arg }}
           else
             python tools/build.py -s ${{ inputs.build-system }} ${{ steps.setup-toolchain.outputs.build_option }} ${{ steps.set-one-per-family.outputs.build_option }} ${{ matrix.arg }}
           fi
diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py
index c9698c934d..4da26bfea2 100644
--- a/.github/workflows/ci_set_matrix.py
+++ b/.github/workflows/ci_set_matrix.py
@@ -6,6 +6,7 @@
     "arm-clang",
     "arm-iar",
     "arm-gcc",
+    "esp-idf",
     "msp430-gcc",
     "riscv-gcc",
     "rx-gcc"
@@ -31,15 +32,19 @@
     "ra": ["arm-gcc"],
     "rp2040": ["arm-gcc"],
     "rx": ["rx-gcc"],
-    "samd11 samd21 saml2x": ["arm-gcc", "arm-clang"],
+    "samd11 saml2x": ["arm-gcc", "arm-clang"],
+    "samd21": ["arm-gcc", "arm-clang"],
     "samd5x_e5x samg": ["arm-gcc", "arm-clang"],
     "stm32f0 stm32f1 stm32f2 stm32f3": ["arm-gcc", "arm-clang", "arm-iar"],
     "stm32f4": ["arm-gcc", "arm-clang", "arm-iar"],
     "stm32f7": ["arm-gcc", "arm-clang", "arm-iar"],
     "stm32g0 stm32g4 stm32h5": ["arm-gcc", "arm-clang", "arm-iar"],
     "stm32h7": ["arm-gcc", "arm-clang", "arm-iar"],
-    "stm32l0 stm32l4 stm32u5 stm32wb": ["arm-gcc", "arm-clang", "arm-iar"],
+    "stm32l0 stm32l4": ["arm-gcc", "arm-clang", "arm-iar"],
+    "stm32u5 stm32wb": ["arm-gcc", "arm-clang", "arm-iar"],
     "xmc4000": ["arm-gcc"],
+    "-bespressif_kaluga_1": ["esp-idf"],
+    "-bespressif_s3_devkitm": ["esp-idf"],
 }
 
 
diff --git a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.cmake b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.cmake
deleted file mode 100644
index ffa5932c15..0000000000
--- a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.cmake
+++ /dev/null
@@ -1,5 +0,0 @@
-set(MCU_VARIANT nrf52840)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/nrf52840_mdk_dongle.ld)
-
-function(update_board TARGET)
-endfunction()
diff --git a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h
deleted file mode 100644
index 072cb27143..0000000000
--- a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#define _PINNUM(port, pin)    ((port)*32 + (pin))
-
-// LED
-#define LED_PIN               _PINNUM(0, 23)
-#define LED_STATE_ON          0
-
-// Button
-#define BUTTON_PIN            _PINNUM(0, 18)
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_RX_PIN           2
-#define UART_TX_PIN           3
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk
deleted file mode 100644
index f25ec8f345..0000000000
--- a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk
+++ /dev/null
@@ -1,15 +0,0 @@
-MCU_VARIANT = nrf52840
-CFLAGS += -DNRF52840_XXAA
-
-LD_FILE = $(BOARD_PATH)/$(BOARD).ld
-
-# flash using Nordic nrfutil (pip3 install nrfutil)
-# 	make BOARD=nrf52840_mdk_dongle SERIAL=/dev/ttyACM0 all flash
-NRFUTIL = nrfutil
-
-$(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
-	$(NRFUTIL) pkg generate --hw-version 52 --sd-req 0x0000 --debug-mode --application $^ $@
-
-flash: $(BUILD)/$(PROJECT).zip
-	@:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyACM0)
-	$(NRFUTIL) dfu usb-serial --package $^ -p $(SERIAL) -b 115200
diff --git a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/nrf52840_mdk_dongle.ld b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/nrf52840_mdk_dongle.ld
deleted file mode 100644
index a6bc6dcfe6..0000000000
--- a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/nrf52840_mdk_dongle.ld
+++ /dev/null
@@ -1,13 +0,0 @@
-/* Linker script to configure memory regions. */
-
-SEARCH_DIR(.)
-/*GROUP(-lgcc -lc -lnosys) not compatible with clang*/
-
-MEMORY
-{
-  FLASH (rx) : ORIGIN = 0x1000, LENGTH = 0xE0000-0x1000
-  RAM (rwx) :  ORIGIN = 0x20000008, LENGTH = 0x3fff8
-}
-
-
-INCLUDE "nrf_common.ld"
diff --git a/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.cmake b/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.cmake
deleted file mode 100644
index cc370aac80..0000000000
--- a/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.cmake
+++ /dev/null
@@ -1,4 +0,0 @@
-set(MCU_VARIANT nrf52840)
-
-function(update_board TARGET)
-endfunction()
diff --git a/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h b/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h
deleted file mode 100644
index bc203f0735..0000000000
--- a/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#define _PINNUM(port, pin)    ((port)*32 + (pin))
-
-// LED
-#define LED_PIN               _PINNUM(1, 13)
-#define LED_STATE_ON          0
-
-// Button
-#define BUTTON_PIN            _PINNUM(0, 15)
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_RX_PIN     25
-#define UART_TX_PIN     24
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.mk b/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.mk
deleted file mode 100644
index be2ed33147..0000000000
--- a/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.mk
+++ /dev/null
@@ -1,7 +0,0 @@
-MCU_VARIANT = nrf52840
-CFLAGS += -DNRF52840_XXAA
-
-LD_FILE = hw/mcu/nordic/nrfx/mdk/nrf52840_xxaa.ld
-
-# flash using jlink
-flash: flash-jlink
diff --git a/tools/build.py b/tools/build.py
index b937a73420..f9ae68231c 100644
--- a/tools/build.py
+++ b/tools/build.py
@@ -9,19 +9,29 @@
 
 import build_utils
 
-SUCCEEDED = "\033[32msucceeded\033[0m"
-FAILED = "\033[31mfailed\033[0m"
+STATUS_OK = "\033[32mOK\033[0m"
+STATUS_FAILED = "\033[31mFailed\033[0m"
+STATUS_SKIPPED = "\033[33mSkipped\033[0m"
 
-build_separator = '-' * 106
+RET_OK = 0
+RET_FAILED = 1
+RET_SKIPPED = 2
 
+build_format = '| {:30} | {:40} | {:16} | {:5} |'
+build_separator = '-' * 95
+build_status = [STATUS_OK, STATUS_FAILED, STATUS_SKIPPED]
 
+
+# -----------------------------
+# Helper
+# -----------------------------
 def run_cmd(cmd):
     #print(cmd)
     r = subprocess.run(cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
-    title = 'command error'
+    title = f'Command Error: {cmd}'
     if r.returncode != 0:
         # print build output if failed
-        if os.getenv('CI'):
+        if os.getenv('GITHUB_ACTIONS'):
             print(f"::group::{title}")
             print(r.stdout.decode("utf-8"))
             print(f"::endgroup::")
@@ -30,6 +40,7 @@ def run_cmd(cmd):
             print(r.stdout.decode("utf-8"))
     return r
 
+
 def find_family(board):
     bsp_dir = Path("hw/bsp")
     for family_dir in bsp_dir.iterdir():
@@ -56,70 +67,91 @@ def get_examples(family):
     return all_examples
 
 
-def build_board_cmake(board, toolchain):
-    start_time = time.monotonic()
-    ret = [0, 0, 0]
+def print_build_result(board, example, status, duration):
+    if isinstance(duration, (int, float)):
+        duration = "{:.2f}s".format(duration)
+    print(build_format.format(board, example, build_status[status], duration))
 
+# -----------------------------
+# CMake
+# -----------------------------
+def cmake_board(board, toolchain):
+    ret = [0, 0, 0]
+    start_time = time.monotonic()
     build_dir = f"cmake-build/cmake-build-{board}"
     family = find_family(board)
     if family == 'espressif':
         # for espressif, we have to build example individually
         all_examples = get_examples(family)
         for example in all_examples:
-            r = run_cmd(f'cmake examples/{example} -B {build_dir}/{example} -G "Ninja" -DBOARD={board} -DMAX3421_HOST=1')
-            if r.returncode == 0:
-                r = run_cmd(f'cmake --build {build_dir}/{example}')
-            if r.returncode == 0:
-                ret[0] += 1
-            else:
-                ret[1] += 1
+            rcmd = run_cmd(f'cmake examples/{example} -B {build_dir}/{example} -G "Ninja" -DBOARD={board} -DMAX3421_HOST=1')
+            if rcmd.returncode == 0:
+                rcmd = run_cmd(f'cmake --build {build_dir}/{example}')
+            ret[0 if rcmd.returncode == 0 else 1] += 1
     else:
-        r = run_cmd(f'cmake examples -B {build_dir} -G "Ninja" -DBOARD={board} -DCMAKE_BUILD_TYPE=MinSizeRel -DTOOLCHAIN={toolchain}')
-        if r.returncode == 0:
-            r = run_cmd(f"cmake --build {build_dir}")
-        if r.returncode == 0:
-            ret[0] += 1
-        else:
-            ret[1] += 1
+        rcmd = run_cmd(f'cmake examples -B {build_dir} -G "Ninja" -DBOARD={board} -DCMAKE_BUILD_TYPE=MinSizeRel -DTOOLCHAIN={toolchain}')
+        if rcmd.returncode == 0:
+            rcmd = run_cmd(f"cmake --build {build_dir}")
+        ret[0 if rcmd.returncode == 0 else 1] += 1
 
-    duration = time.monotonic() - start_time
+    example = 'all'
+    print_build_result(board, example, 0 if ret[1] == 0 else 1, time.monotonic() - start_time)
+    return ret
 
-    if ret[1] == 0:
-        status = SUCCEEDED
+
+# -----------------------------
+# Make
+# -----------------------------
+def make_one_example(example, board, make_option):
+    # Check if board is skipped
+    if build_utils.skip_example(example, board):
+        print_build_result(board, example, 2, '-')
+        r = 2
     else:
-        status = FAILED
+        start_time = time.monotonic()
+        # skip -j for circleci
+        if not os.getenv('CIRCLECI'):
+            make_option += ' -j'
+        make_cmd = f"make -C examples/{example} BOARD={board} {make_option}"
+        # run_cmd(f"{make_cmd} clean")
+        build_result = run_cmd(f"{make_cmd} all")
+        r = 0 if build_result.returncode == 0 else 1
+        print_build_result(board, example, r, time.monotonic() - start_time)
 
-    flash_size = "-"
-    sram_size = "-"
-    example = 'all'
-    title = build_utils.build_format.format(example, board, status, "{:.2f}s".format(duration), flash_size, sram_size)
-    print(title)
+    ret = [0, 0, 0]
+    ret[r] = 1
     return ret
 
 
-def build_board_make_all_examples(board, toolchain, all_examples):
+def make_board(board, toolchain):
+    print(build_separator)
+    all_examples = get_examples(find_family(board))
     start_time = time.monotonic()
     ret = [0, 0, 0]
-
     with Pool(processes=os.cpu_count()) as pool:
         pool_args = list((map(lambda e, b=board, o=f"TOOLCHAIN={toolchain}": [e, b, o], all_examples)))
-        r = pool.starmap(build_utils.build_example, pool_args)
+        r = pool.starmap(make_one_example, pool_args)
         # sum all element of same index (column sum)
-        rsum = list(map(sum, list(zip(*r))))
-        ret[0] += rsum[0]
-        ret[1] += rsum[1]
-        ret[2] += rsum[2]
-    duration = time.monotonic() - start_time
-    if ret[1] == 0:
-        status = SUCCEEDED
-    else:
-        status = FAILED
-
-    flash_size = "-"
-    sram_size = "-"
+        ret = list(map(sum, list(zip(*r))))
     example = 'all'
-    title = build_utils.build_format.format(example, board, status, "{:.2f}s".format(duration), flash_size, sram_size)
-    print(title)
+    print_build_result(board, example, 0 if ret[1] == 0 else 1, time.monotonic() - start_time)
+    return ret
+
+
+# -----------------------------
+# Build Family
+# -----------------------------
+def build_boards_list(boards, toolchain, build_system):
+    ret = [0, 0, 0]
+    for b in boards:
+        r = [0, 0, 0]
+        if build_system == 'cmake':
+            r = cmake_board(b, toolchain)
+        elif build_system == 'make':
+            r = make_board(b, toolchain)
+        ret[0] += r[0]
+        ret[1] += r[1]
+        ret[2] += r[2]
     return ret
 
 
@@ -131,7 +163,6 @@ def build_family(family, toolchain, build_system, one_per_family, boards):
     all_boards.sort()
 
     ret = [0, 0, 0]
-
     # If only-one flag is set, select one random board
     if one_per_family:
         for b in boards:
@@ -140,21 +171,13 @@ def build_family(family, toolchain, build_system, one_per_family, boards):
                 return ret
         all_boards = [random.choice(all_boards)]
 
-    # success, failed, skipped
-    all_examples = get_examples(family)
-    for board in all_boards:
-        r = [0, 0, 0]
-        if build_system == 'cmake':
-            r = build_board_cmake(board, toolchain)
-        elif build_system == 'make':
-            r = build_board_make_all_examples(board, toolchain, all_examples)
-        ret[0] += r[0]
-        ret[1] += r[1]
-        ret[2] += r[2]
-
+    ret = build_boards_list(all_boards, toolchain, build_system)
     return ret
 
 
+# -----------------------------
+# Main
+# -----------------------------
 def main():
     parser = argparse.ArgumentParser()
     parser.add_argument('families', nargs='*', default=[], help='Families to build')
@@ -175,7 +198,7 @@ def main():
         return 1
 
     print(build_separator)
-    print(build_utils.build_format.format('Example', 'Board', '\033[39mResult\033[0m', 'Time', 'Flash', 'SRAM'))
+    print(build_format.format('Board', 'Example', '\033[39mResult\033[0m', 'Time'))
     total_time = time.monotonic()
     result = [0, 0, 0]
 
@@ -189,28 +212,22 @@ def main():
         all_families = list(families)
     all_families.sort()
 
-    # succeeded, failed
+    # succeeded, failed, skipped
     for f in all_families:
-        fret = build_family(f, toolchain, build_system, one_per_family, boards)
-        result[0] += fret[0]
-        result[1] += fret[1]
-        result[2] += fret[2]
-
-    # build boards
-    for b in boards:
-        r = [0, 0, 0]
-        if build_system == 'cmake':
-            r = build_board_cmake(b, toolchain)
-        elif build_system == 'make':
-            all_examples = get_examples(find_family(b))
-            r = build_board_make_all_examples(b, toolchain, all_examples)
+        r = build_family(f, toolchain, build_system, one_per_family, boards)
         result[0] += r[0]
         result[1] += r[1]
         result[2] += r[2]
 
+    # build boards
+    r = build_boards_list(boards, toolchain, build_system)
+    result[0] += r[0]
+    result[1] += r[1]
+    result[2] += r[2]
+
     total_time = time.monotonic() - total_time
     print(build_separator)
-    print(f"Build Summary: {result[0]} {SUCCEEDED}, {result[1]} {FAILED} and took {total_time:.2f}s")
+    print(f"Build Summary: {result[0]} {STATUS_OK}, {result[1]} {STATUS_FAILED} and took {total_time:.2f}s")
     print(build_separator)
     return result[1]
 
diff --git a/tools/build_utils.py b/tools/build_utils.py
index 32aca95dd1..5f88db8a25 100644
--- a/tools/build_utils.py
+++ b/tools/build_utils.py
@@ -92,38 +92,3 @@ def build_size(make_cmd):
             return (flash_size, sram_size)
 
     return (0, 0)
-
-
-def build_example(example, board, make_option):
-    start_time = time.monotonic()
-    flash_size = "-"
-    sram_size = "-"
-
-    # succeeded, failed, skipped
-    ret = [0, 0, 0]
-
-    make_cmd = f"make -j -C examples/{example} BOARD={board} {make_option}"
-
-    # Check if board is skipped
-    if skip_example(example, board):
-        status = SKIPPED
-        ret[2] = 1
-        print(build_format.format(example, board, status, '-', flash_size, sram_size))
-    else:
-        build_result = subprocess.run(f"{make_cmd} all", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
-
-        if build_result.returncode == 0:
-            status = SUCCEEDED
-            ret[0] = 1
-            (flash_size, sram_size) = build_size(make_cmd)
-        else:
-            status = FAILED
-            ret[1] = 1
-
-        build_duration = time.monotonic() - start_time
-        print(build_format.format(example, board, status, "{:.2f}s".format(build_duration), flash_size, sram_size))
-
-        if build_result.returncode != 0:
-            print(build_result.stdout.decode("utf-8"))
-
-    return ret

From 858ad66c9316250876dad533e47513b7def915d1 Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Thu, 22 Aug 2024 12:37:11 +0700
Subject: [PATCH 183/204] circleci tweaks (#2770)

* skip circleci build on master push
* change max32666 probe to jlink, max32625pico is not reliable enough
---
 .circleci/config.yml         |  4 ++++
 .circleci/config2.yml        |  8 +-------
 hw/bsp/max32690/family.cmake | 15 +--------------
 test/hil/rpi.json            | 13 ++++++++++---
 4 files changed, 16 insertions(+), 24 deletions(-)

diff --git a/.circleci/config.yml b/.circleci/config.yml
index 8769926b16..5136d63319 100644
--- a/.circleci/config.yml
+++ b/.circleci/config.yml
@@ -71,5 +71,9 @@ jobs:
 
 workflows:
   set-matrix:
+    # Only build PR here, Push will be built by github action.
+    when:
+      and:
+        - not: << pipeline.git.branch.is_default >>
     jobs:
       - set-matrix
diff --git a/.circleci/config2.yml b/.circleci/config2.yml
index cd844c33f8..70b5c60acd 100644
--- a/.circleci/config2.yml
+++ b/.circleci/config2.yml
@@ -100,12 +100,6 @@ commands:
             if [ << parameters.toolchain >> == esp-idf ]; then
               docker run --rm -v $PWD:/project -w /project espressif/idf:v5.1.1 python tools/build.py << parameters.family >>
             else
-              # Only build one board per family for non PRs i.e commit to master
-              ONE_PER_FAMILY=""
-              if [ -z "$CIRCLE_PULL_REQUEST" ]; then
-                ONE_PER_FAMILY="--one-per-family"
-              fi
-
               # Toolchain option default is gcc
               if [ << parameters.toolchain >> == arm-clang ]; then
                 TOOLCHAIN_OPTION="--toolchain clang"
@@ -113,7 +107,7 @@ commands:
                 TOOLCHAIN_OPTION="--toolchain gcc"
               fi
 
-              python tools/build.py $ONE_PER_FAMILY -s << parameters.build-system >> $TOOLCHAIN_OPTION << parameters.family >>
+              python tools/build.py -s << parameters.build-system >> $TOOLCHAIN_OPTION << parameters.family >>
             fi
 
 jobs:
diff --git a/hw/bsp/max32690/family.cmake b/hw/bsp/max32690/family.cmake
index 736ca8eac2..96dcfedffd 100644
--- a/hw/bsp/max32690/family.cmake
+++ b/hw/bsp/max32690/family.cmake
@@ -148,18 +148,5 @@ function(family_configure_example TARGET RTOS)
 
   # Flashing
   family_flash_jlink(${TARGET})
-  family_flash_msdk(${TARGET})
-endfunction()
-
-# Add flash msdk target
-function(family_flash_msdk TARGET)
-  set(MAXIM_PATH "$ENV{MAXIM_PATH}")
-
-  add_custom_target(${TARGET}-msdk
-    DEPENDS ${TARGET}
-    COMMAND ${MAXIM_PATH}/Tools/OpenOCD/openocd -s ${MAXIM_PATH}/Tools/OpenOCD/scripts
-		        -f interface/cmsis-dap.cfg -f target/max32690.cfg
-		        -c "program $<TARGET_FILE:${TARGET}> verify; init; reset; exit"
-    VERBATIM
-    )
+  family_flash_openocd_adi(${TARGET})
 endfunction()
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index 49d2d82860..8eaca2621c 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -17,9 +17,9 @@
         {
             "name": "max32666fthr",
             "uid": "0C81464124010B20FF0A08CC2C",
-            "flasher": "openocd_adi",
-            "flasher_sn": "042217023bffc88100000000000000000000000097969906",
-            "flasher_args": "-f interface/cmsis-dap.cfg -f target/max32665.cfg"
+            "flasher": "jlink",
+            "flasher_sn": "000801011822",
+            "flasher_args": "-device max32666"
         },
         {
             "name": "lpcxpresso11u37",
@@ -83,6 +83,13 @@
             "flasher": "esptool",
             "flasher_sn": "3ea619acd1cdeb11a0a0b806e93fd3f1",
             "flasher_args": "-b 921600"
+        },
+        {
+            "name": "max32666fthr",
+            "uid": "0C81464124010B20FF0A08CC2C",
+            "flasher": "openocd_adi",
+            "flasher_sn": "042217023bffc88100000000000000000000000097969906",
+            "flasher_args": "-f interface/cmsis-dap.cfg -f target/max32665.cfg"
         }
     ]
 }

From 0db42aac71a6fb2a821a034ee29d2587638d309a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 22 Aug 2024 18:06:48 +0700
Subject: [PATCH 184/204] add hil support for dual host_info_to_cdc replace
 itsybitsy m4 by metro m4 + max3421e

---
 .../dual/host_info_to_device_cdc/src/main.c   | 26 ++++--
 .../boards/metro_m4_express/board.cmake       |  3 +
 test/hil/hil_test.py                          | 89 ++++++++++++-------
 test/hil/rpi.json                             | 25 ++++--
 4 files changed, 95 insertions(+), 48 deletions(-)

diff --git a/examples/dual/host_info_to_device_cdc/src/main.c b/examples/dual/host_info_to_device_cdc/src/main.c
index 5be5310987..443cc4674a 100644
--- a/examples/dual/host_info_to_device_cdc/src/main.c
+++ b/examples/dual/host_info_to_device_cdc/src/main.c
@@ -24,7 +24,7 @@
  */
 
 /* Host example will get device descriptors of attached devices and print it out via device cdc as follows:
- *    Device 1: ID 046d:c52f
+ *    Device 1: ID 046d:c52f SN 11223344
       Device Descriptor:
         bLength             18
         bDescriptorType     1
@@ -147,7 +147,21 @@ void print_device_info(uint8_t daddr) {
     return;
   }
 
-  cdc_printf("Device %u: ID %04x:%04x\r\n", daddr, desc_device.idVendor, desc_device.idProduct);
+  // Get String descriptor using Sync API
+  uint16_t serial[64];
+  uint16_t buf[128];
+
+  cdc_printf("Device %u: ID %04x:%04x SN ", daddr, desc_device.idVendor, desc_device.idProduct);
+  xfer_result = tuh_descriptor_get_serial_string_sync(daddr, LANGUAGE_ID, serial, sizeof(serial));
+  if (XFER_RESULT_SUCCESS != xfer_result) {
+    serial[0] = 'n';
+    serial[1] = '/';
+    serial[2] = 'a';
+    serial[3] = 0;
+  }
+  print_utf16(serial, TU_ARRAY_SIZE(serial));
+  tud_cdc_write_str("\r\n");
+
   cdc_printf("Device Descriptor:\r\n");
   cdc_printf("  bLength             %u\r\n"     , desc_device.bLength);
   cdc_printf("  bDescriptorType     %u\r\n"     , desc_device.bDescriptorType);
@@ -160,9 +174,6 @@ void print_device_info(uint8_t daddr) {
   cdc_printf("  idProduct           0x%04x\r\n" , desc_device.idProduct);
   cdc_printf("  bcdDevice           %04x\r\n"   , desc_device.bcdDevice);
 
-  // Get String descriptor using Sync API
-  uint16_t buf[128];
-
   cdc_printf("  iManufacturer       %u     "     , desc_device.iManufacturer);
   xfer_result = tuh_descriptor_get_manufacturer_string_sync(daddr, LANGUAGE_ID, buf, sizeof(buf));
   if (XFER_RESULT_SUCCESS == xfer_result ) {
@@ -178,10 +189,7 @@ void print_device_info(uint8_t daddr) {
   tud_cdc_write_str("\r\n");
 
   cdc_printf("  iSerialNumber       %u     "     , desc_device.iSerialNumber);
-  xfer_result = tuh_descriptor_get_serial_string_sync(daddr, LANGUAGE_ID, buf, sizeof(buf));
-  if (XFER_RESULT_SUCCESS == xfer_result) {
-    print_utf16(buf, TU_ARRAY_SIZE(buf));
-  }
+  tud_cdc_write_str((char*)serial); // serial is already to UTF-8
   tud_cdc_write_str("\r\n");
 
   cdc_printf("  bNumConfigurations  %u\r\n"     , desc_device.bNumConfigurations);
diff --git a/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.cmake b/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.cmake
index 86d12ca24f..ebc32b1f79 100644
--- a/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.cmake
+++ b/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.cmake
@@ -3,6 +3,9 @@ set(SAM_FAMILY samd51)
 set(JLINK_DEVICE ATSAMD51J19)
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
 
+# force max3421e for testing with hardware-in-the-loop
+set(MAX3421_HOST 1)
+
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     __SAMD51J19A__
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 09c30bf526..5a4799cfb6 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -27,6 +27,7 @@
 
 import argparse
 import os
+import re
 import sys
 import time
 import serial
@@ -212,14 +213,39 @@ def flash_uniflash(board, firmware):
 
 
 # -------------------------------------------------------------
-# Tests
+# Tests: dual
 # -------------------------------------------------------------
-def test_board_test(board):
+
+def test_dual_host_info_to_device_cdc(board):
+    uid = board['uid']
+    declared_devs = [f'{d["vid_pid"]}_{d["serial"]}' for d in board['tests']['dual_attached']]
+
+    port = get_serial_dev(uid, 'TinyUSB', "TinyUSB_Device", 0)
+    ser = open_serial_dev(port)
+    # read from cdc, first line should contain vid/pid and serial
+    data = ser.read(1000)
+    lines = data.decode('utf-8').splitlines()
+    enum_dev_sn = []
+    for l in lines:
+        vid_pid_sn = re.search(r'ID ([0-9a-fA-F]+):([0-9a-fA-F]+) SN (\w+)', l)
+        if vid_pid_sn:
+            print(f'\r\n  {l} ', end='')
+            enum_dev_sn.append(f'{vid_pid_sn.group(1)}_{vid_pid_sn.group(2)}_{vid_pid_sn.group(3)}')
+
+    assert(set(declared_devs) == set(enum_dev_sn)), \
+        f'Enumerated devices {enum_dev_sn} not match with declared {declared_devs}'
+    return 0
+
+
+# -------------------------------------------------------------
+# Tests: device
+# -------------------------------------------------------------
+def test_device_board_test(board):
     # Dummy test
     pass
 
 
-def test_cdc_dual_ports(board):
+def test_device_cdc_dual_ports(board):
     uid = board['uid']
     port1 = get_serial_dev(uid, 'TinyUSB', "TinyUSB_Device", 0)
     port2 = get_serial_dev(uid, 'TinyUSB', "TinyUSB_Device", 2)
@@ -241,7 +267,7 @@ def test_cdc_dual_ports(board):
     assert ser2.read(100) == str2.upper(), 'Port2 wrong data'
 
 
-def test_cdc_msc(board):
+def test_device_cdc_msc(board):
     uid = board['uid']
     # Echo test
     port = get_serial_dev(uid, 'TinyUSB', "TinyUSB_Device", 0)
@@ -262,11 +288,11 @@ def test_cdc_msc(board):
     assert data == readme, 'MSC wrong data'
 
 
-def test_cdc_msc_freertos(board):
-    test_cdc_msc(board)
+def test_device_cdc_msc_freertos(board):
+    test_device_cdc_msc(board)
 
 
-def test_dfu(board):
+def test_device_dfu(board):
     uid = board['uid']
 
     # Wait device enum
@@ -308,7 +334,7 @@ def test_dfu(board):
     os.remove(f_dfu1)
 
 
-def test_dfu_runtime(board):
+def test_device_dfu_runtime(board):
     uid = board['uid']
 
     # Wait device enum
@@ -325,7 +351,7 @@ def test_dfu_runtime(board):
     assert timeout, 'Device not available'
 
 
-def test_hid_boot_interface(board):
+def test_device_hid_boot_interface(board):
     uid = board['uid']
     kbd = get_hid_dev(uid, 'TinyUSB', 'TinyUSB_Device', 'event-kbd')
     mouse1 = get_hid_dev(uid, 'TinyUSB', 'TinyUSB_Device', 'if01-event-mouse')
@@ -341,7 +367,7 @@ def test_hid_boot_interface(board):
     assert timeout, 'HID device not available'
 
 
-def test_hid_composite_freertos(id):
+def test_device_hid_composite_freertos(id):
     # TODO implement later
     pass
 
@@ -351,13 +377,15 @@ def test_hid_composite_freertos(id):
 # -------------------------------------------------------------
 # all possible tests: board_test is added last to disable board's usb
 all_tests = [
-    'cdc_dual_ports',
-    'cdc_msc',
-    'dfu',
-    'cdc_msc_freertos',  # dont test 2 cdc_msc next to each other, since they have same vid/pid. Can be confused by host
-    'dfu_runtime',
-    'hid_boot_interface',
-    'board_test'
+    'device/cdc_dual_ports',
+    'device/cdc_msc',
+    'device/dfu',
+    'device/cdc_msc_freertos',  # don't test 2 cdc_msc next to each other
+    'device/dfu_runtime',
+    'device/hid_boot_interface',
+
+    'dual/host_info_to_device_cdc',
+    'device/board_test'
 ]
 
 
@@ -366,23 +394,23 @@ def test_board(board):
     flasher = board['flasher'].lower()
 
     # default to all tests
-    if 'tests' in board:
-        test_list = board['tests'] + ['board_test']
-    else:
-        test_list = list(all_tests)
+    test_list = list(all_tests)
 
-    # remove skip_tests
-    if 'tests_skip' in board:
-        for skip in board['tests_skip']:
-            if skip in test_list:
-                test_list.remove(skip)
+    if 'tests' in board:
+        board_tests = board['tests']
+        if 'only' in board_tests:
+            test_list = board_tests['only'] + ['device/board_test']
+        if 'skip' in board_tests:
+            for skip in board_tests['skip']:
+                if skip in test_list:
+                    test_list.remove(skip)
 
     err_count = 0
     for test in test_list:
-        fw_dir = f'cmake-build/cmake-build-{name}/device/{test}'
+        fw_dir = f'cmake-build/cmake-build-{name}/{test}'
         if not os.path.exists(fw_dir):
-            fw_dir = f'examples/cmake-build-{name}/device/{test}'
-        fw_name = f'{fw_dir}/{test}'
+            fw_dir = f'examples/cmake-build-{name}/{test}'
+        fw_name = f'{fw_dir}/{os.path.basename(test)}'
         print(f'{name:30} {test:20} ... ', end='')
 
         if not os.path.exists(fw_dir):
@@ -400,7 +428,7 @@ def test_board(board):
 
         if ret.returncode == 0:
             try:
-                ret = globals()[f'test_{test}'](board)
+                ret = globals()[f'test_{test.replace("/", "_")}'](board)
                 print('OK')
             except Exception as e:
                 err_count += 1
@@ -409,7 +437,6 @@ def test_board(board):
         else:
             err_count += 1
             print('Flash failed')
-
     return err_count
 
 
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index 8eaca2621c..3f07a8f42f 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -8,11 +8,18 @@
             "flasher_args": "-device nrf52840_xxaa"
         },
         {
-            "name": "itsybitsy_m4",
-            "uid": "D784B28C5338533335202020FF044726",
+            "name": "metro_m4_express",
+            "uid": "9995AD485337433231202020FF100A34",
             "flasher": "openocd",
-            "flasher_sn": "E6614C311B597D32",
-            "flasher_args": "-f interface/cmsis-dap.cfg -f target/atsame5x.cfg -c \"adapter speed 5000\""
+            "flasher_sn": "E6633861A3978538",
+            "flasher_args": "-f interface/cmsis-dap.cfg -f target/atsame5x.cfg",
+            "tests": {
+                "dual_attached": [
+                    {
+                        "vid_pid": "1a86_55d4", "serial": "52D2002130"
+                    }
+                ]
+            }
         },
         {
             "name": "max32666fthr",
@@ -31,7 +38,9 @@
         {
             "name": "ra4m1_ek",
             "uid": "152E163038303131393346E46F26574B",
-            "tests_skip": ["cdc_msc", "cdc_msc_freertos"],
+            "tests": {
+                "skip": ["device/cdc_msc", "device/cdc_msc_freertos"]
+            },
             "comment": "MSC is slow to enumerated #2602",
             "flasher": "jlink",
             "flasher_sn": "000831174392",
@@ -77,9 +86,9 @@
         {
             "name": "espressif_s3_devkitm",
             "uid": "84F703C084E4",
-            "tests": [
-                "cdc_msc_freertos", "hid_composite_freertos"
-            ],
+            "tests": {
+                "only": ["device/cdc_msc_freertos", "device/hid_composite_freertos"]
+            },
             "flasher": "esptool",
             "flasher_sn": "3ea619acd1cdeb11a0a0b806e93fd3f1",
             "flasher_args": "-b 921600"

From ccf886ca80ed74d985483fdb90e67703ebeb7dad Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 22 Aug 2024 18:51:32 +0700
Subject: [PATCH 185/204] add pio-usb host test to hil. fix build as well

---
 hw/bsp/rp2040/family.c |  4 ++--
 test/hil/rpi.json      | 11 +++++------
 2 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index 250989ce97..64a3a0af69 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -42,7 +42,7 @@
 static uart_inst_t *uart_inst;
 #endif
 
-#if CFG_TUH_RPI_PIO_USB || CFG_TUD_RPI_PIO_USB
+#if (CFG_TUH_ENABLED && CFG_TUH_RPI_PIO_USB) || (CFG_TUD_ENABLED && CFG_TUD_RPI_PIO_USB)
 #include "pio_usb.h"
 #endif
 
@@ -126,7 +126,7 @@ void stdio_rtt_init(void) {
 
 void board_init(void)
 {
-#if CFG_TUH_RPI_PIO_USB || CFG_TUD_RPI_PIO_USB
+#if (CFG_TUH_ENABLED && CFG_TUH_RPI_PIO_USB) || (CFG_TUD_ENABLED && CFG_TUD_RPI_PIO_USB)
   // Set the system clock to a multiple of 120mhz for bitbanging USB with pico-usb
   set_sys_clock_khz(120000, true);
 
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index 3f07a8f42f..b75c1339b9 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -14,11 +14,7 @@
             "flasher_sn": "E6633861A3978538",
             "flasher_args": "-f interface/cmsis-dap.cfg -f target/atsame5x.cfg",
             "tests": {
-                "dual_attached": [
-                    {
-                        "vid_pid": "1a86_55d4", "serial": "52D2002130"
-                    }
-                ]
+                "dual_attached": [{"vid_pid": "1a86_55d4", "serial": "52D2002130"}]
             }
         },
         {
@@ -51,7 +47,10 @@
             "uid": "E6614C311B764A37",
             "flasher": "openocd",
             "flasher_sn": "E6614103E72C1D2F",
-            "flasher_args": "-f interface/cmsis-dap.cfg -f target/rp2040.cfg -c \"adapter speed 5000\""
+            "flasher_args": "-f interface/cmsis-dap.cfg -f target/rp2040.cfg -c \"adapter speed 5000\"",
+            "tests": {
+                "dual_attached": [{"vid_pid": "1a86_55d4", "serial": "52D2002470"}]
+            }
         },
         {
             "name": "stm32f072disco",

From 45d06cd4ab2adea07513243447b6ec729d7d8c2c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 22 Aug 2024 22:25:14 +0700
Subject: [PATCH 186/204] skip dual/host_info_to_device_cdc for pico due to a
 bug in pio-usb

---
 hw/bsp/family_support.cmake                            | 2 +-
 hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake | 2 +-
 test/hil/rpi.json                                      | 1 +
 3 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 1df8a6f531..b457fcfac6 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -463,7 +463,7 @@ function(family_flash_openocd TARGET)
   # note skip verify since it has issue with rp2040
   add_custom_target(${TARGET}-openocd
     DEPENDS ${TARGET}
-    COMMAND ${OPENOCD} ${OPTION_LIST} -c init -c halt -c "program $<TARGET_FILE:${TARGET}> reset" ${OPTION_LIST2} -c exit
+    COMMAND ${OPENOCD} -c "tcl_port disabled" -c "gdb_port disabled" ${OPTION_LIST} -c init -c halt -c "program $<TARGET_FILE:${TARGET}>" -c reset ${OPTION_LIST2} -c exit
     VERBATIM
     )
 endfunction()
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake b/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
index 6ff1a7b597..a0282aa235 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
@@ -2,7 +2,7 @@ set(MCU_VARIANT nrf52840)
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/nrf52840_s140_v6.ld)
 
 # enable max3421 host driver for this board
-set(MAX3421_HOST 1)
+# set(MAX3421_HOST 1)
 
 function(update_board TARGET)
 endfunction()
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index b75c1339b9..7821f1660a 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -49,6 +49,7 @@
             "flasher_sn": "E6614103E72C1D2F",
             "flasher_args": "-f interface/cmsis-dap.cfg -f target/rp2040.cfg -c \"adapter speed 5000\"",
             "tests": {
+                "skip": ["dual/host_info_to_device_cdc"],
                 "dual_attached": [{"vid_pid": "1a86_55d4", "serial": "52D2002470"}]
             }
         },

From 5bb2e66ce774fe174742f0893d82cb7895285983 Mon Sep 17 00:00:00 2001
From: Cumhur Onat <cumhuronat@gmail.com>
Date: Sun, 21 Jul 2024 21:22:19 -0400
Subject: [PATCH 187/204] fix for out retry attempts with nak response

---
 src/portable/analog/max3421/hcd_max3421.c | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index d9b8e1fc3b..342edef895 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -203,12 +203,13 @@ typedef struct {
     uint16_t packet_size : 11;
   };
 
+  bool received_nak;
   uint16_t total_len;
   uint16_t xferred_len;
   uint8_t* buf;
 } max3421_ep_t;
 
-TU_VERIFY_STATIC(sizeof(max3421_ep_t) == 12, "size is not correct");
+TU_VERIFY_STATIC(sizeof(max3421_ep_t) == 16, "size is not correct");
 
 typedef struct {
   volatile uint16_t frame_count;
@@ -625,12 +626,17 @@ static void xact_out(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_i
     reg_write(rhport, HCTL_ADDR, hctl, in_isr);
   }
 
-  uint8_t const xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
-  TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ,);
-  if (xact_len) {
-    fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, in_isr);
+  if (!ep->received_nak){
+    // do not write to fifo or sdnbc register again if previous attempt got NAK
+    uint8_t const xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
+    TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ,);
+    if (xact_len) {
+      fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, in_isr);
+    }
+
+    sndbc_write(rhport, xact_len, in_isr);
   }
-  sndbc_write(rhport, xact_len, in_isr);
+
   hxfr_write(rhport, ep->hxfr, in_isr);
 }
 
@@ -844,6 +850,7 @@ static void handle_xfer_done(uint8_t rhport, bool in_isr) {
           return;
         } else if (EP_STATE_ATTEMPT_1 <= ep->state && ep->state < EP_STATE_ATTEMPT_MAX) {
           ep->state++;
+          ep->received_nak = true;
         }
       }
 
@@ -867,6 +874,7 @@ static void handle_xfer_done(uint8_t rhport, bool in_isr) {
 
     case HRSL_SUCCESS:
       xfer_result = XFER_RESULT_SUCCESS;
+      ep->received_nak = false;
       break;
 
     case HRSL_STALL:

From c7851e8dcbdac8f895cfe81f2479bc6fcfcc524a Mon Sep 17 00:00:00 2001
From: Cumhur Onat <cumhuronat@gmail.com>
Date: Sun, 21 Jul 2024 23:32:48 -0400
Subject: [PATCH 188/204] only check SNDBAV IRQ if there is data to send

---
 src/portable/analog/max3421/hcd_max3421.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 342edef895..3d054b66e2 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -629,8 +629,9 @@ static void xact_out(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_i
   if (!ep->received_nak){
     // do not write to fifo or sdnbc register again if previous attempt got NAK
     uint8_t const xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
-    TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ,);
     if (xact_len) {
+      // only check SNDBAV IRQ if there is data to send
+      TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ,);
       fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, in_isr);
     }
 

From 27ddf19631d135df15f3388686f59e379e146dbb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 26 Aug 2024 12:24:29 +0700
Subject: [PATCH 189/204] add sndfifo owner info to skip rewriting data for
 retrying NAKed

---
 README.rst                                |   2 +-
 hw/bsp/family_support.cmake               |   6 +
 src/host/usbh.h                           |   2 +-
 src/portable/analog/max3421/hcd_max3421.c | 191 ++++++++++++++--------
 4 files changed, 127 insertions(+), 74 deletions(-)

diff --git a/README.rst b/README.rst
index 6dd0e27146..2ffe3823a9 100644
--- a/README.rst
+++ b/README.rst
@@ -197,7 +197,7 @@ Docs
   - `Structure`_
   - `Porting`_
 
-.. |Build Status| image:: https://github.com/hathach/tinyusb/actions/workflows/cmake_arm.yml/badge.svg
+.. |Build Status| image:: https://github.com/hathach/tinyusb/actions/workflows/build.yml/badge.svg
    :target: https://github.com/hathach/tinyusb/actions
 .. |CircleCI Status| image:: https://dl.circleci.com/status-badge/img/circleci/4AYHvUhFxdnY4rA7LEsdqW/QmrpoL2AjGqetvFQNqtWyq/tree/master.svg?style=svg
    :target: https://dl.circleci.com/status-badge/redirect/circleci/4AYHvUhFxdnY4rA7LEsdqW/QmrpoL2AjGqetvFQNqtWyq/tree/master
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index b457fcfac6..aa5e037d1c 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -418,6 +418,12 @@ exit"
     COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} ${OPTION_LIST} -if ${JLINK_IF} -JTAGConf -1,-1 -speed auto -CommandFile $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.jlink
     VERBATIM
     )
+
+  # optional flash post build
+#  add_custom_command(TARGET ${TARGET} POST_BUILD
+#    COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} ${OPTION_LIST} -if ${JLINK_IF} -JTAGConf -1,-1 -speed auto -CommandFile $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.jlink
+#    VERBATIM
+#    )
 endfunction()
 
 
diff --git a/src/host/usbh.h b/src/host/usbh.h
index 359684169e..d0a5732e55 100644
--- a/src/host/usbh.h
+++ b/src/host/usbh.h
@@ -81,7 +81,7 @@ enum {
 };
 
 typedef struct {
-  uint8_t max_nak; // max NAK per endpoint per frame
+  uint8_t max_nak; // max NAK per endpoint per frame to save CPU/SPI bus usage
   uint8_t cpuctl; // R16: CPU Control Register
   uint8_t pinctl; // R17: Pin Control Register. FDUPSPI bit is ignored
 } tuh_configure_max3421_t;
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 3d054b66e2..215feb4816 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -168,14 +168,14 @@ enum {
 };
 
 enum {
-  MAX_NAK_DEFAULT = 1 // Number of NAK per endpoint per usb frame
+  MAX_NAK_DEFAULT = 1 // Number of NAK per endpoint per usb frame to save CPU/SPI bus usage
 };
 
 enum {
   EP_STATE_IDLE        = 0,
   EP_STATE_COMPLETE    = 1,
   EP_STATE_ABORTING    = 2,
-  EP_STATE_ATTEMPT_1   = 3, // pending 1st attempt
+  EP_STATE_ATTEMPT_1   = 3, // Number of attempts to transfer in a frame. Incremented after each NAK
   EP_STATE_ATTEMPT_MAX = 15
 };
 
@@ -183,17 +183,20 @@ enum {
 //
 //--------------------------------------------------------------------+
 
+typedef struct TU_ATTR_PACKED {
+  uint8_t ep_num   : 4;
+  uint8_t is_setup : 1;
+  uint8_t is_out   : 1;
+  uint8_t is_iso   : 1;
+} hxfr_bm_t;
+
+TU_VERIFY_STATIC(sizeof(hxfr_bm_t) == 1, "size is not correct");
+
 typedef struct {
   uint8_t daddr;
 
-  union { ;
-    struct TU_ATTR_PACKED {
-      uint8_t ep_num   : 4;
-      uint8_t is_setup : 1;
-      uint8_t is_out   : 1;
-      uint8_t is_iso   : 1;
-    }hxfr_bm;
-
+  union {
+    hxfr_bm_t hxfr_bm;
     uint8_t hxfr;
   };
 
@@ -203,13 +206,12 @@ typedef struct {
     uint16_t packet_size : 11;
   };
 
-  bool received_nak;
   uint16_t total_len;
   uint16_t xferred_len;
   uint8_t* buf;
 } max3421_ep_t;
 
-TU_VERIFY_STATIC(sizeof(max3421_ep_t) == 16, "size is not correct");
+TU_VERIFY_STATIC(sizeof(max3421_ep_t) == 12, "size is not correct");
 
 typedef struct {
   volatile uint16_t frame_count;
@@ -220,7 +222,16 @@ typedef struct {
   uint8_t hien;
   uint8_t mode;
   uint8_t peraddr;
-  uint8_t hxfr;
+  union {
+    hxfr_bm_t hxfr_bm;
+    uint8_t hxfr;
+  };
+
+  // owner of data in SNDFIFO, for retrying NAKed without re-writing to FIFO
+  struct {
+    uint8_t daddr;
+    uint8_t hxfr;
+  }sndfifo_owner;
 
   atomic_flag busy; // busy transferring
 
@@ -318,33 +329,9 @@ bool tuh_max3421_reg_write(uint8_t rhport, uint8_t reg, uint8_t data, bool in_is
   return ret;
 }
 
-static void fifo_write(uint8_t rhport, uint8_t reg, uint8_t const * buffer, uint16_t len, bool in_isr) {
-  uint8_t hirq;
-  reg |= CMDBYTE_WRITE;
-
-  max3421_spi_lock(rhport, in_isr);
-
-  tuh_max3421_spi_xfer_api(rhport, &reg, &hirq, 1);
-  _hcd_data.hirq = hirq;
-  tuh_max3421_spi_xfer_api(rhport, buffer, NULL, len);
-
-  max3421_spi_unlock(rhport, in_isr);
-}
-
-static void fifo_read(uint8_t rhport, uint8_t * buffer, uint16_t len, bool in_isr) {
-  uint8_t hirq;
-  uint8_t const reg = RCVVFIFO_ADDR;
-
-  max3421_spi_lock(rhport, in_isr);
-
-  tuh_max3421_spi_xfer_api(rhport, &reg, &hirq, 1);
-  _hcd_data.hirq = hirq;
-  tuh_max3421_spi_xfer_api(rhport, NULL, buffer, len);
-
-  max3421_spi_unlock(rhport, in_isr);
-}
-
-//------------- register write helper -------------//
+//--------------------------------------------------------------------
+// Register helper
+//--------------------------------------------------------------------
 TU_ATTR_ALWAYS_INLINE static inline void hirq_write(uint8_t rhport, uint8_t data, bool in_isr) {
   reg_write(rhport, HIRQ_ADDR, data, in_isr);
   // HIRQ write 1 is clear
@@ -378,6 +365,47 @@ TU_ATTR_ALWAYS_INLINE static inline void sndbc_write(uint8_t rhport, uint8_t dat
   reg_write(rhport, SNDBC_ADDR, data, in_isr);
 }
 
+//--------------------------------------------------------------------
+// FIFO access (receive, send, setup)
+//--------------------------------------------------------------------
+static void hwfifo_write(uint8_t rhport, uint8_t reg, const uint8_t* buffer, uint8_t len, bool in_isr) {
+  uint8_t hirq;
+  reg |= CMDBYTE_WRITE;
+
+  max3421_spi_lock(rhport, in_isr);
+
+  tuh_max3421_spi_xfer_api(rhport, &reg, &hirq, 1);
+  _hcd_data.hirq = hirq;
+  tuh_max3421_spi_xfer_api(rhport, buffer, NULL, len);
+
+  max3421_spi_unlock(rhport, in_isr);
+}
+
+// Write to SNDFIFO if len > 0 and update SNDBC
+TU_ATTR_ALWAYS_INLINE static inline void hwfifo_send(uint8_t rhport, const uint8_t* buffer, uint8_t len, bool in_isr) {
+  if (len) {
+    hwfifo_write(rhport, SNDFIFO_ADDR, buffer, len, in_isr);
+  }
+  sndbc_write(rhport, len, in_isr);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void hwfifo_setup(uint8_t rhport, const uint8_t* buffer, bool in_isr) {
+  hwfifo_write(rhport, SUDFIFO_ADDR, buffer, 8, in_isr);
+}
+
+static void hwfifo_receive(uint8_t rhport, uint8_t * buffer, uint16_t len, bool in_isr) {
+  uint8_t hirq;
+  uint8_t const reg = RCVVFIFO_ADDR;
+
+  max3421_spi_lock(rhport, in_isr);
+
+  tuh_max3421_spi_xfer_api(rhport, &reg, &hirq, 1);
+  _hcd_data.hirq = hirq;
+  tuh_max3421_spi_xfer_api(rhport, NULL, buffer, len);
+
+  max3421_spi_unlock(rhport, in_isr);
+}
+
 //--------------------------------------------------------------------+
 // Endpoint helper
 //--------------------------------------------------------------------+
@@ -418,7 +446,7 @@ static void free_ep(uint8_t daddr) {
   }
 }
 
-// Check if endpoint has an queued transfer and not reach max NAK
+// Check if endpoint has a queued transfer and not reach max NAK in this frame
 TU_ATTR_ALWAYS_INLINE static inline bool is_ep_pending(max3421_ep_t const * ep) {
   uint8_t const state = ep->state;
   return ep->packet_size && (state >= EP_STATE_ATTEMPT_1) &&
@@ -488,6 +516,7 @@ bool hcd_init(uint8_t rhport) {
   reg_write(rhport, PINCTL_ADDR, _tuh_cfg.pinctl | PINCTL_FDUPSPI, false);
 
   // v1 is 0x01, v2 is 0x12, v3 is 0x13
+  // Note: v1 and v2 has host OUT errata whose workaround is not implemented in this driver
   uint8_t const revision = reg_read(rhport, REVISION_ADDR, false);
   TU_LOG2_HEX(revision);
   TU_ASSERT(revision == 0x01 || revision == 0x12 || revision == 0x13, false);
@@ -616,27 +645,44 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t daddr, tusb_desc_endpoint_t const * e
   return true;
 }
 
+/* The microcontroller repeatedly writes the SNDFIFO register R2 to load the FIFO with up to 64 data bytes.
+ * Then the microcontroller writes the SNDBC register, which this does three things:
+ * 1. Tells the MAX3421E SIE (Serial Interface Engine) how many bytes in the FIFO to send.
+ * 2. Connects the SNDFIFO and SNDBC register to the USB logic for USB transmission.
+ * 3. Clears the SNDBAVIRQ interrupt flag. If the second FIFO is available for µC loading, the SNDBAVIRQ immediately re-asserts.
+
+                                               +-----------+
+                                           --->| SNDBC-A   |
+                                          /    | SNDFIFO-A |
+                                         /     +-----------+
+      +------+       +-------------+    /                              +----------+
+      | MCU  |------>| R2: SNDFIFO |----     << Write R7 Flip >>    ---| MAX3241E |
+      |(hcd) |       | R7: SNDBC   |                               /   |   SIE    |
+      +------+       +-------------+                              /    +----------+
+                                              +-----------+      /
+                                               | SNDBC-B   |    /
+                                               | SNDFIFO-B |<---
+                                               +-----------+
+  Note: xact_out() is called when starting a new transfer, continue a transfer (isr) or retry a transfer (NAK)
+        For NAK retry, we do not need to write to FIFO or SNDBC register again.
+*/
 static void xact_out(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
   // Page 12: Programming BULK-OUT Transfers
-  // TODO double buffered
+  // TODO: double buffering for ISO transfer
   if (switch_ep) {
     peraddr_write(rhport, ep->daddr, in_isr);
-
-    uint8_t const hctl = (ep->data_toggle ? HCTL_SNDTOG1 : HCTL_SNDTOG0);
+    const uint8_t hctl = (ep->data_toggle ? HCTL_SNDTOG1 : HCTL_SNDTOG0);
     reg_write(rhport, HCTL_ADDR, hctl, in_isr);
   }
 
-  if (!ep->received_nak){
-    // do not write to fifo or sdnbc register again if previous attempt got NAK
-    uint8_t const xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
-    if (xact_len) {
-      // only check SNDBAV IRQ if there is data to send
-      TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ,);
-      fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, in_isr);
-    }
-
-    sndbc_write(rhport, xact_len, in_isr);
+  // Only write to sndfifo and sdnbc register if it is not a NAKed retry
+  if (!(ep->daddr == _hcd_data.sndfifo_owner.daddr && ep->hxfr == _hcd_data.sndfifo_owner.hxfr)) {
+    // skip SNDBAV IRQ check, overwrite sndfifo if needed
+    const uint8_t xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
+    hwfifo_send(rhport, ep->buf, xact_len, in_isr);
   }
+  _hcd_data.sndfifo_owner.daddr = ep->daddr;
+  _hcd_data.sndfifo_owner.hxfr = ep->hxfr;
 
   hxfr_write(rhport, ep->hxfr, in_isr);
 }
@@ -655,7 +701,7 @@ static void xact_in(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_is
 
 static void xact_setup(uint8_t rhport, max3421_ep_t *ep, bool in_isr) {
   peraddr_write(rhport, ep->daddr, in_isr);
-  fifo_write(rhport, SUDFIFO_ADDR, ep->buf, 8, in_isr);
+  hwfifo_setup(rhport, ep->buf, in_isr);
   hxfr_write(rhport, HXFR_SETUP, in_isr);
 }
 
@@ -669,7 +715,7 @@ static void xact_generic(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool
 
     // status
     if (ep->buf == NULL || ep->total_len == 0) {
-      uint8_t const hxfr = (uint8_t) (HXFR_HS | (ep->hxfr & HXFR_OUT_NIN));
+      const uint8_t hxfr = (uint8_t) (HXFR_HS | (ep->hxfr & HXFR_OUT_NIN));
       peraddr_write(rhport, ep->daddr, in_isr);
       hxfr_write(rhport, hxfr, in_isr);
       return;
@@ -830,11 +876,11 @@ static void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t re
 }
 
 static void handle_xfer_done(uint8_t rhport, bool in_isr) {
-  uint8_t const hrsl = reg_read(rhport, HRSL_ADDR, in_isr);
-  uint8_t const hresult = hrsl & HRSL_RESULT_MASK;
-  uint8_t const ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
-  uint8_t const hxfr_type = _hcd_data.hxfr & 0xf0;
-  uint8_t const ep_dir = ((hxfr_type & HXFR_SETUP) || (hxfr_type & HXFR_OUT_NIN)) ? 0 : 1;
+  const uint8_t hrsl = reg_read(rhport, HRSL_ADDR, in_isr);
+  const uint8_t hresult = hrsl & HRSL_RESULT_MASK;
+  const uint8_t ep_num = _hcd_data.hxfr_bm.ep_num;
+  const uint8_t hxfr_type = _hcd_data.hxfr & 0xf0;
+  const uint8_t ep_dir = ((hxfr_type & HXFR_SETUP) || (hxfr_type & HXFR_OUT_NIN)) ? 0 : 1;
 
   max3421_ep_t *ep = find_opened_ep(_hcd_data.peraddr, ep_num, ep_dir);
   TU_VERIFY(ep, );
@@ -849,9 +895,9 @@ static void handle_xfer_done(uint8_t rhport, bool in_isr) {
           // control endpoint -> retry immediately and return
           hxfr_write(rhport, _hcd_data.hxfr, in_isr);
           return;
-        } else if (EP_STATE_ATTEMPT_1 <= ep->state && ep->state < EP_STATE_ATTEMPT_MAX) {
+        }
+        if (EP_STATE_ATTEMPT_1 <= ep->state && ep->state < EP_STATE_ATTEMPT_MAX) {
           ep->state++;
-          ep->received_nak = true;
         }
       }
 
@@ -861,7 +907,6 @@ static void handle_xfer_done(uint8_t rhport, bool in_isr) {
         hxfr_write(rhport, _hcd_data.hxfr, in_isr);
       } else if (next_ep) {
         // switch to next pending endpoint
-        // TODO could have issue with double buffered if not clear previously out data
         xact_generic(rhport, next_ep, true, in_isr);
       } else {
         // no more pending in this frame -> clear busy
@@ -875,7 +920,6 @@ static void handle_xfer_done(uint8_t rhport, bool in_isr) {
 
     case HRSL_SUCCESS:
       xfer_result = XFER_RESULT_SUCCESS;
-      ep->received_nak = false;
       break;
 
     case HRSL_STALL:
@@ -905,11 +949,15 @@ static void handle_xfer_done(uint8_t rhport, bool in_isr) {
     if (ep->state == EP_STATE_COMPLETE) {
       xfer_complete_isr(rhport, ep, xfer_result, hrsl, in_isr);
     }else {
-      // more to transfer
-      hxfr_write(rhport, _hcd_data.hxfr, in_isr);
+      hxfr_write(rhport, _hcd_data.hxfr, in_isr); // more to transfer
     }
   } else {
     // SETUP or OUT transfer
+
+    // clear sndfifo owner since data is sent
+    _hcd_data.sndfifo_owner.daddr = 0xff;
+    _hcd_data.sndfifo_owner.hxfr = 0xff;
+
     uint8_t xact_len;
 
     if (hxfr_type & HXFR_SETUP) {
@@ -926,8 +974,7 @@ static void handle_xfer_done(uint8_t rhport, bool in_isr) {
     if (xact_len < ep->packet_size || ep->xferred_len >= ep->total_len) {
       xfer_complete_isr(rhport, ep, xfer_result, hrsl, in_isr);
     } else {
-      // more to transfer
-      xact_out(rhport, ep, false, in_isr);
+      xact_out(rhport, ep, false, in_isr); // more to transfer
     }
   }
 }
@@ -987,16 +1034,16 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
   // not call this handler again. So we need to loop until all IRQ are cleared
   while (hirq & (HIRQ_RCVDAV_IRQ | HIRQ_HXFRDN_IRQ)) {
     if (hirq & HIRQ_RCVDAV_IRQ) {
-      uint8_t const ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
+      const uint8_t ep_num = _hcd_data.hxfr_bm.ep_num;
       max3421_ep_t* ep = find_opened_ep(_hcd_data.peraddr, ep_num, 1);
       uint8_t xact_len = 0;
 
       // RCVDAV_IRQ can trigger 2 times (dual buffered)
       while (hirq & HIRQ_RCVDAV_IRQ) {
-        uint8_t rcvbc = reg_read(rhport, RCVBC_ADDR, in_isr);
+        const uint8_t rcvbc = reg_read(rhport, RCVBC_ADDR, in_isr);
         xact_len = (uint8_t) tu_min16(rcvbc, ep->total_len - ep->xferred_len);
         if (xact_len) {
-          fifo_read(rhport, ep->buf, xact_len, in_isr);
+          hwfifo_receive(rhport, ep->buf, xact_len, in_isr);
           ep->buf += xact_len;
           ep->xferred_len += xact_len;
         }

From 29d4c82efb9654aa8739cd806a9e81d37830e23e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 27 Aug 2024 16:38:26 +0700
Subject: [PATCH 190/204] reset usb when init for max32650/66. change hil max32
 to use pico (cmsis dap2), change metro m4 flasher

---
 hw/bsp/max32650/family.c     |  1 +
 hw/bsp/max32650/family.cmake |  2 +-
 hw/bsp/max32666/family.c     |  1 +
 test/hil/rpi.json            | 19 ++++++-------------
 4 files changed, 9 insertions(+), 14 deletions(-)

diff --git a/hw/bsp/max32650/family.c b/hw/bsp/max32650/family.c
index 89a5db1600..bb382cdd42 100644
--- a/hw/bsp/max32650/family.c
+++ b/hw/bsp/max32650/family.c
@@ -94,6 +94,7 @@ void board_init(void) {
   }
 
   MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
+  MXC_SYS_Reset_Periph(MXC_SYS_RESET_USB);
 }
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/max32650/family.cmake b/hw/bsp/max32650/family.cmake
index e05bd7652a..48853b92c6 100644
--- a/hw/bsp/max32650/family.cmake
+++ b/hw/bsp/max32650/family.cmake
@@ -148,10 +148,10 @@ function(family_configure_example TARGET RTOS)
 
   # Flashing
   family_flash_jlink(${TARGET})
+  family_flash_openocd_adi(${TARGET})
 
   # Add the optional MSDK OpenOCD flashing
   family_flash_msdk(${TARGET})
-  family_flash_openocd_adi(${TARGET})
 endfunction()
 
 function(family_flash_msdk TARGET)
diff --git a/hw/bsp/max32666/family.c b/hw/bsp/max32666/family.c
index 8ee4b67622..f96393fe11 100644
--- a/hw/bsp/max32666/family.c
+++ b/hw/bsp/max32666/family.c
@@ -93,6 +93,7 @@ void board_init(void) {
   }
 
   MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_USB);
+  MXC_SYS_Reset_Periph(MXC_SYS_RESET_USB);
 }
 
 //--------------------------------------------------------------------+
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index 7821f1660a..259f8ca837 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -10,9 +10,9 @@
         {
             "name": "metro_m4_express",
             "uid": "9995AD485337433231202020FF100A34",
-            "flasher": "openocd",
-            "flasher_sn": "E6633861A3978538",
-            "flasher_args": "-f interface/cmsis-dap.cfg -f target/atsame5x.cfg",
+            "flasher": "jlink",
+            "flasher_sn": "123456",
+            "flasher_args": "-device ATSAMD51J19",
             "tests": {
                 "dual_attached": [{"vid_pid": "1a86_55d4", "serial": "52D2002130"}]
             }
@@ -20,9 +20,9 @@
         {
             "name": "max32666fthr",
             "uid": "0C81464124010B20FF0A08CC2C",
-            "flasher": "jlink",
-            "flasher_sn": "000801011822",
-            "flasher_args": "-device max32666"
+            "flasher": "openocd_adi",
+            "flasher_sn": "E6614C311B597D32",
+            "flasher_args": "-f interface/cmsis-dap.cfg -f target/max32665.cfg"
         },
         {
             "name": "lpcxpresso11u37",
@@ -92,13 +92,6 @@
             "flasher": "esptool",
             "flasher_sn": "3ea619acd1cdeb11a0a0b806e93fd3f1",
             "flasher_args": "-b 921600"
-        },
-        {
-            "name": "max32666fthr",
-            "uid": "0C81464124010B20FF0A08CC2C",
-            "flasher": "openocd_adi",
-            "flasher_sn": "042217023bffc88100000000000000000000000097969906",
-            "flasher_args": "-f interface/cmsis-dap.cfg -f target/max32665.cfg"
         }
     ]
 }

From 6fdf206f11f3c540b1930693826a469f3ffcc240 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 28 Aug 2024 11:43:14 +0700
Subject: [PATCH 191/204] bump up pio-usb to 0.6.1, enable dual hil test for
 pico

---
 test/hil/hil_test.py | 18 ++++++++++++------
 test/hil/rpi.json    |  1 -
 tools/get_deps.py    |  2 +-
 3 files changed, 13 insertions(+), 8 deletions(-)

diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 5a4799cfb6..52ec5ae1db 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -39,6 +39,9 @@
 
 ENUM_TIMEOUT = 30
 
+STATUS_OK = "\033[32mOK\033[0m"
+STATUS_FAILED = "\033[31mFailed\033[0m"
+STATUS_SKIPPED = "\033[33mSkipped\033[0m"
 
 # get usb serial by id
 def get_serial_dev(id, vendor_str, product_str, ifnum):
@@ -411,7 +414,7 @@ def test_board(board):
         if not os.path.exists(fw_dir):
             fw_dir = f'examples/cmake-build-{name}/{test}'
         fw_name = f'{fw_dir}/{os.path.basename(test)}'
-        print(f'{name:30} {test:20} ... ', end='')
+        print(f'{name:25} {test:30} ... ', end='')
 
         if not os.path.exists(fw_dir):
             print('Skip')
@@ -432,11 +435,11 @@ def test_board(board):
                 print('OK')
             except Exception as e:
                 err_count += 1
-                print('Failed')
+                print(STATUS_FAILED)
                 print(f'  {e}')
         else:
             err_count += 1
-            print('Flash failed')
+            print(f'Flash {STATUS_FAILED}')
     return err_count
 
 
@@ -463,10 +466,13 @@ def main():
     else:
         config_boards = [e for e in config['boards'] if e['name'] in boards]
 
-    err_count_list = []
     with Pool(processes=os.cpu_count()) as pool:
-        err_count_list = pool.map(test_board, config_boards)
-    err_count = sum(err_count_list)
+        err_count = sum(pool.map(test_board, config_boards))
+
+    print()
+    print("-" * 30)
+    print(f'Total failed: {err_count}')
+    print("-" * 30)
     sys.exit(err_count)
 
 
diff --git a/test/hil/rpi.json b/test/hil/rpi.json
index 259f8ca837..36376a8733 100644
--- a/test/hil/rpi.json
+++ b/test/hil/rpi.json
@@ -49,7 +49,6 @@
             "flasher_sn": "E6614103E72C1D2F",
             "flasher_args": "-f interface/cmsis-dap.cfg -f target/rp2040.cfg -c \"adapter speed 5000\"",
             "tests": {
-                "skip": ["dual/host_info_to_device_cdc"],
                 "dual_attached": [{"vid_pid": "1a86_55d4", "serial": "52D2002470"}]
             }
         },
diff --git a/tools/get_deps.py b/tools/get_deps.py
index f141d3d41b..06da54b41a 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -58,7 +58,7 @@
                             '144f1eb7ea8c06512e12f12b27383601c0272410',
                             'kinetis_k kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt'],
     'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
-                                         '7902e9fa8ed4a271d8d1d5e7e50516c2292b7bc2',
+                                         'fe9133fc513b82cc3dc62c67cb51f2339cf29ef7',
                                          'rp2040'],
     'hw/mcu/renesas/fsp': ['https://github.com/renesas/fsp.git',
                            'd52e5a6a59b7c638da860c2bb309b6e78e752ff8',

From 9985b9faf41c2376c9b14a8f60cc1893c8bb4ac6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 28 Aug 2024 12:20:44 +0700
Subject: [PATCH 192/204] try to build hil in parallel

---
 .github/workflows/hil_test.yml | 58 +++++++++++++++-------------------
 1 file changed, 26 insertions(+), 32 deletions(-)

diff --git a/.github/workflows/hil_test.yml b/.github/workflows/hil_test.yml
index d02f13e05e..087374be25 100644
--- a/.github/workflows/hil_test.yml
+++ b/.github/workflows/hil_test.yml
@@ -21,51 +21,53 @@ env:
   HIL_JSON: test/hil/rpi.json
 
 jobs:
-  # ---------------------------------------
-  # Build Non Espressif
-  # ---------------------------------------
-  build:
-    if: github.repository_owner == 'hathach'
+  set-matrix:
     runs-on: ubuntu-latest
     outputs:
-      BOARDS_LIST: ${{ steps.parse_hil_json.outputs.BOARDS_LIST }}
+      json: ${{ steps.set-matrix-json.outputs.matrix }}
     steps:
       - name: Checkout TinyUSB
         uses: actions/checkout@v4
 
-      - name: Parse HIL json
-        id: parse_hil_json
+      - name: Generate matrix json
+        id: set-matrix-json
         run: |
-          sudo apt install -y jq
+          MATRIX_JSON=$(jq -c '{ "arm-gcc": [.boards[] | select(.flasher != "esptool" and .flasher != "openocd_wch") | .name] }' ${{ env.HIL_JSON }})
+          echo "matrix=$MATRIX_JSON"
+          echo "matrix=$MATRIX_JSON" >> $GITHUB_OUTPUT
 
-          # Non-Espresif boards
-          BOARDS_LIST=$(jq -r '.boards[] | select(.flasher != "esptool") | "-b " + .name' ${{ env.HIL_JSON }} | tr '\n' ' ')
-          echo "BOARDS_LIST=$BOARDS_LIST"
-          echo "BOARDS_LIST=$BOARDS_LIST" >> $GITHUB_ENV
-          echo "BOARDS_LIST=$BOARDS_LIST" >> $GITHUB_OUTPUT
+  # ---------------------------------------
+  # Build arm-gcc
+  # ---------------------------------------
+  build:
+    if: github.repository_owner == 'hathach'
+    needs: set-matrix
+    runs-on: ubuntu-latest
+    strategy:
+      fail-fast: false
+      matrix:
+        board: ${{ fromJSON(needs.set-matrix.outputs.json)['arm-gcc'] }}
+    steps:
+      - name: Checkout TinyUSB
+        uses: actions/checkout@v4
 
       - name: Setup arm-gcc toolchain
         uses: ./.github/actions/setup_toolchain
         with:
           toolchain: 'arm-gcc'
 
-      - name: Setup risv-gcc toolchain
-        uses: ./.github/actions/setup_toolchain
-        with:
-          toolchain: 'riscv-gcc'
-
       - name: Get Dependencies
         uses: ./.github/actions/get_deps
         with:
-          arg: ${{ env.BOARDS_LIST }}
+          arg: -b${{ matrix.board }}
 
       - name: Build
-        run: python tools/build.py $BOARDS_LIST
+        run: python tools/build.py -b${{ matrix.board }}
 
       - name: Upload Artifacts for Hardware Testing
         uses: actions/upload-artifact@v4
         with:
-          name: hil_rpi
+          name: ${{ matrix.board }}
           path: |
             cmake-build/cmake-build-*/*/*/*.elf
             cmake-build/cmake-build-*/*/*/*.bin
@@ -76,11 +78,8 @@ jobs:
   # ---------------------------------------
   hil-rpi:
     if: github.repository_owner == 'hathach'
-    needs:
-      - build
+    needs: build
     runs-on: [self-hosted, ARM64, rpi, hardware-in-the-loop]
-    env:
-      BOARDS_LIST: "${{ needs.build-esp.outputs.BOARDS_LIST }} ${{ needs.build.outputs.BOARDS_LIST }}"
     steps:
       - name: Clean workspace
         run: |
@@ -107,9 +106,4 @@ jobs:
           merge-multiple: true
 
       - name: Test on actual hardware
-        run: |
-          echo "BOARDS_LIST=$BOARDS_LIST"
-          echo "::group::{cmake-build contents}"
-          tree cmake-build
-          echo "::endgroup::"
-          python3 test/hil/hil_test.py $BOARDS_LIST ${{ env.HIL_JSON }}
+        run: python3 test/hil/hil_test.py ${{ env.HIL_JSON }}

From 59883237f71743d2e6664d1e244394c5757856d6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 28 Aug 2024 13:07:52 +0700
Subject: [PATCH 193/204] enable rx-gcc for circleci

---
 .circleci/config.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.circleci/config.yml b/.circleci/config.yml
index 5136d63319..83f5549162 100644
--- a/.circleci/config.yml
+++ b/.circleci/config.yml
@@ -24,7 +24,7 @@ jobs:
               "make arm-gcc"
               "make msp430-gcc"
               "make riscv-gcc"
-              # "make rx-gcc" llvm-gcc-renesas.com seems to be down
+              "make rx-gcc"
               "cmake esp-idf"
             )
 

From 973cbd33388a5505a60ea1b70bbfd8b5c74c9c1e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 28 Aug 2024 14:24:50 +0700
Subject: [PATCH 194/204] enable i386 arch for running rx-gcc

---
 .circleci/config2.yml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/.circleci/config2.yml b/.circleci/config2.yml
index 70b5c60acd..e076baeb7a 100644
--- a/.circleci/config2.yml
+++ b/.circleci/config2.yml
@@ -42,6 +42,10 @@ commands:
               if [[ << parameters.toolchain >> == rx-gcc ]]; then
                 mv toolchain.tar.gz toolchain.run
                 chmod +x toolchain.run
+                # rx-gcc is i386 binary
+                sudo dpkg --add-architecture i386
+                sudo apt update
+                sudo apt install libc6:i386 libncurses5:i386 libstdc++6:i386
                 ./toolchain.run -p ~/cache/<< parameters.toolchain >>/gnurx -y
               else
                 tar -C ~/cache/<< parameters.toolchain >> -xaf toolchain.tar.gz

From 0d542a0bdc3931aa82469db5d2b8c329ea5aa2e9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 28 Aug 2024 14:44:32 +0700
Subject: [PATCH 195/204] enable i386 arch for running rx-gcc

---
 .circleci/config2.yml | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/.circleci/config2.yml b/.circleci/config2.yml
index e076baeb7a..542c3d0d04 100644
--- a/.circleci/config2.yml
+++ b/.circleci/config2.yml
@@ -42,10 +42,6 @@ commands:
               if [[ << parameters.toolchain >> == rx-gcc ]]; then
                 mv toolchain.tar.gz toolchain.run
                 chmod +x toolchain.run
-                # rx-gcc is i386 binary
-                sudo dpkg --add-architecture i386
-                sudo apt update
-                sudo apt install libc6:i386 libncurses5:i386 libstdc++6:i386
                 ./toolchain.run -p ~/cache/<< parameters.toolchain >>/gnurx -y
               else
                 tar -C ~/cache/<< parameters.toolchain >> -xaf toolchain.tar.gz
@@ -92,6 +88,13 @@ commands:
               unzip ninja-linux.zip -d ~/bin
             fi
 
+            # rx-gcc is 32-bit binary
+            if [[ << parameters.toolchain >> == rx-gcc ]]; then
+              sudo dpkg --add-architecture i386
+              sudo apt update
+              sudo apt install libc6:i386 libstdc++6:i386 zlib1g:i386
+            fi
+
             # Install Pico SDK
             if [ << parameters.family >> == "rp2040" ]; then
               git clone --depth 1 https://github.com/raspberrypi/pico-sdk.git ~/pico-sdk

From f73964e3e59645757a7311f2b4fe7c1c9d868e12 Mon Sep 17 00:00:00 2001
From: Andrew Scheller <andrew.scheller@raspberrypi.com>
Date: Wed, 28 Aug 2024 13:30:48 +0100
Subject: [PATCH 196/204] Fix compiler warning in hid_boot_interface example

---
 examples/device/hid_boot_interface/src/main.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/examples/device/hid_boot_interface/src/main.c b/examples/device/hid_boot_interface/src/main.c
index 7ad5c53c21..c2aef502df 100644
--- a/examples/device/hid_boot_interface/src/main.c
+++ b/examples/device/hid_boot_interface/src/main.c
@@ -161,8 +161,8 @@ void hid_task(void)
       {
         uint8_t const report_id   = 0;
         uint8_t const button_mask = 0;
-        uint8_t const vertical    = 0;
-        uint8_t const horizontal  = 0;
+        int8_t  const vertical    = 0;
+        int8_t  const horizontal  = 0;
         int8_t  const delta       = 5;
 
         tud_hid_n_mouse_report(ITF_NUM_MOUSE, report_id, button_mask, delta, delta, vertical, horizontal);

From 1d2c9f929dd3bfaf82741da30e8dbf97b0ff385c Mon Sep 17 00:00:00 2001
From: Reinhard Griech <reinhard.griech@endress.com>
Date: Thu, 29 Aug 2024 15:31:29 +0200
Subject: [PATCH 197/204] change order, fixes #2778

---
 src/portable/nordic/nrf5x/dcd_nrf5x.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c
index 1cc5c1836a..a63e442f3e 100644
--- a/src/portable/nordic/nrf5x/dcd_nrf5x.c
+++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c
@@ -441,11 +441,11 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to
   bool const control_status = (epnum == 0 && total_bytes == 0 && dir != tu_edpt_dir(NRF_USBD->BMREQUESTTYPE));
 
   if (control_status) {
-    // Status Phase also requires EasyDMA has to be available as well !!!!
-    edpt_dma_start(&NRF_USBD->TASKS_EP0STATUS);
-
     // The nRF doesn't interrupt on status transmit so we queue up a success response.
     dcd_event_xfer_complete(0, ep_addr, 0, XFER_RESULT_SUCCESS, is_in_isr());
+
+    // Status Phase also requires EasyDMA has to be available as well !!!!
+    edpt_dma_start(&NRF_USBD->TASKS_EP0STATUS);
   } else if (dir == TUSB_DIR_OUT) {
     xfer->started = true;
     if (epnum == 0) {

From 6890975f80bb541ba4f229cc1c3bc165745e21ac Mon Sep 17 00:00:00 2001
From: Scott Shawcroft <scott@tannewt.org>
Date: Thu, 29 Aug 2024 14:04:49 -0700
Subject: [PATCH 198/204] Fix ESP32-SX resume

The interrupt handler pipes through the resume event but the
interrupt wasn't enabled in the first place.
---
 src/portable/espressif/esp32sx/dcd_esp32sx.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/portable/espressif/esp32sx/dcd_esp32sx.c b/src/portable/espressif/esp32sx/dcd_esp32sx.c
index f912bef890..61911ab4c8 100644
--- a/src/portable/espressif/esp32sx/dcd_esp32sx.c
+++ b/src/portable/espressif/esp32sx/dcd_esp32sx.c
@@ -207,6 +207,7 @@ void dcd_init(uint8_t rhport)
                  USB_USBRSTMSK_M   |
                  USB_ENUMDONEMSK_M |
                  USB_RESETDETMSK_M |
+                 USB_WKUPINT_M |
                  USB_DISCONNINTMSK_M; // host most only
 
   dcd_connect(rhport);

From cef4c466b33609a26fe811d586f8644e9d421d2f Mon Sep 17 00:00:00 2001
From: Donatien Garnier <donatien.garnier@blecon.net>
Date: Thu, 29 Aug 2024 16:43:42 +0000
Subject: [PATCH 199/204] Bluetooth Device: Issue ZLP on ACL IN ep when
 transfer is multiple of endpoint max packet size

---
 src/class/bth/bth_device.c | 45 +++++++++++++++++++++++++++++++-------
 1 file changed, 37 insertions(+), 8 deletions(-)

diff --git a/src/class/bth/bth_device.c b/src/class/bth/bth_device.c
index cbf6e13321..a79908627b 100755
--- a/src/class/bth/bth_device.c
+++ b/src/class/bth/bth_device.c
@@ -42,10 +42,14 @@ typedef struct
   uint8_t itf_num;
   uint8_t ep_ev;
   uint8_t ep_acl_in;
+  uint16_t ep_acl_in_pkt_sz;
   uint8_t ep_acl_out;
   uint8_t ep_voice[2];  // Not used yet
   uint8_t ep_voice_size[2][CFG_TUD_BTH_ISO_ALT_COUNT];
 
+  // Previous amount of bytes sent when issuing ZLP
+  uint32_t prev_xferred_bytes;
+
   // Endpoint Transfer buffer
   CFG_TUSB_MEM_ALIGN bt_hci_cmd_t hci_cmd;
   CFG_TUSB_MEM_ALIGN uint8_t epout_buf[CFG_TUD_BTH_DATA_EPSIZE];
@@ -127,11 +131,25 @@ uint16_t btd_open(uint8_t rhport, tusb_desc_interface_t const *itf_desc, uint16_
   TU_ASSERT(usbd_edpt_open(rhport, desc_ep), 0);
   _btd_itf.ep_ev = desc_ep->bEndpointAddress;
 
+  desc_ep = (tusb_desc_endpoint_t const *)tu_desc_next(desc_ep);
+
   // Open endpoint pair
-  TU_ASSERT(usbd_open_edpt_pair(rhport, tu_desc_next(desc_ep), 2, TUSB_XFER_BULK, &_btd_itf.ep_acl_out,
-                                &_btd_itf.ep_acl_in), 0);
+  TU_ASSERT(usbd_open_edpt_pair(rhport, (uint8_t const *)desc_ep, 2,
+                                TUSB_XFER_BULK, &_btd_itf.ep_acl_out,
+                                &_btd_itf.ep_acl_in),
+            0);
+
+  // Save acl in endpoint max packet size
+  tusb_desc_endpoint_t const *desc_ep_acl_in = desc_ep;
+  for (size_t p = 0; p < 2; p++) {
+    if (tu_edpt_dir(desc_ep_acl_in->bEndpointAddress) == TUSB_DIR_IN) {
+      _btd_itf.ep_acl_in_pkt_sz = tu_edpt_packet_size(desc_ep_acl_in);
+      break;
+    }
+    desc_ep_acl_in = (tusb_desc_endpoint_t const *)tu_desc_next(desc_ep_acl_in);
+  }
 
-  itf_desc = (tusb_desc_interface_t const *)tu_desc_next(tu_desc_next(tu_desc_next(desc_ep)));
+  itf_desc = (tusb_desc_interface_t const *)tu_desc_next(tu_desc_next(desc_ep));
 
   // Prepare for incoming data from host
   TU_ASSERT(usbd_edpt_xfer(rhport, _btd_itf.ep_acl_out, _btd_itf.epout_buf, CFG_TUD_BTH_DATA_EPSIZE), 0);
@@ -238,10 +256,8 @@ bool btd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t c
   return true;
 }
 
-bool btd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes)
-{
-  (void)result;
-
+bool btd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result,
+                 uint32_t xferred_bytes) {
   // received new data from host
   if (ep_addr == _btd_itf.ep_acl_out)
   {
@@ -256,7 +272,20 @@ bool btd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t
   }
   else if (ep_addr == _btd_itf.ep_acl_in)
   {
-    if (tud_bt_acl_data_sent_cb) tud_bt_acl_data_sent_cb((uint16_t)xferred_bytes);
+    if ((result == XFER_RESULT_SUCCESS) && (xferred_bytes > 0) &&
+        ((xferred_bytes & (_btd_itf.ep_acl_in_pkt_sz - 1)) == 0)) {
+      // Save number of transferred bytes
+      _btd_itf.prev_xferred_bytes = xferred_bytes;
+
+      // Send zero-length packet
+      tud_bt_acl_data_send(NULL, 0);
+    } else if (tud_bt_acl_data_sent_cb) {
+      if (xferred_bytes == 0) {
+        xferred_bytes = _btd_itf.prev_xferred_bytes;
+        _btd_itf.prev_xferred_bytes = 0;
+      }
+      tud_bt_acl_data_sent_cb((uint16_t)xferred_bytes);
+    }
   }
 
   return true;

From 8ab1e4fbd01f9ec0f01cbfee26e72c73f8eeea44 Mon Sep 17 00:00:00 2001
From: dp111 <19616418+dp111@users.noreply.github.com>
Date: Tue, 3 Sep 2024 19:38:34 +0100
Subject: [PATCH 200/204] make function prototypes match ( found by cppcheck)

---
 src/common/tusb_fifo.h    | 8 ++++----
 src/device/usbd_control.c | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h
index 6c0efb5090..879acda4fd 100644
--- a/src/common/tusb_fifo.h
+++ b/src/common/tusb_fifo.h
@@ -154,14 +154,14 @@ void tu_fifo_config_mutex(tu_fifo_t *f, osal_mutex_t wr_mutex, osal_mutex_t rd_m
 #define tu_fifo_config_mutex(_f, _wr_mutex, _rd_mutex)
 #endif
 
-bool     tu_fifo_write                  (tu_fifo_t* f, void const * p_data);
-uint16_t tu_fifo_write_n                (tu_fifo_t* f, void const * p_data, uint16_t n);
+bool     tu_fifo_write                  (tu_fifo_t* f, void const * data);
+uint16_t tu_fifo_write_n                (tu_fifo_t* f, void const * data, uint16_t n);
 #ifdef TUP_MEM_CONST_ADDR
 uint16_t tu_fifo_write_n_const_addr_full_words    (tu_fifo_t* f, const void * data, uint16_t n);
 #endif
 
-bool     tu_fifo_read                   (tu_fifo_t* f, void * p_buffer);
-uint16_t tu_fifo_read_n                 (tu_fifo_t* f, void * p_buffer, uint16_t n);
+bool     tu_fifo_read                   (tu_fifo_t* f, void * buffer);
+uint16_t tu_fifo_read_n                 (tu_fifo_t* f, void * buffer, uint16_t n);
 #ifdef TUP_MEM_CONST_ADDR
 uint16_t tu_fifo_read_n_const_addr_full_words     (tu_fifo_t* f, void * buffer, uint16_t n);
 #endif
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index 35cce1f7ee..b1fd357aa3 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -137,7 +137,7 @@ bool tud_control_xfer(uint8_t rhport, tusb_control_request_t const* request, voi
 void usbd_control_reset(void);
 void usbd_control_set_request(tusb_control_request_t const* request);
 void usbd_control_set_complete_callback(usbd_control_xfer_cb_t fp);
-bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
 
 void usbd_control_reset(void) {
   tu_varclr(&_ctrl_xfer);

From dde81f8f0347fe6cd73485aec717b96bf593eabc Mon Sep 17 00:00:00 2001
From: dp111 <19616418+dp111@users.noreply.github.com>
Date: Tue, 3 Sep 2024 19:59:55 +0100
Subject: [PATCH 201/204] make function prototypes match definitions ( found
 with cppcheck)

---
 .../vendor/ceedling/vendor/unity/src/unity_internals.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/test/unit-test/vendor/ceedling/vendor/unity/src/unity_internals.h b/test/unit-test/vendor/ceedling/vendor/unity/src/unity_internals.h
index 2c91b6db1f..d66309f96d 100644
--- a/test/unit-test/vendor/ceedling/vendor/unity/src/unity_internals.h
+++ b/test/unit-test/vendor/ceedling/vendor/unity/src/unity_internals.h
@@ -632,14 +632,14 @@ void UnityAssertNumbersArrayWithin(const UNITY_UINT delta,
                                    const UNITY_FLAGS_T flags);
 
 #ifndef UNITY_EXCLUDE_SETJMP_H
-UNITY_NORETURN void UnityFail(const char* message, const UNITY_LINE_TYPE line);
-UNITY_NORETURN void UnityIgnore(const char* message, const UNITY_LINE_TYPE line);
+UNITY_NORETURN void UnityFail(const char* msg, const UNITY_LINE_TYPE line);
+UNITY_NORETURN void UnityIgnore(const char* msg, const UNITY_LINE_TYPE line);
 #else
-void UnityFail(const char* message, const UNITY_LINE_TYPE line);
-void UnityIgnore(const char* message, const UNITY_LINE_TYPE line);
+void UnityFail(const char* msg, const UNITY_LINE_TYPE line);
+void UnityIgnore(const char* msg, const UNITY_LINE_TYPE line);
 #endif
 
-void UnityMessage(const char* message, const UNITY_LINE_TYPE line);
+void UnityMessage(const char* msg, const UNITY_LINE_TYPE line);
 
 #ifndef UNITY_EXCLUDE_FLOAT
 void UnityAssertFloatsWithin(const UNITY_FLOAT delta,

From fc07df320bf20ed5b3d78ad181d8af1533e12c12 Mon Sep 17 00:00:00 2001
From: dp111 <19616418+dp111@users.noreply.github.com>
Date: Tue, 3 Sep 2024 20:28:42 +0100
Subject: [PATCH 202/204] use fixed with in printf ( found by clang)

NB %lu is a minimum of 32 bits where as the variable use is exactly 32 bits . This can affect porting to other systems.
---
 examples/typec/power_delivery/src/main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c
index 489d01aa18..a8214f34e6 100644
--- a/examples/typec/power_delivery/src/main.c
+++ b/examples/typec/power_delivery/src/main.c
@@ -98,7 +98,7 @@ bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t
             pd_pdo_fixed_t const* fixed = (pd_pdo_fixed_t const*) &pdo;
             uint32_t const voltage_mv = fixed->voltage_50mv*50;
             uint32_t const current_ma = fixed->current_max_10ma*10;
-            printf("[Fixed] %lu mV %lu mA\r\n", voltage_mv, current_ma);
+            printf("[Fixed] %"PRIu32" mV %"PRIu32" mA\r\n", voltage_mv, current_ma);
 
             if (voltage_mv <= VOLTAGE_MAX_MV && current_ma >= CURRENT_MAX_MA) {
               // Found a suitable PDO

From 6935c663094bbba58e03c7820f4c2893fbce61a1 Mon Sep 17 00:00:00 2001
From: dp111 <19616418+dp111@users.noreply.github.com>
Date: Tue, 3 Sep 2024 20:32:23 +0100
Subject: [PATCH 203/204] Make function parameter definitions match function
 prototypes ( found with cppcheck)

---
 lib/networking/dhserver.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/networking/dhserver.h b/lib/networking/dhserver.h
index b0d57ac4ea..6a443b2209 100644
--- a/lib/networking/dhserver.h
+++ b/lib/networking/dhserver.h
@@ -59,7 +59,7 @@ typedef struct dhcp_config
 #ifdef __cplusplus
 extern "C" {
 #endif
-err_t dhserv_init(const dhcp_config_t *config);
+err_t dhserv_init(const dhcp_config_t *c);
 void dhserv_free(void);
 #ifdef __cplusplus
 }

From 0bb7b992d8383e30a84d0114537ce777fb9d678e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 4 Sep 2024 20:56:04 +0700
Subject: [PATCH 204/204] dwc2: for esp32 force disconnect/connect using
 USB_WRAP otg pad override (DM=DP=0) in addition to dwc2's dctrl

---
 .github/actions/setup_toolchain/action.yml    |  2 -
 .../setup_toolchain/espressif/action.yml      |  2 +-
 src/common/tusb_mcu.h                         |  1 +
 src/portable/synopsys/dwc2/dcd_dwc2.c         | 24 +++++++++-
 src/portable/synopsys/dwc2/dwc2_esp32.h       | 44 ++++++++-----------
 5 files changed, 43 insertions(+), 30 deletions(-)

diff --git a/.github/actions/setup_toolchain/action.yml b/.github/actions/setup_toolchain/action.yml
index d173d69037..5b9bc95cec 100644
--- a/.github/actions/setup_toolchain/action.yml
+++ b/.github/actions/setup_toolchain/action.yml
@@ -39,8 +39,6 @@ runs:
         TOOLCHAIN_JSON='{
           "aarch64-gcc": "https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz",
           "arm-clang": "https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm/releases/download/release-17.0.1/LLVMEmbeddedToolchainForArm-17.0.1-Linux-x86_64.tar.xz",
-          "arm-iar": "",
-          "arm-gcc": "",
           "msp430-gcc": "http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/9_2_0_0/export/msp430-gcc-9.2.0.50_linux64.tar.bz2",
           "riscv-gcc": "https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v13.2.0-2/xpack-riscv-none-elf-gcc-13.2.0-2-linux-x64.tar.gz",
           "rx-gcc": "http://gcc-renesas.com/downloads/get.php?f=rx/8.3.0.202004-gnurx/gcc-8.3.0.202004-GNURX-ELF.run"
diff --git a/.github/actions/setup_toolchain/espressif/action.yml b/.github/actions/setup_toolchain/espressif/action.yml
index 3129329ddb..1e3ce18f19 100644
--- a/.github/actions/setup_toolchain/espressif/action.yml
+++ b/.github/actions/setup_toolchain/espressif/action.yml
@@ -5,7 +5,7 @@ inputs:
     description: 'Toolchain name'
     required: true
   toolchain_version:
-    description: 'Toolchain URL or version'
+    description: 'Toolchain version'
     required: true
 
 runs:
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 52debf0792..0a4462a0aa 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -336,6 +336,7 @@
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
   #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_ESP32
   #define TUP_DCD_ENDPOINT_MAX    6
 
 #elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C6, OPT_MCU_ESP32H2)
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index 9a38b46dc5..daed761057 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -43,7 +43,7 @@
 
 #if defined(TUP_USBIP_DWC2_STM32)
   #include "dwc2_stm32.h"
-#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
+#elif defined(TUP_USBIP_DWC2_ESP32)
   #include "dwc2_esp32.h"
 #elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
   #include "dwc2_gd32.h"
@@ -667,12 +667,34 @@ void dcd_remote_wakeup(uint8_t rhport) {
 void dcd_connect(uint8_t rhport) {
   (void) rhport;
   dwc2_regs_t* dwc2 = DWC2_REG(rhport);
+
+#ifdef TUP_USBIP_DWC2_ESP32
+  usb_wrap_otg_conf_reg_t conf = USB_WRAP.otg_conf;
+  conf.pad_pull_override = 0;
+  conf.dp_pullup = 0;
+  conf.dp_pulldown = 0;
+  conf.dm_pullup = 0;
+  conf.dm_pulldown = 0;
+  USB_WRAP.otg_conf = conf;
+#endif
+
   dwc2->dctl &= ~DCTL_SDIS;
 }
 
 void dcd_disconnect(uint8_t rhport) {
   (void) rhport;
   dwc2_regs_t* dwc2 = DWC2_REG(rhport);
+
+#ifdef TUP_USBIP_DWC2_ESP32
+  usb_wrap_otg_conf_reg_t conf = USB_WRAP.otg_conf;
+  conf.pad_pull_override = 1;
+  conf.dp_pullup = 0;
+  conf.dp_pulldown = 1;
+  conf.dm_pullup = 0;
+  conf.dm_pulldown = 1;
+  USB_WRAP.otg_conf = conf;
+#endif
+
   dwc2->dctl |= DCTL_SDIS;
 }
 
diff --git a/src/portable/synopsys/dwc2/dwc2_esp32.h b/src/portable/synopsys/dwc2/dwc2_esp32.h
index 932f52f403..1a938ea46c 100644
--- a/src/portable/synopsys/dwc2/dwc2_esp32.h
+++ b/src/portable/synopsys/dwc2/dwc2_esp32.h
@@ -32,60 +32,52 @@
  extern "C" {
 #endif
 
+#include "freertos/task.h"
+
 #include "esp_intr_alloc.h"
 #include "soc/periph_defs.h"
-//#include "soc/usb_periph.h"
-#include "freertos/task.h"
+#include "soc/usb_wrap_struct.h"
 
 #define DWC2_REG_BASE       0x60080000UL
 #define DWC2_EP_MAX         6             // USB_OUT_EP_NUM. TODO ESP32Sx only has 5 tx fifo (5 endpoint IN)
 
-static const dwc2_controller_t _dwc2_controller[] =
-{
+static const dwc2_controller_t _dwc2_controller[] = {
   { .reg_base = DWC2_REG_BASE, .irqnum = 0, .ep_count = DWC2_EP_MAX, .ep_fifo_size = 1024 }
 };
 
 static intr_handle_t usb_ih;
 
-static void dcd_int_handler_wrap(void* arg)
-{
-  (void) arg;
+static void dcd_int_handler_wrap(void* arg) {
+  (void)arg;
   dcd_int_handler(0);
 }
 
-TU_ATTR_ALWAYS_INLINE
-static inline void dwc2_dcd_int_enable (uint8_t rhport)
-{
-  (void) rhport;
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_enable(uint8_t rhport) {
+  (void)rhport;
   esp_intr_alloc(ETS_USB_INTR_SOURCE, ESP_INTR_FLAG_LOWMED, dcd_int_handler_wrap, NULL, &usb_ih);
 }
 
-TU_ATTR_ALWAYS_INLINE
-static inline void dwc2_dcd_int_disable (uint8_t rhport)
-{
-  (void) rhport;
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_dcd_int_disable(uint8_t rhport) {
+  (void)rhport;
   esp_intr_free(usb_ih);
 }
 
-static inline void dwc2_remote_wakeup_delay(void)
-{
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_remote_wakeup_delay(void) {
   vTaskDelay(pdMS_TO_TICKS(1));
 }
 
 // MCU specific PHY init, called BEFORE core reset
-static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
-{
-  (void) dwc2;
-  (void) hs_phy_type;
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_init(dwc2_regs_t* dwc2, uint8_t hs_phy_type) {
+  (void)dwc2;
+  (void)hs_phy_type;
 
   // nothing to do
 }
 
 // MCU specific PHY update, it is called AFTER init() and core reset
-static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
-{
-  (void) dwc2;
-  (void) hs_phy_type;
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_update(dwc2_regs_t* dwc2, uint8_t hs_phy_type) {
+  (void)dwc2;
+  (void)hs_phy_type;
 
   // nothing to do
 }
@@ -94,4 +86,4 @@ static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
 }
 #endif
 
-#endif /* _DWC2_ESP32_H_ */
+#endif