address unused-vars in the no-assert build for PR #213007 - #228986
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sushgokh merged 1 commit intoOct 5, 2026
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added
vectorizers
llvm:transforms
llvm:vectorcombine
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@llvm/pr-subscribers-llvm-transforms @llvm/pr-subscribers-vectorizers Author: Sushant Gokhale (sushgokh) ChangesFull diff: https://github.com/llvm/llvm-project/pull/228986.diff 1 Files Affected:
diff --git a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
index dbbc312cf2bd8..f5fe77d8791fc 100644
--- a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+++ b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
@@ -6924,12 +6924,10 @@ bool VectorCombine::foldShuffleOfAdjacentLoads(Instruction &I) {
// shuffle 0th operand = HighLoad
// shuffle 1st operand = LowLoad
// Implication with this is shuffle mask for the wide load changes
- auto RemapMask = [LowLoad, HighLoad, NumElts](ShuffleVectorInst *SV,
- SmallVectorImpl<int> &NewMask) {
+ auto RemapMask = [&](ShuffleVectorInst *SV, SmallVectorImpl<int> &NewMask) {
Value *SVOp0 = SV->getOperand(0);
- Value *SVOp1 = SV->getOperand(1);
- assert(((SVOp0 == LowLoad && SVOp1 == HighLoad) ||
- (SVOp0 == HighLoad && SVOp1 == LowLoad)) &&
+ assert(((SVOp0 == LowLoad && SV->getOperand(1) == HighLoad) ||
+ (SVOp0 == HighLoad && SV->getOperand(1) == LowLoad)) &&
"Shuffle operands must be exactly {LowLoad, HighLoad} or {HighLoad, "
"LowLoad}");
NewMask.assign(SV->getShuffleMask().begin(), SV->getShuffleMask().end());
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/216/builds/6806 Here is the relevant piece of the build log for the reference |
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