diff --git a/branchTrace.adoc b/branchTrace.adoc
index e62e1aa..b06366c 100644
--- a/branchTrace.adoc
+++ b/branchTrace.adoc
@@ -119,6 +119,7 @@ The instruction trace encoder needs to synchronise fully:
 was not traced;
 * If the instruction is the first of an interrupt service routine or
 exception handler;
+* If the privilege level changes; 
 * After a prolonged period of time.
 
 [[sec:endoftrace]]
diff --git a/payload.adoc b/payload.adoc
index dab4a5e..3f6bdc0 100644
--- a/payload.adoc
+++ b/payload.adoc
@@ -185,7 +185,7 @@ must be left shifted in order to recreate original byte address.
 |===
 
 [[sec:thaddr]]
-==== Format 3 *thaddr* and *address* fields
+==== Format 3 *thaddr*, *address* and *privilege* fields
 
 If an exception occurs at the target of an uninferable PC discontinuity,
 the value of the EPC cannot be infered from the program binary, and so
@@ -206,6 +206,8 @@ is 0 is that it may be at either the address of the next instruction or
 current instruction depending on the exception cause, which can be
 inferred by the decoder without adding complexity to the encoder.)
 
+Where an interrupt or exception causes a privilege change, this change comes into force from the start of the trap handler.  As such, the privilege value reported when *thaddr* is 0 will be the privilege level prior to any change.
+
 ==== Format 3 *tval* field
 
 This field reports the "trap value" from the appropriate