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SNES: SPC - Tweak previous timing fix for Kishin Douji
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The previous fix on its own fixed Kishin, but broke Kawasaki Superbike
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SourMesen committed Dec 26, 2024
1 parent 44337e5 commit e0dd12b
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Showing 2 changed files with 14 additions and 2 deletions.
3 changes: 2 additions & 1 deletion Core/SNES/Spc.Instructions.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,8 @@ void Spc::Run()
return;
}

uint64_t targetCycle = (uint64_t)(_memoryManager->GetMasterClock() * _clockRatio);
//Minus 1 because each call to ProcessCycle increments _state.Cycle by 2
uint64_t targetCycle = (uint64_t)(_memoryManager->GetMasterClock() * _clockRatio) - 1;
while(_state.Cycle < targetCycle) {
ProcessCycle();
}
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13 changes: 12 additions & 1 deletion Core/SNES/Spc.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -357,7 +357,18 @@ void Spc::CpuWriteRegister(uint32_t addr, uint8_t value)
Run();
if(_state.NewCpuRegs[addr & 0x03] != value) {
_state.NewCpuRegs[addr & 0x03] = value;
_pendingCpuRegUpdate = true;

//If the CPU's write lands in the first half of the SPC cycle (each cycle is 2 clocks) then the SPC
//can see the new value immediately, otherwise it only sees the new value on the following cycle.
//The delay is needed for Kishin Kishin Douji Zenki to boot.
//However, always delaying to the next SPC cycle causes Kawasaki Superbike Challenge to freeze on boot.
//Delaying only when the write occurs in the SPC cycle's second half allows both games to work (at the default 32040hz.)
//This solution behaves as if the CPU values were latched/updated every 2mhz tick (which matches the SPC's input clock)
if(_memoryManager->GetMasterClock() * _clockRatio - _state.Cycle <= 1) {
_state.CpuRegs[addr & 0x03] = value;
} else {
_pendingCpuRegUpdate = true;
}
}
}

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