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Merge pull request #2278 from Krasutski/feature/ch32f20x
Add CH32F20x support
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/* | ||
* The MIT License (MIT) | ||
* | ||
* Copyright (c) 2023, Denis Krasutski | ||
* | ||
* Permission is hereby granted, free of charge, to any person obtaining a copy | ||
* of this software and associated documentation files (the "Software"), to deal | ||
* in the Software without restriction, including without limitation the rights | ||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | ||
* copies of the Software, and to permit persons to whom the Software is | ||
* furnished to do so, subject to the following conditions: | ||
* | ||
* The above copyright notice and this permission notice shall be included in | ||
* all copies or substantial portions of the Software. | ||
* | ||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | ||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | ||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | ||
* THE SOFTWARE. | ||
*/ | ||
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#ifndef BOARD_H_ | ||
#define BOARD_H_ | ||
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#ifdef __cplusplus | ||
extern "C" { | ||
#endif | ||
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// LED: need to wire pin LED1 to PC0 in the P1 header | ||
#define LED_PORT GPIOC | ||
#define LED_PIN GPIO_Pin_1 | ||
#define LED_STATE_ON 0 | ||
#define LED_CLOCK_EN() RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE) | ||
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// Button: need to wire pin KEY to PC1 in the P1 header | ||
#define BUTTON_PORT GPIOC | ||
#define BUTTON_PIN GPIO_Pin_0 | ||
#define BUTTON_STATE_ACTIVE 0 | ||
#define BUTTON_CLOCK_EN() RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE) | ||
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// UART | ||
#define UART_DEV USART2 | ||
#define UART_DEV_IRQn USART2_IRQn | ||
#define UART_DEV_IRQHandler USART2_IRQHandler | ||
#define UART_DEV_GPIO_PORT GPIOA | ||
#define UART_DEV_TX_PIN GPIO_Pin_2 | ||
#define UART_DEV_CLK_EN() do { \ | ||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); \ | ||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); \ | ||
} while(0) | ||
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#ifdef __cplusplus | ||
} | ||
#endif | ||
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#endif |
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LD_FILE = $(FAMILY_PATH)/ch32f205.ld | ||
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SRC_S += \ | ||
$(FAMILY_PATH)/startup_gcc_ch32f20x_d8c.s | ||
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CFLAGS += \ | ||
-DCH32F20x_D8C |
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ENTRY(Reset_Handler) | ||
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_Min_Heap_Size = 0x200; | ||
_Min_Stack_Size = 0x400; | ||
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MEMORY | ||
{ | ||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K | ||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K | ||
} | ||
SECTIONS | ||
{ | ||
.isr_vector : | ||
{ | ||
. = ALIGN(4); | ||
KEEP(*(.isr_vector)) | ||
. = ALIGN(4); | ||
} >FLASH | ||
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.text : | ||
{ | ||
. = ALIGN(4); | ||
_stext = .; | ||
*(.text) | ||
*(.text*) | ||
*(.glue_7) | ||
*(.glue_7t) | ||
*(.eh_frame) | ||
KEEP (*(.init)) | ||
KEEP (*(.fini)) | ||
. = ALIGN(4); | ||
_etext = .; | ||
} >FLASH | ||
.rodata : | ||
{ | ||
. = ALIGN(4); | ||
*(.rodata) | ||
*(.rodata*) | ||
. = ALIGN(4); | ||
} >FLASH | ||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH | ||
.ARM : { | ||
__exidx_start = .; | ||
*(.ARM.exidx*) | ||
__exidx_end = .; | ||
} >FLASH | ||
.preinit_array : | ||
{ | ||
PROVIDE_HIDDEN (__preinit_array_start = .); | ||
KEEP (*(.preinit_array*)) | ||
PROVIDE_HIDDEN (__preinit_array_end = .); | ||
} >FLASH | ||
.init_array : | ||
{ | ||
PROVIDE_HIDDEN (__init_array_start = .); | ||
KEEP (*(SORT(.init_array.*))) | ||
KEEP (*(.init_array*)) | ||
PROVIDE_HIDDEN (__init_array_end = .); | ||
} >FLASH | ||
.fini_array : | ||
{ | ||
PROVIDE_HIDDEN (__fini_array_start = .); | ||
KEEP (*(SORT(.fini_array.*))) | ||
KEEP (*(.fini_array*)) | ||
PROVIDE_HIDDEN (__fini_array_end = .); | ||
} >FLASH | ||
_sidata = LOADADDR(.data); | ||
.data : | ||
{ | ||
. = ALIGN(4); | ||
_sdata = .; | ||
*(.data) | ||
*(.data*) | ||
. = ALIGN(4); | ||
_edata = .; | ||
} >RAM AT> FLASH | ||
. = ALIGN(4); | ||
.bss : | ||
{ | ||
_sbss = .; | ||
__bss_start__ = _sbss; | ||
*(.bss) | ||
*(.bss*) | ||
*(COMMON) | ||
. = ALIGN(4); | ||
_ebss = .; | ||
__bss_end__ = _ebss; | ||
} >RAM | ||
._user_heap_stack : | ||
{ | ||
. = ALIGN(4); | ||
PROVIDE ( end = . ); | ||
PROVIDE ( _end = . ); | ||
__HeapStart = .; | ||
. = . + _Min_Heap_Size; | ||
__HeapEnd = .; | ||
__StackLimit = .; | ||
. = . + _Min_Stack_Size; | ||
__StackTop = .; | ||
. = ALIGN(4); | ||
} >RAM | ||
_estack = __StackTop; | ||
_sstack = __StackLimit; | ||
/DISCARD/ : | ||
{ | ||
libc.a ( * ) | ||
libm.a ( * ) | ||
libgcc.a ( * ) | ||
} | ||
.ARM.attributes 0 : { *(.ARM.attributes) } | ||
} |
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/********************************** (C) COPYRIGHT ******************************* | ||
* File Name : ch32f20x_conf.h | ||
* Author : WCH | ||
* Version : V1.0.0 | ||
* Date : 2021/08/08 | ||
* Description : Library configuration file. | ||
********************************************************************************* | ||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. | ||
* Attention: This software (modified or not) and binary are used for | ||
* microcontroller manufactured by Nanjing Qinheng Microelectronics. | ||
*******************************************************************************/ | ||
#ifndef __CH32F20x_CONF_H | ||
#define __CH32F20x_CONF_H | ||
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#include "ch32f20x_adc.h" | ||
#include "ch32f20x_bkp.h" | ||
#include "ch32f20x_can.h" | ||
#include "ch32f20x_crc.h" | ||
#include "ch32f20x_dac.h" | ||
#include "ch32f20x_dbgmcu.h" | ||
#include "ch32f20x_dma.h" | ||
#include "ch32f20x_exti.h" | ||
#include "ch32f20x_flash.h" | ||
#include "ch32f20x_fsmc.h" | ||
#include "ch32f20x_gpio.h" | ||
#include "ch32f20x_i2c.h" | ||
#include "ch32f20x_iwdg.h" | ||
#include "ch32f20x_pwr.h" | ||
#include "ch32f20x_rcc.h" | ||
#include "ch32f20x_rtc.h" | ||
#include "ch32f20x_sdio.h" | ||
#include "ch32f20x_spi.h" | ||
#include "ch32f20x_tim.h" | ||
#include "ch32f20x_usart.h" | ||
#include "ch32f20x_wwdg.h" | ||
#include "ch32f20x_it.h" | ||
#include "ch32f20x_misc.h" | ||
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#endif /* __CH32F20x_CONF_H */ |
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#include "ch32f20x_it.h" | ||
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#include "ch32f20x.h" | ||
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/* -------------------------------------------------------------------------- */ | ||
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void NMI_Handler(void) { | ||
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} | ||
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/* -------------------------------------------------------------------------- */ | ||
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void MemManage_Handler(void) { | ||
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} | ||
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/* -------------------------------------------------------------------------- */ | ||
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void BusFault_Handler(void) { | ||
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} | ||
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/* -------------------------------------------------------------------------- */ | ||
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void UsageFault_Handler(void) { | ||
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} | ||
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/* -------------------------------------------------------------------------- */ | ||
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void DebugMon_Handler(void) { | ||
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} | ||
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/* -------------------------------------------------------------------------- */ |
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/********************************** (C) COPYRIGHT ******************************* | ||
* File Name : ch32f20x_it.h | ||
* Author : WCH | ||
* Version : V1.0.0 | ||
* Date : 2021/08/08 | ||
* Description : This file contains the headers of the interrupt handlers. | ||
********************************************************************************* | ||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. | ||
* Attention: This software (modified or not) and binary are used for | ||
* microcontroller manufactured by Nanjing Qinheng Microelectronics. | ||
*******************************************************************************/ | ||
#ifndef __CH32F20xIT_H | ||
#define __CH32F20xIT_H | ||
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#include "ch32f20x.h" | ||
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void NMI_Handler(void); | ||
void HardFault_Handler(void); | ||
void MemManage_Handler(void); | ||
void BusFault_Handler(void); | ||
void UsageFault_Handler(void); | ||
void DebugMon_Handler(void); | ||
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#endif /* __CH32F20xIT_H */ |
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/* There is core_cm3.h wrapper just to avoid warnings from CMSIS headers */ | ||
/* if you want use original file add to make file: | ||
INC += \ | ||
$(TOP)/$(CH32F20X_SDK_SRC)/CMSIS | ||
*/ | ||
#pragma GCC diagnostic push | ||
#pragma GCC diagnostic ignored "-Wstrict-prototypes" | ||
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#include <../../CMSIS/core_cm3.h> | ||
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#pragma GCC diagnostic pop |
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