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iommu/exynos: Workaround FLPD cache flush issues for SYSMMU v5
[ Upstream commit cd37a29 ] For some unknown reasons, in some cases, FLPD cache invalidation doesn't work properly with SYSMMU v5 controllers found in Exynos5433 SoCs. This can be observed by a firmware crash during initialization phase of MFC video decoder available in the mentioned SoCs when IOMMU support is enabled. To workaround this issue perform a full TLB/FLPD invalidation in case of replacing any first level page descriptors in case of SYSMMU v5. Fixes: 740a01e ("iommu/exynos: Add support for v5 SYSMMU") CC: [email protected] # v4.10+ Signed-off-by: Marek Szyprowski <[email protected]> Tested-by: Andrzej Hajda <[email protected]> Signed-off-by: Joerg Roedel <[email protected]> Signed-off-by: Sasha Levin <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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