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iommu/exynos: Workaround FLPD cache flush issues for SYSMMU v5
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[ Upstream commit cd37a29 ]

For some unknown reasons, in some cases, FLPD cache invalidation doesn't
work properly with SYSMMU v5 controllers found in Exynos5433 SoCs. This
can be observed by a firmware crash during initialization phase of MFC
video decoder available in the mentioned SoCs when IOMMU support is
enabled. To workaround this issue perform a full TLB/FLPD invalidation
in case of replacing any first level page descriptors in case of SYSMMU v5.

Fixes: 740a01e ("iommu/exynos: Add support for v5 SYSMMU")
CC: [email protected] # v4.10+
Signed-off-by: Marek Szyprowski <[email protected]>
Tested-by: Andrzej Hajda <[email protected]>
Signed-off-by: Joerg Roedel <[email protected]>
Signed-off-by: Sasha Levin <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
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mszyprow authored and gregkh committed Dec 25, 2017
1 parent 0f0ac21 commit 7171aa2
Showing 1 changed file with 4 additions and 1 deletion.
5 changes: 4 additions & 1 deletion drivers/iommu/exynos-iommu.c
Original file line number Diff line number Diff line change
Expand Up @@ -543,7 +543,10 @@ static void sysmmu_tlb_invalidate_flpdcache(struct sysmmu_drvdata *data,
if (is_sysmmu_active(data) && data->version >= MAKE_MMU_VER(3, 3)) {
clk_enable(data->clk_master);
if (sysmmu_block(data)) {
__sysmmu_tlb_invalidate_entry(data, iova, 1);
if (data->version >= MAKE_MMU_VER(5, 0))
__sysmmu_tlb_invalidate(data);
else
__sysmmu_tlb_invalidate_entry(data, iova, 1);
sysmmu_unblock(data);
}
clk_disable(data->clk_master);
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