airoha: an7581: add patch fixing support for MMC

Add patch fixing support for MMC. Additional clock are needed for MMC to
work and some small fixup to make the Mediatek MMC driver on Airoha SoC.

Signed-off-by: Christian Marangi <[email protected]>

target/linux/airoha/patches-6.6/110-01-clk-en7523-Rework-clock-handling-for-different-clock.patch

@@ -0,0 +1,82 @@
+From 04cd09990fdc3106d9fc4c47dda100e521d62a43 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Wed, 18 Dec 2024 10:03:45 +0100
+Subject: [PATCH 1/4] clk: en7523: Rework clock handling for different clock
+ numbers
+
+Airoha EN7581 SoC have additional clock compared to EN7523 but current
+driver permits to only support up to EN7523 clock numbers.
+
+To handle this, rework the clock handling and permit to declare the
+clocks number in match_data and alloca clk_data based on the compatible
+match_data.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/clk/clk-en7523.c | 14 ++++++++------
+ 1 file changed, 8 insertions(+), 6 deletions(-)
+
+--- a/drivers/clk/clk-en7523.c
++++ b/drivers/clk/clk-en7523.c
+@@ -75,6 +75,7 @@ struct en_rst_data {
+ };
+
+ struct en_clk_soc_data {
++	u32 num_clocks;
+ 	const struct clk_ops pcie_ops;
+ 	int (*hw_init)(struct platform_device *pdev,
+ 		       struct clk_hw_onecell_data *clk_data);
+@@ -525,8 +526,6 @@ static void en7523_register_clocks(struc
+
+ 	hw = en7523_register_pcie_clk(dev, np_base);
+ 	clk_data->hws[EN7523_CLK_PCIE] = hw;
+-
+-	clk_data->num = EN7523_NUM_CLOCKS;
+ }
+
+ static int en7523_clk_hw_init(struct platform_device *pdev,
+@@ -587,8 +586,6 @@ static void en7581_register_clocks(struc
+
+ 	hw = en7523_register_pcie_clk(dev, base);
+ 	clk_data->hws[EN7523_CLK_PCIE] = hw;
+-
+-	clk_data->num = EN7523_NUM_CLOCKS;
+ }
+
+ static int en7523_reset_update(struct reset_controller_dev *rcdev,
+@@ -702,21 +699,24 @@ static int en7523_clk_probe(struct platf
+ 	struct clk_hw_onecell_data *clk_data;
+ 	int r;
+
++	soc_data = device_get_match_data(&pdev->dev);
++
+ 	clk_data = devm_kzalloc(&pdev->dev,
+-				struct_size(clk_data, hws, EN7523_NUM_CLOCKS),
++				struct_size(clk_data, hws, soc_data->num_clocks),
+ 				GFP_KERNEL);
+ 	if (!clk_data)
+ 		return -ENOMEM;
+
+-	soc_data = device_get_match_data(&pdev->dev);
+ 	r = soc_data->hw_init(pdev, clk_data);
+ 	if (r)
+ 		return r;
+
++	clk_data->num = soc_data->num_clocks;
+ 	return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
+ }
+
+ static const struct en_clk_soc_data en7523_data = {
++	.num_clocks = ARRAY_SIZE(en7523_base_clks) + 1,
+ 	.pcie_ops = {
+ 		.is_enabled = en7523_pci_is_enabled,
+ 		.prepare = en7523_pci_prepare,
+@@ -726,6 +726,8 @@ static const struct en_clk_soc_data en75
+ };
+
+ static const struct en_clk_soc_data en7581_data = {
++	/* We increment num_clocks by 1 to account for additional PCIe clock */
++	.num_clocks = ARRAY_SIZE(en7581_base_clks) + 1,
+ 	.pcie_ops = {
+ 		.is_enabled = en7581_pci_is_enabled,
+ 		.enable = en7581_pci_enable,

target/linux/airoha/patches-6.6/110-02-dt-bindings-clock-drop-NUM_CLOCKS-define-for-EN7581.patch

@@ -0,0 +1,23 @@
+From 8fc9b68ee448d0e687d4dc52ec95bf367eb04caa Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Thu, 19 Dec 2024 13:13:37 +0100
+Subject: [PATCH 2/4] dt-bindings: clock: drop NUM_CLOCKS define for EN7581
+
+Drop NUM_CLOCKS define for EN7581 include. This is not a binding and
+should not be placed here. Value is derived internally in the user
+driver.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ include/dt-bindings/clock/en7523-clk.h | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/include/dt-bindings/clock/en7523-clk.h
++++ b/include/dt-bindings/clock/en7523-clk.h
+@@ -12,6 +12,4 @@
+ #define EN7523_CLK_CRYPTO	6
+ #define EN7523_CLK_PCIE		7
+
+-#define EN7523_NUM_CLOCKS	8
+-
+ #endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */

target/linux/airoha/patches-6.6/110-03-dt-bindings-clock-add-ID-for-eMMC-for-EN7581.patch

@@ -0,0 +1,23 @@
+From 238436f998c551688695d26ecdcd2ea4d51190b1 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Wed, 11 Dec 2024 12:22:37 +0100
+Subject: [PATCH 3/4] dt-bindings: clock: add ID for eMMC for EN7581
+
+Add ID for eMMC for EN7581. This is to control clock selection of eMMC
+between 200MHz and 150MHz.
+
+Signed-off-by: Christian Marangi <[email protected]>
+Acked-by: Conor Dooley <[email protected]>
+---
+ include/dt-bindings/clock/en7523-clk.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/include/dt-bindings/clock/en7523-clk.h
++++ b/include/dt-bindings/clock/en7523-clk.h
+@@ -12,4 +12,6 @@
+ #define EN7523_CLK_CRYPTO	6
+ #define EN7523_CLK_PCIE		7
+
++#define EN7581_CLK_EMMC		8
++
+ #endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */

target/linux/airoha/patches-6.6/110-04-clk-en7523-Add-clock-for-eMMC-for-EN7581.patch

@@ -0,0 +1,39 @@
+From 4fc22765b3888cf6575015b904718bfd36d1f49c Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Wed, 11 Dec 2024 12:22:38 +0100
+Subject: [PATCH 4/4] clk: en7523: Add clock for eMMC for EN7581
+
+Add clock for eMMC for EN7581. This is used to give info of the current
+eMMC source clock and to switch it from 200MHz or 150MHz.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/clk/clk-en7523.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/clk/clk-en7523.c
++++ b/drivers/clk/clk-en7523.c
+@@ -91,6 +91,7 @@ static const u32 emi7581_base[] = { 5400
+ static const u32 bus7581_base[] = { 600000000, 540000000 };
+ static const u32 npu7581_base[] = { 800000000, 750000000, 720000000, 600000000 };
+ static const u32 crypto_base[] = { 540000000, 480000000 };
++static const u32 emmc7581_base[] = { 200000000, 150000000 };
+
+ static const struct en_clk_desc en7523_base_clks[] = {
+ 	{
+@@ -281,6 +282,15 @@ static const struct en_clk_desc en7581_b
+ 		.base_shift = 0,
+ 		.base_values = crypto_base,
+ 		.n_base_values = ARRAY_SIZE(crypto_base),
++	}, {
++		.id = EN7581_CLK_EMMC,
++		.name = "emmc",
++
++		.base_reg = REG_CRYPTO_CLKSRC2,
++		.base_bits = 1,
++		.base_shift = 12,
++		.base_values = emmc7581_base,
++		.n_base_values = ARRAY_SIZE(emmc7581_base),
+ 	}
+ };
+

target/linux/airoha/patches-6.6/111-mmc-mtk-sd-add-support-for-AN7581-MMC-Host.patch

@@ -0,0 +1,138 @@
+From f38f16925e1aa7cc71f63d3d52997b1c98cd7781 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <[email protected]>
+Date: Wed, 11 Dec 2024 11:27:10 +0100
+Subject: [PATCH 4/4] mmc: mtk-sd: add support for AN7581 MMC Host
+
+Add support for AN7581 MMC Host. The MMC Host controller is based on
+mt7622 with the difference of not having regulator supply and state_uhs
+pins and hclk clock.
+
+Some minor fixes are applied to check if the state_uhs pins are defined
+and make hclk optional for the new airoha compatible.
+
+Signed-off-by: Christian Marangi <[email protected]>
+---
+ drivers/mmc/host/mtk-sd.c | 55 ++++++++++++++++++++++++++++++++-------
+ 1 file changed, 46 insertions(+), 9 deletions(-)
+
+--- a/drivers/mmc/host/mtk-sd.c
++++ b/drivers/mmc/host/mtk-sd.c
+@@ -615,6 +615,19 @@ static const struct mtk_mmc_compatible m
+ 	.stop_clk_fix = true,
+ };
+
++static const struct mtk_mmc_compatible an7581_compat = {
++	.clk_div_bits = 12,
++	.recheck_sdio_irq = true,
++	.hs400_tune = false,
++	.pad_tune_reg = MSDC_PAD_TUNE0,
++	.async_fifo = true,
++	.data_tune = true,
++	.busy_check = true,
++	.stop_clk_fix = true,
++	.enhance_rx = true,
++	.support_64g = false,
++};
++
+ static const struct of_device_id msdc_of_ids[] = {
+ 	{ .compatible = "mediatek,mt2701-mmc", .data = &mt2701_compat},
+ 	{ .compatible = "mediatek,mt2712-mmc", .data = &mt2712_compat},
+@@ -627,7 +640,7 @@ static const struct of_device_id msdc_of
+ 	{ .compatible = "mediatek,mt8173-mmc", .data = &mt8173_compat},
+ 	{ .compatible = "mediatek,mt8183-mmc", .data = &mt8183_compat},
+ 	{ .compatible = "mediatek,mt8516-mmc", .data = &mt8516_compat},
+-
++	{ .compatible = "airoha,an7581-mmc", .data = &an7581_compat},
+ 	{}
+ };
+ MODULE_DEVICE_TABLE(of, msdc_of_ids);
+@@ -1479,6 +1492,10 @@ static int msdc_ops_switch_volt(struct m
+ 	struct msdc_host *host = mmc_priv(mmc);
+ 	int ret;
+
++	/* Skip setting supply if not supported */
++	if (!mmc->supply.vqmmc)
++		return 0;
++
+ 	if (!IS_ERR(mmc->supply.vqmmc)) {
+ 		if (ios->signal_voltage != MMC_SIGNAL_VOLTAGE_330 &&
+ 		    ios->signal_voltage != MMC_SIGNAL_VOLTAGE_180) {
+@@ -1578,7 +1595,9 @@ static void msdc_enable_sdio_irq(struct
+ 				dev_dbg(host->dev, "SDIO eint irq: %d!\n", host->eint_irq);
+ 			}
+
+-			pinctrl_select_state(host->pinctrl, host->pins_uhs);
++			/* Skip setting uhs pins if not supported */
++			if (host->pins_uhs)
++				pinctrl_select_state(host->pinctrl, host->pins_uhs);
+ 		} else {
+ 			dev_pm_clear_wake_irq(host->dev);
+ 		}
+@@ -1886,6 +1905,10 @@ static void msdc_ops_set_ios(struct mmc_
+
+ 	msdc_set_buswidth(host, ios->bus_width);
+
++	/* Skip regulator if not supported */
++	if (!mmc->supply.vmmc)
++		goto skip_regulator;
++
+ 	/* Suspend/Resume will do power off/on */
+ 	switch (ios->power_mode) {
+ 	case MMC_POWER_UP:
+@@ -1921,6 +1944,7 @@ static void msdc_ops_set_ios(struct mmc_
+ 		break;
+ 	}
+
++skip_regulator:
+ 	if (host->mclk != ios->clock || host->timing != ios->timing)
+ 		msdc_set_mclk(host, ios->timing, ios->clock);
+ }
+@@ -2617,9 +2641,12 @@ static int msdc_of_clock_parse(struct pl
+ 	if (IS_ERR(host->src_clk))
+ 		return PTR_ERR(host->src_clk);
+
+-	host->h_clk = devm_clk_get(&pdev->dev, "hclk");
+-	if (IS_ERR(host->h_clk))
+-		return PTR_ERR(host->h_clk);
++	/* AN7581 SoC doesn't have hclk */
++	if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
++		host->h_clk = devm_clk_get(&pdev->dev, "hclk");
++		if (IS_ERR(host->h_clk))
++			return PTR_ERR(host->h_clk);
++	}
+
+ 	host->bus_clk = devm_clk_get_optional(&pdev->dev, "bus_clk");
+ 	if (IS_ERR(host->bus_clk))
+@@ -2740,11 +2767,14 @@ static int msdc_drv_probe(struct platfor
+ 		goto host_free;
+ 	}
+
+-	host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
+-	if (IS_ERR(host->pins_uhs)) {
+-		ret = PTR_ERR(host->pins_uhs);
+-		dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
+-		goto host_free;
++	/* AN7581 doesn't have state_uhs pins */
++	if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
++		host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
++		if (IS_ERR(host->pins_uhs)) {
++			ret = PTR_ERR(host->pins_uhs);
++			dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
++			goto host_free;
++		}
+ 	}
+
+ 	/* Support for SDIO eint irq ? */
+@@ -2825,6 +2855,12 @@ static int msdc_drv_probe(struct platfor
+ 		dev_err(&pdev->dev, "Cannot ungate clocks!\n");
+ 		goto release_mem;
+ 	}
++
++	/* AN7581 without regulator require tune to OCR values */
++	if (device_is_compatible(&pdev->dev, "airoha,an7581-mmc") &&
++	    !mmc->ocr_avail)
++		mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
++
+ 	msdc_init_hw(host);
+
+ 	if (mmc->caps2 & MMC_CAP2_CQE) {