Skip to content

Commit

Permalink
Merge pull request #210 from bilalsakhawat-10xe/add_rv32e_tests
Browse files Browse the repository at this point in the history
Fix rv32e_unratified/C/cswsp-01 test
  • Loading branch information
neelgala authored Oct 1, 2021
2 parents 9141cf9 + be25ffa commit df4d941
Show file tree
Hide file tree
Showing 9 changed files with 5,948 additions and 5,827 deletions.
3 changes: 3 additions & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
@@ -1,5 +1,8 @@
# CHANGELOG

## [2.4.7] - 2021-10-01
- Fix for the issue #206

## [2.4.6] - 2021-08-02
- Added rv32e tests in riscv-test-suite

Expand Down
11,028 changes: 5,543 additions & 5,485 deletions riscv-test-stats/coverage/rv32e_unratified/C/coverage.html

Large diffs are not rendered by default.

94 changes: 77 additions & 17 deletions riscv-test-stats/coverage/rv32e_unratified/C/suite_coverage.rpt
Original file line number Diff line number Diff line change
Expand Up @@ -4831,25 +4831,24 @@ cswsp:
x13: 1
x14: 1
x15: 1
x2: 1
x3: 1
x4: 1
x5: 1
x6: 1
x7: 1
x8: 1
x9: 1
coverage: 15/15
coverage: 14/14
val_comb:
imm_val == 0: 3
imm_val == 0: 1
rs2_val == 2147483647: 1 # Walking Zeros: 0x7fffffff
rs2_val == -1073741825: 1 # Walking Zeros: -0x40000001
rs2_val == -536870913: 1 # Walking Zeros: -0x20000001
rs2_val == -268435457: 1 # Walking Zeros: -0x10000001
rs2_val == -134217729: 1 # Walking Zeros: -0x8000001
rs2_val == -67108865: 1 # Walking Zeros: -0x4000001
rs2_val == -33554433: 1 # Walking Zeros: -0x2000001
rs2_val == -16777217: 2 # Walking Zeros: -0x1000001
rs2_val == -16777217: 1 # Walking Zeros: -0x1000001
rs2_val == -8388609: 1 # Walking Zeros: -0x800001
rs2_val == -4194305: 1 # Walking Zeros: -0x400001
rs2_val == -2097153: 1 # Walking Zeros: -0x200001
Expand All @@ -4858,7 +4857,7 @@ cswsp:
rs2_val == -262145: 1 # Walking Zeros: -0x40001
rs2_val == -131073: 1 # Walking Zeros: -0x20001
rs2_val == -65537: 1 # Walking Zeros: -0x10001
rs2_val == -32769: 1 # Walking Zeros: -0x8001
rs2_val == -32769: 2 # Walking Zeros: -0x8001
rs2_val == -16385: 1 # Walking Zeros: -0x4001
rs2_val == -8193: 1 # Walking Zeros: -0x2001
rs2_val == -4097: 1 # Walking Zeros: -0x1001
Expand All @@ -4875,11 +4874,11 @@ cswsp:
rs2_val == -3: 1 # Walking Zeros: -0x3
rs2_val == -2: 1 # Walking Zeros: -0x2
imm_val == 124: 3 # Walking Zeros: 0x7c
imm_val == 188: 5 # Walking Zeros: 0xbc
imm_val == 220: 1 # Walking Zeros: 0xdc
imm_val == 188: 2 # Walking Zeros: 0xbc
imm_val == 220: 2 # Walking Zeros: 0xdc
imm_val == 236: 1 # Walking Zeros: 0xec
imm_val == 244: 1 # Walking Zeros: 0xf4
imm_val == 248: 3 # Walking Zeros: 0xf8
imm_val == 244: 2 # Walking Zeros: 0xf4
imm_val == 248: 4 # Walking Zeros: 0xf8
rs2_val == -2147483648: 1 # Walking Ones: -0x80000000
rs2_val == 1073741824: 1 # Walking Ones: 0x40000000
rs2_val == 536870912: 1 # Walking Ones: 0x20000000
Expand Down Expand Up @@ -4907,27 +4906,27 @@ cswsp:
rs2_val == 128: 1 # Walking Ones: 0x80
rs2_val == 64: 1 # Walking Ones: 0x40
rs2_val == 32: 1 # Walking Ones: 0x20
rs2_val == 16: 2 # Walking Ones: 0x10
rs2_val == 16: 1 # Walking Ones: 0x10
rs2_val == 8: 1 # Walking Ones: 0x8
rs2_val == 4: 1 # Walking Ones: 0x4
rs2_val == 2: 1 # Walking Ones: 0x2
rs2_val == 1: 1 # Walking Ones: 0x1
imm_val == 128: 2 # Walking Ones: 0x80
imm_val == 64: 1 # Walking Ones: 0x40
imm_val == 32: 1 # Walking Ones: 0x20
imm_val == 64: 3 # Walking Ones: 0x40
imm_val == 32: 3 # Walking Ones: 0x20
imm_val == 16: 2 # Walking Ones: 0x10
imm_val == 8: 4 # Walking Ones: 0x8
imm_val == 4: 4 # Walking Ones: 0x4
imm_val == 8: 2 # Walking Ones: 0x8
imm_val == 4: 3 # Walking Ones: 0x4
rs2_val == -1431655766: 1 # Alternate: -0x55555556
rs2_val == 1431655765: 1 # Alternate: 0x55555555
imm_val == 168: 3 # Alternate: 0xa8
imm_val == 84: 3 # Alternate: 0x54
imm_val > 0: 67
imm_val == 84: 2 # Alternate: 0x54
imm_val > 0: 69
rs2_val == (-2**(xlen-1)): 1
rs2_val == (2**(xlen-1)-1): 1
rs2_val == 0: 1
coverage: 85/85
total_coverage: 101/101
total_coverage: 100/100
cxor:
config:
- check ISA:=regex(.*E.*C.*) ;def RVTEST_E = True
Expand Down Expand Up @@ -5586,6 +5585,39 @@ cxor:
coverage: 624/624
total_coverage: 643/643
datasets:
all_fregs:
f0: 0
f1: 0
f10: 0
f11: 0
f12: 0
f13: 0
f14: 0
f15: 0
f16: 0
f17: 0
f18: 0
f19: 0
f2: 0
f20: 0
f21: 0
f22: 0
f23: 0
f24: 0
f25: 0
f26: 0
f27: 0
f28: 0
f29: 0
f3: 0
f30: 0
f31: 0
f4: 0
f5: 0
f6: 0
f7: 0
f8: 0
f9: 0
all_regs:
x0: 0
x1: 0
Expand Down Expand Up @@ -5794,6 +5826,19 @@ datasets:
ifmt_val_comb_unsgn:
rs1_val != imm_val and rs1_val > 0 and imm_val > 0: 0
rs1_val == imm_val and rs1_val > 0 and imm_val > 0: 0
r4fmt_op_comb:
rd == rs2 == rs3 != rs1: 0
rs1 != rs2 and rs1 != rd and rs1 != rs3 and rs2 != rs3 and rs2 != rd and rs3 != rd: 0
rs1 == rd != rs2 and rs1 == rd != rs3 and rs3 != rs2: 0
rs1 == rd == rs3 != rs2: 0
rs1 == rs2 != rs3 and rs1 == rs2 != rd and rd != rs3: 0
rs1 == rs2 == rd != rs3: 0
rs1 == rs2 == rs3 != rd: 0
rs1 == rs2 == rs3 == rd: 0
rs1 == rs3 != rs2 and rs1 == rs3 != rd and rd != rs2: 0
rs2 == rd != rs1 and rs2 == rd != rs3 and rs3 != rs1: 0
rs2 == rs3 != rs1 and rs2 == rs3 != rd and rd != rs1: 0
rs3 == rd != rs1 and rs3 == rd != rs2 and rs2 != rs1: 0
rfmt_base_shift:
rs1_val < 0 and rs2_val == 0: 0
rs1_val < 0 and rs2_val > 0 and rs2_val < xlen: 0
Expand Down Expand Up @@ -5870,6 +5915,21 @@ datasets:
x7: 0
x8: 0
x9: 0
rv32e_regs_mx2:
x1: 0
x10: 0
x11: 0
x12: 0
x13: 0
x14: 0
x15: 0
x3: 0
x4: 0
x5: 0
x6: 0
x7: 0
x8: 0
x9: 0
sfmt_op_comb:
rs1 != rs2: 0
rs1 == rs2: 0
Loading

0 comments on commit df4d941

Please sign in to comment.