Merge pull request #5 from teachop/clock16

clock CAN from 16mhz xtal
teachop · Jul 12, 2014 · 2910f07 · 2910f07
2 parents 0ccb09f + e818d40
commit 2910f07
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Showing 3 changed files with 10 additions and 16 deletions.
diff --git a/FlexCAN.cpp b/FlexCAN.cpp
@@ -15,9 +15,10 @@ FlexCAN::FlexCAN(uint32_t baud)
   // set up the pins, 3=PTA12=CAN0_TX, 4=PTA13=CAN0_RX
   CORE_PIN3_CONFIG = PORT_PCR_MUX(2);
   CORE_PIN4_CONFIG = PORT_PCR_MUX(2);// | PORT_PCR_PE | PORT_PCR_PS;
-  // select clock source
+  // select clock source 16MHz xtal
+  OSC0_CR |= OSC_ERCLKEN;
   SIM_SCGC6 |=  SIM_SCGC6_FLEXCAN0;
-  FLEXCAN0_CTRL1 |= FLEXCAN_CTRL_CLK_SRC;
+  FLEXCAN0_CTRL1 &= ~FLEXCAN_CTRL_CLK_SRC;
 
   // enable CAN
   FLEXCAN0_MCR |=  FLEXCAN_MCR_FRZ;
@@ -37,19 +38,19 @@ FlexCAN::FlexCAN(uint32_t baud)
   //enable RX FIFO
   FLEXCAN0_MCR |= FLEXCAN_MCR_FEN;
 
-  // segment timings from freescale loopback test
+  // segment splits and clock divisor based on baud rate
   if ( 250000 == baud ) {
     FLEXCAN0_CTRL1 = (FLEXCAN_CTRL_PROPSEG(2) | FLEXCAN_CTRL_RJW(1)
-                      | FLEXCAN_CTRL_PSEG1(3) | FLEXCAN_CTRL_PSEG2(3) | FLEXCAN_CTRL_PRESDIV(15));
+                      | FLEXCAN_CTRL_PSEG1(7) | FLEXCAN_CTRL_PSEG2(3) | FLEXCAN_CTRL_PRESDIV(3));
   } else if ( 500000 == baud ) {
     FLEXCAN0_CTRL1 = (FLEXCAN_CTRL_PROPSEG(2) | FLEXCAN_CTRL_RJW(1)
-                      | FLEXCAN_CTRL_PSEG1(3) | FLEXCAN_CTRL_PSEG2(3) | FLEXCAN_CTRL_PRESDIV(7));
+                      | FLEXCAN_CTRL_PSEG1(7) | FLEXCAN_CTRL_PSEG2(3) | FLEXCAN_CTRL_PRESDIV(1));
   } else if ( 1000000 == baud ) {
-    FLEXCAN0_CTRL1 = (FLEXCAN_CTRL_PROPSEG(3) | FLEXCAN_CTRL_RJW(0)
-                      | FLEXCAN_CTRL_PSEG1(0) | FLEXCAN_CTRL_PSEG2(1) | FLEXCAN_CTRL_PRESDIV(5));
+    FLEXCAN0_CTRL1 = (FLEXCAN_CTRL_PROPSEG(2) | FLEXCAN_CTRL_RJW(0)
+                      | FLEXCAN_CTRL_PSEG1(1) | FLEXCAN_CTRL_PSEG2(1) | FLEXCAN_CTRL_PRESDIV(1));
   } else { // 125000
-    FLEXCAN0_CTRL1 = (FLEXCAN_CTRL_PROPSEG(2) | FLEXCAN_CTRL_RJW(2)
-                      | FLEXCAN_CTRL_PSEG1(3) | FLEXCAN_CTRL_PSEG2(3) | FLEXCAN_CTRL_PRESDIV(31));
+    FLEXCAN0_CTRL1 = (FLEXCAN_CTRL_PROPSEG(2) | FLEXCAN_CTRL_RJW(1)
+                      | FLEXCAN_CTRL_PSEG1(7) | FLEXCAN_CTRL_PSEG2(3) | FLEXCAN_CTRL_PRESDIV(7));
   }
 
   // Default mask is allow everything

diff --git a/FlexCAN.h b/FlexCAN.h
@@ -7,11 +7,6 @@
 
 #include <Arduino.h>
 
-// in the short term insure 48MHz bus speed
-#if F_BUS != 48000000
-#error "Only CPU speeds 48, 96 and 144 are supported"
-#endif
-
 typedef struct CAN_message_t {
   uint32_t id; // can identifier
   uint8_t ext; // identifier is extended

diff --git a/README.md b/README.md
@@ -11,8 +11,6 @@ Note that CAN will normally not work without termination resistors.
 
 Supported baud rates are 125000, 250000, 500000, and 1000000 bits per second.  If the baud rate is not specified it will default to 125000.
 
-Please note that **only CPU speeds 48, 96 and 144 are supported** presently.
-
 ###CAN Transceiver Options
 Please add parts you are using successfully with Teensy 3.1 to this list.
 - TI SN65HVD230D on 3.3V (1MBPS)