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trinathkella/README.md

Hi, I'm Trinath Kella

Passionate about VLSI Design & Verification

Technical Skills

Languages – C, C++, Python, Shell Scripting, TCL
HDLs – Verilog, SystemVerilog
Tools & Technologies – Vivado, Questa Sim, Xilinx SDK, Linux
Methodologies – UVM (Universal Verification Methodology)

Connect With Me

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Popular repositories Loading

  1. RTL_Design_Using_Verilog RTL_Design_Using_Verilog Public

    Digital Designs from basic circuits to complex circuits designed using HDL-VERILOG

    Verilog 1 1

  2. INTERNSHIP INTERNSHIP Public

    Six Months internship in functional level testing on railway signaling systems

  3. Vivado-Design-Suite-in-Ubuntu Vivado-Design-Suite-in-Ubuntu Public

    Step-by-step guide to install AMD Vivado Design Suite on Ubuntu.

  4. Single_Precision_Floating_Point_Unit Single_Precision_Floating_Point_Unit Public

    32-bit Floating Point Unit (FPU) designed and implemented as part of the CDAC specialization project. Supports IEEE-754 standard

    Verilog

  5. APB_PROTOCOL APB_PROTOCOL Public

    The APB (Advanced Peripheral Bus) protocol, developed by ARM, is used to facilitate communication between various components within a System on Chip (SoC).

    SystemVerilog

  6. trinathkella trinathkella Public